Power module
By introducing a guide member into the power module of the electrified vehicle, a compact current loop is formed, which solves the problems of semiconductor chip heating and reliability caused by the increase in inverter output requirements, and enhances the current superposition effect and improves the electrical characteristics.
Patent Information
- Application Number
- CN202410422694.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2023-09-04
- Filing Date
- 2024-04-09
- Publication Date
- 2025-03-04
AI Technical Summary
In electrified vehicles, as the inverter output requirements increase, the heating of the semiconductor chip increases, resulting in the increase in module size, and reliability problems such as electrical characteristics degradation and substrate warping occur.
By introducing a guide member into the power module and connecting it to the external terminal, a compact current loop is formed, reducing the current loop length, thereby enhancing the current superposition effect and improving electrical characteristics.
It realizes reducing the current loop length, enhancing the current superposition effect, improving the electrical characteristics and reliability of the power module, and avoiding thermal management problems caused by the increase in size.
Smart Images
Figure CN119560475A_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates to a power module having a structure for increasing a current superposition effect. Background Art
[0002] As people's concern for the environment grows, there is an increasing trend of environmentally friendly vehicles equipped with electric motors as a power source. Environmentally friendly vehicles, also called electrified vehicles, include electric vehicles (EVs) and hybrid electric vehicles (HEVs).
[0003] In electrified vehicles, an inverter may be equipped to convert direct current into alternating current for motor operation, and the inverter is generally composed of one or more power modules containing semiconductor chips that perform switching functions.
[0004] In some examples, as output requirements of inverters continue to rise, heating of semiconductor chips also increases to support the high output, resulting in an increase in size of key components such as semiconductor chips and substrates for handling the increased heat.
[0005] However, there is a need to address reliability issues such as degradation of module electrical characteristics or occurrence of substrate warping, which may occur as module sizes increase and current loops become longer and more complex.
[0006] The description of the background art provided above is intended to enhance the understanding of the background of the present disclosure and should not be construed as an admission that it is the prior art already known to those skilled in the art. Summary of the invention
[0007] An object of the present disclosure is to provide a power module capable of reducing a current loop through the shape and structure of a lead connected to an external terminal, thereby increasing a current superposition effect and enhancing electrical characteristics.
[0008] The objects of the present disclosure are not limited to the above contents, and other objects not described herein will be clearly understood by those skilled in the art from the following description.
[0009] In order to achieve the above-mentioned purpose, the power module includes: a first substrate formed by stacking a plurality of layers and extending in a direction intersecting a stacking direction; a semiconductor chip connected to the first substrate in the stacking direction; and a first guide member electrically connected to the first substrate at one end and extending in the stacking direction to be exposed to the outside at the other end.
[0010] For example, the other end of the first guide member may be connected to the external terminal.
[0011] For example, the power module may further include a molding member covering at least a portion of the first substrate, the semiconductor chip, and a portion of the first guide member, wherein the other end of the first guide member may include an exposed surface exposed to the outside of the molding member.
[0012] For example, the other end of the first guide member may extend to a level corresponding to an outer surface of an outermost layer among the plurality of layers of the first substrate.
[0013] For example, the first guide member may be connected to the first substrate at one end and extend from the one end in the extending direction of the first substrate, and bend and extend in the stacking direction at the other end.
[0014] For example, the plurality of layers may include an insulating layer and a metal layer arranged on a surface of the insulating layer facing the semiconductor chip, and one end of the first guide member is connected to the metal layer.
[0015] For example, the power module may further include: a second substrate spaced apart from the first substrate in the stacking direction, the semiconductor chip being located between the first substrate and the second substrate; and a second guide member electrically connected to the second substrate at one end and extending in the stacking direction at the other end to be exposed to the outside.
[0016] For example, the other ends of the first guide member and the second guide member may be connected to different external terminals.
[0017] For example, different external terminals may correspond to the P terminal and the N terminal, respectively.
[0018] For example, the other ends of the first guide member and the second guide member may be aligned on one side in the extension direction of the first substrate based on the semiconductor chip.
[0019] For example, in a plan view in the stacking direction, the other ends of the first guide member and the second guide member may at least partially overlap.
[0020] For example, the power module may further include a third guide member extending in the extension direction of the first substrate, connected to at least one of the first substrate and the second substrate at one end, and exposed to the outside at the other end in the extension direction of the first substrate.
[0021] For example, the other end of the third guide member may protrude in the extending direction of the first substrate to be exposed to the outside.
[0022] For example, the first guide member and the third guide member may be connected to different external terminals.
[0023] For example, the third guide member may be aligned on an opposite side of the semiconductor chip with respect to the first guide member in the extending direction of the first substrate.
[0024] As described above, the power module in various embodiments of the present disclosure is advantageous in achieving a compact current loop through a guide structure that allows external terminals connected to the power module to be arranged in a short vertical direction rather than a wide horizontal direction.
[0025] Even though the component size is enlarged for high power and heat dissipation purposes, the performance of the power module can be enhanced by reducing or shortening the extension of the current path.
[0026] The advantages of the present disclosure are not limited to the above contents, and other advantages not described herein may be clearly understood by those skilled in the art from the following description. BRIEF DESCRIPTION OF THE DRAWINGS
[0027] Figure 1 is a cross-sectional view showing an example configuration of a power module.
[0028] Figure 2 It shows when viewed from the outside Figure 1 A perspective view of an example appearance of a power module.
[0029] FIG. 3A to FIG. 5D 2 is a diagram illustrating example shapes and arrangements of first, second, and third guide members. DETAILED DESCRIPTION
[0030] The specific structural or functional descriptions of the embodiments of the present disclosure disclosed in this specification or patent application are illustrative examples intended to describe the embodiments of the present disclosure, and the embodiments of the present disclosure may be implemented in various forms and should not be construed as being limited to those forms described in this specification or this application.
[0031] In some embodiments, the power module may be designed with a pad-shaped portion for connection to an external terminal, which achieves performance improvement based on electrical characteristics of the power module through an increased current superposition effect in the form of a relatively narrow current loop even when the size is increased.
[0032] In some examples, for convenience of explanation, the first substrate 110 and the second substrate 120 are distinguished in the following description, but are not limited only to their arrangement or structure depicted in the drawings.
[0033] In the following, reference is made to Figure 1 and Figure 2 The overall structure of the power module 100 will be described.
[0034] Figure 1 is a cross-sectional view showing the structure of a power module, Figure 2 It shows when viewed from the outside Figure 1 A perspective view of the appearance of a power module.
[0035] Reference Figure 1 In some embodiments, the power module 100 may include a first substrate 110, a second substrate 120, a semiconductor chip 130, a spacer 140, a first guide member 151 ("first guide"), a second guide member 152 ("second guide"), a third guide member 153 ("third guide"), and a molding member 170 ("molding member"). However, it should be noted that Figure 1 Only components necessary to describe the embodiments of the present disclosure are shown, and the actual power module 100 may be implemented with more or fewer components.
[0036] In some embodiments, the first substrate 110 may be formed by stacking a plurality of layers 111, 112, and 113, which may extend in a direction intersecting the stacking direction. That is, the first substrate 110 is shaped by a plurality of layers stacked in a vertical direction and extending in a horizontal direction in the figure.
[0037] The semiconductor chip 130 may be connected to the first substrate 110 in a direction in which the plurality of layers 111, 112, and 113 are stacked. In more detail, the semiconductor chip 130 may be attached to the first substrate 110 by an adhesive material C or connected to the first substrate 110 via a spacer 140, and Figure 1 An appearance of the semiconductor chip 130 connected to the first substrate 110 via the spacer 140 is shown. In some examples, the semiconductor chip 130 may be connected to the first substrate 110 by soldering or sintering, and the adhesive material C may be implemented with various materials having conductivity.
[0038] The first guide member 151 may be electrically connected to the first substrate 110 at one end and be outwardly exposed at the other end in a direction in which the plurality of layers 111 , 112 , and 113 are stacked.
[0039] In this case, the other end of the first guide member 151 may be connected to the external terminal 200 .
[0040] In particular, the other end of the first guide member 151 exposed outward in the direction of stacking the plurality of layers 111, 112, and 113 may have an exposed surface. That is, the exposed end of the first guide member 151 may be implemented in the form of a pad, and in this case, the exposed surface of the other end of the first guide member 151 and the external terminal 200 may be combined face to face. The other end of the first guide member 151 and the external terminal 200 may be directly connected or connected via an adhesive material C' or the like. In this case, the adhesive material C' may be made of various materials having conductivity.
[0041] In some examples, the other end of the first guide member 151 may be formed by extending in a direction in which the plurality of layers 111, 112, and 113 constituting the first substrate 110 are stacked. In more detail, the other end of the first guide member 151 may extend to a level corresponding to an outer surface of an outermost layer among the plurality of layers 111, 112, and 113 of the first substrate 110. For example, in a direction in which the plurality of layers 111, 112, and 113 of the first substrate 110 are stacked, the other end of the first guide member 151 may extend to a level reaching or lower than an outer surface of an outermost layer among the plurality of layers 111, 112, and 113 of the first substrate 110.
[0042] In this case, the power module 100 has a structure in which a portion of the first guide member 151 is exposed to the outside to be connected to the external terminal 200 while ensuring that some portions of the current path are not directly exposed to the outside, thereby achieving insulation maintenance and protection of internal components.
[0043] The first guide member 151 may be covered by the molding member 170 to prevent exposure to the outside, excluding the other end, and thus only an exposed surface formed on the other end of the first guide member 151 may be exposed to the outside of the molding member 170 .
[0044] The molding member 170 may cover not only a portion including one end of the first guide member 151 but also at least a portion of internal components of the power module 100 such as the semiconductor chip 130 , the spacer 140 , and the first substrate 110 , thereby blocking electrical connection with the outside.
[0045] In some examples, the plurality of layers 111 , 112 , and 113 constituting the first substrate 110 may include an insulating layer 111 , a metal layer 112 disposed on a surface of the insulating layer facing the semiconductor chip 130 , and a metal layer 113 disposed on an opposite surface of the insulating layer 111 .
[0046] Here, the insulating layer 111 may be made of, for example, ceramic, the metal layers 112 and 113 may be made of, for example, copper (Cu), and the first substrate 110 may be implemented as an active metal brazing substrate (AMB) or a direct bonding copper (DBC) substrate.
[0047] In this case, one end of the first guide member 151 may be connected to the metal layer 112 in the first substrate 110. The metal layer 112 is electrically connected to the semiconductor chip 130, thereby allowing the first guide member 151 to form a part of a current loop by being connected to the metal layer 112.
[0048] In more detail, one end of the first guide member 151 may be connected to the metal layer 112 or one side of the metal layer 112 on a surface facing or opposite to the semiconductor chip 130, and for this purpose, the plurality of layers 111, 112, and 113 of the first substrate 110 may be implemented to have different lengths, such as Figure 1 In addition, as long as one end of the first guide member 151 can be electrically connected to the first substrate 110, the specific connection structure can be flexibly implemented in various ways.
[0049] In some examples, in addition to the first substrate 110 , the power module 100 may include a second substrate 120 , which is spaced apart from the first substrate 110 in the direction in which the multiple layers 111 , 112 , and 113 of the first substrate are stacked, and the semiconductor chip 130 is located between the first substrate 110 and the second substrate 120 .
[0050] That is, the power module 100 may be implemented using a double-side cooling method in which heat generated by the semiconductor chip 130 is dissipated through the substrates 110 and 120 .
[0051] The second substrate 120 may also be composed of a plurality of layers 121, 122, and 123 stacked in a similar manner to the first substrate and extending in a direction intersecting the stacking direction. In addition, the second substrate 120 is electrically connected to the semiconductor chip 130, and for example, Figure 1 As shown, when the first substrate 110 is connected to one side of the semiconductor chip 130 via the spacer 140 , the second substrate 120 may be connected to the other side of the semiconductor chip 130 .
[0052] The first substrate 110 and the second substrate 120 may be referred to as an upper substrate and a lower substrate, but are not necessarily limited to the upper substrate or the lower substrate. For example, in some embodiments, it is also conceivable to reverse the arrangement of the first substrate 110 and the second substrate 120 to implement the power module 100.
[0053] In some examples, in the power module 100 including the first substrate 110 and the second substrate 120 , the guide member may be connected to only one side of the first substrate 110 , but the guide member may also be connected to one side of the second substrate 120 .
[0054] In more detail, the power module 100 may further include a second guide member 152 having one end electrically connected to the second substrate 120 and the other end exposed to the outside in a stacking direction of the first substrate 110 or the second substrate 120 .
[0055] Here, for ease of explanation, the first guide member 151 and the second guide member 152 are distinguished, and in the power module 100 including a plurality of guide members, the guide member connected to the first substrate 110 may be referred to as the first guide member (151), and the guide member connected to the second substrate 120 may be referred to as the second guide member 152.
[0056] When the guide members are connected to both the first and second substrates 110 and 120, the other ends of the first and second guide members 151 and 152 may be connected to different external terminals 200. In this case, the different external terminals 200 may correspond to P terminals and N terminals, respectively.
[0057] In particular, the other ends of the first guide member 151 and the second guide member 152 may be aligned on one side based on the semiconductor chip 130 in the extension direction of the first substrate 110 or the second substrate 120. For example, the other ends of both the first guide member 151 and the second guide member 152 may be aligned to the left, as shown in FIG. Figure 1 shown.
[0058] In addition, the other ends of the first guide member 151 and the second guide member 152 may at least partially overlap in a plan view of the stacking direction of the first substrate 110 or the second substrate 120 .
[0059] In this case, the external terminals 200 respectively connected to the first guide member 151 and the second guide member 152 may also overlap in a plan view and be aligned on one side, such as Figure 2 As shown, this enables the current loop of the power module 100 to be formed narrower in the vertical direction rather than wider in the horizontal direction. By forming the current loop in a narrow vertical configuration, the current superposition effect is enhanced, thereby achieving improved performance based on the electrical characteristics of the power module 100.
[0060] In the following, reference is made to FIG. 3A to FIG. 5D An internal structure applicable to the power module 100 described above according to various embodiments is described.
[0061] FIG. 3A to FIG. 5D 2 is a diagram illustrating shapes and arrangements of first, second, and third guide members according to an embodiment of the present disclosure.
[0062] In some embodiments, Figure 3A and Figure 3B The power module 100 is shown having a double-sided cooling structure using a first base plate 110 and a second base plate 120 , in which a guide member is connected to only one of the base plates.
[0063] In this case, with Figure 1Differently, a substrate located at a lower portion of the drawing may be referred to as a first substrate 110 , and a guide member connected to the substrate may be referred to as a first guide member 151 .
[0064] The first guide member 151 may have a structure in which one end is connected to the metal layer 112 of the first substrate 110 and the other end is exposed to the outside and extends in the stacking direction of the first substrate 110. Figure 3A That is, in an embodiment, the first guide member 151 may be implemented to have a straight shape without any curved portion in a cross section.
[0065] On the contrary, refer to Figure 3B , the first guide member 151 may be connected to the first substrate 110 at one end and extend from the one end in the extending direction of the first substrate 110, and bend and extend at the other end in the stacking direction of the plurality of layers 111, 112, and 113. That is, the first guide member 151 may have a structure such that Figure 3A The other end extending in the stacking direction of the first substrate 110 and the one end extending in the extending direction of the first substrate 110 (ie, the horizontal direction in the drawing) instead of the stacking direction are connected via a bent portion therebetween.
[0066] although Figure 3A and Figure 3B There are differences in the detailed shapes between, but the structure of the first guide member 151 includes one end connected to the first substrate 110 and the other end exposed to the outside, and various other shapes can be applied to the first guide member 151 to ensure that one end is connected to the first substrate 110 and the other end is exposed to the outside.
[0067] In some examples, although the description focuses on Figure 3A and Figure 3B The first guide member 151 in the figure, but the second guide member 152 can also be implemented in a similar manner to the first guide member 151.
[0068] In some embodiments, FIG. 4A to FIG. 4C Shows the use of Figure 1 The power module 100 having a double-sided cooling structure of the similar first base plate 110 and the second base plate 120 , wherein the guide members are connected to the two base plates.
[0069] Reference Figure 4A The first guide member 151 and the second guide member 152 may be implemented to be connected to the first substrate 110 and the second substrate 120 at one end in a stacking direction of the first substrate 110 and the second substrate 120 and to be exposed to the outside at the other end. Figure 1 Similar to those shown, but with respect to alignment on opposite sides based on semiconductor chip 130. Figure 1 Different from those shown.
[0070] Reference Figure 4B The first guide member 151 and the second guide member 152 may be implemented to be aligned with the semiconductor chip 130 on one side. Figure 1 Similar to those shown, but having a curved shape rather than a straight line between one end and the other. Figure 1 Different from those shown.
[0071] Reference Figure 4C The first guide member 151 and the second guide member 152 may be implemented to be aligned on opposite sides based on the semiconductor chip 130. Figure 4A Similar to those shown in FIG. 1 , with a curved shape between one end and the other. Figure 4B Similar to those shown in .
[0072] In addition, the first and second guide members 151 and 152 of the power module 100 with double-side cooling may be implemented in various shapes and structures as long as they can be electrically connected to internal components of the power module 100 at one end and exposed to the outside at the other end.
[0073] In some embodiments, FIG. 5A to FIG. 5D The power module 100 is shown including a third guide member 153 in addition to the first guide member 151 and the second guide member 152 .
[0074] Specifically, the third guide member 153 extends in the extension direction of the first substrate 110 or the second substrate 120 and is connected to at least one of the first substrate 110 and the second substrate 120 at one end and is exposed to the outside in the extension direction at the other end.
[0075] That is, unlike the first and second guide members 151 and 152 whose one ends and the other ends are located at different levels in the vertical direction, the third guide member 153 may have one end and the other end located at the same level in the vertical direction in the drawing.
[0076] In addition, the third guide member 153 may protrude in the extending direction to be exposed to the outside, and the external terminal 200 may be connected to the protruding portion.
[0077] In this case, the first guide member 151 and the third guide member 153 can be connected to different external terminals 200. In addition, when the second guide member 152 is provided, the first to third guide members 151, 152 and 153 can be connected to different external terminals. The third guide member 153 can also be aligned on the opposite side relative to the first guide member 151 based on the semiconductor chip 130 in the extension direction.
[0078] For example, in FIG. 5A to FIG. 5D , the external terminal 200 corresponding to the P terminal may be connected to the first guide member 151 , the external terminal 200 corresponding to the N terminal may be connected to the second guide member 152 , and the external terminal 200 corresponding to the O terminal may be connected to the third guide member 153 .
[0079] In some examples, reference Figure 5C , the first guide member 151 may be connected to the first substrate 110 at one end via an insertion member 160 connected to an internal component (e.g., the spacer 140) rather than being directly connected to the first substrate 110. In this case, although the specific connection structure may be changed, one end of the first guide member 151 is still connected to the first substrate 110, and the other end is exposed to the outside. Obviously, the same structure may also be applied to the second guide member 152.
[0080] However, with FIG. 5A to FIG. 5D Unlike the illustrated embodiment, the arrangement and placement of the first guide member 151 , the second guide member 152 , and the third guide member 153 may be changed in consideration of convenience of connection with other components, ease of packaging, and the like.
[0081] As described above, the power module in various embodiments of the present disclosure is advantageous in achieving a compact current loop through a guide structure that allows external terminals connected to the power module to be arranged in a short vertical direction rather than a wide horizontal direction.
[0082] This can enhance the performance of the power module by reducing or shortening the extension of the current path, even if the component size is enlarged for high power and heat dissipation purposes.
[0083] While the present disclosure has been shown and described in connection with particular embodiments, it will be apparent to those skilled in the art that various modifications and changes may be made to the specific embodiments without departing from the scope of the disclosure as defined by the appended claims.
Claims
1. A power module, comprising: a first substrate including a plurality of layers stacked in a first direction and extending in a second direction intersecting the first direction; a semiconductor chip connected to the first substrate in the first direction; as well as A first guide extending in the first direction has (i) a first end electrically connected to the first substrate and (ii) a second end exposed to the outside of the power module. 2 . The power module according to claim 1 , wherein the second end of the first lead is connected to an external terminal provided outside the power module.
3. The power module according to claim 1, further comprising: a molding member covering at least a portion of each of the first substrate, the semiconductor chip, and the first guide, The second end of the first guide defines an exposed surface exposed to the exterior of the molded part. 4 . The power module according to claim 1 , wherein the second end of the first guide extends in the first direction to a position corresponding to an outer surface of an outermost layer among a plurality of layers of the first substrate. 5 . The power module of claim 1 , wherein the first guide extends in the second direction from a first end connected to the first substrate, bends in the second direction, and extends in the first direction to a second end exposed to the outside.
6. The power module of claim 1 , wherein the plurality of layers comprises: an insulating layer having a surface facing the semiconductor chip; as well as a metal layer arranged on a surface of the insulating layer facing the semiconductor chip, and A first end of the first lead is connected to the metal layer.
7. The power module according to claim 1, further comprising: a second substrate spaced apart from the first substrate in the first direction, wherein the semiconductor chip is located between the first substrate and the second substrate; as well as A second guide extending in the first direction has (i) a first end electrically connected to the second substrate and (ii) a second end exposed to the outside. 8 . The power module according to claim 7 , wherein the second end of the first lead and the second end of the second lead are connected to different external terminals, respectively. 9 . The power module according to claim 8 , wherein the different external terminals are a P terminal and an N terminal, respectively. 10 . The power module according to claim 7 , wherein the second end of the first lead and the second end of the second lead are disposed on one side in the second direction based on the semiconductor chip. 11 . The power module of claim 10 , wherein the second end of the first guide and the second end of the second guide at least partially overlap each other along the first direction.
12. The power module according to claim 7, further comprising: A third guide extending in the second direction has (i) a first end connected to at least one of the first substrate or the second substrate and (ii) a second end exposed to the outside. 13 . The power module according to claim 12 , wherein the second end of the third guide protrudes to the outside in the second direction. 14 . The power module according to claim 12 , wherein the first lead and the third lead are connected to different external terminals, respectively. 15 . The power module according to claim 12 , wherein the first lead and the third lead are disposed at opposite sides in the second direction based on the semiconductor chip.