Optical chip test system based on FPGA

Abstract

The invention relates to the technical field of optical chip testing, and particularly discloses an optical chip testing system based on an FPGA (Field Programmable Gate Array), which comprises an optical chip basic performance test analysis module, an optical chip performance rating module, an optical chip stability test analysis module, an optical chip signal processing test analysis module and a database. A high-precision laser and an optical power meter are used for calibration, a photoelectric detector is connected to the output end of an optical chip, and data are collected by an FPGA after amplification and analog-to-digital conversion, so that the input and output optical signal intensity of each test time period can be accurately obtained, and an optical gain value is accurately calculated; therefore, the amplification capability of the optical chip to the optical signal intensity in different time periods can be deeply known, the efficiency and accuracy of optical chip test analysis are effectively improved, the system fault risk caused by substandard chip performance is reduced, and valuable data support is provided for further optimization design of the optical chip.

Description

Technical Field

[0001] The present invention relates to the technical field of optical chip testing, and in particular to an optical chip testing system based on FPGA. Background Art

[0002] With the rapid development of science and technology, optical chips are playing an increasingly critical role in many fields such as optical communications, optical sensing, laser processing, and quantum computing. Their integration is constantly improving, and their functions are becoming more complex and diverse, which places extremely stringent requirements on the performance and quality of optical chips. In the field of optical communications, high-speed, large-capacity data transmission relies on the precise processing of optical signals by optical chips, including the intensity amplification, wavelength conversion, and modulation of optical signals, which must be stable and reliable; in optical sensing applications, optical chips need to maintain high-sensitivity detection and accurate analysis of weak optical signals under different environmental conditions; and in optical chip applications related to quantum computing, the precise manipulation and measurement of light quantum states poses unprecedented challenges to chip performance.

[0003] In terms of testing the intensity and wavelength of optical signals, traditional optical chip testing methods lack systematic and automated comprehensive analysis methods. The measurement of optical signal intensity changes and wavelength deviations of optical chips at different time periods is not accurate enough and it is difficult to fully evaluate their comprehensive performance. In terms of stability testing, traditional testing usually cannot comprehensively and quantitatively evaluate the performance changes of optical chips under different temperatures and long-term operation. In terms of signal processing capability testing, traditional testing methods cannot simultaneously take into account the comprehensive analysis of key factors such as the modulation rate of optical signals and multi-channel processing delays. Summary of the invention

[0004] In view of the above situation, in order to overcome the defects of the prior art, the present invention provides an optical chip testing system based on FPGA.

[0005] The technical solution adopted by the present invention to solve the above technical problems is: An optical chip testing system based on FPGA, comprising an optical chip basic performance test and analysis module, an optical chip performance rating module, an optical chip stability test and analysis module, an optical chip signal processing test and analysis module and a database; The optical chip basic performance test analysis module performs a comprehensive analysis based on the optical signal intensity and optical signal wavelength of the optical chip in each test period to obtain the comprehensive performance coefficient of the optical chip in each test period; The optical chip performance rating module draws a graph based on the input optical signal intensity and optical gain value of the optical chip in each test period, and obtains the input optical signal intensity segment with stable performance corresponding to the optical chip from the graph; The optical chip stability test analysis module performs comprehensive calculation and analysis based on the test temperature variable parameters and wavelength drift parameters of the optical chip corresponding to each test period, and obtains the stability state coefficient of the optical chip corresponding to each test period; The optical chip signal processing test and analysis module performs comprehensive calculation and analysis based on the optical signal modulation rate and optical signal multi-channel processing delay of the optical chip to obtain the high-speed signal processing capability coefficient of the optical chip.

[0006] Furthermore, the method of performing comprehensive analysis based on the optical signal intensity and the optical signal wavelength in each test period of the optical chip is as follows: The input optical signal intensity of the input optical chip in each test period is determined by calibrating with a high-precision laser combined with an optical power meter. The input optical signal intensity of the optical chip in each test period is obtained by the measurement value of the optical power meter, and the input optical signal intensity of the optical chip in each test period is obtained, which is recorded as GIi, where i=1,2,...,n, i represents the serial number corresponding to each test period, and n represents the total number of serial numbers of each test period; at the same time, the input optical signal intensity of the optical chip in each test period is transmitted to the FPGA for recording; A photodetector is connected to the output end of the optical chip to convert the optical signal into an electrical signal. After amplifying and converting the electrical signal into analog-to-digital, the digital data of the output optical signal of the optical chip corresponding to each test period is collected by FPGA to obtain the output optical signal intensity of the optical chip corresponding to each test period, which is recorded as GOi. The optical gain value Gi of the optical chip in each test period is calculated by the input optical signal intensity and the output optical signal intensity of the optical chip in each test period.

[0007] Furthermore, a wavelength tunable laser is used as a light source to set the wavelength of the input optical signal, and the wavelength signal is transmitted to the FPGA for recording. The laser output wavelength is calibrated and monitored in combination with an optical spectrum analyzer to obtain the input optical signal wavelength of the optical chip corresponding to each test period, which is recorded as BIi. By connecting a spectrum analyzer to the output end of the optical chip, the spectrum analyzer is used to perform spectrum analysis on the input optical signal to obtain the output optical signal wavelength of the optical chip corresponding to each test period, which is recorded as BOi. At the same time, the FPGA and the spectrum analyzer are connected for communication to record the output optical signal wavelength of the optical chip corresponding to each test period in real time. The wavelength offset of the optical signal in each test period of the optical chip corresponding to each test period is obtained by calculating the difference between the wavelength of the output optical signal and the wavelength of the input optical signal of the optical chip, which is recorded as BPi. Then the wavelength offset of the optical signal in each test period of the optical chip corresponding to each test period is summed and divided by n to obtain the average wavelength offset of the optical chip in each test period, which is recorded as ; The standard deviation of the wavelength offset of the optical chip in each test period is calculated using the standard deviation calculation formula Similarly, the standard deviation of the optical gain of the optical chip in each test period is calculated and recorded as .

[0008] Furthermore, according to the formula Calculate the comprehensive performance coefficient of the optical chip corresponding to each test period , It is expressed as the average optical gain of the optical chip in each test period. Represented as the test wavelength range of the optical chip corresponding to each test period The comprehensive performance coefficient threshold is determined according to the application scenario of the optical chip, and the comprehensive performance coefficient of the optical chip in each test period is compared with the set comprehensive performance coefficient threshold. If the comprehensive performance coefficient of the optical chip in each test period is greater than the set comprehensive performance coefficient threshold, it means that the optical chip meets the basic performance requirements of the instrument. Otherwise, it means that the optical chip does not meet the basic performance requirements of the instrument and a performance abnormality signal is generated.

[0009] Furthermore, by changing the input optical signal intensity of the optical chip in each test period, obtaining the output optical signal intensity of the optical chip in each test period, and substituting it into the above calculation formula to obtain the optical gain value of different input optical signal intensities, the input optical signal intensity of the optical chip in each test period is used as the abscissa, and the optical gain value of the optical chip in each test period is used as the ordinate to draw an optical gain curve; An input optical signal intensity segment [GIi, GI(i+1)] is selected from the optical gain curve, and the maximum optical gain, the minimum optical gain and the average optical gain of the input optical signal intensity segment are obtained. The difference between the maximum optical gain and the minimum optical gain is calculated, and then the difference result is compared with the average optical gain to obtain the flatness of the input optical signal intensity segment [GIi, GI(i+1)] corresponding to the optical chip. Each input optical signal intensity segment corresponding to a flatness lower than a preset flatness threshold is recorded as a stable segment, indicating that the optical chip has a stable amplification capability for the optical signal of the input optical power in this input optical signal intensity segment.

[0010] Furthermore, the method of performing comprehensive calculation and analysis based on the test temperature variable parameters and wavelength drift parameters of the optical chip corresponding to each test period is as follows: The test temperature of the optical chip corresponding to each test period is set and controlled by a high-precision temperature control box. At the same time, a temperature sensor is installed inside the temperature control box to obtain the test temperature of the optical chip corresponding to each test period in real time, which is recorded as Tj, where j represents the number of each temperature point, j=1,2...,m, and m represents the total number of each temperature point number. The temperature sensor is connected to the FPGA for communication and transmits the test temperature to the FPGA for recording in real time; The output optical signal intensity of the optical chip corresponding to each test temperature in each test period is obtained in real time through the optical power meter and the photoelectric detector, which is recorded as ; The light intensity change rate of the optical chip corresponding to each test period is calculated by the output light signal intensity of the optical chip corresponding to each test temperature in each test period and the average output light intensity at the test standard reference temperature. ; The output optical signal wavelength of the optical chip corresponding to each test period is obtained by the spectrum analyzer, recorded as BTi, according to the formula Calculate the wavelength drift rate of the optical chip corresponding to each test period , t1 and t2 represent different test time points, and BTt1 and BTt2 represent the output optical signal wavelengths at the corresponding test time points.

[0011] Furthermore, according to the formula Calculate the stability state coefficient of the optical chip corresponding to each test period , represents the rate of change of light intensity at the jth test temperature, represents the wavelength drift rate of the kth time interval, and g represents the number of time intervals; The stability state coefficient threshold is artificially set according to the application scenario of the optical chip. The stability state coefficient of the optical chip corresponding to each test period is compared with the preset stability state coefficient threshold. If the stability state coefficient of the optical chip corresponding to each test period is greater than the preset stability state coefficient threshold, it means that the stability of the optical chip is good. Otherwise, it means that there are stability problems with the optical chip, which is easily affected by temperature and time factors, resulting in performance fluctuations, and generating a stability abnormality signal.

[0012] Furthermore, the method of comprehensive calculation and analysis based on the optical signal modulation rate and optical signal multi-channel processing delay of the optical chip is as follows: The modulation rate of the optical signal is set by a high-speed signal generator to obtain the modulation rate of the optical chip corresponding to each test period, and the modulation rate value set each time is transmitted to the FPGA for recording; By connecting a bit error analyzer to the output end of the optical chip and communicating with the FPGA, for each set modulation rate, the bit error analyzer is used to count the number of bit errors within a certain period of time, and the bit error rate is calculated based on the total number of transmitted codes. A curve is drawn with modulation rate as the horizontal axis and bit error rate as the vertical axis. At the same time, a bit error rate threshold is set in the curve graph. The modulation rate point where the bit error rate exceeds the bit error rate threshold is the modulation rate limit of the optical chip, recorded as RV.

[0013] Furthermore, each channel of the optical chip is numbered, denoted as h, and the time information of the input and output of the optical signal pulse in each channel is recorded by the time measurement module inside the FPGA, denoted as t, and the start time of the input pulse and the arrival time of the output pulse of each channel are obtained, denoted as tI(h) and tO(h) respectively; The arrival time of the output pulse of each channel of the optical chip and the starting time of the input pulse are calculated by difference, and the time delay of each channel of the optical chip is obtained, which is recorded as td(h); The time delay of each channel is summed and divided by the number of channels to obtain the average time delay of each channel of the optical chip, which is recorded as At the same time, the standard deviation calculation formula is used to calculate the time delay standard deviation of the optical chip, which is recorded as .

[0014] Furthermore, according to the formula Calculate the high-speed signal processing capability coefficient of the optical chip , It is the theoretical maximum modulation rate of the optical chip, which is determined by industry standards. The high-speed signal processing capability coefficient threshold is manually and dynamically set according to the application scenario of the optical chip, and the high-speed signal processing capability coefficient of the optical chip is compared and analyzed with the preset high-speed signal processing capability coefficient threshold. If the high-speed signal processing capability coefficient of the optical chip is greater than the preset high-speed signal processing capability coefficient threshold, it means that the high-speed signal processing capability of the optical chip is stronger. Otherwise, it means that the optical chip has certain limitations in high-speed signal processing, and a signal processing abnormality signal is generated.

[0015] Beneficial effects of the present invention: 1. In the present invention, firstly, by calibrating a high-precision laser with an optical power meter and connecting a photodetector at the output end of the optical chip and collecting data by FPGA after amplification and analog-to-digital conversion, the input and output optical signal intensities of each test period can be accurately obtained, thereby accurately calculating the optical gain value, which helps to deeply understand the optical chip's ability to amplify the optical signal intensity at different time periods, and provides a reliable basis for evaluating the chip's intensity processing performance; by using a wavelength tunable laser in combination with an optical spectrum analyzer to obtain the input optical signal wavelength, and connecting an optical spectrum analyzer at the chip output end to obtain the output optical signal wavelength, and further calculating parameters such as the optical signal wavelength offset, average wavelength offset, wavelength offset standard deviation, and optical gain standard deviation, the stability and accuracy of the chip in wavelength processing can be comprehensively evaluated; in addition, the comprehensive performance coefficient is calculated according to a specific formula, and the threshold is determined in combination with the application scenario for comparison, which can intuitively determine whether the optical chip meets the basic performance requirements of the instrument, and is convenient for quickly screening out suitable chips in the chip selection, quality inspection, and system integration links, effectively improving the efficiency and accuracy of optical chip testing and analysis, reducing the risk of system failure caused by substandard chip performance, and also providing valuable data support for further optimization design of optical chips.

[0016] 2. In the present invention, by drawing a curve graph based on the input optical signal intensity and optical gain value of each test period of the optical chip, the gain performance of the chip under different input intensities can be intuitively presented, which provides a visual basis for comprehensive analysis of chip performance, and obtains the input optical signal intensity segment with stable performance from the drawn optical gain curve. Specifically, the maximum, minimum and average optical gain of a specific input optical signal intensity segment are calculated, and the flatness is further obtained to determine the stable segment by comparing with the preset flatness threshold. This process makes the evaluation of chip performance stability more accurate and has a quantitative standard, which helps to clarify in which input optical power range the chip can work stably in actual application, and avoid signal distortion caused by excessive gain fluctuations due to changes in input optical signal intensity. It provides a strong guarantee for the reliable application of optical chips in many fields such as optical communication and optical sensing, and also provides a key data guide for the optimal design of the chip. The internal structure or parameters of the chip can be further adjusted according to the stable segment range to improve the overall performance of the chip.

[0017] 3. In the present invention, by using a high-precision temperature control box setting and cooperating with an internal temperature sensor and FPGA, the temperature changes in each test period can be accurately controlled, the light intensity data at different temperatures can be obtained and the light intensity change rate can be calculated, which is conducive to in-depth analysis of the fluctuation characteristics of the light intensity output of the optical chip under the influence of temperature, and provides key data for evaluating the chip's sensitivity to temperature; the wavelength of the output optical signal is obtained by a spectrum analyzer and the wavelength drift rate is calculated, and then the stability state coefficient is comprehensively calculated in combination with the light intensity change rate, which comprehensively and systematically quantifies the chip's stability performance in the temperature and time dimensions; by manually setting the stability state coefficient threshold according to the application scenario and comparing it, it is possible to efficiently determine whether the chip stability meets the standard, which helps to quickly locate stability problems for targeted optimization and improvement. When the chip is screened for a specific optical system, it can ensure that the selected chip has sufficient stability, reduce the risk of system failure caused by poor stability, and greatly improve the reliability and stability of the optical chip in different application scenarios. At the same time, it also provides a strong basis for the prediction and maintenance of the long-term operating performance of the chip. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] The present invention will be further described below in conjunction with the accompanying drawings.

[0019] Figure 1 This is a principle block diagram of an optical chip testing system based on FPGA according to an embodiment of the present invention. DETAILED DESCRIPTION

[0020] The technical solution of the present invention will be clearly and completely described below in conjunction with the accompanying drawings.

[0021] Although the present invention makes various references to certain modules in the system according to the embodiment of the present invention, any number of different modules can be used and run on the user terminal and / or server. The modules are only illustrative, and different aspects of the system and method can use different modules.

[0022] Embodiment 1: like Figure 1 As shown, the FPGA-based optical chip testing system includes: an optical chip basic performance test and analysis module, an optical chip performance rating module, an optical chip stability test and analysis module, an optical chip signal processing test and analysis module and a database.

[0023] The optical chip basic performance test analysis module performs a comprehensive analysis based on the optical signal intensity and optical signal wavelength of the optical chip in each test period to obtain the comprehensive performance coefficient of the optical chip in each test period; The input optical signal intensity of the input optical chip in each test period is determined by calibration using a high-precision laser combined with an optical power meter. The input optical signal intensity of the optical chip in each test period is obtained through the measurement value of the optical power meter, and the input optical signal intensity of the optical chip in each test period is obtained, which is recorded as GIi, where i=1,2,...,n, i represents the serial number corresponding to each test period, and n represents the total number of serial numbers of each test period; at the same time, the input optical signal intensity of the optical chip in each test period is transmitted to FPGA for recording; FPGA (Field-Programmable Gate Array).

[0024] A photodetector is connected to the output end of the optical chip to convert the optical signal into an electrical signal. After amplifying and converting the electrical signal into analog-to-digital, the digital data of the output optical signal of the optical chip corresponding to each test period is collected by FPGA to obtain the output optical signal intensity of the optical chip corresponding to each test period, which is recorded as GOi. According to the formula Calculate the optical gain value Gi of the optical chip in each test period; specifically, if the input optical signal intensity of the optical chip in the test period No. 3 is 1mW, and the output optical signal intensity is 10mW, substitute the two parameters into the above formula for calculation, and obtain the optical gain value Gi=10dB; The wavelength of the input optical signal is set by using a wavelength tunable laser as the light source, and the wavelength signal is transmitted to the FPGA for recording. The laser output wavelength is calibrated and monitored in combination with an optical spectrum analyzer to obtain the input optical signal wavelength of the optical chip corresponding to each test period, which is recorded as BIi. By connecting a spectrum analyzer to the output end of the optical chip, the spectrum analyzer is used to perform spectrum analysis on the input optical signal to obtain the output optical signal wavelength of the optical chip corresponding to each test period, which is recorded as BOi. At the same time, the FPGA and the spectrum analyzer are connected for communication to record the output optical signal wavelength of the optical chip corresponding to each test period in real time. The wavelength offset of the optical signal in each test period of the optical chip corresponding to each test period is obtained by calculating the difference between the wavelength of the output optical signal and the wavelength of the input optical signal of the optical chip, which is recorded as BPi. Then the wavelength offset of the optical signal in each test period of the optical chip corresponding to each test period is summed and divided by n to obtain the average wavelength offset of the optical chip in each test period, which is recorded as ; According to the formula Calculate the standard deviation of wavelength offset of the optical chip in each test period Similarly, the standard deviation of the optical gain of the optical chip in each test period is calculated and recorded as ; According to the formula Calculate the comprehensive performance coefficient of the optical chip corresponding to each test period , It is expressed as the average optical gain of the optical chip in each test period. It is represented by the test wavelength range of the optical chip corresponding to each test period; The comprehensive performance coefficient threshold is determined according to the application scenario of the optical chip, and the comprehensive performance coefficient of the optical chip in each test period is compared with the set comprehensive performance coefficient threshold. If the comprehensive performance coefficient of the optical chip in each test period is greater than the set comprehensive performance coefficient threshold, it means that the optical chip meets the basic performance requirements of the instrument. Otherwise, it means that the optical chip does not meet the basic performance requirements of the instrument and a performance abnormality signal is generated.

[0025] In a specific embodiment, the present invention firstly calibrates the optical power meter with a high-precision laser and connects a photodetector at the output end of the optical chip and collects data by FPGA after amplification and analog-to-digital conversion, so as to accurately obtain the input and output optical signal intensities of each test period, thereby accurately calculating the optical gain value, which helps to deeply understand the amplification ability of the optical chip for the optical signal intensity at different time periods, and provides a reliable basis for evaluating the chip intensity processing performance; the wavelength of the input optical signal is obtained by using a wavelength tunable laser in combination with an optical spectrum analyzer, and the wavelength of the output optical signal is obtained by connecting the optical spectrum analyzer at the output end of the chip, and further calculating the optical signal wavelength offset, average wavelength offset, wavelength offset standard deviation and optical gain standard deviation and other parameters, so as to comprehensively evaluate the stability and accuracy of the chip in wavelength processing; in addition, the comprehensive performance coefficient is calculated according to a specific formula, and the threshold is determined in combination with the application scenario for comparison, so as to intuitively judge whether the optical chip meets the basic performance requirements of the instrument, and facilitate the rapid screening of suitable chips in the chip selection, quality inspection and system integration, effectively improving the efficiency and accuracy of optical chip test analysis, reducing the risk of system failure caused by substandard chip performance, and also providing valuable data support for further optimization design of optical chips.

[0026] The optical chip performance rating module draws a graph based on the input optical signal intensity and optical gain value of the optical chip in each test period, and obtains the input optical signal intensity segment with stable performance corresponding to the optical chip from the graph; By changing the input optical signal intensity of the optical chip in each test period, the output optical signal intensity of the optical chip in each test period is obtained, and the optical gain value of different input optical signal intensities is obtained by substituting it into the above calculation formula, and the input optical signal intensity of the optical chip in each test period is used as the horizontal coordinate, and the optical gain value of the optical chip in each test period is used as the vertical coordinate to draw an optical gain curve; Select an input optical signal intensity [GIi, GI(i+1)] segment from the optical gain curve, obtain the maximum optical gain, the minimum optical gain and the average optical gain of the input optical signal intensity segment, calculate the difference between the maximum optical gain and the minimum optical gain, and then compare the difference result with the average optical gain to obtain the flatness of the input optical signal intensity [GIi, GI(i+1)] segment of the optical chip, and record each input optical signal intensity segment corresponding to a flatness lower than a preset flatness threshold as a stable segment, indicating that the optical chip has a stable amplification capability for the optical signal of the input optical power in the input optical signal intensity segment; In a specific embodiment, the present invention plots a graph based on the input optical signal intensity and the optical gain value of the optical chip in each test period, so as to intuitively present the gain performance of the chip under different input intensities, provide a visual basis for comprehensively analyzing the chip performance, and obtain an input optical signal intensity segment with stable performance from the plotted optical gain curve, specifically by calculating the maximum, minimum and average optical gain of a specific input optical signal intensity segment, and further obtaining the flatness, so as to determine the stable segment by comparing it with a preset flatness threshold. This process makes the evaluation of chip performance stability more accurate and has a quantitative standard, which helps to clarify in which input optical power range the chip can work stably in actual application, and avoid problems such as signal distortion caused by excessive gain fluctuations due to changes in input optical signal intensity, so as to provide a strong guarantee for the reliable application of optical chips in many fields such as optical communication and optical sensing, and also provides a key data guide for the optimal design of the chip, and the internal structure or parameters of the chip can be further adjusted according to the stable segment range to improve the overall performance of the chip.

[0027] The optical chip stability test analysis module performs comprehensive calculation and analysis based on the test temperature variable parameters and wavelength drift parameters of the optical chip corresponding to each test period, and obtains the stability state coefficient of the optical chip corresponding to each test period; The test temperature of the optical chip corresponding to each test period is set and controlled by a high-precision temperature control box. At the same time, a temperature sensor is installed inside the temperature control box to obtain the test temperature of the optical chip corresponding to each test period in real time, which is recorded as Tj, where j represents the number of each temperature point, j=1,2...,m, and m represents the total number of each temperature point number. The temperature sensor is connected to the FPGA for communication and transmits the test temperature to the FPGA for recording in real time; The output optical signal intensity of the optical chip corresponding to each test temperature in each test period is obtained in real time through the optical power meter and the photoelectric detector, which is recorded as ; According to the formula Calculate the light intensity change rate of the optical chip corresponding to each test period , It is expressed as the average output light intensity under the test standard reference temperature; The output optical signal wavelength of the optical chip corresponding to each test period is obtained by the spectrum analyzer, recorded as BTi, according to the formula Calculate the wavelength drift rate of the optical chip corresponding to each test period , t1 and t2 represent different test time points, BTt1 and BTt2 represent the output optical signal wavelengths at the corresponding test time points; According to the formula Calculate the stability state coefficient of the optical chip corresponding to each test period , represents the rate of change of light intensity at the jth test temperature, represents the wavelength drift rate of the kth time interval, and g represents the number of time intervals; The stability state coefficient threshold is artificially set according to the application scenario of the optical chip. The stability state coefficient of the optical chip corresponding to each test period is compared with the preset stability state coefficient threshold. If the stability state coefficient of the optical chip corresponding to each test period is greater than the preset stability state coefficient threshold, it means that the stability of the optical chip is good. Otherwise, it means that there are stability problems with the optical chip, which is easily affected by temperature and time factors, resulting in performance fluctuations, and generating a stability abnormality signal.

[0028] In a specific embodiment, the present invention can accurately control the temperature changes in each test period by setting with the help of a high-precision temperature control box and cooperating with an internal temperature sensor and FPGA, obtain light intensity data at different temperatures and calculate the light intensity change rate, which is conducive to in-depth analysis of the fluctuation characteristics of the light intensity output of the optical chip under the influence of temperature, and provides key data for evaluating the chip's sensitivity to temperature; use a spectrum analyzer to obtain the output light signal wavelength and calculate the wavelength drift rate, and then combine the light intensity change rate to comprehensively calculate the stability state coefficient, which comprehensively and systematically quantifies the chip's stability performance in temperature and time dimensions; by manually setting the stability state coefficient threshold according to the application scenario and comparing it, it can efficiently determine whether the chip stability meets the standard, which helps to quickly locate stability problems for targeted optimization and improvement. When the chip is screened for a specific optical system, it can ensure that the selected chip has sufficient stability, reduce the risk of system failure caused by poor stability, greatly improve the reliability and stability of the optical chip in different application scenarios, and also provide a strong basis for the prediction and maintenance of the long-term operating performance of the chip.

[0029] The optical chip signal processing test and analysis module performs comprehensive calculation and analysis based on the optical signal modulation rate and optical signal multi-channel processing delay of the optical chip to obtain the high-speed signal processing capability coefficient of the optical chip; The modulation rate of the optical signal is set by a high-speed signal generator to obtain the modulation rate of the optical chip corresponding to each test period, and the modulation rate value set each time is transmitted to the FPGA for recording; By connecting a bit error analyzer to the output end of the optical chip and communicating with the FPGA, for each set modulation rate, the bit error analyzer is used to count the number of bit errors within a certain period of time, and the bit error rate is calculated based on the total number of transmitted codes. A curve is drawn with the modulation rate as the horizontal axis and the bit error rate as the vertical axis. At the same time, a bit error rate threshold is set in the curve graph. When the bit error rate exceeds the bit error rate threshold, the modulation rate point is the modulation rate limit of the optical chip, which is recorded as RV. Number each channel of the optical chip, denoted as h, and use the time measurement module inside the FPGA to record the time information of the optical signal pulse input and output in each channel, denoted as t, and obtain the start time of the input pulse and the arrival time of the output pulse of each channel, denoted as tI(h) and tO(h) respectively; The arrival time of the output pulse of each channel of the optical chip and the starting time of the input pulse are calculated by difference, and the time delay of each channel of the optical chip is obtained, which is recorded as td(h); The time delay of each channel is summed and divided by the number of channels to obtain the average time delay of each channel of the optical chip, which is recorded as , and the time delay standard deviation of the optical chip is calculated by using the above wavelength offset standard deviation calculation method, which is recorded as ; According to the formula Calculate the high-speed signal processing capability coefficient of the optical chip , It is the theoretical maximum modulation rate of the optical chip, which is determined by industry standards. The high-speed signal processing capability coefficient threshold is manually and dynamically set according to the application scenario of the optical chip, and the high-speed signal processing capability coefficient of the optical chip is compared and analyzed with the preset high-speed signal processing capability coefficient threshold. If the high-speed signal processing capability coefficient of the optical chip is greater than the preset high-speed signal processing capability coefficient threshold, it means that the high-speed signal processing capability of the optical chip is stronger. Otherwise, it means that the optical chip has certain limitations in high-speed signal processing, and a signal processing abnormality signal is generated.

[0030] In a specific embodiment, the present invention accurately sets the modulation rate through a high-speed signal generator and records it through an FPGA. In combination with connecting an error analyzer at the output end of the optical chip to communicate with the FPGA to calculate the error rate, the modulation rate-error rate curve can be drawn and the modulation rate limit can be determined, which helps to accurately grasp the performance of the chip at different modulation rates and provide a key basis for its application in fields such as high-speed optical communications. In addition, the internal time measurement module of the FPGA is used to record the time information of the optical signal pulses of each channel and calculate the time delay, the average time delay and the standard deviation of the time delay, so as to deeply understand the synchronization and efficiency of the chip's multi-channel processing. Finally, the high-speed signal processing capability coefficient is calculated based on relevant parameters, and the threshold is dynamically set according to the application scenario for comparative analysis, so as to efficiently judge the comprehensive capability of the chip in high-speed signal processing. When selecting chips, chips that meet specific high-speed processing requirements can be quickly screened out. In the process of chip development, a clear direction can be provided for optimizing multi-channel processing and high-speed modulation performance, which effectively improves the adaptability and reliability of optical chips in high-speed, multi-channel signal processing applications, reduces the risk of system performance degradation due to insufficient signal processing capabilities, and also promotes the development and progress of optical chip technology in the field of high-speed signal processing.

[0031] The above is an explanation of the present invention, rather than a limitation thereof. Although exemplary embodiments of the present invention have been described, it should be understood by those skilled in the art that many modifications may be made to the exemplary embodiments without departing from the essence of the present invention, and these modifications should all be included within the scope of protection of the present invention.

Claims

1. An optical chip test system based on FPGA, comprising an optical chip basic performance test and analysis module, an optical chip performance rating module, an optical chip stability test and analysis module, an optical chip signal processing test and analysis module and a database; characterized in that: The optical chip basic performance test analysis module performs a comprehensive analysis based on the optical signal intensity and optical signal wavelength of the optical chip in each test period to obtain the comprehensive performance coefficient of the optical chip in each test period; The optical chip performance rating module draws a graph based on the input optical signal intensity and optical gain value of the optical chip in each test period, and obtains the input optical signal intensity segment with stable performance corresponding to the optical chip from the graph; The optical chip stability test analysis module performs comprehensive calculation and analysis based on the test temperature variable parameters and wavelength drift parameters of the optical chip corresponding to each test period, and obtains the stability state coefficient of the optical chip corresponding to each test period; The optical chip signal processing test and analysis module performs comprehensive calculation and analysis based on the optical signal modulation rate and optical signal multi-channel processing delay of the optical chip to obtain the high-speed signal processing capability coefficient of the optical chip.

2. The FPGA-based optical chip testing system according to claim 1, characterized in that: The method of comprehensive analysis based on the optical chip corresponding to the optical signal intensity and optical signal wavelength in each test period is as follows: The input optical signal intensity of the input optical chip in each test period is determined by calibrating with a high-precision laser combined with an optical power meter. The input optical signal intensity of the optical chip in each test period is obtained by the measurement value of the optical power meter, and the input optical signal intensity of the optical chip in each test period is obtained, which is recorded as GIi, where i=1,2,...,n, i represents the serial number corresponding to each test period, and n represents the total number of serial numbers of each test period; at the same time, the input optical signal intensity of the optical chip in each test period is transmitted to the FPGA for recording; A photodetector is connected to the output end of the optical chip to convert the optical signal into an electrical signal. After amplifying and converting the electrical signal into analog-to-digital, the digital data of the output optical signal of the optical chip corresponding to each test period is collected by FPGA to obtain the output optical signal intensity of the optical chip corresponding to each test period, which is recorded as GOi. The optical gain value Gi of the optical chip in each test period is calculated by the input optical signal intensity and the output optical signal intensity of the optical chip in each test period.

3. The FPGA-based optical chip testing system according to claim 2, characterized in that: The wavelength of the input optical signal is set by using a wavelength tunable laser as the light source, and the wavelength signal is transmitted to the FPGA for recording. The laser output wavelength is calibrated and monitored in combination with an optical spectrum analyzer to obtain the input optical signal wavelength of the optical chip corresponding to each test period, which is recorded as BIi. By connecting a spectrum analyzer to the output end of the optical chip, the spectrum analyzer is used to perform spectrum analysis on the input optical signal to obtain the output optical signal wavelength of the optical chip corresponding to each test period, which is recorded as BOi. At the same time, the FPGA and the spectrum analyzer are connected for communication to record the output optical signal wavelength of the optical chip corresponding to each test period in real time. The wavelength offset of the optical signal in each test period of the optical chip corresponding to each test period is obtained by calculating the difference between the wavelength of the output optical signal and the wavelength of the input optical signal of the optical chip, which is recorded as BPi. Then the wavelength offset of the optical signal in each test period of the optical chip corresponding to each test period is summed and divided by n to obtain the average wavelength offset of the optical chip in each test period, which is recorded as ; The standard deviation of the wavelength offset of the optical chip in each test period is calculated using the standard deviation calculation formula Similarly, the standard deviation of the optical gain of the optical chip in each test period is calculated and recorded as .

4. The FPGA-based optical chip testing system according to claim 3, characterized in that: According to the formula Calculate the comprehensive performance coefficient of the optical chip corresponding to each test period , It is expressed as the average optical gain of the optical chip in each test period. Represented as the test wavelength range of the optical chip corresponding to each test period The comprehensive performance coefficient threshold is determined according to the application scenario of the optical chip, and the comprehensive performance coefficient of the optical chip in each test period is compared with the set comprehensive performance coefficient threshold. If the comprehensive performance coefficient of the optical chip in each test period is greater than the set comprehensive performance coefficient threshold, it means that the optical chip meets the basic performance requirements of the instrument. Otherwise, it means that the optical chip does not meet the basic performance requirements of the instrument and a performance abnormality signal is generated.

5. The FPGA-based optical chip testing system according to claim 4, characterized in that: By changing the input optical signal intensity of the optical chip in each test period, the output optical signal intensity of the optical chip in each test period is obtained, and the optical gain value of different input optical signal intensities is obtained by substituting it into the above calculation formula, and the input optical signal intensity of the optical chip in each test period is used as the horizontal coordinate, and the optical gain value of the optical chip in each test period is used as the vertical coordinate to draw an optical gain curve; An input optical signal intensity segment [GIi, GI(i+1)] is selected from the optical gain curve, and the maximum optical gain, the minimum optical gain and the average optical gain of the input optical signal intensity segment are obtained. The difference between the maximum optical gain and the minimum optical gain is calculated, and then the difference result is compared with the average optical gain to obtain the flatness of the input optical signal intensity segment [GIi, GI(i+1)] corresponding to the optical chip. Each input optical signal intensity segment corresponding to a flatness lower than a preset flatness threshold is recorded as a stable segment, indicating that the optical chip has a stable amplification capability for the optical signal of the input optical power in this input optical signal intensity segment.

6. The FPGA-based optical chip testing system according to claim 1, characterized in that: The method for comprehensive calculation and analysis based on the test temperature variable parameters and wavelength drift parameters of the optical chip corresponding to each test period is as follows: The test temperature of the optical chip corresponding to each test period is set and controlled by a high-precision temperature control box. At the same time, a temperature sensor is installed inside the temperature control box to obtain the test temperature of the optical chip corresponding to each test period in real time, which is recorded as Tj, where j represents the number of each temperature point, j=1,2...,m, and m represents the total number of each temperature point number. The temperature sensor is connected to the FPGA for communication and transmits the test temperature to the FPGA for recording in real time; The output optical signal intensity of the optical chip corresponding to each test temperature in each test period is obtained in real time through the optical power meter and the photoelectric detector, which is recorded as ; The light intensity change rate of the optical chip corresponding to each test period is calculated by the output light signal intensity of the optical chip corresponding to each test temperature in each test period and the average output light intensity at the test standard reference temperature. ; The output optical signal wavelength of the optical chip corresponding to each test period is obtained by the spectrum analyzer, recorded as BTi, according to the formula Calculate the wavelength drift rate of the optical chip corresponding to each test period , t1 and t2 represent different test time points, and BTt1 and BTt2 represent the output optical signal wavelengths at the corresponding test time points.

7. The FPGA-based optical chip testing system according to claim 6, characterized in that: According to the formula Calculate the stability state coefficient of the optical chip corresponding to each test period , represents the rate of change of light intensity at the jth test temperature, represents the wavelength drift rate of each k-th time interval, and g represents the number of time intervals; The stability state coefficient threshold is artificially set according to the application scenario of the optical chip. The stability state coefficient of the optical chip corresponding to each test period is compared with the preset stability state coefficient threshold. If the stability state coefficient of the optical chip corresponding to each test period is greater than the preset stability state coefficient threshold, it means that the stability of the optical chip is good. Otherwise, it means that there are stability problems with the optical chip, which is easily affected by temperature and time factors, resulting in performance fluctuations, and generating a stability abnormality signal.

8. The FPGA-based optical chip testing system according to claim 1, characterized in that: The method for comprehensive calculation and analysis based on the optical signal modulation rate and optical signal multi-channel processing delay of the optical chip is as follows: The modulation rate of the optical signal is set by a high-speed signal generator to obtain the modulation rate of the optical chip corresponding to each test period, and the modulation rate value set each time is transmitted to the FPGA for recording; By connecting a bit error analyzer to the output end of the optical chip and communicating with the FPGA, for each set modulation rate, the bit error analyzer is used to count the number of bit errors within a certain period of time, and the bit error rate is calculated based on the total number of transmitted codes. A curve is drawn with modulation rate as the horizontal axis and bit error rate as the vertical axis. At the same time, a bit error rate threshold is set in the curve graph. The modulation rate point where the bit error rate exceeds the bit error rate threshold is the modulation rate limit of the optical chip, recorded as RV.

9. The FPGA-based optical chip testing system according to claim 8, characterized in that: Number each channel of the optical chip, denoted as h, and use the time measurement module inside the FPGA to record the time information of the optical signal pulse input and output in each channel, denoted as t, and obtain the start time of the input pulse and the arrival time of the output pulse of each channel, denoted as tI(h) and tO(h) respectively; The arrival time of the output pulse of each channel of the optical chip and the starting time of the input pulse are calculated by difference, and the time delay of each channel of the optical chip is obtained, which is recorded as td(h); The time delay of each channel is summed and divided by the number of channels to obtain the average time delay of each channel of the optical chip, which is recorded as At the same time, the standard deviation calculation formula is used to calculate the time delay standard deviation of the optical chip, which is recorded as .

10. The FPGA-based optical chip testing system according to claim 9, characterized in that: According to the formula Calculate the high-speed signal processing capability coefficient of the optical chip , It is the theoretical maximum modulation rate of the optical chip, which is determined by industry standards. The high-speed signal processing capability coefficient threshold is manually and dynamically set according to the application scenario of the optical chip, and the high-speed signal processing capability coefficient of the optical chip is compared and analyzed with the preset high-speed signal processing capability coefficient threshold. If the high-speed signal processing capability coefficient of the optical chip is greater than the preset high-speed signal processing capability coefficient threshold, it means that the high-speed signal processing capability of the optical chip is stronger. Otherwise, it means that the optical chip has certain limitations in high-speed signal processing, and a signal processing abnormality signal is generated.

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