Silicon optical device structure and implementation method

Abstract

The invention discloses a silicon optical device structure and an implementation method. The silicon optical device structure comprises a dielectric layer and a semiconductor layer which are sequentially arranged on a substrate, the semiconductor layer is provided with an active area, the semiconductor layer in the active area forms a semiconductor pattern, the surface of the semiconductor pattern is provided with a light source window penetrating to the surface of the dielectric layer, and a quantum dot light source is arranged in the light source window. According to the invention, the preparation process of the quantum dot light source is integrated into the shallow trench isolation process in the silicon light process flow, so that a new mode of integrating the silicon light device of the silicon quantum dot light source by using the silicon light process is realized.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor optoelectronic process technology, and in particular to a silicon optical device structure with integrated quantum dots and a realization method thereof. Background Art

[0002] Semiconductor quantum dots have a strong three-dimensional quantum confinement effect, which enables quantum dot (QD) lasers to exhibit excellent performance such as low threshold current, high modulation rate, high temperature stability, low linewidth enhancement factor and high anti-reflection. In particular, some quantum dot lasers can also work without refrigeration and optical isolators, which greatly reduces cost expenditure, energy consumption and device size, and is expected to become an important light source for the next generation of optical communication and optical interconnection systems.

[0003] At present, there are three main preparation processes for semiconductor quantum dots: chemical method, self-assembly method, and bulk material etching method. However, these methods are generally incompatible with CMOS processes and are therefore difficult to apply to traditional silicon photonics platforms. Summary of the invention

[0004] The purpose of the present invention is to overcome the above-mentioned defects in the prior art and to provide a silicon optical device structure and an implementation method.

[0005] To achieve the above object, the technical solution of the present invention is as follows:

[0006] The present invention provides a silicon optical device structure, comprising:

[0007] A dielectric layer and a semiconductor layer are sequentially arranged on the substrate;

[0008] The semiconductor layer is provided with an active area, the semiconductor layer in the active area forms a semiconductor pattern, a light source window penetrating to the surface of the dielectric layer is provided on the surface of the semiconductor pattern, and a quantum dot light source is provided in the light source window.

[0009] Furthermore, the quantum dot light source has a structure in which a silicon dioxide interface wraps silicon quantum dots, and / or the light source window forms a resonant cavity.

[0010] Furthermore, the silicon optical device structure is used to form a quantum dot laser or a quantum dot light emitting diode.

[0011] Furthermore, the active area is formed by a shallow trench isolation defined on the surface of the semiconductor layer, and the shallow trench isolation penetrates to the surface of the dielectric layer.

[0012] Furthermore, the substrate, the dielectric layer and the semiconductor layer are respectively a bottom silicon layer, a buried oxide layer and a top silicon layer of an SOI substrate.

[0013] The present invention also provides a method for realizing a silicon optical device structure, comprising:

[0014] Providing a substrate, on which a dielectric layer and a semiconductor layer are sequentially formed;

[0015] forming an active region on the semiconductor layer, and forming a semiconductor pattern on the semiconductor layer in the active region;

[0016] forming a light source window on the surface of the semiconductor pattern and penetrating to the surface of the dielectric layer;

[0017] A quantum dot light source is formed in the light source window.

[0018] Further, the forming of an active region on the semiconductor layer and the forming of a semiconductor pattern on the semiconductor layer in the active region specifically includes:

[0019] forming a cushion layer on the surface of the semiconductor layer;

[0020] Using a first photolithography and etching process, a shallow trench isolation is formed on the surface of the pad layer and penetrates to the surface of the dielectric layer, an active area is defined on the semiconductor layer within the shallow trench isolation, and a semiconductor pattern is formed on the semiconductor layer below the pad layer in the active area;

[0021] The step of forming a light source window on the surface of the semiconductor pattern and penetrating to the surface of the dielectric layer, and forming a quantum dot light source in the light source window specifically includes:

[0022] Using a second photolithography and etching process, a light source window is formed on the surface of the cushion layer and penetrates to the surface of the dielectric layer to form a resonant cavity;

[0023] Spin coating SOG material on the surface of the pad layer to fill the light source window, and annealing;

[0024] The excess SOG material outside the light source window after annealing is removed, and a quantum dot light source formed of silicon quantum dot material wrapped in silicon dioxide is formed in the light source window.

[0025] Furthermore, the temperature during the annealing satisfies the condition for causing phase separation of the SOG material, and / or, by adjusting the temperature during the annealing, the intrinsic luminescence wavelength of the formed quantum dot light source is modulated.

[0026] Furthermore, the pad layer includes a silicon nitride pad layer, and before performing the second photolithography, it also includes: first forming a carbon-containing hard mask layer and a photoresist layer in sequence on the surface of the silicon nitride pad layer, then performing the second photolithography, and after performing the second photolithography and etching, performing cleaning after removing the photoresist; and / or, the pad layer includes a protective layer and a barrier layer formed in sequence on the surface of the semiconductor layer, and chemical mechanical polishing is used to remove excess SOG material outside the light source window after annealing, and the barrier layer is used as a chemical mechanical polishing stop layer.

[0027] Furthermore, the substrate, the dielectric layer and the semiconductor layer are formed by a bottom silicon layer, a buried oxide layer and a top silicon layer of an SOI substrate.

[0028] It can be seen from the above technical scheme that the present invention forms a quantum dot light source on a semiconductor layer as a functional layer of a silicon optical device, and utilizes the strong three-dimensional quantum confinement effect of semiconductor quantum dots, so that the formed silicon optical device can exhibit excellent performances such as low threshold current, high modulation rate, high temperature stability, low line width enhancement factor and high anti-reflection. In addition, by using methods compatible with CMOS processes such as spin coating SOG materials and annealing, the quantum dot light source preparation process can be integrated into the shallow trench isolation process in the silicon optical process flow, realizing a new mode of silicon optical devices that integrate silicon quantum dot light sources using silicon optical processes. The intrinsic luminescence wavelength of the formed quantum dot light source can also be modulated by adjusting the temperature during annealing. In addition, since the light source has been integrated into the entire silicon optical chip, the grating opening and end face opening processes in the conventional silicon optical platform can also be omitted, thereby greatly reducing cost expenditure, energy consumption and device size. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] Figure 1 A schematic diagram of a silicon optical device structure according to a preferred embodiment of the present invention.

[0030] Figure 2 The present invention is a flowchart of a method for realizing a silicon photonic device structure according to a preferred embodiment of the present invention.

[0031] Figure 3-Figure 6 A preferred embodiment of the present invention is based on Figure 2 Schematic diagram of the process steps for preparing a silicon optical device structure by a method. DETAILED DESCRIPTION

[0032] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention. Unless otherwise defined, the technical terms or scientific terms used herein should be understood by people with general skills in the field to which the present invention belongs. "Including" and similar words used in this article mean that the elements or objects appearing before the word include the elements or objects listed after the word and their equivalents, without excluding other elements or objects.

[0033] The specific implementation modes of the present invention are further described in detail below in conjunction with the accompanying drawings.

[0034] refer to Figure 1 A silicon optical device structure of the present invention includes a substrate 11 , a dielectric layer 12 and a semiconductor layer 13 .

[0035] The dielectric layer 12 and the semiconductor layer 13 are sequentially arranged on the substrate 11. The semiconductor layer 13 is a functional layer of a silicon optical device, and the functional layer can be used to make various silicon optical devices, including passive devices (such as waveguides) and active devices (modulators, lasers, light-emitting diodes). The semiconductor layer 13 is usually formed of a material suitable for making a waveguide, so the semiconductor layer 13 is also generally referred to as a waveguide layer. The dielectric layer 12 is an isolation layer between the semiconductor layer 13 and the substrate 11.

[0036] The semiconductor layer 13 is provided with an active region. The semiconductor layer 13 in the active region is used to form a semiconductor pattern 131 for making a silicon optical device. A light source window W is provided on the surface of the semiconductor pattern 131 and penetrates to the surface of the dielectric layer 12. A quantum dot light source 14 (pattern) is provided in the light source window W.

[0037] refer to Figure 1 In some embodiments, the active region is defined by a shallow trench isolation 15 disposed on the surface of the semiconductor layer 13. The shallow trench isolation 15 penetrates to the surface of the dielectric layer 12 to isolate the silicon optical device on the semiconductor layer 13.

[0038] In some embodiments, the quantum dot light source 14 may be a silicon quantum dot light source 14. Silicon quantum dots D are distributed in the silicon quantum dot light source 14.

[0039] Furthermore, the silicon quantum dot light source 14 has a material structure in which silicon quantum dots are wrapped by a silicon dioxide interface.

[0040] In some embodiments, a protective layer 17 is further disposed on the surface of the semiconductor layer 13. The material of the protective layer 17 may be, for example, silicon dioxide.

[0041] In some embodiments, a barrier layer 16 is further disposed on the surface of the protective layer 17. The barrier layer 16 may be made of, for example, silicon nitride. The protective layer 17 and the barrier layer 16 together serve as a pad layer 18 located on the surface of the semiconductor layer 13.

[0042] In some embodiments, the silicon optical device structure of the present invention can be used in different scenarios depending on the performance of the quantum dot light source 14 itself. When the performance of the silicon quantum dot light source 14 is close to that of a laser, that is, when it has sufficient optical power, it can be used to form a quantum dot laser, and the quantum dot light source 14 forms a laser light source of the quantum dot laser, and the light source window W forms the resonant cavity of the laser. Therefore, it can be used in many fields such as optical communication and laser radar and as an important light source.

[0043] When the performance of the silicon quantum dot light source 14 is close to that of a light emitting diode, it can be used to form a quantum dot light emitting diode and can be used in fields such as sensors.

[0044] Furthermore, since the light source has been integrated into the entire silicon photonic chip, the silicon photonic chip using the silicon photonic device structure of the present invention can omit the grating opening and end face opening structure in the conventional silicon photonic platform, thereby greatly reducing cost expenditure, lowering energy consumption, and reducing device size.

[0045] In some embodiments, the substrate 11, dielectric layer 12 and semiconductor layer 13 are respectively the bottom silicon layer 101, buried oxide layer 102 and top silicon layer 103 of SOI substrate 100. The top silicon layer 103 of SOI substrate 100 can be used as semiconductor layer 13 (silicon photonic device functional layer), and a semiconductor pattern 131 having a quantum dot light source 14 is formed in an active area defined by shallow trench isolation 15, and a quantum dot laser or light emitting diode can be further formed.

[0046] A method for realizing a silicon photonic device structure of the present invention is further described in detail below through specific implementations and in conjunction with the accompanying drawings.

[0047] refer to Figure 2 The present invention provides a method for realizing a silicon optical device structure, which can be used to manufacture and realize, for example, Figure 1 A silicon photonic device structure of the present invention is shown, and includes the following steps:

[0048] Step S1: providing a substrate 11, and sequentially forming a dielectric layer 12 and a semiconductor layer 13 on the substrate 11.

[0049] like Figure 3As shown, a silicon optical device structure of the present invention is manufactured using an SOI substrate 100. The SOI substrate 100 includes, from bottom to top, a bottom silicon layer 101, a buried oxide layer 102, and a top silicon layer 103. The bottom silicon layer 101 is used as a silicon substrate 11, the buried oxide layer 102 is used as a silicon dioxide dielectric layer 12, and the top silicon layer 103 is used as a silicon semiconductor layer 13.

[0050] In some embodiments, the buried oxide layer 102 may have a thickness of 2-3 μm. The top silicon layer 103 may have a thickness of 200-250 nm, preferably 220 nm.

[0051] Step S2: forming an active region on the semiconductor layer 13, and forming a semiconductor pattern 131 in the semiconductor layer 13 in the active region.

[0052] The present invention proposes a new idea of ​​integrating the implementation steps of the above-mentioned silicon photonic device structure (especially the preparation steps of the quantum dot light source 14) into the conventional shallow trench isolation process flow of the silicon photonic platform which is relatively compatible with the CMOS process.

[0053] like Figure 4 As shown, first, a pad layer 18 is formed on the surface of the semiconductor layer 13. The pad layer 18 includes, for example, a silicon dioxide protection layer 17 and a silicon nitride barrier layer 16 which are sequentially formed on the surface of the semiconductor layer 13.

[0054] Then, a shallow trench isolation 15 is formed by using a first photolithography and etching process and a high aspect ratio (HARP) process. The process includes using photolithography to define a shallow trench area on the surface of the silicon nitride barrier layer 16; using etching to form a shallow trench V on the surface of the silicon nitride barrier layer 16 that penetrates to the surface of the dielectric layer 12; using a high aspect ratio process to fill the shallow trench V with, for example, silicon dioxide dielectric, and removing excess silicon dioxide dielectric material on the surface of the silicon nitride barrier layer 16 outside the shallow trench V by, for example, chemical mechanical polishing, to form a shallow trench isolation 15. The active area is defined by the shallow trench isolation 15, thereby forming an active area on the semiconductor layer 13 within the shallow trench isolation 15. In the process of forming the shallow trench V, silicon patterning (including device patterns such as waveguides) is completed on the semiconductor layer 13 in the active area by processes such as photolithography and etching, thereby forming a silicon semiconductor pattern 131 in the semiconductor layer 13 below the pad layer 18 in the active area.

[0055] Step S3: forming a light source window W on the surface of the semiconductor pattern 131 and penetrating to the surface of the dielectric layer 12 .

[0056] like Figure 4 As shown, next, a second photolithography and etching process is used to form a light source window W on the surface of the pad layer 18 that penetrates to the surface of the dielectric layer 12 to form a resonant cavity.

[0057] Due to the presence of the silicon nitride barrier layer 16 used as the pad 18 when forming the shallow trench isolation 15, in order to prevent residue defects caused by photoresist poisoning, it is necessary to adopt a carbon hard mask patterning scheme such as a Trilayer (three-layer photoresist structure) patterning scheme or an APF (advanced patterned film) patterning scheme to perform lithography of the quantum dot light source 14 window opening to avoid direct contact between the photoresist and the silicon nitride barrier layer 16.

[0058] For example, a three-layer structure of an organic carbon layer (SOC), a silicon-containing anti-reflective coating (SIARC) and a photoresist can be formed on the surface of the silicon nitride barrier layer 16, and then a light source window W is formed downward on the surface of the silicon nitride barrier layer 16 through photolithography and etching processes, which passes through the silicon nitride barrier layer 16, the silicon dioxide protective layer 17 and the silicon semiconductor layer 13 (silicon semiconductor pattern 131) in sequence and connects the bottom surface to the surface of the dielectric layer 12.

[0059] Alternatively, a structure including an APF layer of amorphous carbon material and a photoresist may be formed on the surface of the silicon nitride barrier layer 16, and then a light source window W may be formed downward on the surface of the silicon nitride barrier layer 16 through a photolithography and etching process, the light source window W sequentially passing through the silicon nitride barrier layer 16, the silicon dioxide protective layer 17 and the silicon semiconductor layer 13, and the bottom surface of the light source window W being connected to the surface of the dielectric layer 12.

[0060] The formed light source window W can be used as a resonant cavity of a laser or the like.

[0061] After the second photolithography and etching are performed to form the light source window W, cleaning is required to remove the photoresist, so as to facilitate the subsequent good filling of the light source window W with the material of the quantum dot light source 14 .

[0062] Step S4: forming a quantum dot light source 14 in the light source window W.

[0063] like Figure 5 As shown, next, the light source window W is filled by spin coating a SOG (spin on glass) material 141 on the surface of the silicon nitride barrier layer 16 .

[0064] Then, high temperature annealing is performed, and the temperature during annealing needs to satisfy the condition that the SOG material 141 undergoes high temperature phase separation, so as to form silicon quantum dots D.

[0065] In some embodiments, the annealing temperature is greater than or equal to 1100° C. and is performed under a protective atmosphere, so that after phase separation, a material of silicon quantum dots D wrapped by silicon dioxide (a conversion product of the SOG material 141 ) is formed.

[0066] like Figure 6As shown, then, the excess SOG material 141 outside the light source window W after annealing is removed, and a silicon quantum dot light source 14 formed of silicon quantum dot D material wrapped in silicon dioxide is formed in the light source window W.

[0067] In some embodiments, chemical mechanical polishing may be used to remove excess SOG material 141 outside the light source window W, and the silicon nitride barrier layer 16 is used as a chemical mechanical polishing stop layer.

[0068] In some embodiments, a back-etching method may also be used to remove excess SOG material 141 outside the light source window W and form a quantum dot light source 14 pattern of a desired thickness.

[0069] When the above annealing is performed, the light emission wavelength of the intrinsic silicon of the formed quantum dot light source 14 is modulated by adjusting the temperature during the annealing to meet different requirements.

[0070] The present invention uses SOG as the material for forming the silicon quantum dot light source 14, and can use the quantum confinement effect to weaken the indirect band gap characteristics of silicon, so that the formed silicon quantum dot material has the conditions of gain medium and stimulated radiation, and forms a light source window W with the conditions of the resonant cavity by graphically processing the silicon semiconductor layer 13 material, thereby realizing the three elements of the laser. At the same time, in terms of the process of implementation, by using SOG (Spin on glass) spin coating and then performing a high-temperature annealing phase separation process, a structure of silicon quantum dots wrapped in a silicon dioxide interface is realized, thereby being able to replace the traditional porous silicon structure. In addition, SOG after high-temperature annealing has silicon dioxide characteristics, which can be applied to processes such as chemical mechanical polishing and etching, and the mechanical stress is also much better than porous silicon.

[0071] Afterwards, subsequent steps of the shallow trench isolation process flow may be further performed, including removing the silicon nitride barrier layer 16 , and adjusting the thickness of the silicon dioxide protection layer 17 , and other conventional steps.

[0072] On this basis, other steps of the silicon photonic process can be continued, such as forming the doping implantation region of the active device, the germanium epitaxial layer, and the contact holes, metal interconnection layers, pads and other structures required for leading out the active device. You can refer to the prior art for understanding, and will not repeat it here.

[0073] It should be noted that since the light source has been integrated into the entire silicon photonic chip, the above-mentioned method of the present invention can omit the grating opening and end face opening processes in the conventional silicon photonic platform, thereby greatly reducing cost expenditure, reducing energy consumption, and reducing the device size.

[0074] In summary, the present invention forms a quantum dot light source 14 on the semiconductor layer 13 as the functional layer of the silicon optical device, and utilizes the strong three-dimensional quantum confinement effect of the semiconductor quantum dot D, so that the formed silicon optical device can exhibit excellent performances such as low threshold current, high modulation rate, high temperature stability, low line width enhancement factor and high anti-reflection. In addition, by using methods compatible with CMOS processes such as spin coating SOG material 141 and annealing, the preparation process of the quantum dot light source 14 can be integrated into the shallow trench isolation process in the silicon optical process flow, realizing a new mode of silicon optical devices that integrate silicon quantum dot light sources 14 using silicon optical processes.

[0075] The monolithic integrated silicon photonic chip prepared by the method of the present invention can be used in different scenarios depending on the performance of the light source itself. When the performance of the silicon quantum dot light source 14 is close to that of a laser, that is, when it has sufficient optical power, it can be used in many fields such as optical communications and lidar; and when the performance of the silicon quantum dot light source 14 is close to that of a light-emitting diode, it can also be used in fields such as sensors, thus having practical application prospects.

[0076] Although the embodiments of the present invention are described in detail above, it is obvious to those skilled in the art that various modifications and variations can be made to these embodiments. However, it should be understood that such modifications and variations are within the scope and spirit of the present invention as described in the claims. Moreover, the present invention described herein may have other embodiments and may be implemented or realized in a variety of ways.

Claims

1. A silicon optical device structure, characterized in that: include: A dielectric layer and a semiconductor layer are sequentially arranged on the substrate; The semiconductor layer is provided with an active area, the semiconductor layer in the active area forms a semiconductor pattern, a light source window penetrating to the surface of the dielectric layer is provided on the surface of the semiconductor pattern, and a quantum dot light source is provided in the light source window.

2. The silicon photonic device structure according to claim 1, characterized in that: The quantum dot light source has a structure in which a silicon dioxide interface encapsulates silicon quantum dots, and / or the light source window forms a resonant cavity.

3. The silicon photonic device structure according to claim 1, characterized in that: The silicon optical device structure is used to form a quantum dot laser or a quantum dot light emitting diode.

4. The silicon photonic device structure according to claim 1, characterized in that: The active area is formed by a shallow trench isolation defined on the surface of the semiconductor layer, and the shallow trench isolation penetrates to the surface of the dielectric layer.

5. The silicon photonic device structure according to claim 1, characterized in that: The substrate, the dielectric layer and the semiconductor layer are respectively a bottom silicon layer, a buried oxide layer and a top silicon layer of a SOI substrate.

6. A method for realizing a silicon optical device structure, characterized in that: include: Providing a substrate, on which a dielectric layer and a semiconductor layer are sequentially formed; forming an active region on the semiconductor layer, and forming a semiconductor pattern on the semiconductor layer in the active region; forming a light source window on the surface of the semiconductor pattern and penetrating to the surface of the dielectric layer; A quantum dot light source is formed in the light source window.

7. The method for realizing a silicon optical device structure according to claim 6, characterized in that: The step of forming an active region on the semiconductor layer and forming a semiconductor pattern on the semiconductor layer in the active region specifically includes: forming a cushion layer on the surface of the semiconductor layer; Using a first photolithography and etching process, a shallow trench isolation is formed on the surface of the pad layer and penetrates to the surface of the dielectric layer, an active area is defined on the semiconductor layer within the shallow trench isolation, and a semiconductor pattern is formed on the semiconductor layer below the pad layer in the active area; The step of forming a light source window on the surface of the semiconductor pattern and penetrating to the surface of the dielectric layer, and forming a quantum dot light source in the light source window specifically includes: Using a second photolithography and etching process, a light source window is formed on the surface of the cushion layer and penetrates to the surface of the dielectric layer to form a resonant cavity; Spin coating SOG material on the surface of the pad layer to fill the light source window, and annealing; The excess SOG material outside the light source window after annealing is removed, and a quantum dot light source formed of silicon quantum dot material wrapped in silicon dioxide is formed in the light source window.

8. The method for realizing a silicon optical device structure according to claim 7, characterized in that: The temperature during the annealing satisfies the condition for causing phase separation of the SOG material, and / or, by adjusting the temperature during the annealing, the intrinsic emission wavelength of the formed quantum dot light source is modulated.

9. The method for realizing a silicon optical device structure according to claim 7, characterized in that: The pad layer includes a silicon nitride pad layer, and before performing the second photolithography, it also includes: first forming a carbon-containing hard mask layer and a photoresist layer in sequence on the surface of the silicon nitride pad layer, then performing the second photolithography, and after performing the second photolithography and etching, performing cleaning after removing the photoresist; and / or, the pad layer includes a protective layer and a barrier layer formed in sequence on the surface of the semiconductor layer, chemical mechanical polishing is used to remove the excess SOG material outside the light source window after annealing, and the barrier layer is used as a chemical mechanical polishing stop layer.

10. The method for realizing a silicon photonic device structure according to claim 6, characterized in that: The substrate, the dielectric layer and the semiconductor layer are formed by a bottom silicon layer, a buried oxide layer and a top silicon layer of an SOI substrate.

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