Transaction request processing method and device, electronic equipment and storage medium

By merging the same thing request group at the consistency module interface of the on-chip network, the problem of low resource utilization on-chip network is solved, and the maximum resource utilization and consistency of cached data is achieved.

CN119583652APending Publication Date: 2025-03-07BEIJING INSTITUTE OF OPEN SOURCE CHIP

Patent Information

Application Number
CN202510131144.9
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-02-05
Publication Date
2025-03-07

AI Technical Summary

Technical Problem

In an on-chip network, thing requests are processed in the order of reception, resulting in the inability to maximize the use of resources.

Method used

The same thing request group is determined at the interface of the consistency module, and without affecting cache consistency, all thing requests in the same thing request group are merged into one thing request and sent to the consistency module.

Benefits of technology

By merging the same thing requests, effectively processing the same thing requests, avoiding long waits and multiple repeated accesses, maximizing resource utilization and maintaining consistency of cached data.

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Abstract

The embodiment of the invention provides a transaction request processing method and device, electronic equipment and a storage medium, and relates to the technical field of network-on-chip. The method comprises the following steps: receiving a plurality of transaction requests; determining, at an interface of the coherency module, a group of identical transaction requests from the plurality of transaction requests; one identical transaction request group comprises at least two identical transaction requests; at the interface of the consistency module, aiming at each same transaction request group, under the condition that the transaction requests in the same transaction request group do not influence the consistency of the cache, combining all the transaction requests in the same transaction request group into one transaction request; and sending the merged transaction request to a consistency module. According to the invention, the consistency of the cache data of the network-on-chip can be kept, the processing speed of the transaction request is accelerated, the resource occupation in a consistency module in the network-on-chip is effectively reduced, and the maximum utilization of resources is realized.
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Description

Technical Field

[0001] The present invention relates to the field of network-on-chip technology, and in particular to a method for processing a transaction request, a device for processing a transaction request, an electronic device and a storage medium. Background Art

[0002] Network-on-chip (NoC) is an interconnection architecture of system-on-chip, which has high bandwidth and high link utilization, etc., and therefore has broad application prospects.

[0003] In the on-chip network, each transaction request is processed one by one in the order in which it is received. However, the above processing method results in that the resources of the on-chip network cannot be maximized. Summary of the invention

[0004] In view of the above problems, an embodiment of the present invention is proposed to provide a method for processing transaction requests that overcomes the above problems or at least partially solves the above problems, so as to improve resource utilization of the on-chip network.

[0005] In a first aspect, the present invention provides a method for processing a transaction request, which is applied to a network on chip, wherein the network on chip includes: a consistency module and a cache; the method includes: Receive multiple transaction requests; At the interface of the consistency module, determining a same transaction request group from the multiple transaction requests; one of the same transaction request groups includes: at least two same transaction requests; At the interface of the consistency module, for each of the same transaction request groups, all transaction requests in the same transaction request group are merged into one transaction request if the transaction requests in the same transaction request group do not affect the consistency of the cache; The merged transaction request is sent to the consistency module.

[0006] In a second aspect, the present invention provides a transaction request processing device, which is applied to a network on chip, wherein the network on chip includes: a consistency module and a cache; the device includes: A receiving module, used for receiving multiple transaction requests; The same transaction determination module is used to determine a same transaction request group from the multiple transaction requests at the interface of the consistency module; one of the same transaction request groups includes: at least two same transaction requests; a merging module, configured to merge, at the interface of the consistency module, for each of the same transaction request groups, all transaction requests in the same transaction request group into one transaction request if the transaction requests in the same transaction request group do not affect the consistency of the cache; The sending module is used to send the merged transaction request to the consistency module.

[0007] In a third aspect, the present invention provides an electronic device, comprising: a processor, a memory, and a computer program stored in the memory and executable on the processor, wherein the processor implements the above-mentioned method for processing transaction requests when executing the program.

[0008] In a fourth aspect, the present invention provides a readable storage medium, which, when instructions in the storage medium are executed by a processor of an electronic device, enables the electronic device to execute the above-mentioned method for processing transaction requests.

[0009] In a fifth aspect, the present invention provides a computer program product, comprising instructions, which, when executed by a processor in an electronic device, enable the electronic device to execute any one of the aforementioned methods for processing transaction requests.

[0010] The present invention includes at least the following advantages: In the present invention, the same transaction request group is determined at the interface of the consistency module, and for each same transaction request group, all transaction requests in the same transaction request group are merged into one transaction request if the transaction requests in the same transaction request group do not affect the cache consistency of the on-chip network. Since the present application only merges all transaction requests in the same transaction request group that do not affect the cache consistency of the on-chip network, the merging method of the present application can maintain the consistency of the cache data of the on-chip network, maintain the consistency protocol, and prevent data confusion in the on-chip network. Only the merged transaction requests will enter the consistency module of the on-chip network, so that the same transaction requests can be effectively processed without long waiting and multiple repeated accesses, which is equivalent to realizing parallel processing of transaction requests, speeding up the processing speed of transaction requests, effectively reducing the resource occupancy in the consistency module in the on-chip network, and realizing maximum resource utilization. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings required for use in the description of the embodiments of the present invention will be briefly introduced below. Obviously, the accompanying drawings in the following description are only some embodiments of the present invention. For ordinary technicians in this field, other accompanying drawings can be obtained based on these accompanying drawings without paying creative labor.

[0012] Figure 1A flowchart showing a method for processing a transaction request according to an embodiment of the present invention; Figure 2 A flowchart showing another method for processing a transaction request according to an embodiment of the present invention; Figure 3 A schematic diagram of a process of processing a transaction request of the present invention is shown; Figure 4 A schematic diagram showing another process of processing a transaction request of the present invention is shown; Figure 5 A flowchart showing a method for processing a transaction request according to another embodiment of the present invention is provided; Figure 6 A structural block diagram showing an embodiment of a device for processing transaction requests of the present invention; Figure 7 It is a structural diagram of an electronic device provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0013] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0014] One of the core concepts of the embodiments of the present invention is that, in the present invention, the same transaction request group is determined at the interface of the consistency module, and for each same transaction request group, all transaction requests in the same transaction request group are merged into one transaction request when the transaction requests in the same transaction request group do not affect the cache consistency of the on-chip network. Since the present application only merges all transaction requests in the same transaction request group that do not affect the cache consistency of the on-chip network, the merging method of the present application can maintain the consistency of the cache data of the on-chip network, maintain the consistency protocol, and prevent data confusion in the on-chip network. Only the merged transaction requests will enter the consistency module of the on-chip network, so that the same transaction requests can be effectively processed without long waiting and multiple repeated accesses, which is equivalent to realizing parallel processing of transaction requests, speeding up the processing speed of transaction requests, effectively reducing the resource occupancy in the consistency module in the on-chip network, and realizing maximum resource utilization.

[0015] The present application provides a method for processing a transaction request, which is applied to an on-chip network, and the on-chip network includes: a consistency module (HNF) and a cache (Cache). An entry buffer is provided in the consistency module for buffering transaction requests, and the entry buffer has entry resources for performing transaction processing on the transaction request. The consistency module can be used to maintain the consistency of the cache of the on-chip network.

[0016] Reference Figure 1 The method for processing the transaction request may specifically include the following steps.

[0017] Step 101: Receive multiple transaction requests.

[0018] The transaction request here refers to a transaction request that requires requesting resources of the on-chip network, and there is no specific limitation on the type of the transaction request, etc. There is no limitation on the specific number of the multiple transaction requests.

[0019] Step 102: At the interface of the consistency module, determine an identical transaction request group from the multiple transaction requests; one identical transaction request group includes: at least two identical transaction requests.

[0020] The interface of the consistency module refers to the external interface of the consistency module. Here, the same thing request is determined from the multiple thing requests received, and the same thing request is divided into an identical thing request group. There is no limit on how many identical thing request groups are included in the aforementioned multiple thing requests. An identical thing request group includes: at least two identical thing requests. There is no specific limit on how many identical thing requests are included in an identical thing request group. The thing requests in different thing request groups are different.

[0021] Step 103: At the interface of the consistency module, for each of the same transaction request groups, all transaction requests in the same transaction request group are merged into one transaction request if the transaction requests in the same transaction request group do not affect the consistency of the cache.

[0022] At the interface of the consistency module, for each identical transaction request group, it is necessary to determine whether the transaction requests therein affect the consistency of the cache of the on-chip network. For an identical transaction request group, there is no limitation on the method for determining whether the transaction requests therein affect the consistency of the cache. For example, for an identical transaction request group, it is determined whether at least one transaction request therein affects the consistency of the cache of the on-chip network, and the determination result is the result of whether the identical transaction request group affects the consistency of the cache of the on-chip network. It is possible to determine whether only one transaction request in the identical transaction request group affects the consistency of the cache of the on-chip network, or it is possible to determine whether multiple transaction requests in the identical transaction request group affect the consistency of the cache of the on-chip network, or it is possible to determine whether each transaction request in the identical transaction request group affects the consistency of the cache of the on-chip network.

[0023] Optionally, the aforementioned step 103 may include: at the interface of the consistency module, for each of the same transaction request groups, when the transaction request in the same transaction request group is a partial cache line write transaction request, merging all the transaction requests in the same transaction request group into one transaction request; and / or, at the interface of the consistency module, for each of the same transaction request groups, when the transaction request in the same transaction request group is a no-sniff read transaction request (ReadNoSnp), merging all the transaction requests in the same transaction request group into one transaction request. The no-sniff read transaction request can read part of the cache line data and the state of the cache line will not hinder the consistency protocol. Specifically, under normal circumstances, neither the partial cache line write transaction request nor the no-sniff read transaction request will affect the consistency of the cache. When the transaction request in the same transaction request group is a partial cache line write transaction request or a no-sniff read transaction request, all the transaction requests in the same transaction request group are merged into one transaction request. Here, for partial cache line write transaction requests and non-listener read transaction requests, whether they affect cache consistency can be determined only by the type of transaction request. No further judgment is needed on whether they affect cache consistency, and they can be directly merged. This will not only not affect cache consistency, but also improve the processing efficiency of transaction requests. The partial cache line write transaction request here refers to writing a portion of at least one cache line at a time, not writing at least one cache line completely. For example, a transaction request to write half a cache line is a partial cache line write transaction request.

[0024] Optionally, the aforementioned step 103 may include: at the interface of the consistency module, for each of the same transaction request groups, when the transaction request in the same transaction request group is a full cache line write transaction request, when the transaction request in the same transaction request group does not affect the consistency of the cache, all the transaction requests in the same transaction request group are merged into one transaction request; and / or, at the interface of the consistency module, for each of the same transaction request groups, when the transaction request in the same transaction request group is a read transaction request other than a non-listening read transaction request, when the transaction request in the same transaction request group does not affect the consistency of the cache, all the transaction requests in the same transaction request group are merged into one transaction request. Specifically, it is not possible to determine whether a full cache line write transaction request or a read transaction request other than a non-listening read transaction request affects cache consistency only from the transaction type, and it is necessary to further determine the state of the cache, the state of each route or external place, etc. to further determine whether it affects cache consistency. Therefore, for a full cache line write transaction request or a read transaction request other than a non-listening read transaction request, further determining whether it affects cache consistency can improve cache consistency and avoid cache consistency problems caused by mis-merging. Here, the full cache line write transaction request refers to writing at least one cache at a time, that is, writing at least one cache line fully. For example, a transaction request to write one cache line is a full cache line write transaction request.

[0025] Step 104: Send the merged transaction request to the consistency module.

[0026] If each transaction request in the same transaction request group is processed one by one in the order in which it is received, it will result in repeated accesses, resulting in the failure to maximize the utilization of the resources of the on-chip network. In this application, if a transaction request in the same transaction request group does not affect the consistency of the cache, it means that even if it is merged into one transaction request for processing, it will not affect the consistency of the cache. After merging, a same transaction request group will only transmit one transaction request to the consistency module, avoiding repeated transaction requests from entering the consistency module, greatly reducing the number of transaction requests entering the consistency module, not only maintaining the consistency of the cache data of the on-chip network, but also effectively processing the same transaction request without long waiting time and repeated access, realizing the maximum utilization of resources.

[0027] It should be noted that, among the aforementioned multiple transaction requests, except for the transaction requests in the same transaction request group that do not affect the consistency of the cache, the remaining transaction requests are directly sent to the consistency module for processing.

[0028] It should be noted that each transaction request in a same transaction request group may be received continuously or intermittently, without specific limitation. Continuous receipt here means: during the reception of each transaction request in the same transaction request group, no other transaction requests are received, and intermittent receipt means that during the reception of each transaction request in the same transaction request group, other transaction requests are received.

[0029] Reference Figure 2 The transaction request processing method is also applied to the on-chip network, which includes: a consistency module and a cache. Here, reference can be made to the above-mentioned related records. In order to avoid repetition, it will not be repeated here. The transaction request method may specifically include the following steps.

[0030] Step 201: Receive multiple transaction requests.

[0031] Step 201 may refer to the aforementioned step 101, and will not be described again here to avoid repetition.

[0032] Step 202: Set a buffer at the interface of the consistency module.

[0033] Step 202 may also be performed before step 201, by adding a buffer mechanism to perform pre-processing of the transaction request. It should be noted that the buffer at the interface of the consistency module is different from the entry buffer in the consistency module mentioned above, and the buffer at the interface of the consistency module is located in front of the entry buffer in the consistency module.

[0034] Step 203: The buffer determines a same transaction request group from the multiple transaction requests; one same transaction request group includes: at least two same transaction requests.

[0035] Step 204: For each of the same transaction request groups, the buffer merges all transaction requests in the same transaction request group into one transaction request when the transaction requests in the same transaction request group do not affect the consistency of the cache.

[0036] Step 205: The buffer sends the merged transaction request to the consistency module.

[0037] The difference between step 203 to step 205 and the aforementioned step 102 to step 104 is that the execution subject of this step is the buffer at the interface of the consistency module, and the rest of the steps refer to the corresponding aforementioned steps, which will not be repeated here to avoid repetition.

[0038] For example, refer to Figure 3In a multi-core cascaded network on chip of a CPU (central processing unit), both CPU0 and CPU1 send out Class A transaction requests. In the consistency protocol module of the present application, the receiving order is not adopted to process the Class A transaction request of CPU0 first and then the Class A transaction request of CPU1. Instead, a buffer is first set at the interface of the consistency module, and then the buffer determines whether the Class A transaction request affects the consistency of the cache. If the Class A transaction request does not affect the consistency of the cache, several Class A transaction requests are merged into one Class A transaction request, and the buffer sends the merged Class A transaction request to the consistency module, which can not only maintain the consistency of the cache data of the network on chip, but also effectively process the same transaction request without long waiting and multiple repeated accesses, thereby maximizing the utilization of resources.

[0039] Step 205: The buffer sends the merged transaction request to the consistency module.

[0040] By adding a buffer mechanism to pre-process transaction requests, not only can the consistency of cache data in the on-chip network be maintained, but requests for the same transaction can also be effectively processed without long waits and multiple repeated accesses, thereby maximizing resource utilization.

[0041] Optionally, after sending the merged transaction request to the consistency module, the method may further include: clearing the buffer to make room for subsequent transaction requests. For example, when all transaction requests in the same transaction request group are received continuously, and the transaction requests in the same transaction request group do not affect cache consistency, after merging the transaction requests and sending the merged transaction request to the consistency module, clearing the buffer. For another example, referring to Figure 4 , first receive two Class A transaction requests, and Class A transaction requests do not affect the consistency of the cache. When a Class B transaction request appears after the two Class A transaction requests, the two consecutive Class A transaction requests are merged into one Class A transaction request. After the merged Class A transaction request is sent to the consistency module, the buffer is cleared at the same time, and both Class B transaction requests and Class A transaction requests are sent to the consistency module of the on-chip network for processing.

[0042] Reference Figure 5 The transaction request processing method is also applied to the on-chip network, which includes: a consistency module and a cache. Here, reference can be made to the above-mentioned related records. In order to avoid repetition, it will not be repeated here. The transaction request method may specifically include the following steps.

[0043] Step 301: Receive multiple transaction requests.

[0044] Step 301 may refer to the aforementioned step 101, and will not be described again here to avoid repetition.

[0045] Step 302: At the interface of the consistency module, for each transaction request among the multiple transaction requests, parse the transaction request to obtain a target address and a request type corresponding to the transaction request.

[0046] The parsing here is mainly performed using the consistency protocol. The target address corresponding to the transaction request refers to which cache line of the cache the transaction request needs to process. The request type corresponding to the transaction request refers to whether the transaction request is to read or write, and the method used for reading or writing.

[0047] Here, all transaction requests need to be parsed. When a buffer is set at the interface of the consistency module, all transaction requests are parsed by the buffer at the interface of the consistency module. In the prior art, transaction requests are parsed in the entry buffer in the consistency module. In this application, all transaction requests are parsed by the buffer at the interface of the consistency module, which realizes the pre-parsing of transaction requests and prepares for the grouping in the subsequent steps.

[0048] Step 303: At the interface of the consistency module, group the transaction requests with the same target address and request type from the multiple transaction requests into an identical transaction request group; the identical transaction request group includes at least two identical transaction requests.

[0049] In the present application, whether the transaction is the same is mainly distinguished based on the target address and request type corresponding to the transaction request. If the target address and request type corresponding to the transaction request are the same, they are considered to be the same transaction request.

[0050] In the case where a buffer is set at the interface of the consistency module, the buffer at the interface of the consistency module divides transaction requests with the same target address and request type from multiple transaction requests into the same transaction request group.

[0051] Step 304: At the interface of the consistency module, for each of the same transaction request groups, all transaction requests in the same transaction request group are merged into one transaction request if the transaction requests in the same transaction request group do not affect the consistency of the cache.

[0052] Step 305: Send the merged transaction request to the consistency module.

[0053] Step 304 and step 305 may refer to step 103 and step 104, and will not be described again here to avoid repetition.

[0054] It should be noted that, for the sake of simplicity, the method embodiments are described as a series of action combinations, but those skilled in the art should be aware that the embodiments of the present invention are not limited by the order of the actions described, because according to the embodiments of the present invention, certain steps can be performed in other orders or simultaneously. Secondly, those skilled in the art should also be aware that the embodiments described in the specification are all preferred embodiments, and the actions involved are not necessarily required by the embodiments of the present invention.

[0055] Reference Figure 6 , Figure 6 The structural block diagram of an embodiment of a transaction request processing device of the present invention is shown, which is applied to a network on chip, and the network on chip includes: a consistency module and a cache; the device may specifically include the following modules: Receiving module 401, used for receiving multiple transaction requests; The same transaction determination module 402 is used to determine a same transaction request group from the multiple transaction requests at the interface of the consistency module; one of the same transaction request groups includes: at least two same transaction requests; A merging module 403 is used for merging all transaction requests in the same transaction request group into one transaction request at the interface of the consistency module for each of the same transaction request groups, provided that the transaction requests in the same transaction request group do not affect the consistency of the cache; The sending module 404 is used to send the merged transaction request to the consistency module.

[0056] Optionally, the device further comprises: A parsing module, configured to parse each of the multiple transaction requests at the interface of the consistency module to obtain a target address and a request type corresponding to the transaction request; The same thing determination module includes: The first same transaction determination submodule is used to classify transaction requests with the same target address and request type from the multiple transaction requests into a same transaction request group at the interface of the consistency module.

[0057] Optionally, the merging module includes: A first merging submodule is configured to merge all transaction requests in the same transaction request group into one transaction request at the interface of the consistency module for each of the same transaction request groups when the transaction request in the same transaction request group is a partial cache line write transaction request; and / or The second merging submodule is used to merge all transaction requests in the same transaction request group into one transaction request at the interface of the consistency module for each of the same transaction request groups when the transaction request in the same transaction request group is a non-listening read transaction request.

[0058] Optionally, the merging module includes: A third merging submodule is configured to merge all transaction requests in the same transaction request group into one transaction request at the interface of the consistency module for each of the same transaction request groups, when the transaction request in the same transaction request group is a full cache line write transaction request and when the transaction request in the same transaction request group does not affect the consistency of the cache; and / or A fourth merging submodule is used to merge all transaction requests in the same transaction request group into one transaction request at the interface of the consistency module for each of the same transaction request groups, when the transaction request in the same transaction request group is a read transaction request other than a non-listening read transaction request, and when the transaction request in the same transaction request group does not affect the consistency of the cache.

[0059] Optionally, the device further comprises: A buffer setting module, used for setting a buffer at the interface of the consistency module; The same thing determination module includes: A second same transaction determination submodule, used for the buffer to determine a same transaction request group from the multiple transaction requests; The merging module comprises: A fifth merging submodule, configured to merge all transaction requests in the same transaction request group into one transaction request for each of the same transaction request groups, provided that the transaction requests in the same transaction request group do not affect the consistency of the cache; The sending module comprises: The sending submodule is used for the buffer to send the merged transaction request to the consistency module.

[0060] Optionally, the device further comprises: The clearing module is used to clear the buffer.

[0061] It should be noted that the device for processing transaction requests may refer to the relevant aspects of the aforementioned method for processing transaction requests, and both have the same or similar beneficial effects. To avoid repetition, they will not be described here.

[0062] Figure 7 is a structural diagram of an electronic device provided by an embodiment of the present invention. Figure 7 The present invention also provides an electronic device, see Figure 7 , including: a processor 501, a memory 502, and a computer program 5021 stored in the memory and executable on the processor, wherein when the processor executes the program, the steps of each embodiment of the processing of the above-mentioned transaction request are implemented.

[0063] The present invention also provides a readable storage medium, when the instructions in the storage medium are executed by a processor of an electronic device, the electronic device can execute the steps of each embodiment of the above-mentioned method for processing transaction requests.

[0064] The present invention also provides a computer program product, comprising instructions, which, when executed by a processor in an electronic device, enable the electronic device to execute the steps of any of the aforementioned transaction request processing embodiments.

[0065] The various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referenced to each other.

[0066] It will be appreciated by those skilled in the art that the embodiments of the present invention may be provided as methods, devices, or computer program products. Therefore, the embodiments of the present invention may take the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware. Moreover, the embodiments of the present invention may take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program codes.

[0067] The embodiments of the present invention are described with reference to the flowcharts and / or block diagrams of the methods, terminal devices (systems), and computer program products according to the embodiments of the present invention. It should be understood that each process and / or block in the flowchart and / or block diagram, as well as the combination of the processes and / or blocks in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data transmission terminal device to generate a machine, so that the instructions executed by the processor of the computer or other programmable data transmission terminal device generate instructions for implementing the process in the flowchart. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0068] These computer program instructions may also be stored in a computer readable memory capable of directing a computer or other programmable data transmission terminal device to operate in a predictable manner, so that the instructions stored in the computer readable memory produce a manufactured product including an instruction device, which implements the process Figure 1 A process or multiple processes and / or boxes Figure 1 A function specified in one or more boxes.

[0069] These computer program instructions can also be loaded onto a computer or other programmable data transmission terminal device so that a series of operating steps are executed on the computer or other programmable terminal device to produce a computer-implemented process, thereby providing instructions for executing on the computer or other programmable terminal device to implement the process. Figure 1 A process or multiple processes and / or boxes Figure 1 The steps for the functions specified in one or more boxes.

[0070] Although the preferred embodiments of the present invention have been described, those skilled in the art may make additional changes and modifications to these embodiments once they have learned the basic creative concept. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications that fall within the scope of the embodiments of the present invention.

[0071] Finally, it should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or terminal device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or terminal device. In the absence of further restrictions, the elements defined by the sentence "comprise a ..." do not exclude the existence of other identical elements in the process, method, article or terminal device including the elements.

[0072] The above is a detailed introduction to a method and device for processing a thing request, an electronic device and a storage medium provided by the present invention. Specific examples are used in this article to illustrate the principle and implementation mode of the present invention. The description of the above embodiments is only used to help understand the method of the present invention and its core idea; at the same time, for a general technician in this field, according to the idea of ​​the present invention, there will be changes in the specific implementation mode and application scope. In summary, the content of this specification should not be understood as a limitation on the present invention.

Claims

1. A method for processing a transaction request, characterized in that: Applied to a network on chip, the network on chip includes: a consistency module and a cache; the method includes: Receive multiple transaction requests; At the interface of the consistency module, determining a same transaction request group from the multiple transaction requests; one of the same transaction request groups includes: at least two same transaction requests; At the interface of the consistency module, for each of the same transaction request groups, all transaction requests in the same transaction request group are merged into one transaction request if the transaction requests in the same transaction request group do not affect the consistency of the cache; The merged transaction request is sent to the consistency module.

2. The method for processing a transaction request according to claim 1, characterized in that: Before determining the same transaction request group from the multiple transaction requests at the interface of the consistency module, the method further includes: At the interface of the consistency module, for each of the multiple transaction requests, the transaction request is parsed to obtain a target address and a request type corresponding to the transaction request; The determining, at the interface of the consistency module, a same transaction request group from the multiple transaction requests comprises: At the interface of the consistency module, transaction requests with the same target address and request type are divided into a same transaction request group from the multiple transaction requests.

3. The method for processing a transaction request according to claim 1, characterized in that: At the interface of the consistency module, for each of the same transaction request groups, when the transaction requests in the same transaction request group do not affect the consistency of the cache, merging all the transaction requests in the same transaction request group into one transaction request, including: At the interface of the consistency module, for each of the same transaction request groups, when a transaction request in the same transaction request group is a partial cache line write transaction request, all transaction requests in the same transaction request group are merged into one transaction request; and / or, At the interface of the consistency module, for each of the same transaction request groups, when the transaction requests in the same transaction request group are non-listening read transaction requests, all the transaction requests in the same transaction request group are merged into one transaction request.

4. The method for processing a transaction request according to claim 1, characterized in that: At the interface of the consistency module, for each of the same transaction request groups, when the transaction requests in the same transaction request group do not affect the consistency of the cache, merging all the transaction requests in the same transaction request group into one transaction request, including: At the interface of the consistency module, for each of the same transaction request groups, when the transaction request in the same transaction request group is a full cache line write transaction request and when the transaction request in the same transaction request group does not affect the consistency of the cache, all transaction requests in the same transaction request group are merged into one transaction request; and / or, At the interface of the consistency module, for each of the same transaction request groups, when the transaction request in the same transaction request group is a read transaction request other than a non-listening read transaction request, and when the transaction request in the same transaction request group does not affect the consistency of the cache, all transaction requests in the same transaction request group are merged into one transaction request.

5. The method for processing a transaction request according to claim 1, characterized in that: Before determining the same transaction request group from the multiple transaction requests at the interface of the consistency module, the method further includes: Setting a buffer at the interface of the consistency module; The determining, at the interface of the consistency module, a same transaction request group from the multiple transaction requests comprises: The buffer determines a same transaction request group from the multiple transaction requests; At the interface of the consistency module, for each of the same transaction request groups, when the transaction requests in the same transaction request group do not affect the consistency of the cache, merging all the transaction requests in the same transaction request group into one transaction request, including: The buffer combines all transaction requests in the same transaction request group into one transaction request for each of the same transaction request groups, provided that the transaction requests in the same transaction request group do not affect the consistency of the cache; The sending the merged transaction request to the consistency module includes: The buffer sends the merged transaction request to the consistency module.

6. The method for processing a transaction request according to claim 5, characterized in that: Also includes: Clear the buffer.

7. A device for processing transaction requests, characterized in that: Applied to a network on chip, the network on chip includes: a consistency module and a cache; the device includes: A receiving module, used for receiving multiple transaction requests; The same transaction determination module is used to determine a same transaction request group from the multiple transaction requests at the interface of the consistency module; one of the same transaction request groups includes: at least two same transaction requests; a merging module, configured to merge, at the interface of the consistency module, for each of the same transaction request groups, all transaction requests in the same transaction request group into one transaction request if the transaction requests in the same transaction request group do not affect the consistency of the cache; The sending module is used to send the merged transaction request to the consistency module.

8. An electronic device, characterized in that: include: A processor, a memory, and a computer program stored in the memory and executable on the processor, wherein the processor implements a method for processing a transaction request as described in any one of claims 1 to 6 when executing the program.

9. A readable storage medium, characterized in that: When the instructions in the storage medium are executed by a processor of an electronic device, the electronic device is enabled to execute the method for processing a transaction request according to any one of claims 1 to 6.

10. A computer program product, characterized in that The invention comprises instructions, which, when executed by a processor in an electronic device, enable the electronic device to execute the method for processing a transaction request as described in any one of claims 1 to 6.

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