Plasma processing apparatus and method of controlling source frequency of source high frequency power

Abstract

A plasma processing apparatus includes a chamber, a substrate support portion, a high-frequency power source, and a bias power source. The substrate support portion has a bias electrode and is provided in the chamber. The high-frequency power source is configured to generate source high-frequency power in order to generate plasma in the chamber. The bias power supply is configured to periodically supply an electrical bias having a waveform period to the bias electrode. The high-frequency power supply is configured so that the source frequency of the source high-frequency power for each of a plurality of phase periods in the waveform period is set to a frequency obtained by adding a random noise and a frequency offset amount for suppressing reflection of the source high-frequency power to the source frequency of the same phase period in the preceding waveform period.

Description

Technical Field

[0001] Illustrative embodiments of the present invention relate to a plasma processing apparatus and a method of controlling a source frequency of a source high frequency power. Background Art

[0002] A plasma processing apparatus is used to perform plasma processing on a substrate. In the plasma processing apparatus, bias high frequency power is used to attract ions from plasma generated in a chamber to the substrate. Patent document 1 listed below discloses a plasma processing apparatus that modulates the power level and frequency of the bias high frequency power.

[0003] Prior art literature

[0004] Patent Literature

[0005] Patent Document 1: Japanese Patent Application Publication No. 2009-246091 Summary of the invention

[0006] Problems to be solved by the invention

[0007] The present invention provides a technology for reducing the reflection level of source high frequency power in a plasma processing device.

[0008] Methods for solving problems

[0009] In an exemplary embodiment, a plasma processing device is provided. The plasma processing device includes a chamber, a substrate support, a high-frequency power source, and a bias power source. The substrate support has a bias electrode, which is arranged in the chamber. The high-frequency power source is configured to generate a source high-frequency power (source high-frequency electric power / source high-frequency electricity) in order to generate plasma in the chamber. The bias power source is configured to periodically supply an electric bias (electric bias) with a waveform period to the bias electrode. The high-frequency power source is configured to set the source frequency of the source high-frequency power during each of the multiple phases in the waveform period to a frequency obtained by adding a frequency shift (frequency shift) and random noise (random noise) to the source frequency during the same phase in the preceding waveform period to suppress the extent of reflection of the source high-frequency power.

[0010] Effects of the Invention

[0011] According to an exemplary embodiment, the degree of reflection of source high frequency power is reduced in a plasma processing apparatus. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] Figure 1 It is a diagram for explaining a configuration example of a plasma processing system.

[0013] Figure 2 It is a diagram for explaining a configuration example of a capacitive coupling type plasma processing apparatus.

[0014] Figure 3 FIG. 1 is a diagram showing a configuration example of a power supply system in a plasma processing apparatus according to an exemplary embodiment.

[0015] Figure 4 It is a diagram showing an example of the waveform of the electrical bias.

[0016] Figure 5 This is a timing diagram of an example of the electric bias and the source frequency of the source high frequency power.

[0017] Figure 6 (a) and Figure 6 (b) is a timing diagram of an example of generating source high frequency power and electrical bias.

[0018] Figure 7 (a) and Figure 7 (b) is a timing diagram of an example of source high frequency power and electrical bias.

[0019] Figure 8 This is a timing diagram of an example of the electric bias and the source frequency of the source high frequency power.

[0020] Fig. 9 (a)~ Fig. 9 (d) is a timing chart of another example of the electrical bias.

[0021] Fig.10 is a flow chart of a method for controlling a source frequency of a source high frequency power according to an exemplary embodiment. DETAILED DESCRIPTION

[0022] Hereinafter, various exemplary embodiments will be described in detail with reference to the accompanying drawings, wherein the same or corresponding parts are denoted by the same reference numerals in each of the drawings.

[0023] Figure 1: is a diagram for illustrating a structural example of a plasma processing system. In one embodiment, the plasma processing system includes a plasma processing device 1 and a control unit 2. The plasma processing system is an example of a substrate processing system, and the plasma processing device 1 is an example of a substrate processing device. The plasma processing device 1 includes a plasma processing chamber 10, a substrate support portion 11, and a plasma generating portion 12. The plasma processing chamber 10 has a plasma processing space. In addition, the plasma processing chamber 10 has at least one gas supply port for supplying at least one processing gas to the plasma processing space and at least one gas exhaust port for exhausting gas from the plasma processing space. The gas supply port is connected to the gas supply portion 20 described later, and the gas exhaust port is connected to the exhaust system 40 described later. The substrate support portion 11 is arranged in the plasma processing space and has a substrate supporting surface for supporting a substrate.

[0024] The plasma generating unit 12 is configured to generate plasma from at least one processing gas supplied into the plasma processing space. The plasma formed in the plasma processing space may be capacitively coupled plasma (CCP: Capacitively Coupled Plasma), inductively coupled plasma (ICP: Inductively Coupled Plasma), ECR plasma (Electron-Cyclotron-Resonance Plasma), helicon wave plasma (HWP: Helicon Wave Plasma), or surface wave plasma (SWP: Surface Wave Plasma).

[0025] The control unit 2 processes computer executable commands that cause the plasma processing device 1 to perform various processes described in the present invention. The control unit 2 can be configured to control the various elements of the plasma processing device 1 in a manner that performs various processes described herein. In one embodiment, a part or all of the control unit 2 may also be included in the plasma processing device 1. The control unit 2 may include a processing unit 2a1, a storage unit 2a2, and a communication interface 2a3. The control unit 2 is implemented, for example, by a computer 2a. The processing unit 2a1 may be configured to perform various control actions by reading a program from the storage unit 2a2 and executing the read program. The program may be pre-stored in the storage unit 2a2, or may be obtained via a medium when necessary. The acquired program is stored in the storage unit 2a2, and is read and executed from the storage unit 2a2 by the processing unit 2a1. The medium may be various storage media readable by the computer 2a, or may be a communication line connected to the communication interface 2a3. The processing unit 2a1 may also be a programmable logic device processor such as a CPU (Central Processing Unit) or an FPGA (Field-Programmable Gate Array). The storage unit 2a2 may include a RAM (Random Access Memory), a ROM (Read Only Memory), a HDD (Hard Disk Drive), an SSD (Solid State Drive), or a combination thereof. The communication interface 2a3 may communicate with the plasma processing device 1 via a communication line such as a LAN (Local Area Network).

[0026] Next, a configuration example of a capacitive coupling type plasma processing apparatus as an example of the plasma processing apparatus 1 will be described. Figure 2 It is a diagram for explaining a configuration example of a capacitive coupling type plasma processing apparatus.

[0027] A capacitively coupled plasma processing apparatus 1 includes a plasma processing chamber 10, a gas supply unit 20, a power supply system 30, and an exhaust system 40. In addition, the plasma processing apparatus 1 includes a substrate support unit 11 and a gas inlet unit. The gas inlet unit is configured to introduce at least one processing gas into the plasma processing chamber 10. The gas inlet unit includes a shower head 13. The substrate support unit 11 is disposed in the plasma processing chamber 10. The shower head 13 is disposed above the substrate support unit 11. In one embodiment, the shower head 13 constitutes at least a portion of the ceiling of the plasma processing chamber 10. The plasma processing chamber 10 has a plasma processing space 10s defined by the shower head 13, the side wall 10a of the plasma processing chamber 10, and the substrate support unit 11. The plasma processing chamber 10 is grounded. The substrate support unit 11 is electrically insulated from the shell of the plasma processing chamber 10.

[0028] The substrate support portion 11 includes a main body 111 and a ring assembly 112. The main body 111 has a central area 111a for supporting a substrate W and an annular area 111b for supporting the ring assembly 112. A wafer is an example of a substrate W. The annular area 111b of the main body 111 surrounds the central area 111a of the main body 111 when viewed from above. The substrate W is arranged on the central area 111a of the main body 111, and the ring assembly 112 is arranged on the annular area 111b of the main body 111 in a manner that surrounds the substrate W on the central area 111a of the main body 111. Therefore, the central area 111a is also referred to as a substrate supporting surface for supporting the substrate W, and the annular area 111b is also referred to as a ring supporting surface for supporting the ring assembly 112.

[0029] In one embodiment, the main body 111 includes a base 1110 and an electrostatic chuck 1111. The base 1110 includes a conductive component. The electrostatic chuck 1111 is arranged on the base 1110. The electrostatic chuck 1111 includes a ceramic component 1111a and an electrostatic electrode 1111b arranged in the ceramic component 1111a. The ceramic component 1111a has a central area 111a. In one embodiment, the ceramic component 1111a also has an annular area 111b. Among them, other components surrounding the electrostatic chuck 1111, such as an annular electrostatic chuck and annular insulating component, may also have an annular area 111b. In this case, the ring assembly 112 may be arranged on the annular electrostatic chuck or the annular insulating component, or on both the electrostatic chuck 1111 and the annular insulating component.

[0030] The ring assembly 112 includes one or more ring-shaped components. In one embodiment, the one or more ring-shaped components include one or more edge rings and at least one cover ring. The edge ring is formed of a conductive material or an insulating material, and the cover ring is formed of an insulating material.

[0031] In addition, the substrate support portion 11 may also include a temperature adjustment module configured to adjust at least one of the electrostatic suction cup 1111, the ring assembly 112 and the substrate to a target temperature. The temperature adjustment module may include a heater, a heat transfer medium, a flow path 1110a, or a combination thereof. A heat transfer fluid such as brine or gas flows in the flow path 1110a. In one embodiment, the flow path 1110a is formed in the base 1110, and one or more heaters are arranged in the ceramic part 1111a of the electrostatic suction cup 1111. In addition, the substrate support portion 11 may also include a heat transfer gas supply portion, which is configured to supply a heat transfer gas to the gap between the back side of the substrate W and the central area 111a.

[0032] The showerhead 13 is configured to introduce at least one processing gas from the gas supply unit 20 into the plasma processing space 10s. The showerhead 13 has at least one gas supply port 13a, at least one gas diffusion chamber 13b, and a plurality of gas introduction ports 13c. The processing gas supplied to the gas supply port 13a is introduced into the plasma processing space 10s from the plurality of gas introduction ports 13c through the gas diffusion chamber 13b. In addition, the showerhead 13 includes at least one upper electrode. Among them, the gas introduction unit may include, in addition to the showerhead 13, one or more side gas injection units (SGI: Side Gas Injector) installed in one or more openings formed in the side wall 10a.

[0033] The gas supply unit 20 may also include at least one gas source 21 and at least one flow controller 22. In one embodiment, the gas supply unit 20 is configured to supply at least one processing gas from the respectively corresponding gas source 21 to the nozzle 13 via the respectively corresponding flow controller 22. Each flow controller 22 may also include, for example, a mass flow controller or a pressure-controlled flow controller. In addition, the gas supply unit 20 may also include at least one flow modulation device for modulating or pulsing the flow of at least one processing gas.

[0034] The exhaust system 40 can be connected to a gas outlet 10e provided at the bottom of the plasma processing chamber 10, for example. The exhaust system 40 can also include a pressure regulating valve and a vacuum pump. The pressure in the plasma processing space 10s is adjusted by the pressure regulating valve. The vacuum pump can also include a turbomolecular pump, a dry pump, or a combination thereof.

[0035] The following, with Figure 2 Refer to Figure 3 . Figure 31 is a diagram showing a configuration example of a power supply system in a plasma processing apparatus according to an exemplary embodiment. The power supply system 30 includes a high frequency power supply 31 and a bias power supply 32. The high frequency power supply 31 constitutes a plasma generating unit 12 according to an exemplary embodiment. The high frequency power supply 31 is configured to generate a source high frequency power HF. The source high frequency power HF has a source frequency f HF That is, the source high frequency power HF has a frequency of source frequency f HF The source frequency is f HF The frequency may be in the range of 10 MHz to 150 MHz.

[0036] The high frequency power supply 31 is electrically connected to the high frequency electrode via the matching device 33, and is configured to supply source high frequency power HF to the high frequency electrode. The high frequency electrode may also be disposed in the substrate support portion 11. The high frequency electrode may also be at least one electrode disposed in a conductive component of the susceptor 1110 or in a ceramic component 1111a. Alternatively, the high frequency electrode may also be an upper electrode. When the source high frequency power HF is supplied to the high frequency electrode, plasma is generated from the gas in the chamber 10.

[0037] The matching device 33 has a variable impedance. The variable impedance of the matching device 33 is set to reduce reflection of the source high frequency power HF from the load. The matching device 33 can be controlled by the control unit 2, for example.

[0038] In one embodiment, the high frequency power source 31 may also include a signal generator 31g, a D / A converter 31c, and an amplifier 31a. The signal generator 31g generates a signal with a source frequency f HF The signal generator 31g may also be composed of a programmable processor or a programmable logic device such as an FPGA (Field-Programmable Gate Array). The signal generator 31g may be composed of a single programmable device 30p together with a signal generator 32g described later, or may be composed of a programmable device different from the signal generator 32g.

[0039] The output of the signal generator 31g is connected to the input of the D / A converter 31c. The D / A converter 31c converts the high-frequency signal from the signal generator 31g into an analog signal. The output of the D / A converter 31c is connected to the input of the amplifier 31a. The amplifier 31a amplifies the analog signal from the D / A converter 31c to generate the source high-frequency power HF. The amplification factor of the amplifier 31a is specified by the control unit 2 as the high-frequency power source 31. In addition, the high-frequency power source 31 may not include the D / A converter 31c. In this case, the output of the signal generator 31g is connected to the input of the amplifier 31a, and the amplifier 31a amplifies the high-frequency signal from the signal generator 31g to generate the source high-frequency power HF.

[0040] The bias power supply 32 is electrically coupled to the substrate support 11. The bias power supply 32 is configured to be electrically connected to the bias electrode in the substrate support 11 and to supply an electric bias EB to the bias electrode. The bias electrode may also be a conductive component provided in the susceptor 1110 or at least one electrode in the ceramic component 1111a. The bias electrode may also be shared with the high-frequency electrode. When the electric bias EB is supplied to the bias electrode, ions from the plasma are attracted to the substrate W.

[0041] The following, with Figure 2 and Figure 3 Refer to Figure 4 . Figure 4 3 is a diagram showing an example of an electrical bias waveform. The bias power supply 32 is configured to periodically apply an electrical bias EB having a waveform period CY to the bias electrode. That is, the electrical bias EB is applied to the bias electrode in each of a plurality of waveform periods CY that are repeated waveform periods CY. The waveform period CY is defined by a bias frequency. The bias frequency is, for example, a frequency of 50 kHz or more and 27 MHz or less. The time length of the waveform period CY is the inverse of the bias frequency.

[0042] like Figure 4 As shown, the electric bias EB may be a bias high frequency power LF having a bias frequency. That is, the electric bias EB may have a sinusoidal waveform whose frequency is the bias frequency. In this case, the bias power supply 32 is electrically connected to the bias electrode via a matcher 34. The variable impedance of the matcher 34 is set to reduce the reflection of the bias high frequency power LF from the load.

[0043] Alternatively, the electrical bias EB may also include a voltage pulse VP. The voltage pulse VP is applied to the bias electrode within the waveform period CY. The voltage pulse VP is periodically applied to the bias electrode at a time interval of the same length as the time length of the waveform period CY. The waveform of the voltage pulse VP may be a rectangular wave, a triangular wave, or an arbitrary waveform. The polarity of the voltage of the voltage pulse VP is set to generate a potential difference between the substrate W and the plasma and attract ions from the plasma to the substrate W. The voltage pulse VP may also be a pulse of a negative voltage or a pulse of a negative DC voltage. In addition, when the electrical bias EB is a voltage pulse VP, the plasma processing device 1 may not have a matcher 34.

[0044] In one embodiment, if Figure 3 As shown, the bias power supply 32 may also include a signal generator 32g, a D / A converter 32c and an amplifier 32a. The signal generator 32g periodically generates a bias signal having a specified waveform and a waveform period CY. The signal generator 32g may also be composed of a programmable processor or a programmable logic device such as an FPGA.

[0045] The output of the signal generator 32g is connected to the input of the D / A converter 32c. The D / A converter 32c converts the bias signal from the signal generator 32g into an analog signal. The output of the D / A converter 32c is connected to the input of the amplifier 32a. The amplifier 32a amplifies the analog signal from the D / A converter 32c to generate the electrical bias EB. The amplification factor of the amplifier 32a is specified by the control unit 2 as the bias power supply 32. The bias power supply 32 may not include the D / A converter 32c. In this case, the output of the signal generator 32g is connected to the input of the amplifier 32a, and the amplifier 32a amplifies the bias signal from the signal generator 32g to generate the electrical bias EB.

[0046] The high-frequency power supply 31 sets the source frequency in each of the multiple phase periods SP in the waveform cycle CY to a frequency obtained by adding an offset and interference to the source frequency in the same phase period in the preceding waveform cycle CY to suppress the degree of reflection of the source high-frequency power HF. An example of interference is random noise. Random noise can be generated according to a normal distribution with a mean of 0. The maximum value of the absolute value of the random noise generated according to the normal distribution can be greater than 0.01MHz and less than 5MHz, for example, 0.5MHz. The variance of the normal distribution can be greater than 0.01MHz and less than 5MHz, for example, 0.4MHz. Random noise can also be generated according to a uniform distribution. The maximum value of the absolute value of the random noise generated according to the uniform distribution can be greater than 0.01MHz and less than 5MHz, for example, 0.5MHz. The mean value and variance of the normal distribution followed by the random noise, and the maximum value of the absolute value of the uniform distribution followed by the random noise can vary according to the plasma processing time or the degree of reflection in the preceding same period. The setting of the source frequency by the high-frequency power supply 31 can be performed by the first feedback and / or the second feedback. The first feedback and the second feedback will be described in detail later.

[0047] The plasma processing device 1 can suppress the reflection of the source high frequency power HF according to the change of the impedance of the load in the waveform cycle CY by adjusting the generation source frequency of each of the multiple phase periods SP in the waveform cycle CY. The source frequency in each of the multiple phase periods SP in the waveform cycle CY is obtained by adding the above-mentioned offset and random noise to the source frequency in the same phase period in the preceding waveform cycle CY. According to the plasma processing device 1, it is possible to avoid staying at a frequency corresponding to the local minimum value of the degree of reflection due to the random noise, and search for a source frequency that reduces the degree of reflection.

[0048] [1st Feedback]

[0049] Below, refer to Figure 5 The first feedback will be described. Figure 5It is a timing diagram of an example of the source frequency of the electrical bias and the source high frequency power. The first feedback is performed to adjust the source frequency in each of the multiple phase periods SP in each of the multiple continuous waveform cycles CY. The multiple waveform cycles CY each include N phase periods SP(1) to SP(N). N is an integer greater than 2. The N phase periods SP(1) to SP(N) divide the multiple waveform cycles CY into N phase periods, respectively. In the following description, the waveform cycle CY(m) represents the mth waveform cycle in the multiple waveform cycles CY. The phase period SP(n) represents the nth phase period in the phase periods SP(1) to SP(N). In addition, the phase period SP(m,n) represents the nth phase period in the waveform cycle CY(m).

[0050] The source frequency in the first feedback can be set by the high frequency power source 31 (or its signal generator 31g). The high frequency power source 31 sets the source frequency of the source high frequency power HF in the phase period SP(m,n) according to the change in the reflection degree of the source high frequency power HF.

[0051] In order to determine the degree of reflection of the source high frequency power HF, the plasma processing device 1 may further include a sensor 35 and / or a sensor 36 (see Figure 2 ). The sensor 35 is configured to measure the power level Pr of the reflected wave of the load from the source high frequency power HF. The sensor 35 includes, for example, a directional coupler. The directional coupler may also be provided between the high frequency power source 31 and the matcher 33. In addition, the sensor 35 may also be configured to measure the power level Pf of the traveling wave of the source high frequency power HF. The power level Pr of the reflected wave measured by the sensor 35 is notified to the high frequency power source 31. In addition, the power level Pf of the traveling wave may also be notified from the sensor 35 to the high frequency power source 31.

[0052] The sensor 36 includes a voltage sensor and a current sensor. The sensor 36 is configured to measure a voltage V in a power supply path connecting the high-frequency power source 31 and the high-frequency electrode to each other. HF and current I HF The source high frequency power HF is supplied to the high frequency electrode via the power supply path. The sensor 36 may also be provided between the high frequency power supply 31 and the matching device 33. The voltage V HF and current I HF The high frequency power supply 31 is notified.

[0053] The high frequency power source 31 generates a representative value based on the measured values ​​of each of the multiple phase periods SP. The measured value may also be the power level Pr of the reflected wave obtained by the sensor 35. The measured value may also be the ratio of the power level Pr of the reflected wave to the output power level of the source high frequency power HF (i.e., reflectivity). The measured value may also be the voltage V obtained by the sensor 36 in each of the multiple phase periods SP. HFWith current I HF The measured value may also be the impedance Z of the load side of the high frequency power supply 31 in each of the multiple phase periods SP. L Impedance Z L According to the voltage V obtained by the sensor 36 HF and current I HF The measured value can also be determined based on the impedance Z L The representative value may be the average value or the maximum value of the measured values ​​in each of the multiple phase periods SP. The high frequency power source 31 uses the representative value in each of the multiple phase periods SP as a value indicating the degree of reflection of the source high frequency power HF.

[0054] In the first feedback, the high-frequency power source 31 determines the change in the degree of reflection by using different source frequencies in the corresponding phase periods SP(n) in each of two or more waveform periods CY before the waveform period CY(m).

[0055] In one embodiment, if Figure 5 As shown, the first two or more waveform periods CY of the waveform period CY(m) include the waveform period CY(m-M1) and the waveform period CY(m-M2). Here, M1 and M2 are natural numbers satisfying M1>M2. In one embodiment, the waveform period CY(m-M1) is the waveform period CY(m-2Q), and the waveform period CY(m-M2) is the waveform period CY(mQ). "Q" and "M2" can be "1", and "2Q" and "M1" can be "2". "Q" can also be an integer greater than 2. In addition, in Figure 5 In the example, the source frequencies of the multiple phase periods SP in the waveform period CY(m-M1) are the same as each other, that is, f0, but they can also be different from each other.

[0056] In the first feedback, the high frequency power source 31 passes through f HF (m-M2,n)=f HF (m-M1,n)+Δ(m-M2,n)+R(m-M2,n) to find the source frequency f HF (m-M2,n). Then, through f HF (m,n)=f HF (m-M2,n)+Δ(m,n)+R(m,n) to find the source frequency f HF (m,n). Here, f HF (m,n) represents the source frequency of the source high frequency power HF in the phase period SP(m,n). Δ(m,n) is used to find the source frequency f HF (m,n) is used to calculate the frequency offset. R(m,n) is used to calculate the source frequency f HF(m,n) is the random noise used. Δ(m,n) is the amount of increase or decrease given to the frequency. When Δ(m,n) has a positive value, it gives a frequency shift in the positive shift direction. When Δ(m,n) has a negative value, it gives a frequency shift in the negative shift direction.

[0057] In the first feedback, the degree of reflection in the phase period SP(m-M2,n) may be lower than the degree of reflection in the phase period SP(m-M1,n). In this case, the high-frequency power supply 31 is used to obtain the source frequency f HF Δ(m,n) of (m,n) is set to be relative to f HF (m-M1,n) has the same HF The amount of offset direction that is the same as the offset direction of (m-M2,n).

[0058] In the first feedback, the degree of reflection in the phase period SP(m-M2,n) may be greater than the degree of reflection in the phase period SP(m-M1,n). In this case, the high-frequency power supply 31 is used to obtain the source frequency f HF Δ(m,n) of (m,n) is set to be relative to f HF (m-M1,n) has the same frequency as the source frequency f HF The amount of offset in the direction opposite to the offset direction of (m-M2,n).

[0059] In one embodiment, the offset Δ(m,n) may have a fixed absolute value. That is, the offset used to obtain the source frequency in each of the multiple phase periods SP may also have the same and fixed absolute value. In other embodiments, the offset Δ(m,n) may also have an absolute value corresponding to the magnitude of the degree of reflection in the phase period SP(m-M2,n).

[0060] [2nd Feedback]

[0061] The second feedback is used when the bias power supply 32 periodically supplies a pulse EBP of the electric bias EB to the bias electrode. The pulse EBP is supplied to the bias electrode in each of a plurality of pulse periods PP. The plurality of pulse periods PP each include a repetition of the waveform period CY. That is, in each of a plurality of pulse periods PP, the electric bias EB is periodically supplied to the bias electrode.

[0062] Here, refer to Figure 6 (a) Figure 6 (b) Figure 7 (a) and Figure 7 (b). Figure 6 (a) Figure 6 (b) Figure 7 (a) and Figure 7 (b) are timing diagrams of an example of source high frequency power HF and electric bias EB, respectively. In these figures, "ON" of source high frequency power HF indicates that source high frequency power HF is supplied, and "OFF" of source high frequency power HF indicates that supply of source high frequency power HF is stopped. Also, in these figures, "ON" of electric bias EB indicates that electric bias EB is applied to the bias electrode, and "OFF" of electric bias EB indicates that electric bias EB is not applied to the bias electrode. In addition, in these figures, "HIGH" of electric bias EB indicates that an electric bias EB having a level higher than that of the electric bias EB indicated by "LOW" is applied to the bias electrode.

[0063] Multiple pulse periods PP appear sequentially in time. Multiple pulse periods PP appear sequentially at time intervals (periods) that are the inverse of the pulse frequency. In the following description, pulse period PP(k) represents the kth pulse period among multiple pulse periods PP. The pulse frequency is lower than the bias frequency, for example, a frequency greater than 1 kHz and less than 100 kHz. As described above, the electrical bias EB is periodically applied to the bias electrode in each of the multiple pulse periods PP. The electrical bias EB may not be applied to the bias electrode during periods other than the multiple pulse periods PP. Alternatively, an electrical bias EB having a level lower than the level of the electrical bias EB in the multiple pulse periods PP may also be applied to the bias electrode during periods other than the multiple pulse periods PP.

[0064] like Figure 6 As shown in (a), the source high frequency power HF can also be supplied as a continuous wave. Figure 6 In the example shown in (a) of FIG. 1 , a plurality of overlapping periods OP during which the source high-frequency power HF is supplied in a plurality of pulse periods PP respectively coincide with the plurality of pulse periods PP.

[0065] Or, if Figure 6 (b) Figure 7 (a) and Figure 7 As shown in (b), pulses of source high frequency power HF may also be supplied. Figure 6 As shown in (b), the pulses of the source high frequency power HF may be supplied in a plurality of periods respectively corresponding to a plurality of pulse periods PP. Figure 6 In the example shown in (b), the plurality of overlapping periods OP during which the source high frequency power HF is supplied in the plurality of pulse periods PP are respectively consistent with the plurality of pulse periods PP. Figure 7 (a) and Figure 7 As shown in (b), the pulses of the source high frequency power HF can be supplied in a plurality of periods that partially overlap with the plurality of pulse periods PP. Figure 7 (a) and Figure 7In the examples shown in (b), each of the multiple overlapping periods OP to which the source high frequency power HF is supplied in the multiple pulse periods PP is a part of the corresponding pulse period PP in the multiple pulse periods PP. In addition, in the following description, the repetition period OP(k) represents the kth repetition period in the multiple repetition periods OP.

[0066] The electric bias EB is applied to the bias electrode in each of the plurality of waveform periods CY in each of the plurality of pulse periods PP. In the following description, the waveform period CY(m) represents the mth waveform period among the plurality of waveform periods CY(1) to CY(M) in each of the plurality of repetition periods OP. In addition, the waveform period CY(k,m) represents the mth waveform period in the kth repetition period. In addition, the phase period SP(n) represents the nth phase period among the plurality of phase periods SP(1) to SP(N) in each of the plurality of waveform periods CY in the plurality of repetition periods OP. In addition, the phase period SP(m,n) represents the nth phase period in the waveform period CY(m). In addition, the phase period SP(k,m,n) represents the nth phase period in the waveform period CY(m) in the kth repetition period OP(k).

[0067] The setting of the source frequency of each of the multiple phase periods SP in each of the multiple waveform cycles CY in the overlapping period OP(1) to OP(T-1) can be performed by the above-mentioned first feedback. In addition, T is an integer greater than 3. Alternatively, the source frequency of each of the multiple phase periods SP in each of the multiple waveform cycles CY in the overlapping period OP(1) to OP(T-1) can be set to the frequency registered in the pre-prepared table.

[0068] The second feedback can be used to set the source frequency of the source high frequency power HF in the overlap period after the overlap period OP(T). Figure 8 The second feedback will be described. Figure 8 This is a timing diagram of an example of the electric bias and the source frequency of the source high frequency power.

[0069] In the second feedback, the high frequency power source 31 adjusts the source frequency f according to the change in the degree of reflection of the source high frequency power HF. HF In the second feedback, the change in the degree of reflection is determined by using source frequencies of source high frequency powers HF that are different from each other in corresponding phase periods SP(n) within waveform cycles CY(m) within two or more overlap periods OP before the overlap period OP(k).

[0070] In one embodiment, the two or more overlapping periods OP before the overlapping period OP(k) include the (k-K1)th overlapping period OP(k-K1) and the (k-K2)th overlapping period OP(k-K2). Here, K1 and K2 are natural numbers satisfying K1>K2. In one embodiment, the overlapping period OP(k-K1) is the overlapping period OP(k-2). The repetition period OP(k-K2) is the repetition period after the repetition period OP(k-K1), and in one embodiment, is the repetition period OP(k-1). That is, in one embodiment, K2 and K1 are 1 and 2, respectively.

[0071] In the second feedback, the high frequency power source 31 is fed through f HF (k-K2,m,n)=f HF (k-K1,m,n)+Δ(k-K2,m,n)+R(k-K2,m,n) to find the source frequency f HF (k-K2,m,n). Then, through f HF (k,m,n)=f HF (k-K2,m,n)+Δ(k,m,n)+R(k,m,n) to find the source frequency f HF (k,m,n). Here, f HF (k,m,n) represents the source frequency of the source high frequency power HF during the phase period SP(k,m,n). Δ(k,m,n) is used to find the source frequency f during the phase period SP(k,m,n). HF R(k,m,n) is the frequency offset used to calculate the source frequency f in the phase period SP(k,m,n). HF (k,m,n) is a random noise used. Δ(k,m,n) is the amount of increase or decrease given to the frequency. When Δ(k,m,n) has a positive value, it gives a frequency shift in the positive shift direction. When Δ(k,m,n) has a negative value, it gives a frequency shift in the negative shift direction.

[0072] In the second feedback, the degree of reflection in the phase period SP(k-K2,m,n) may be lower than the degree of reflection in the phase period SP(k-K1,m,n). In this case, the high-frequency power supply 31 will be HF (k,m,n) and the Δ(k,m,n) used is set relative to f HF (k-K1,m,n) has the same HF The amount of the offset direction that (k-K2,m,n) has in the same offset direction.

[0073] In the second feedback, the degree of reflection in the phase period SP(k-K2,m,n) may be greater than the degree of reflection in the phase period SP(k-K1,m,n). In this case, the high-frequency power supply 31 will be HF (k,m,n) and the Δ(k,m,n) used is set relative to f HF (k-K1,m,n) has the same HF The amount of offset direction opposite to the offset direction of (k-K2,m,n).

[0074] In one embodiment, the offset Δ(k,m,n) may have a fixed absolute value. That is, the offset used to obtain the source frequency in each of the multiple phase periods SP may also have the same and fixed absolute value. In other embodiments, the offset Δ(k,m,n) may also have an absolute value corresponding to the magnitude of the degree of reflection in the phase period SP(k-K2,m,n).

[0075] Below, refer to Fig. 9 (a)~ Fig. 9 (d). Fig. 9 (a)~ Fig. 9 (d) are timing diagrams of another example of electrical bias. In one embodiment, the plurality of repetition periods OP may include the first to the Kth a Repeating period OP(1)~OP(K a ). Here, K a is a natural number greater than 2.

[0076] The high frequency power source 31 may also be used during the overlap period OP(1) to OP(K a ) each of which contains a plurality of waveform cycles CY from the first to the Mth a Waveform cycles CY(1)~CY(M a ) each performs initial processing. Here, M a is a natural number. In the initial processing, the waveform cycle CY(1) to CY(M a ) of multiple frequency sets, and the multiple frequency sets included in the frequency set group may be different from each other. In addition, it is also possible to use a frequency set group for overlapping periods OP(1) to OP(K a ) respectively, and these multiple frequency groups may also be different from each other. The high frequency power source 31 is in the overlapping period OP(1) to OP(K a ) each of the first to the Mth a Waveform cycles CY(1)~CY(M a) In each of the multiple phase periods SP, multiple frequencies included in the corresponding frequency set are used as source frequencies. In addition, multiple frequency sets and multiple frequency set groups can also be stored in the storage unit of the control unit 2 or the high-frequency power supply 31.

[0077] The high frequency power source 31 may also be used during the overlap period OP(1) to OP(K a ) in each of the waveform cycles CY(M a ) and then perform the first feedback. That is, the high frequency power supply 31 may also perform the first feedback during the overlap period OP(1) to OP(K a ) The waveform period CY(M a The above-mentioned first feedback is performed in +1)~CY(M).

[0078] In one embodiment, the plurality of repetition periods OP may further include a first (K a +1) to Kth b Repeat period OP(K a +1)~OP(K b ). Here, K b Yes (K a +1) or more, can also satisfy K b =K a +1.

[0079] The high frequency power source 31 may also be used during the overlap period OP(K a +1)~OP(K b ) each of which contains a plurality of waveform cycles CY from the first to the Mth b1 Waveform cycles CY(1)~CY(M b1 ) each performs the above initial processing. Here, M b1 is a natural number. b1 and M a Can satisfy M b1 <M a .

[0080] The high frequency power source 31 may also be used during the overlap period OP(K a +1)~OP(K b ) each of which contains a plurality of waveform cycles CY of the first (M b1 +1) waveform cycle CY(M b1 +1)~M b2 Waveform period CY(M b2 ) to perform the above-mentioned second feedback. Here, M b2 Is to satisfy M b2 >M b1 A natural number.

[0081] The high frequency power source 31 may also be used during the overlap period OP(K a +1)~OP(K b ) in each of the waveform cycles CY(M b2 That is, the high frequency power source 31 may also perform the first feedback during the overlap period OP(K a +1)~OP(K b ) The waveform period CY(M b2 The above-mentioned first feedback is performed in +1)~CY(M).

[0082] In addition, the high frequency power supply 31 may also be b +1) to the last overlap period OP(K b +1)~OP(K) respectively include the first to the Mth c Waveform cycles CY(1)~CY(M c ) to perform the above-mentioned second feedback. Here, M c is a natural number. In addition, the high frequency power supply 31 may also be b +1) to OP(K), in each of the waveform periods CY(M c That is, the high frequency power source 31 may also perform the first feedback during the overlap period OP(K b +1)~OP(K) respectively contain the waveform period CY(M c The above-mentioned first feedback is performed in +1)~CY(M).

[0083] Below, refer to Fig.10 A method of controlling the source frequency of the source high frequency power according to an exemplary embodiment will be described. Fig.10 is a flow chart of a method for controlling a source frequency of a source high frequency power according to an exemplary embodiment. Fig.10 The method MT shown starts in step STa or step STb.

[0084] In step STa, an electric bias EB is supplied to the bias electrode. As described above, the electric bias EB is supplied as a continuous or periodic pulse EBP. Step STb is performed in parallel with step STa. In step STb, a source high frequency power HF is supplied to the high frequency electrode to generate plasma in the chamber. As described above, the source high frequency power HF is supplied as a continuous or periodic pulse.

[0085] In step STc, the source frequency of the source high frequency power HF used in each of the multiple phase periods SP of the multiple waveform cycles CY is set. In step STc, the source frequency in each of the multiple phase periods SP in the waveform cycle CY is set to a frequency obtained by adding an offset and interference (such as random noise) for suppressing the degree of reflection of the source high frequency power to the source frequency in the same phase period in the preceding waveform cycle CY. For a specific example of setting the source frequency, please refer to the description related to the setting of the source frequency by the above-mentioned high frequency power supply 31.

[0086] Although various exemplary embodiments have been described above, the present invention is not limited to the exemplary embodiments described above, and various additions, omissions, substitutions, and changes may be made. In addition, elements of different exemplary embodiments may be appropriately combined to form other exemplary embodiments.

[0087] In another embodiment, the plasma processing device may be an inductively coupled plasma processing device, an ECR plasma processing device, a helicon wave excitation plasma processing device, or a surface wave plasma processing device. In any of the plasma processing devices, the source high frequency power HF is used to generate plasma, and the source frequency of the source high frequency power HF used in the multiple phases SP of the multiple waveform cycles CY is set as described for the plasma processing device 1.

[0088] In addition, in another embodiment, other interferences may be used to replace the above-mentioned random noise. Other interferences may also be randomly assigned fixed values. Alternatively, other interferences may also be variable values.

[0089] Here, various exemplary embodiments included in the present invention are described in the following [E1] to [E12].

[0090] [E1]

[0091] A plasma processing device, comprising: a chamber;

[0092] a substrate support having a bias electrode and disposed in the chamber;

[0093] a high frequency power supply configured to generate source high frequency power in the chamber to generate plasma; and

[0094] a bias power supply configured to periodically supply an electrical bias having a waveform period to the bias electrode,

[0095] The high-frequency power supply is configured to set the generation source frequency of the generation source high-frequency power in each of the multiple phase periods within the waveform cycle to a frequency obtained by adding an offset and random noise for suppressing the degree of reflection of the generation source high-frequency power to the generation source frequency during the same phase period within the preceding waveform cycle.

[0096] [E2]

[0097] According to the plasma processing apparatus described in [E1], the high-frequency power supply is configured as follows:

[0098] In a case where the degree of reflection in the nth phase period in the (m-M2)th waveform cycle among a plurality of waveform cycles that are repetitions of the waveform cycle is reduced from the degree of reflection in the nth phase period in the (m-M1)th waveform cycle among the plurality of waveform cycles, the shift amount added to the source frequency in the nth phase period in the (m-M2)th waveform cycle in order to set the source frequency in the nth phase period in the mth waveform cycle among the plurality of waveform cycles is set to an amount having an offset direction that is the same as the offset direction of the source frequency in the nth phase period in the (m-M1)th waveform cycle, relative to the source frequency in the nth phase period in the (m-M2)th waveform cycle,

[0099] In a case where the degree of reflection in the nth phase period in the (m-M2)th waveform period among the multiple waveform periods increases from the degree of reflection in the nth phase period in the (m-M1)th waveform period, the shift amount added to the source frequency in the nth phase period in the (m-M2)th waveform period in order to set the source frequency in the nth phase period in the m-th waveform period is set to an amount having an offset direction opposite to the offset direction of the source frequency in the nth phase period in the (m-M1)th waveform period,

[0100] Wherein, M1 and M2 are natural numbers satisfying M1>M2.

[0101] [E3]

[0102] The plasma processing apparatus according to [E2], wherein the offset has a fixed absolute value.

[0103] [E4]

[0104] A plasma processing device according to [E2], wherein, in order to set the source frequency during the nth phase period within the mth waveform period, the offset applied to the source frequency during the nth phase period within the (m-M2)th waveform period has an absolute value corresponding to the magnitude of the degree of reflection during the nth phase period within the (m-M2)th waveform period.

[0105] [E5]

[0106] The plasma processing apparatus according to [E1], wherein the bias power supply is configured to periodically supply the electrical bias to provide a plurality of waveform cycles that are repetitions of the waveform cycle in each of a plurality of pulse periods,

[0107] The high frequency power supply is composed of:

[0108] When the degree of reflection in the nth phase period in the mth waveform period in the (k-K2)th repetition period among the multiple repetition periods respectively repeating with the multiple pulse periods is reduced from the degree of reflection in the nth phase period in the mth waveform period in the (k-K1)th repetition period among the multiple repetition periods, the shift amount added to the source frequency in the nth phase period in the mth waveform period in the (k-K2)th repetition period in order to set the source frequency in the nth phase period in the mth waveform period in the kth repetition period among the multiple repetition periods is set to an amount having an offset direction that is the same as the offset direction of the source frequency in the nth phase period in the mth waveform period in the (k-K1)th repetition period,

[0109] In order to set the source frequency in the nth phase period in the mth waveform period in the kth repetition period, when the degree of reflection in the nth phase period in the mth waveform period in the (k-K2)th repetition period increases from the degree of reflection in the nth phase period in the mth waveform period in the (k-K1)th repetition period, the shift amount added to the source frequency in the nth phase period in the mth waveform period in the (k-K2)th repetition period is set to an amount having an offset direction opposite to the offset direction of the source frequency in the nth phase period in the mth waveform period in the (k-K1)th repetition period,

[0110] Wherein, K1 and K2 are natural numbers satisfying K1>K2.

[0111] [E6]

[0112] According to the plasma processing apparatus described in [E5], the offset has a fixed absolute value.

[0113] [E7]

[0114] A plasma processing device according to [E5], wherein, in order to set the source frequency in the nth phase period in the mth waveform period in the kth repetition period, the shift amount added to the source frequency in the nth phase period in the mth waveform period in the (k-K2)th repetition period has an absolute value corresponding to the magnitude of the reflection degree in the nth phase period in the mth waveform period in the (k-K2)th repetition period.

[0115] [E8]

[0116] The plasma processing apparatus according to any one of [E1] to [E7], wherein the random noise is generated according to a normal distribution with an average value of 0.

[0117] [E9]

[0118] The plasma processing apparatus according to any one of [E1] to [E7], wherein the random noise is generated according to a uniform distribution.

[0119] [E10]

[0120] The plasma processing device described in any one of [E1] to [E9] is characterized in that the electrical bias includes a bias high-frequency power having a bias frequency which is the inverse of the time length of the waveform period, or a voltage pulse periodically generated at a time interval of the waveform period.

[0121] [E11]

[0122] A plasma processing device, comprising: a chamber;

[0123] a substrate support having a bias electrode and disposed in the chamber;

[0124] a high frequency power supply configured to generate source high frequency power in the chamber to generate plasma; and

[0125] a bias power supply configured to periodically supply an electrical bias having a waveform period to the bias electrode,

[0126] The high-frequency power supply is configured to set the source frequency of the source high-frequency power in each of the multiple phase periods within the waveform cycle to a frequency obtained by adding an offset and interference to the source frequency in the same phase period within the preceding waveform cycle to suppress reflection of the source high-frequency power.

[0127] [E12]

[0128] A method for controlling a source frequency of a source high frequency power, comprising:

[0129] A step of applying an electrical bias to a bias electrode of a substrate support portion disposed in a chamber of a plasma processing apparatus, wherein the electrical bias has a waveform period and is periodically applied to the bias electrode;

[0130] The step of supplying the source high frequency power from a high frequency power supply in order to generate plasma in the chamber; and

[0131] The step of setting the generation source frequency of the generation source high frequency power during each of a plurality of phases within the waveform cycle,

[0132] In the process of setting the source frequency, the source frequency of the source high-frequency power in each of the multiple phase periods within the waveform cycle is set to a frequency obtained by adding an offset and random noise for suppressing the reflection of the source high-frequency power to the source frequency of the source high-frequency power in the same phase period within the preceding waveform cycle.

[0133] According to the above description, it should be understood that various embodiments of the present invention are described in this specification for the purpose of illustration, and various changes can be made without departing from the scope and spirit of the present invention. Therefore, the various embodiments disclosed in this specification are not intended to be limited, and the true scope and spirit are represented by the attached claims.

[0134] Description of Reference Numerals

[0135] 1…Plasma treatment device

[0136] 10…Chamber

[0137] 31…High frequency power supply

[0138] 32…Bias power supply.

Claims

1. A plasma processing device, comprising: Chamber; a substrate support having a bias electrode and disposed in the chamber; a high frequency power supply configured to generate source high frequency power in the chamber to generate plasma; and a bias power supply configured to periodically supply an electrical bias having a waveform period to the bias electrode, The high-frequency power supply is configured to set the source frequency of the source high-frequency power in each of the multiple phase periods within the waveform cycle to a frequency obtained by adding an offset and random noise for suppressing the degree of reflection of the source high-frequency power to the source frequency during the same phase period in the preceding waveform cycle.

2. The plasma processing apparatus according to claim 1, wherein: The high frequency power supply is composed of: In a case where the degree of reflection in the nth phase period in the (m-M2)th waveform cycle among a plurality of waveform cycles that are repetitions of the waveform cycle is reduced from the degree of reflection in the nth phase period in the (m-M1)th waveform cycle among the plurality of waveform cycles, the shift amount added to the source frequency in the nth phase period in the (m-M2)th waveform cycle in order to set the source frequency in the nth phase period in the mth waveform cycle among the plurality of waveform cycles is set to an amount having an offset direction that is the same as the offset direction of the source frequency in the nth phase period in the (m-M1)th waveform cycle, relative to the source frequency in the nth phase period in the (m-M2)th waveform cycle, In a case where the degree of reflection in the nth phase period in the (m-M2)th waveform period among the multiple waveform periods increases from the degree of reflection in the nth phase period in the (m-M1)th waveform period, the shift amount added to the source frequency in the nth phase period in the (m-M2)th waveform period in order to set the source frequency in the nth phase period in the m-th waveform period is set to an amount having an offset direction opposite to the offset direction of the source frequency in the nth phase period in the (m-M1)th waveform period, Here, M1 and M2 are natural numbers satisfying M1>M2.

3. The plasma processing apparatus according to claim 2, wherein: The offset has a fixed absolute value.

4. The plasma processing apparatus according to claim 2, wherein: In order to set the source frequency in the nth phase period within the mth waveform cycle, the offset applied to the source frequency in the nth phase period within the (m-M2)th waveform cycle has an absolute value corresponding to the magnitude of the reflection degree in the nth phase period within the (m-M2)th waveform cycle.

5. The plasma processing apparatus according to claim 1, wherein: The bias power supply is configured to periodically supply the electrical bias to provide a plurality of waveform cycles that are repetitions of the waveform cycle in each of a plurality of pulse periods. The high frequency power supply is composed of: When the degree of reflection in the nth phase period in the mth waveform period in the (k-K2)th repetition period among the multiple repetition periods respectively repeating with the multiple pulse periods is reduced from the degree of reflection in the nth phase period in the mth waveform period in the (k-K1)th repetition period among the multiple repetition periods, the shift amount added to the source frequency in the nth phase period in the mth waveform period in the (k-K2)th repetition period in order to set the source frequency in the nth phase period in the mth waveform period in the kth repetition period among the multiple repetition periods is set to an amount having an offset direction that is the same as the offset direction of the source frequency in the nth phase period in the mth waveform period in the (k-K1)th repetition period, In order to set the source frequency in the nth phase period in the mth waveform period in the kth repetition period, when the degree of reflection in the nth phase period in the mth waveform period in the (k-K2)th repetition period increases from the degree of reflection in the nth phase period in the mth waveform period in the (k-K1)th repetition period, the shift amount added to the source frequency in the nth phase period in the mth waveform period in the (k-K2)th repetition period is set to an amount having an offset direction opposite to the offset direction of the source frequency in the nth phase period in the mth waveform period in the (k-K1)th repetition period, Here, K1 and K2 are natural numbers satisfying K1>K2.

6. The plasma processing apparatus according to claim 5, wherein: The offset has a fixed absolute value.

7. The plasma processing apparatus according to claim 5, wherein: In order to set the source frequency in the nth phase period in the mth waveform period in the kth repetition period, the shift amount added to the source frequency in the nth phase period in the mth waveform period in the (k-K2)th repetition period has an absolute value corresponding to the magnitude of the reflection degree in the nth phase period in the mth waveform period in the (k-K2)th repetition period.

8. The plasma processing apparatus according to any one of claims 1 to 7, wherein: The random noise is generated according to a normal distribution with a mean value of 0.

9. The plasma processing apparatus according to any one of claims 1 to 7, wherein: The random noise is generated according to uniform distribution.

10. The plasma processing apparatus according to any one of claims 1 to 7, wherein: The electrical bias is bias high frequency power having a bias frequency that is the inverse of a time length of the waveform cycle, or includes voltage pulses periodically generated at time intervals of the waveform cycle.

11. A plasma processing apparatus, comprising: Chamber; a substrate support having a bias electrode and disposed in the chamber; a high frequency power supply configured to generate source high frequency power in the chamber to generate plasma; and a bias power supply configured to periodically supply an electrical bias having a waveform period to the bias electrode, The high-frequency power supply is configured to set the source frequency of the source high-frequency power in each of the multiple phase periods within the waveform cycle to a frequency obtained by adding an offset and interference for suppressing the degree of reflection of the source high-frequency power to the source frequency during the same phase period in the preceding waveform cycle.

12. A method for controlling a source frequency of a source high frequency power, comprising: A step of applying an electrical bias to a bias electrode of a substrate support portion disposed in a chamber of a plasma processing apparatus, wherein the electrical bias has a waveform period and is periodically applied to the bias electrode; The step of supplying the source high frequency power from a high frequency power supply in order to generate plasma in the chamber; and a step of setting the generation source frequency of the generation source high frequency power during each of a plurality of phases within the waveform cycle, In the process of setting the source frequency, the source frequency of the source high-frequency power in each of the multiple phase periods within the waveform cycle is set to a frequency obtained by adding an offset and random noise for suppressing the reflection of the source high-frequency power to the source frequency of the source high-frequency power in the same phase period within the preceding waveform cycle.

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