Integrated thermal resistance type scanning thermal probe and preparation method thereof

Abstract

The invention provides an integrated thermal resistance type scanning thermal probe and a preparation method thereof, and belongs to the technical field of micro-nano processing, nanoscale thermal characterization and scanning probes. The integrated thermal resistance type scanning thermal probe comprises a substrate, an oxide layer, a low-resistance silicon layer, a probe arm, a probe tip and a metal electrode. On the basis of an AFM probe, a probe arm separation structure is adopted, electrodes are prepared on the separated probe arms, and current is injected for working of the probe. Besides, a high-implantation low-resistance area outside the needle tip is formed through the ion implantation technology, the needle tip area is a non-implantation high-resistance area, it is ensured that most of implanted electric energy generates heat in the needle tip area, a remarkable temperature difference between the needle tip and the measured sample is formed, and the temperature of the measured sample is conveniently measured and given. The size of the needle tip can be reduced to be less than 10 nanometers, and the prepared scanning thermal probe can provide nanoscale temperature distribution.

Description

Technical Field

[0001] The invention belongs to the field of micro-nano processing, nanoscale thermal characterization and scanning probe technology, and specifically relates to an integrated thermal resistance type scanning thermal probe and a preparation method thereof. Background Art

[0002] With the continuous improvement of large-scale integrated circuit manufacturing processes, the size of micro-nano devices has been reduced to the nanometer level, and the device integration has been significantly improved. The accompanying changes in phonon transmission mechanisms and energy dissipation have become a significant and challenging topic. At the same time, studying the temperature distribution and energy dissipation problems in micro-nano devices also has important practical application value for improving device performance and reliability. Traditional temperature detection methods (such as fluorescence thermometry, infrared thermal imagers, thermal reflection microscopes, Raman spectroscopy, etc.) are difficult to increase the spatial resolution of temperature to above micrometers.

[0003] Scanning thermal microscopy (SThM) technology is a high-resolution temperature measurement method developed in recent years. It can achieve a spatial resolution of less than 10nm while maintaining a high temperature resolution. SThM is a temperature characterization technology developed based on atomic force microscopy (AFM) technology. It integrates micro-thermocouples or thermal resistors on traditional AFM probes to achieve the measurement of nanoscale temperature distribution. The traditional preparation process of integrated thermocouple tips is complex and has a low yield rate. The thermal resistor method has a relatively simple preparation process and a high yield rate, which provides a guarantee for future large-scale production and application.

[0004] The Chinese invention patent CN102175894A under the prior art discloses a method for preparing a scanning thermal microscope micro thermocouple probe. By making a nanoscale thermal sensor on the commercial AFM cantilever tip, the probe has a temperature sensing function. This method is complex in the preparation process, and the probe yield is greatly affected by the performance and yield of the integrated MEMS device. In addition, due to the limitation of the thermocouple size, the scanning thermal probe prepared by this method can characterize the thermal distribution at the scale of tens of nanometers, and its spatial resolution is difficult to meet the higher precision requirements of micro-nano devices. Summary of the invention

[0005] The present invention is proposed to solve the above problems, and its purpose is to provide an integrated thermal resistance scanning thermal probe and a preparation method thereof.

[0006] The present invention provides an integrated thermal resistance type scanning thermal probe, which has the following characteristics, including: a Si substrate, which serves as a base of the integrated thermal resistance type scanning thermal probe; a first oxide layer, which is arranged on the Si substrate; a low-resistance silicon layer, which is arranged on the first oxide layer, the low-resistance silicon layer has two probe arms, the two probe arms extend from the same side of the low-resistance silicon layer, and are connected at the tip to form a peak shape, the end of the probe arm connected to the low-resistance silicon layer is recorded as a probe thick arm, and the end of the probe arm away from the low-resistance silicon layer is recorded as a probe thin arm The thickness of the thick arm of the probe is greater than that of the thin arm of the probe. The ends of the two thin arms of the probe are close to each other and connected to each other at the ends away from the low-resistance silicon layer. The low-resistance silicon layer and the probe arms are doped silicon materials prepared by an ion implantation process of intrinsic silicon, and are highly doped low-resistance areas; the needle tip is made of intrinsic silicon and is arranged at the tips of the two thin arms of the probe and connects the two. The resistance of the needle tip is much higher than that of the low-resistance silicon layer and the probe arms; and there are two metal electrodes, which are arranged on the low-resistance silicon layer and correspond to the two probe arms.

[0007] The integrated thermal resistance scanning thermal probe provided by the present invention may also have the following characteristics: wherein the material of the first oxide layer includes SiO2, and the thickness of the first oxide layer is 0.2 μm to 0.5 μm.

[0008] The integrated thermal resistance scanning thermal probe provided by the present invention may also have the following characteristics: wherein the phosphorus doping concentration of the low resistance silicon layer is 6×10 17 atom / cm 3 .

[0009] The integrated thermal resistance scanning thermal probe provided by the present invention may also have the following feature: wherein the thickness of the low resistance silicon layer is 0.2 mm to 0.6 mm.

[0010] The integrated thermal resistance scanning thermal probe provided by the present invention may also have the following features: wherein the diameter of the needle tip is less than 20 nm, and the needle tip is not subjected to ion implantation process.

[0011] The integrated thermal resistance scanning thermal probe provided by the present invention may also have the following feature: the needle tip and the two probe thin arms are integrally formed.

[0012] The integrated thermal resistance scanning thermal probe provided by the present invention may also have the following feature: wherein the material of the metal electrode includes Au.

[0013] The present invention also provides a method for preparing an integrated thermal resistance scanning thermal probe, which has the following characteristics and is used to prepare any of the above-mentioned integrated thermal resistance scanning thermal probes, comprising the following steps: S10, selecting an SOI substrate of a certain size, the SOI substrate comprising a Si substrate, a first oxide layer deposited on the Si substrate, and a Si thin layer deposited on the first oxide layer; S20, depositing a mask layer of a certain thickness on the Si thin layer; S30, using a photolithography process to pattern the mask layer, thereby masking the area where the preset low-resistance silicon layer and the thick arm of the probe are located; S40, using an electron beam lithography process to partially mask the area of ​​the Si thin layer exposed after the process in step S30, the masked area being the area where the preset needle tip is located; S50, using a reactive ion etching process to perform a partial masking on the area of ​​the Si thin layer exposed after the process in step S30, the masked area being the area where the preset needle tip is located; The process of etching the area of ​​the Si thin layer that is still exposed after the processing in step S40 is performed, so as to etch it into the preset shapes of the thick arm of the probe, the thin arm of the probe and the needle tip; S60, oxidizing the surface of the exposed Si thin layer by an oxidation process to form a second oxide layer; S70, removing the second oxide layer in step S60 to sharpen the needle tip; S80, performing an ion implantation process on a preset area in the Si thin layer with a preset shape obtained in step S70 to form a highly doped low-resistance area, so as to obtain a low-resistance silicon layer of phosphorus-doped silicon material, a thick arm of the probe and a thin arm of the probe; S90, vacuum-evaporating a metal electrode at a preset position, and then using a deep etching process to etch away the thick arm of the probe, the thin arm of the probe and the first oxide layer and the Si substrate under the needle tip to obtain an integrated thermal resistance scanning thermal probe.

[0014] The method for preparing the integrated thermal resistance scanning thermal probe provided by the present invention may also have the following feature: wherein the material of the Si thin layer is intrinsic silicon.

[0015] The method for preparing the integrated thermal resistance scanning thermal probe provided by the present invention may also have the following characteristics: wherein, in step S20, the material of the mask layer includes SiO2, and the thickness of the mask layer is 500nm to 1000nm.

[0016] Functions and Effects of the Invention

[0017] According to an integrated thermal resistance scanning thermal probe and a preparation method thereof, based on an AFM probe, a probe arm separation structure is adopted and electrodes are prepared on the separated probe arms to provide electrodes for probe heating.

[0018] In addition, the present invention forms a non-injection high-resistance area at the needle tip and a high-injection low-resistance area outside the needle tip through an ion implantation process, to ensure that most of the injected electrical energy generates heat in the needle tip area, forming a significant temperature difference between the needle tip and the sample being measured, making it easy to measure and give the temperature of the sample being measured.

[0019] The needle tip size of the present invention can be reduced to less than 10 nanometers, and the scanning thermal probe prepared by the present invention can provide nanometer-scale temperature distribution. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 is a side view of an integrated thermal resistance scanning thermal probe according to an embodiment of the present invention;

[0021] Figure 2 is a top view of an integrated thermal resistance scanning thermal probe according to an embodiment of the present invention;

[0022] Figure 3 It is a schematic flow chart of a method for preparing an integrated thermal resistance scanning thermal probe according to an embodiment of the present invention. DETAILED DESCRIPTION

[0023] In order to make the technical means, creative features, objectives and effects of the present invention easy to understand, the following embodiments and drawings specifically describe an integrated thermal resistance scanning thermal probe and a preparation method thereof of the present invention.

[0024] <Example>

[0025] Figure 1 is a side view of an integrated thermal resistance scanning thermal probe according to an embodiment of the present invention; Figure 2 is a top view of an integrated thermal resistance scanning thermal probe according to an embodiment of the present invention.

[0026] like Figure 1 and 2 As shown, this embodiment provides an integrated thermal resistance scanning thermal probe 100 , including a Si substrate 10 , a first oxide layer 20 , a low-resistance silicon layer 30 , a needle tip 40 and a metal electrode 50 .

[0027] The Si substrate 10 serves as a base of the integrated thermal resistance scanning thermal probe 100 .

[0028] The first oxide layer 20 is disposed on the Si substrate 10 and is a SiO2 layer with a thickness of 0.2 μm to 0.5 μm.

[0029] The low-resistance silicon layer 30 is disposed on the first oxide layer 20 and is a silicon layer with a thickness of 0.2 mm to 0.6 mm. The low-resistance silicon layer 30 has two laterally extending probe arms 30 a, which extend integrally from the same side of the low-resistance silicon layer 30 to form interconnected spikes.

[0030] The probe arm 30a includes a probe thick arm 30a-1 and a probe thin arm 30a-2 connected to each other.

[0031] The thickness of the thick probe arm 30a-1 is greater than that of the thin probe arm 30a-2. One end of the thick probe arm 30a-1 is connected to the low resistance silicon layer 30, and the other end is connected to the thin probe arm 30a-2.

[0032] The thin probe arms 30 a - 2 of the two probe arms 30 a are each in a peak shape close to and connected to each other at the end away from the low-resistance silicon layer 30 .

[0033] The low resistance silicon layer 30 and the probe arm 30a are low resistance regions of highly doped phosphorus-doped silicon material formed by intrinsic silicon through ion implantation process, and the phosphorus doping concentration is 6×10 17 atom / cm 3 .

[0034] The needle tip 40 is disposed at the tips of the two probe thin arms 30a-2 and indirectly connects the two. The needle tip 40 and the probe thin arms 30a-2 are integrally formed. The needle tip 40 is made of intrinsic silicon and is not subjected to ion implantation. The resistance of the needle tip 40 is much higher than the resistance of the low resistance silicon layer 30 and the probe arm 30a. The diameter of the needle tip 40 in this embodiment is less than 20nm.

[0035] There are two metal electrodes 50, which are disposed on the low-resistance silicon layer 30 and correspond to the two probe arms 30a. The material of the metal electrodes 50 in this embodiment is Au.

[0036] Figure 3 It is a schematic flow chart of a method for preparing an integrated thermal resistance scanning thermal probe according to an embodiment of the present invention.

[0037] like Figure 3 As shown, this embodiment also provides a method for preparing an integrated thermal resistance scanning thermal probe, which is used to prepare the integrated thermal resistance scanning thermal probe 100 in this embodiment, and specifically includes the following steps:

[0038] S10 , selecting an SOI substrate of a certain size, the SOI substrate comprising a Si substrate 10 , a first oxide layer 20 deposited on the Si substrate 10 , and a Si thin layer 60 deposited on the first oxide layer 20 .

[0039] S20, depositing 1 μm thick SiO2 on the Si thin layer 60 as a mask layer 70. Figure 3 The structure shown in Figure a of FIG.

[0040] S30, using a photolithography process to obtain a patterned mask layer 70, thereby masking the area where the preset low-resistance silicon layer 30 and the probe thick arm 30a-1 are located. Figure 3 The structure shown in Figure b.

[0041] S40, using electron beam lithography to partially mask the area of ​​the Si thin layer 60 exposed in step S30, the masked area is the area where the preset needle tip 40 is located. Figure 3 The structure shown in Figure c of FIG.

[0042] S50, using a reactive ion etching process to etch the area of ​​the Si thin layer 60 that is still exposed after the processing in step S40, so as to etch it into the shapes of the preset probe thick arm 30a-1, the probe thin arm 30a-2 and the needle tip 40. Figure 3 The structure shown in Figure d in FIG.

[0043] S60, oxidizing the exposed surface of the Si thin layer 60 by an oxidation process to form a second oxide layer 80. Figure 3 The structure shown in Figure e of FIG.

[0044] S70, removing the second oxide layer 80 obtained in step S60, completing the sharpening of the needle tip 40, and obtaining a needle tip 40 structure with a diameter less than 5nm. Figure 3 The structure shown in Figure f of FIG.

[0045] S80, ion implantation is performed on the preset area of ​​the Si thin layer 60 with a preset shape obtained in step S70 to form a highly doped low-resistance area, thereby obtaining a low-resistance silicon layer 30 made of phosphorus-doped silicon, a probe thick arm 30a-1, and a probe thin arm 30a-2 (the preset needle tip 40 area is not subjected to ion implantation). Figure 3 The structure shown in Figure g in FIG.

[0046] S90, vacuum evaporating a 1 μm thick Au metal electrode 50 at a preset position, and then using a deep etching process to etch away the probe thick arm 30a-1, the probe thin arm 30a-2, and the first oxide layer 20 and the Si substrate 10 under the needle tip 40 to form a cantilever beam structure. Figure 3 The structure shown in FIG. h in FIG. 1 is used to obtain an integrated thermal resistance scanning thermal probe 100.

[0047] Those skilled in the art should understand that the present invention is not limited to the above embodiments, and the above embodiments and descriptions are only for explaining the principles of the present invention. Without departing from the spirit and scope of the present invention, the present invention may have various changes and improvements, and these changes and improvements fall within the scope of the present invention to be protected. The scope of protection of the present invention is defined by the attached claims and their equivalents.

Claims

1. An integrated thermal resistance scanning thermal probe, characterized in that: include: Si substrate, serving as a base for the integrated thermal resistance scanning thermal probe; A first oxide layer is disposed on the Si substrate; A low-resistance silicon layer is arranged on the first oxide layer, the low-resistance silicon layer has two probe arms, the two probe arms extend from the same side of the low-resistance silicon layer and are connected at the tip to form a peak shape, the end of the probe arm connected to the low-resistance silicon layer is recorded as a probe thick arm, and the end of the probe arm away from the low-resistance silicon layer is recorded as a probe thin arm, the thickness of the probe thick arm is greater than the thickness of the probe thin arm, and the ends of the two probe thin arms away from the low-resistance silicon layer are in a peak shape close to and connected to each other, The low-resistance silicon layer and the probe arm are made of doped silicon material prepared by an ion implantation process from intrinsic silicon, and are highly doped low-resistance regions; A needle tip, made of intrinsic silicon, is disposed at the tips of the two thin arms of the probe and connects the two, and the resistance of the needle tip is much higher than the resistance of the low-resistance silicon layer and the probe arm; as well as Two metal electrodes are disposed on the low-resistance silicon layer and correspond to the two probe arms.

2. The integrated thermal resistance scanning thermal probe according to claim 1, characterized in that: in, The material of the first oxide layer includes SiO2, The thickness of the first oxide layer is 0.2 μm to 0.5 μm.

3. The integrated thermal resistance scanning thermal probe according to claim 1, characterized in that: in, The phosphorus doping concentration of the low resistance silicon layer is 6×10 17 atom / cm 3 .

4. The integrated thermal resistance scanning thermal probe according to claim 1, characterized in that: in, The thickness of the low-resistance silicon layer is 0.2 mm to 0.6 mm.

5. The integrated thermal resistance scanning thermal probe according to claim 1, characterized in that: in, The diameter of the needle tip is less than 20 nm. The needle tip is not subjected to ion implantation process.

6. The integrated thermal resistance scanning thermal probe according to claim 1, characterized in that: in, The needle tip and the two probe thin arms are designed to be integrally formed.

7. The integrated thermal resistance scanning thermal probe according to claim 1, characterized in that: in, The material of the metal electrode includes Au.

8. A method for preparing an integrated thermal resistance scanning thermal probe, characterized in that: The method for preparing the integrated thermal resistance scanning thermal probe according to any one of claims 1 to 7 comprises the following steps: S10, selecting an SOI substrate of a certain size, wherein the SOI substrate includes the Si substrate, the first oxide layer deposited on the Si substrate, and a Si thin layer deposited on the first oxide layer; S20, depositing a mask layer of a certain thickness on the Si thin layer; S30, patterning the mask layer using a photolithography process, thereby masking the preset low-resistance silicon layer and the area where the thick arm of the probe is located; S40, using an electron beam lithography process to partially mask the area of ​​the Si thin layer exposed after the processing in step S30, the masked area being the preset area where the needle tip is located; S50, using a reactive ion etching process to etch the area of ​​the Si thin layer that is still exposed after the processing in step S40, so as to etch it into the preset shapes of the probe thick arm, the probe thin arm and the needle tip; S60, oxidizing the exposed surface of the Si thin layer by an oxidation process to form a second oxide layer; S70, removing the second oxide layer in step S60 to complete the sharpening of the needle tip; S80, performing ion implantation on a preset region in the Si thin layer having a preset shape obtained in step S70 to form a highly doped low-resistance region, thereby obtaining the low-resistance silicon layer made of phosphorus-doped silicon, the thick probe arm, and the thin probe arm; S90, vacuum evaporating the metal electrode at a preset position, and then using a deep etching process to etch away the probe thick arm, the probe thin arm, the first oxide layer under the needle tip, and the Si substrate to obtain the integrated thermal resistance scanning thermal probe.

9. The method for preparing an integrated thermal resistance scanning thermal probe according to claim 8, characterized in that: in, The material of the Si thin layer is intrinsic silicon.

10. The method for preparing an integrated thermal resistance scanning thermal probe according to claim 8, characterized in that: in, In step S20, the material of the mask layer includes SiO2. The thickness of the mask layer is 500nm-1000nm.

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