Package structure

By stacking the conductive structure and inductor in the vertical direction in the package structure and designing the orthoprojection range of the conductive structure, the problem of larger size in the existing package structure is solved, miniaturization of the package structure and flexible arrangement of inductors are achieved.

CN119601536APending Publication Date: 2025-03-11WUHAN GRANDEUR MICROELECTRONICS CO LTD
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Patent Information

Application Number
CN202411634888.4
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-11-15
Publication Date
2025-03-11

AI Technical Summary

Technical Problem

In the existing wafer-level packaging structure, the bumps and pads are large in size, which makes it difficult to miniaturize the packaging structure and the inductance cannot be adjusted.

Method used

A package structure is designed in which the orthoprojection of the conductive structure on the substrate is within the orthoprojection range of the cover plate on the substrate, the devices, the cover plate and the conductive structure are stacked in a vertical direction, and the inductance is provided on the surface of the cover plate.

Benefits of technology

The size of the packaging structure in the horizontal direction is effectively reduced, the packaging structure is miniaturized, and a flexible inductance arrangement method is provided.

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Abstract

The embodiment of the invention provides a packaging structure. The packaging structure comprises a substrate; the device is arranged on one side of the substrate; the side plate is arranged on one side of the substrate and surrounds the device; the cover plate is arranged on one side of the substrate and is made of a non-substrate and non-wafer material, the cover plate is arranged on the side plate, a cavity is formed among the cover plate, the side plate and the substrate, and the device is arranged in the cavity; the leading-out part is arranged on one side of the substrate, is coupled to the device and is used for leading out an electric signal of the device; the conductive structure is arranged on one side, far away from the substrate, of the cover plate, and the conductive structure is coupled to the lead-out part through a rewiring layer; wherein the orthographic projection of the conductive structure on the substrate is located within the orthographic projection range of the cover plate on the substrate; and the inductor is arranged on the surface of the cover plate and is coupled to the rewiring layer and the conductive structure.
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Description

Technical Field

[0001] The embodiments of the present disclosure relate to the field of packaging technology, including but not limited to a packaging structure. Background Art

[0002] In recent years, the development trend of devices has been towards miniaturization, so that space area can be used more effectively. In the current wafer level package (WLP) structure, the bump is set on the pad (BOP) and the pad is set on the substrate. The size of the package structure is limited by the packaging method. On the one hand, the size of the bump has requirements on the size of the pad, so that the size of the bump and the pad are both large, which makes it difficult to miniaturize the size of the package structure; on the other hand, the inductance of each port of the package structure cannot be adjusted.

[0003] Therefore, there is an urgent need to improve the packaging structure. Summary of the invention

[0004] In view of this, an embodiment of the present disclosure provides a packaging structure.

[0005] An embodiment of the present disclosure provides a packaging structure, which includes: a substrate; a device disposed on one side of the substrate; a side plate disposed on one side of the substrate and surrounding the device; a cover plate formed of a non-substrate and non-wafer material disposed on one side of the substrate, the cover plate being disposed on the side plate, a cavity being formed between the cover plate, the side plate and the substrate, and the device being disposed in the cavity; a lead-out portion disposed on one side of the substrate, the lead-out portion being coupled to the device and used to lead out an electrical signal of the device; a conductive structure disposed on a side of the cover plate away from the substrate, the conductive structure being coupled to the lead-out portion through a redistribution layer; wherein the orthographic projection of the conductive structure on the substrate is within the range of the orthographic projection of the cover plate on the substrate; and an inductor disposed on a surface of the cover plate, the inductor being coupled to the redistribution layer and the conductive structure.

[0006] In some embodiments, the lead-out portion is disposed on the outer side of the side plate; or, the lead-out portion is disposed on the inner side of the side plate; wherein the conductive structure is coupled to the lead-out portion through the redistribution layer covering a portion of the surface of the cover plate and a portion of the surface of the side plate.

[0007] In some embodiments, the lead-out portion is disposed between the side plate and the substrate; the side plate comprises a conductive material; wherein the conductive structure is coupled to the lead-out portion through the redistribution layer covering a portion of the surface of the cover plate and the side plate.

[0008] In some embodiments, the conductive structure includes: a pad disposed on the cover plate; and a bump disposed on the pad, wherein the bump is coupled to the lead-out portion through the pad and the redistribution layer.

[0009] In some embodiments, the packaging structure further includes: a protection layer covering a surface of the redistribution layer and exposing a portion of a surface of the bump.

[0010] In some embodiments, the height of the protective layer along the direction perpendicular to the substrate is H0, the distance from the surface of the substrate close to the device to the outer surface of the cover plate along the direction perpendicular to the substrate is H1, the height of the bump along the direction perpendicular to the substrate is H2, and the height of the pad along the direction perpendicular to the substrate is H3; wherein, H0-(H1+H3)>2μm, (H1+H2+H3)-H0>10μm.

[0011] In some embodiments, the conductive structure includes: a lead block disposed on the cover plate; and a lead coupled to the lead block, wherein the lead is coupled to the lead-out portion through the lead block and the redistribution layer.

[0012] In some embodiments, the packaging structure further includes: a protection layer covering the surface of the redistribution layer and exposing a portion of the surface of the lead block.

[0013] In some embodiments, the height of the protective layer along the direction perpendicular to the substrate is H0, the distance from the surface of the substrate close to the device to the outer surface of the cover plate along the direction perpendicular to the substrate is H1, and the height of the lead block along the direction perpendicular to the substrate is H4; wherein, H0-(H1+H4)>2μm.

[0014] In some embodiments, when the maximum dimension of the cavity along a direction parallel to the substrate is greater than 400 μm, the packaging structure further includes: at least one supporting column disposed in the cavity, the supporting column being used to support the cover plate and the conductive structure.

[0015] In some embodiments, the orthographic projection of the cover plate on the substrate is located within the outer contour range of the orthographic projection of the side plate on the substrate.

[0016] In some embodiments, the side plate includes a first surface facing the cavity and a second surface facing away from the cavity, and a third surface and a fourth surface arranged opposite to each other in a direction perpendicular to the substrate, the third surface is close to the substrate and the fourth surface is away from the substrate; the cover plate includes a fifth surface and a sixth surface arranged opposite to each other in a direction perpendicular to the substrate, and a seventh surface for connecting the fifth surface and the sixth surface, the fifth surface facing the cavity and the sixth surface facing away from the cavity; wherein the angle between the second surface of the side plate and the substrate is less than 90 degrees; or, the angle between the seventh surface of the cover plate and the substrate is less than 90 degrees.

[0017] In some embodiments, an orthographic projection size of the lead-out portion on the substrate is less than 10 μm.

[0018] The embodiment of the present disclosure provides a packaging structure. The packaging structure includes: a substrate; a device disposed on one side of the substrate; a side plate disposed on one side of the substrate and surrounding the device; a cover plate formed of a non-substrate and non-wafer material disposed on one side of the substrate, the cover plate disposed on the side plate, a cavity formed between the cover plate, the side plate and the substrate, and the device disposed in the cavity; a lead-out portion disposed on one side of the substrate, the lead-out portion coupled to the device and used to lead out the electrical signal of the device; a conductive structure disposed on a side of the cover plate away from the substrate, the conductive structure coupled to the lead-out portion through a redistribution layer; wherein the orthographic projection of the conductive structure on the substrate is within the orthographic projection range of the cover plate on the substrate; an inductor disposed on the surface of the cover plate, the inductor coupled to the redistribution layer and the conductive structure. In the embodiment of the present disclosure, the orthographic projection of the conductive structure in the packaging structure on the substrate is within the orthographic projection range of the cover plate on the substrate. Stacking the device, cover plate and conductive structure in the vertical direction can avoid the conductive structure occupying additional space area, effectively reduce the size of the packaging structure in the horizontal direction, and thus facilitate the miniaturization of the packaging structure. In addition, in the embodiment of the present disclosure, the inductor in the packaging structure is arranged on the surface of the cover plate, and there is a large amount of blank space on the surface of the cover plate, which can be used to design various arrangements of winding inductors. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 A cross-sectional view of a packaging structure provided for a related technical solution;

[0020] Figure 2A A cross-sectional view of a packaging structure provided in accordance with the first embodiment of the present disclosure;

[0021] Figure 2B A top view of the packaging structure provided in the first embodiment of the present disclosure;

[0022] Figure 3A cross-sectional view of a packaging structure provided in accordance with a second embodiment of the present disclosure;

[0023] Figure 4 A cross-sectional view of a packaging structure provided in accordance with a third embodiment of the present disclosure;

[0024] Figure 5 A cross-sectional view of a packaging structure provided in accordance with a fourth embodiment of the present disclosure;

[0025] Fig. 6A A cross-sectional view of a packaging structure provided in accordance with a fifth embodiment of the present disclosure;

[0026] Figure 6B A top view of a packaging structure provided in accordance with a fifth embodiment of the present disclosure;

[0027] Figure 7 A cross-sectional view of a packaging structure provided in accordance with a sixth embodiment of the present disclosure. DETAILED DESCRIPTION

[0028] The following will be combined with the embodiments of the present disclosure and the accompanying drawings to clearly and completely describe the technical solutions in the embodiments of the present disclosure. Obviously, the described embodiments are only part of the embodiments of the present disclosure, not all of the embodiments. Based on the embodiments of the present disclosure, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present disclosure.

[0029] In the following description, a large number of specific details are given to provide a more thorough understanding of the present disclosure. However, it is obvious to those skilled in the art that the present disclosure can be implemented without one or more of these details. In other examples, in order to avoid confusion with the present disclosure, some technical features known in the art are not described; that is, all features of actual embodiments are not described here, and well-known functions and structures are not described in detail.

[0030] In the drawings, the sizes of layers, regions, elements and their relative sizes may be exaggerated for clarity. Like reference numerals denote like elements throughout.

[0031] It should be understood that when an element or layer is referred to as "on ...", "adjacent to ...", "connected to" or "coupled to" other elements or layers, it can be directly on, adjacent to, connected to or coupled to other elements or layers, or there can be intervening elements or layers. On the contrary, when an element is referred to as "directly on ...", "directly adjacent to ...", "directly connected to" or "directly coupled to" other elements or layers, there is no intervening element or layer. It should be understood that although the terms first, second, third, etc. can be used to describe various elements, components, regions, layers and / or parts, these elements, components, regions, layers and / or parts should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or part from another element, component, region, layer or part. Therefore, without departing from the teachings of the present disclosure, the first element, component, region, layer or part discussed below can be represented as the second element, component, region, layer or part. And when the second element, component, region, layer or part is discussed, it does not indicate that the present disclosure necessarily has the first element, component, region, layer or part.

[0032] Spatially relative terms such as "under", "beneath", "below", "under", "above", "above", etc., may be used here for convenience of description to describe the relationship between an element or feature shown in the figure and other elements or features. It should be understood that in addition to the orientation shown in the figure, the spatial relationship terms are intended to also include different orientations of the device in use and operation. For example, if the device in the accompanying drawings is turned over, then the elements or features described as "under other elements" or "under it" or "under it" will be oriented as "on" other elements or features. Therefore, the exemplary terms "under" and "under" may include both upper and lower orientations. The device can be oriented otherwise (rotated 90 degrees or other orientations) and the spatial descriptors used herein are interpreted accordingly.

[0033] The purpose of the terms used herein is only to describe specific embodiments and is not intended to be a limitation of the present disclosure. When used herein, the singular forms "one", "an" and "said / the" are also intended to include plural forms, unless the context clearly indicates otherwise. It should also be understood that the terms "consisting of" and / or "comprising", when used in this specification, determine the presence of the features, integers, steps, operations, elements and / or parts, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, parts and / or groups. When used herein, the term "and / or" includes any and all combinations of the relevant listed items.

[0034] In order to thoroughly understand the present disclosure, detailed steps and detailed structures will be presented in the following description to illustrate the technical solution of the present disclosure. The preferred embodiments of the present disclosure are described in detail below, but in addition to these detailed descriptions, the present disclosure may also have other implementations.

[0035] Before introducing the embodiments of the present disclosure, various directions that may be involved in the following are defined. In the plane where the substrate is located, the intersecting X direction and Y direction are defined, and the direction perpendicular to the substrate is defined as the Z direction. Among them, the X direction and the Y direction can also be called horizontal directions, and the Z direction can also be called a vertical direction. In some embodiments, any two of the X direction, the Y direction, and the Z direction are perpendicular to each other. The following will be described as an example in which any two of the X direction, the Y direction, and the Z direction are perpendicular to each other.

[0036] refer to Figure 1 , Figure 1 A cross-sectional view of a packaging structure provided by a related technical solution. Figure 1 As shown, the packaging structure 100 may include: a substrate 102; a device 104 disposed on the substrate 102, the device 104 including a reflective structure 106, a first electrode layer 108, a piezoelectric layer 110 and a second electrode layer 112 stacked in sequence on the substrate 102; a protective cover 114 disposed on the substrate 102, the protective cover 114 surrounds the device 104, and a cavity is formed between the protective cover 114 and the substrate 102, the device 104 is disposed in the cavity; a pad 116 disposed on the substrate 102, the pad 116 is disposed on the outer side of the protective cover 114; a bump 118 disposed on the pad 116, the bump 118 is coupled to the first electrode layer 108 or the second electrode layer 112 in the device 104 through the pad 116.

[0037] In the above technical solution, the device and the protective cover are both arranged on the substrate, and the pads and bumps are also arranged on the substrate and on the outside of the protective cover. In this way, the size of the package structure in the horizontal direction includes the sum of the size of the protective cover in the horizontal direction and the size of the pad (or bump) in the horizontal direction. Since the size of the pad (or bump) is large, the size of the package structure in the horizontal direction is large, which is not conducive to the miniaturization of the package structure.

[0038] In view of this, an embodiment of the present disclosure provides a packaging structure.

[0039] refer to Figure 2A and Figure 2B As shown, Figure 2A A cross-sectional view of a packaging structure provided in the first embodiment of the present disclosure, Figure 2B FIG. 1 is a top view of the packaging structure provided in the first embodiment of the present disclosure. Figure 2A and Figure 2BAs shown, the embodiment of the present disclosure provides a packaging structure, and the packaging structure 200 includes: a substrate 202; a device 204 disposed on one side of the substrate 202; a side plate 214 disposed on one side of the substrate 202 and surrounding the device 204; a cover plate 216 formed of a non-substrate and non-wafer material disposed on one side of the substrate 202, the cover plate 216 is disposed on the side plate 214, a cavity is formed between the cover plate 216, the side plate 214 and the substrate 202, and the device 204 is disposed in the cavity; a lead-out portion 218 disposed on one side of the substrate 202, the lead-out portion 218 is coupled to the device 204 and is used to lead out an electrical signal of the device 204; a conductive structure 220 (such as a conductive structure 220) disposed on a side of the cover plate 216 away from the substrate 202 Figure 2A and Figure 2B The conductive structure 220 is coupled to the lead-out portion 218 through the redistribution layer 222; wherein the orthographic projection of the conductive structure 220 on the substrate 202 is within the orthographic projection range of the cover plate 216 on the substrate 202; the inductor 224 (such as Figure 2B The inductor 224 is coupled to the redistribution layer 222 and the conductive structure 220. The inductor 224 is disposed between the conductive structure 220 and the redistribution layer 222, and its two ends are coupled to the redistribution layer 222 and the conductive structure 220, respectively.

[0040] In some embodiments, the material of the substrate 202 may include a single semiconductor material, such as silicon (Si) or germanium (Ge), III-V compound semiconductor materials, II-VI compound semiconductor materials, and organic semiconductor materials, or other semiconductor materials known in the art.

[0041] Here, the device 204 may include a reflective structure 206 , a first electrode layer 208 , a piezoelectric layer 210 , and a second electrode layer 212 which are sequentially stacked.

[0042] Here, the reflective structure 206 can be used to reflect the acoustic wave signal. When the acoustic wave signal generated by the piezoelectric layer 210 propagates toward the reflective structure 206, the acoustic wave signal can be totally reflected at the interface where the first electrode layer 208 and the reflective structure 206 contact, so that the acoustic wave signal is reflected back to the piezoelectric layer 210. In this way, the energy of the acoustic wave signal generated by the piezoelectric layer 210 can be confined in the piezoelectric layer 210, reducing the energy loss of the acoustic wave signal and improving the quality of the acoustic wave signal transmitted by the resonant device.

[0043] In some embodiments, the reflective structure 206 may include an air cavity. In this case, the device 204 may include a film bulk acoustic resonator (FBAR).

[0044] In some other embodiments, the reflection structure 206 may include a Bragg reflection structure, wherein the Bragg reflection structure includes two dielectric materials with different acoustic impedances stacked in layers. In this case, the device 204 may include a solid mounted resonator (SMR).

[0045] Here, the first electrode layer 208 may also be referred to as a lower electrode layer, and the second electrode layer 212 may also be referred to as an upper electrode layer, through which an electrical signal may be applied to the device 204. In some embodiments, the first electrode layer 208 and the second electrode layer 212 may be made of the same material, including a conductive metal or a conductive material composed of an alloy of a conductive metal, and the conductive metal may be, for example, aluminum (Al), molybdenum (Mo), ruthenium (Ru), or platinum (Pt).

[0046] Here, the piezoelectric layer 210 can be used to generate vibration according to the inverse piezoelectric property, convert the electrical signal loaded on the first electrode layer 208 and the second electrode layer 212 into an acoustic wave signal, and realize the conversion of electrical energy into mechanical energy. In some embodiments, the material of the piezoelectric layer 210 may include a material having piezoelectric properties. For example, aluminum nitride, scandium-doped aluminum nitride, zinc oxide, lithium tantalate, lead zirconate titanate, or barium titanate, etc.

[0047] Here, the device 204 may include a resonant region and a non-resonant region. The overlapping region of the reflective structure 206, the first electrode layer 208, the piezoelectric layer 210 and the second electrode layer 212 along the Z direction is determined as the resonant region, and the other regions are determined as the non-resonant region.

[0048] Here, the side plate 214 is disposed on the substrate 202 and surrounds the device 204, the cover plate 216 is disposed on the side plate 214, and the device 204 is disposed between the substrate 202 and the cover plate 216. The cover plate 216, the side plate 214 and the substrate 202 together form a cavity, and the device 204 is disposed in the cavity.

[0049] For ease of description, various surfaces of the side plate 214 and the cover plate 216 are defined. The side plate 214 may include a first surface 214a facing the cavity and a second surface 214b facing away from the cavity, and a third surface 214c and a fourth surface 214d arranged opposite to each other along the Z direction, the third surface 214c being close to the substrate 202 and the fourth surface 214d being away from the substrate 202. The first surface 214a may also be referred to as the inner surface (or inner side wall) of the side plate 214, the second surface 214b may also be referred to as the outer surface (or outer side wall) of the side plate 214, the third surface 214c may also be referred to as the bottom surface of the side plate 214, and the fourth surface 214d may also be referred to as the top surface of the side plate 214, and the top surface of the side plate 214 is in contact with the cover plate 216.

[0050] The cover plate 216 may include a fifth surface 216a and a sixth surface 216b that are arranged opposite to each other along the Z direction, and a seventh surface 216c for connecting the fifth surface 216a and the sixth surface 216b, wherein the fifth surface 216a faces the cavity and the sixth surface 216b faces away from the cavity. The fifth surface 216a may also be referred to as the bottom surface (or inner surface) of the cover plate 216, the bottom surface of the cover plate 216 contacts the top surface of the side plate 214, the sixth surface 216b may also be referred to as the top surface of the cover plate 216, the seventh surface 216c may also be referred to as the side wall of the cover plate 216, and the sixth surface 216b and the seventh surface 216c may both be referred to as the outer surface of the cover plate 216.

[0051] In some embodiments, the orthographic projection of the cover plate 216 on the substrate 202 is located within the outer contour of the orthographic projection of the side plate 214 on the substrate 202 .

[0052] Here, the size of the side plate 214 along the X direction is d, the size of the orthographic projection of the inner side wall of the side plate 214 on the substrate 202 along the X direction is L1 (or, the size of the inner contour of the orthographic projection of the side plate 214 on the substrate 202 along the X direction is L1), and the size of the orthographic projection of the outer side wall of the side plate 214 on the substrate 202 along the X direction is L2 (or, the size of the outer contour of the orthographic projection of the side plate 214 on the substrate 202 along the X direction is L2), that is, L2 = L1 + 2d. The size of the cover plate 216 along the X direction is L3, where L3>L1 and L3≤L2. When L3=L2, the seventh surface 216c of the cover plate 216 and the second surface 214b of the side plate 214 are aligned along the Z direction, and the outer contour of the orthographic projection of the cover plate 216 on the substrate 202 coincides with the outer contour of the orthographic projection of the side plate 214 on the substrate 202. When L3<L2, the orthographic projection of the cover plate 216 on the substrate 202 is within the outer contour of the orthographic projection of the side plate 214 on the substrate 202; a step is formed between the side wall of the cover plate 216 (i.e., the seventh surface 216c) and the side wall of the side plate 214 (i.e., the second surface 214b), such as Figure 2A As shown, part of the top surface of the side panel 214 (i.e., the fourth surface 214d) can be used as a step surface, which is helpful to improve the continuity of the redistribution layer 222 formed on the second surface 214b of the side panel 214 and the seventh surface 216c of the cover panel 216.

[0053] In some embodiments, the cover plate 216 may be formed of non-substrate and non-wafer materials. For example, the material of the cover plate 216 may include but is not limited to dry film, photoresist film, photosensitive polymer, SU8 film, resin (eg, epoxy resin) or polyimide film.

[0054] Here, the SU8 membrane is an organic polymer colloid formed by dissolving bisphenol A epoxy resin in γ-butyrolactone, and is named because an average of 8 epoxy resins are contained in one molecule.

[0055] In some embodiments, the angle between the second surface 214 b of the side plate 214 and the substrate 202 is less than 90 degrees; or the angle between the seventh surface 216 c of the cover plate 216 and the substrate 202 is less than 90 degrees.

[0056] Figure 2A It is shown that the angle between the second surface 214b of the side plate 214 and the substrate 202 is 90 degrees, and the angle between the seventh surface 216c of the cover plate 216 and the substrate 202 is also 90 degrees. In other words, the second surface 214b of the side plate 214 and the substrate 202 are perpendicular to each other, and the seventh surface 216c of the cover plate 216 and the substrate 202 are perpendicular to each other. Figure 2A The second surface 214 b of the side plate 214 and the seventh surface 216 c of the cover plate 216 are only used for exemplary description and do not constitute a limitation on the protection scope of the present disclosure.

[0057] Here, the angle between the second surface 214b of the side plate 214 and the substrate 202 can also be an acute angle, which is more conducive to improving the continuity of the redistribution layer 222 formed on the second surface 214b of the side plate 214, and the redistribution layer 222 extends to the coupling lead-out portion 218; the angle between the seventh surface 216c of the cover plate 216 and the substrate 202 can also be an acute angle, which is more conducive to improving the continuity of the redistribution layer 222 formed on the seventh surface 216c of the cover plate 216, and the redistribution layer 222 extends to the coupling conductive structure 220.

[0058] Here, the lead-out portion 218 is disposed on the substrate 202, and the lead-out portion 218 is disposed outside the side plate 214, that is, the lead-out portion 218 is disposed outside the cavity. The lead-out portion 218 is coupled to the device 204 and is used to lead out the electrical signal of the device 204. More specifically, the first electrode layer 208 (or the second electrode layer 212) in the device 204 extends to the outside of the side plate 214, and the lead-out portion 218 is coupled to the first electrode layer 208 (or the second electrode layer 212). The conductive path includes the first electrode layer 208 (or the second electrode layer 212), the lead-out portion 218, the redistribution layer 222 and the conductive structure 220 in sequence.

[0059] In some embodiments, the orthographic projection shape of the lead-out portion 218 on the substrate 202 may include, but is not limited to, a circle, a square, or other shapes. Figure 2B The square lead-out portion 218 shown is only for illustrative purposes, and the present disclosure has no special limitation on this. In some embodiments, the number of the lead-out portions 218 may be 2, 3, or more. Figure 2BThe six lead-out portions 218 are shown for illustrative purposes only, and the present disclosure does not have any special limitation on this. The present disclosure also does not have any special limitation on the arrangement of the lead-out portions 218. Figure 2B It is also shown that the arrangement of the six lead-out portions 218 is in an array, which does not constitute a limitation on the protection scope of the present disclosure.

[0060] In some embodiments, the orthographic projection size of the lead-out portion 218 on the substrate 202 is smaller than 10 μm; alternatively, the orthographic projection size of the lead-out portion 218 on the substrate 202 is smaller than 5 μm.

[0061] Here, the size of the package structure 200 in the horizontal direction includes the sum of the size of the side plate 214 in the horizontal direction and the size of the lead portion 218 in the horizontal direction. The size of the package structure 200 in the horizontal direction can be reduced by reducing the size of the lead portion 218. For example, taking the size of the package structure as 800*800μm as an example, the size of the lead portion 218 is reduced from 80μm to 5μm, the size of the package structure can be reduced to 650*650μm, and the area of ​​the package structure can be reduced by 34%.

[0062] Here, the conductive structure 220 is disposed on the top surface of the cover plate 216, that is, the conductive structure 220 is coupled to the lead-out portion 218 through the redistribution layer 222; wherein the orthographic projection of the conductive structure 220 on the substrate 202 is located within the orthographic projection range of the cover plate 216 on the substrate 202. In other words, the device 204, the cover plate 216 and the conductive structure 220 are sequentially disposed along the vertical direction (i.e., the Z direction), and the size of the package structure 200 along the horizontal direction includes the sum of the size of the side plate 214 along the horizontal direction and the size of the lead-out portion 218 along the horizontal direction. The conductive structure 220 does not increase the size of the package structure 200 additionally, so that the size of the package structure 200 along the horizontal direction can be effectively reduced. In addition, there is a large amount of blank space on the cover plate 216, and various arrangements of the conductive structure 220 can be disposed, thereby breaking through the design limitation of disposing the conductive structure 220 on the substrate 202.

[0063] In some embodiments, the orthographic projection shape of the conductive structure 220 on the substrate 202 may include but is not limited to a circle, a square or other shapes, and the number of the conductive structures 220 may be 2, 3 or more. The present disclosure has no special limitations on the orthographic projection shape of the conductive structure 220 on the substrate 202, the number of the conductive structures 220, and the arrangement of the conductive structures 220.

[0064] In some embodiments, the rewiring layer 222 may include at least one wiring layer and a dielectric layer disposed between adjacent wiring layers. Exemplarily, the rewiring layer 222 may include a top wiring layer, an intermediate wiring layer, a bottom wiring layer, and a dielectric layer disposed between adjacent wiring layers. The top wiring layer, the intermediate wiring layer, and the bottom wiring layer are mainly used for the transmission of electrical signals of the device 204, and the dielectric layer is mainly used to maintain the insulation between the wiring layers. The present disclosure does not have any special restrictions on the number of wiring layers in the rewiring layer 222 and the thickness of the wiring layers, and they can be selected according to actual conditions.

[0065] In some embodiments, the material of the wiring layer may include a conductive material, for example, a metal material such as copper (Cu), titanium (Ti), aluminum (Al), gold (Au), or molybdenum (Mo).

[0066] In some embodiments, the material of the dielectric layer may include an insulating material, such as epoxy resin or polyimide.

[0067] Here, the inductor 224 can be arranged on the surface of the cover plate 216, and the inductor 224 is coupled to the redistribution layer 222. More specifically, the inductor 224 can be coupled to any wiring layer in the redistribution layer 222. The orthographic projection of the inductor 224 on the substrate 202 is located within the orthographic projection range of the cover plate 216 on the substrate 202. In other words, the device 204, the cover plate 216 and the inductor 224 are arranged in sequence along the vertical direction (i.e., the Z direction), and the size of the package structure 200 along the horizontal direction includes the sum of the size of the side plate 214 along the horizontal direction and the size of the lead-out portion 218 along the horizontal direction. The inductor 224 does not increase the size of the package structure 200 additionally, so that the size of the package structure 200 along the horizontal direction can be effectively reduced. In addition, there is a large amount of blank space on the cover plate 216, which can be used to design various arrangements of winding inductors. The inductor can be arranged between the device and the cover plate, or on the cover plate.

[0068] In some embodiments, a redistribution layer 222 between at least one lead-out portion 218 and the conductive structure 220 may be selected to connect a winding inductor 224 . Figure 2B Six lead-out portions and six conductive structures are illustrated, wherein the redistribution layer 222 between three lead-out portions 218 and the corresponding conductive structures 220 is coupled to the inductor 224 , which is only used for exemplary description and does not constitute a limitation on the protection scope of the present disclosure.

[0069] In some embodiments, the inductor 224 may include a spiral coil, which may be a single-layer structure and may be electrically connected to a certain wiring layer in the redistribution layer 222; the spiral coil may also be a multi-layer structure and may be electrically connected to multiple wiring layers in the redistribution layer 222. In this embodiment, the winding method of the inductor and the inductance value may be adjusted according to actual conditions to meet different requirements for external inductance of the device.

[0070] In the embodiments of the present disclosure, the lead-out portion may have different arrangement positions. In some embodiments, the lead-out portion may be arranged on the outer side of the side plate, for specific reference Figure 2A In other embodiments, the lead-out portion may also be disposed on the inner side of the side plate, for details, see Figure 3 In some other embodiments, the lead-out portion may also be provided between the side plate and the substrate, for details, see Figure 4 shown.

[0071] like Figure 2A As shown, in some embodiments, the lead-out portion 218 is disposed on the outer side of the side plate 214, and the conductive structure 220 is coupled to the lead-out portion 218 through a redistribution layer 222 that covers the side wall of the cover plate 216 and the outer side wall of the side plate 214. At this time, the size of the package structure 200 along the horizontal direction includes the sum of the size of the side plate 214 along the horizontal direction and the size of the lead-out portion 218 along the horizontal direction.

[0072] refer to Figure 3 , Figure 3 sectional view of the packaging structure provided by the second embodiment of the present disclosure. Figure 3 As shown, the packaging structure 300 may include: a substrate 302; a device 304 disposed on the substrate 302, the device 304 including a reflective structure 306, a first electrode layer 308, a piezoelectric layer 310 and a second electrode layer 312 stacked in sequence on the substrate 302; a side plate 314 disposed on the substrate 302 and surrounding the device 304; a cover plate 316 disposed on the side plate 314, the cover plate 316, the side plate 314 and the substrate 302 together form a cavity, and the device 304 is located in the cavity.

[0073] In some embodiments, the lead-out portion 318 is disposed on the inner side of the side plate 314; wherein the conductive structure 320 is coupled to the lead-out portion 318 through a redistribution layer 322 that covers a portion of the surface of the cover plate 316 (i.e., the side wall of the cover plate 316) and a portion of the surface of the side plate 314 (i.e., the outer wall of the side plate 314).

[0074] Here, the lead-out portion 318 is disposed in the cavity, the lead-out portion 318 is coupled to the first electrode layer 308 (or the second electrode layer 312) in the device 304, the redistribution layer 322 extends from the inner side of the side plate 314 to the outer side of the side plate 314, and the lead-out portion 318 is coupled to the conductive structure 320 by the redistribution layer 322. The conductive path includes the first electrode layer 308 (or the second electrode layer 312), the lead-out portion 318, the redistribution layer 322 and the conductive structure 320 in sequence.

[0075] Compared with setting the lead-out portion on the outer side of the side panel, in the present embodiment, the lead-out portion 318 is set on the inner side of the side panel 314. At this time, the size of the packaging structure 300 along the horizontal direction only includes the size of the side panel 314 along the horizontal direction, and the lead-out portion 318 does not additionally increase the size of the packaging structure 300. In this way, the size of the packaging structure 300 along the horizontal direction can be further reduced.

[0076] refer to Figure 4 , Figure 4 sectional view of the packaging structure provided by the third embodiment of the present disclosure. Figure 4 As shown, the packaging structure 400 may include: a substrate 402; a device 404 disposed on the substrate 402, the device 404 including a reflective structure 406, a first electrode layer 408, a piezoelectric layer 410 and a second electrode layer 412 stacked in sequence on the substrate 402; a side plate 414 disposed on the substrate 402 and surrounding the device 404; a cover plate 416 disposed on the side plate 414, the cover plate 416, the side plate 414 and the substrate 402 together form a cavity, and the device 404 is located in the cavity.

[0077] In some embodiments, the lead-out portion 418 is disposed between the side plate 414 and the substrate 402 ; the side plate 414 includes a conductive material; wherein the conductive structure 420 is coupled to the lead-out portion 418 through a redistribution layer 422 covering a portion of the surface of the cover plate 416 and the side plate 414 .

[0078] Here, the lead-out portion 418 is disposed between the side plate 414 and the substrate 402. In other words, the side plate 414 is disposed on the lead-out portion 418. The side plate 414 may include a conductive material, and the side plate 414 is also used as a part of the conductive path, which sequentially includes the first electrode layer 408 (or the second electrode layer 412), the lead-out portion 418, the side plate 414, the redistribution layer 422, and the conductive structure 420.

[0079] In some embodiments, the material of the side plate 414 may include a conductive material, such as a metal material, for example, copper (Cu), gold (Au) or aluminum (Al).

[0080] Compared with setting the lead-out portion on the outside of the side panel, in the present embodiment, the lead-out portion 418 is set between the side panel 414 and the substrate 402. At this time, the size of the packaging structure 400 along the horizontal direction only includes the size of the side panel 414 along the horizontal direction, and the lead-out portion 418 does not additionally increase the size of the packaging structure 400. In this way, the size of the packaging structure 400 along the horizontal direction can be further reduced.

[0081] refer to Figure 5 , Figure 5 sectional view of the packaging structure provided by the fourth embodiment of the present disclosure. Figure 5 As shown, the packaging structure 500 may include: a substrate 502; a device 504 disposed on the substrate 502, the device 504 including a reflective structure 506, a first electrode layer 508, a piezoelectric layer 510 and a second electrode layer 512 stacked in sequence on the substrate 502; a side plate 514 disposed on the substrate 502 and surrounding the device 504; a cover plate 516 disposed on the side plate 514, the cover plate 516, the side plate 514 and the substrate 502 together form a cavity, and the device 504 is located in the cavity.

[0082] In some embodiments, the conductive structure 520 includes: a pad 526 (Pad) disposed on the cover plate 516; a bump 528, such as a solder ball (Bump), disposed on the pad 526, and the bump 528 is coupled to the lead-out portion 518 through the pad 526 and the redistribution layer 522. In this case, the lead-out portion can be disposed on the inner side of the side plate, the outer side of the side plate, or between the side plate and the substrate.

[0083] Here, the present disclosure has no special limitation on the shape of the orthographic projection of the pad 526 (or the bump 528) on the substrate 502, which may be, for example, a circle, a square, or a polygon. The present disclosure has no special limitation on the number of pads 526 (or the bump 528), which may be, for example, 1, 2, 3, or more. The present disclosure has no special limitation on the arrangement of the pads 526 (or the bump 528), which may be arranged in an array or in an irregular arrangement.

[0084] Due to the large size of the pads and bumps, compared with arranging the pads and bumps on the substrate, in this embodiment, the pads and bumps are arranged on the cover plate, and the orthographic projections of the pads and bumps on the substrate are located within the orthographic projection range of the cover plate on the substrate. The device, cover plate, pads and bumps are stacked in the vertical direction (i.e., Z direction), which can avoid the pads and bumps occupying additional space area and effectively reduce the size of the packaging structure in the horizontal direction, thereby facilitating the miniaturization of the packaging structure.

[0085] In some embodiments, the package structure 500 further includes: a protective layer 530 covering the surface of the redistribution layer 522 and the lead-out portion 518 and exposing a portion of the surface of the bump 528. Here, the use of the protective layer 530 to cover the surface of the redistribution layer 522 and the lead-out portion 518 is conducive to improving the structural stability of the package structure 500; the protective layer 530 exposes a portion of the surface of the bump 528, which is conducive to using the bump 528 to realize the electrical signal lead-out of the package structure 500.

[0086] In some embodiments, the material of the protection layer 530 may include but is not limited to epoxy resin, polyimide or other materials.

[0087] In some embodiments, the height of the protective layer 530 along the Z direction is H0, the distance from the surface of the substrate 502 close to the device 504 to the outer surface of the cover 516 (i.e., the top surface of the cover 516) along the Z direction is H1, the height of the bump 528 along the Z direction is H2, and the height of the pad 526 along the Z direction is H3; wherein, H0-(H1+H3)>2μm, (H1+H2+H3)-H0>10μm.

[0088] Here, the minimum thickness of the protective layer 530 covering the redistribution layer 522 is greater than 2 μm, which can help prevent the redistribution layer 522 from being damaged; the top surface of the protective layer 530 is lower than the top surface of the bump 528, and the height difference between the top surface of the protective layer 530 and the top surface of the bump 528 is greater than 10 μm, which is conducive to exposing the bump 528 for electrical connection.

[0089] refer to Fig. 6A and Figure 6B , Fig. 6A A cross-sectional view of a packaging structure provided in accordance with a fifth embodiment of the present disclosure, Figure 6B FIG. 5 is a top view of a packaging structure provided in the fifth embodiment of the present disclosure. Fig. 6A As shown, the packaging structure 600 may include: a substrate 602; a device 604 disposed on the substrate 602, the device 604 including a reflective structure 606, a first electrode layer 608, a piezoelectric layer 610 and a second electrode layer 612 stacked in sequence on the substrate 602; a side plate 614 disposed on the substrate 602 and surrounding the device 604; a cover plate 616 disposed on the side plate 614, the cover plate 616, the side plate 614 and the substrate 602 together form a cavity, and the device 604 is located in the cavity.

[0090] like Fig. 6A and Figure 6BAs shown, in some embodiments, the conductive structure 620 includes: a lead block 632 disposed on the cover plate 616; a lead 634 coupled to the lead block 632, and the lead 634 is coupled to the lead-out portion 618 through the lead block 632 and the redistribution layer 622. At this time, the lead-out portion can be disposed on the inner side of the side plate, the outer side of the side plate, or between the side plate and the substrate.

[0091] Here, the present disclosure has no special limitation on the shape of the orthographic projection of the lead block 632 on the substrate 602, which may be, for example, a circle, a square, or a polygon. The present disclosure has no special limitation on the number of lead blocks 632, which may be, for example, 1, 2, 3, or more. The present disclosure has no special limitation on the arrangement of the lead blocks 632, which may be arranged in an array or in an irregular arrangement.

[0092] Due to the large size of the lead block, compared with arranging the lead block and the leads on the substrate, in this embodiment, the lead block and the leads are arranged on the cover plate, and the orthographic projections of the lead block and the leads on the substrate are located within the orthographic projection range of the cover plate on the substrate. The device, the cover plate and the electrode block are stacked in the vertical direction (i.e., the Z direction), which can avoid the lead block occupying additional space area and effectively reduce the size of the packaging structure in the horizontal direction, thereby facilitating the miniaturization of the packaging structure.

[0093] In some embodiments, the package structure 600 further includes: a protective layer covering the surface of the redistribution layer 622 and exposing a portion of the surface of the lead block 632. Here, using the protective layer to cover the surface of the redistribution layer and the lead-out portion is beneficial to improving the structural stability of the package structure; and the protective layer exposing a portion of the surface of the lead block is beneficial to coupling the lead to the lead block to achieve electrical signal lead-out of the package structure.

[0094] In some embodiments, the height of the protective layer along the Z direction is H0, the distance from the surface of the substrate 602 close to the device 604 to the outer surface of the cover plate 616 along the Z direction is H1, and the height of the lead block 632 along the Z direction is H4; wherein, H0-(H1+H4)>2μm.

[0095] Here, the minimum thickness of the protection layer covering the redistribution layer is greater than 2 μm, which is beneficial to preventing the redistribution layer from being damaged.

[0096] refer to Figure 7 , Figure 7 sectional view of the packaging structure provided by the sixth embodiment of the present disclosure. Figure 7As shown, the package structure 700 may include: a substrate 702; a device 704 disposed on the substrate 702, the device 704 including a reflective structure 706, a first electrode layer 708, a piezoelectric layer 710 and a second electrode layer 712 stacked in sequence on the substrate 702; a side plate 714 disposed on the substrate 702 and surrounding the device 704; a cover plate 716 disposed on the side plate 714, the cover plate 716, the side plate 714 and the substrate 702 together form a cavity, and the device 704 is located in the cavity. Here, the lead-out portion 718 may be disposed on the outside of the side plate 714.

[0097] In some embodiments, when the maximum dimension of the cavity along the X direction is greater than 400 μm, the package structure 700 further includes: at least one support column 736 disposed in the cavity, the support column 736 is used to support the cover plate 716 and the conductive structure 720 (including the pad 726 and the bump 728).

[0098] Here, the size of the cavity along the X direction is the size of the orthographic projection of the inner side wall of the side plate 714 on the substrate along the X direction. If the size of the cavity along the X direction is too large, for example, greater than 400 μm, the side plate 714 may be difficult to support the weight of the cover plate 716 and the conductive structure 720 disposed on the cover plate 716, affecting the stability of the package structure 700. Therefore, it is necessary to set a support column 736 in the cavity, and the top of the support column 736 is in contact with the cover plate 716 to support the cover plate 716 and the conductive structure 720.

[0099] In some embodiments, the orthographic projection shape of the support pillar 736 on the substrate 702 may include but is not limited to a circle, a square or other irregular shapes, and the number of the support pillars 736 may be 1, 2, 3 or more. The present disclosure has no special limitations on the orthographic projection shape of the support pillars 736 on the substrate 702, the number of the support pillars 736, and the arrangement of the support pillars 736.

[0100] In some embodiments, the orthographic projection size of the support column 736 on the substrate 702 may be greater than 10 μm. Here, the support column 736 is arranged in the cavity to improve the anti-molding ability of the package structure. Of course, the orthographic projection size of the support column on the substrate 702 may also be less than 10 μm, and correspondingly, the number of support columns 736 arranged in the cavity needs to be increased. Here, the orthographic projection size of the support column 736 on the substrate 702 may be the size D of the support column 736 along the X direction.

[0101] The embodiment of the present disclosure provides a packaging structure. The packaging structure includes: a substrate; a device disposed on one side of the substrate; a side plate disposed on one side of the substrate and surrounding the device; a cover plate formed of a non-substrate and non-wafer material disposed on one side of the substrate, the cover plate disposed on the side plate, a cavity formed between the cover plate, the side plate and the substrate, and the device disposed in the cavity; a lead-out portion disposed on one side of the substrate, the lead-out portion coupled to the device and used to lead out the electrical signal of the device; a conductive structure disposed on the side of the cover plate away from the substrate, the conductive structure coupled to the lead-out portion through a redistribution layer; wherein the orthographic projection of the conductive structure on the substrate is located within the orthographic projection range of the cover plate on the substrate; an inductor disposed on the surface of the cover plate, the inductor coupled to the redistribution layer and the conductive structure. In the embodiment of the present disclosure, the orthographic projection of the conductive structure in the packaging structure on the substrate is located within the orthographic projection range of the cover plate on the substrate, and stacking the device, the cover plate and the conductive structure in the vertical direction can avoid the conductive structure occupying additional space area, effectively reduce the size of the packaging structure in the horizontal direction, and thus facilitate the miniaturization of the packaging structure. In addition, in the embodiment of the present disclosure, the inductor in the packaging structure is arranged on the surface of the cover plate, and there is a large amount of blank space on the surface of the cover plate, which can be used to design various arrangements of the winding inductor.

[0102] It should be understood that "one embodiment" or "an embodiment" mentioned throughout the specification means that specific features, structures or characteristics related to the embodiment are included in at least one embodiment of the present disclosure. Therefore, "in one embodiment" or "in an embodiment" appearing throughout the specification does not necessarily refer to the same embodiment. In addition, these specific features, structures or characteristics can be combined in one or more embodiments in any suitable manner. It should be understood that in the various embodiments of the present disclosure, the size of the serial number of the above-mentioned processes does not mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present disclosure. The serial numbers of the embodiments of the present disclosure are for description only and do not represent the advantages and disadvantages of the embodiments.

[0103] The above description is only a preferred embodiment of the present disclosure, and does not limit the patent scope of the present disclosure. All equivalent structural changes made by using the contents of the present disclosure and the drawings under the inventive concept of the present disclosure, or directly / indirectly applied in other related technical fields are included in the patent protection scope of the present disclosure.

Claims

1. A packaging structure, characterized in that: The packaging structure comprises: substrate; A device disposed on one side of the substrate; A side plate disposed on one side of the substrate and surrounding the device; a cover plate formed of a non-substrate and non-wafer material and arranged on one side of the substrate, the cover plate being arranged on the side plate, a cavity being formed between the cover plate, the side plate and the substrate, and the device being arranged in the cavity; A lead-out portion provided on one side of the substrate, the lead-out portion being coupled to the device and used for leading out an electrical signal of the device; A conductive structure disposed on a side of the cover plate away from the substrate, the conductive structure being coupled to the lead-out portion through a redistribution layer; wherein an orthographic projection of the conductive structure on the substrate is within a range of an orthographic projection of the cover plate on the substrate; An inductor is disposed on the surface of the cover plate, and the inductor is coupled to the redistribution layer and the conductive structure.

2. The packaging structure according to claim 1, characterized in that: The lead-out portion is arranged on the outer side of the side plate; or, the lead-out portion is arranged on the inner side of the side plate; wherein the conductive structure is coupled to the lead-out portion through the redistribution layer covering a portion of the surface of the cover plate and a portion of the surface of the side plate.

3. The packaging structure according to claim 1, characterized in that: The lead-out portion is disposed between the side plate and the substrate; the side plate comprises a conductive material; wherein the conductive structure is coupled to the lead-out portion through the redistribution layer covering a portion of the surface of the cover plate and the side plate.

4. The packaging structure according to claim 1, characterized in that: The conductive structure comprises: A welding pad disposed on the cover plate; A bump is disposed on the pad, and the bump is coupled to the lead-out portion through the pad and the redistribution layer.

5. The packaging structure according to claim 4, characterized in that: The packaging structure further includes: A protection layer covers the surface of the redistribution layer and exposes a portion of the surface of the bump.

6. The packaging structure according to claim 5, characterized in that: The height of the protective layer along the direction perpendicular to the substrate is H0, the distance from the surface of the substrate close to the device to the outer surface of the cover plate along the direction perpendicular to the substrate is H1, the height of the bump along the direction perpendicular to the substrate is H2, and the height of the pad along the direction perpendicular to the substrate is H3; wherein, H0-(H1+H3)>2μm, (H1+H2+H3)-H0>10μm.

7. The packaging structure according to claim 1, characterized in that: The conductive structure comprises: A lead block disposed on the cover plate; A lead is coupled to the lead block, and the lead is coupled to the lead-out portion through the lead block and the redistribution layer.

8. The packaging structure according to claim 7, characterized in that: The packaging structure further includes: A protective layer covers the surface of the redistribution layer and exposes a portion of the surface of the lead block.

9. The packaging structure according to claim 8, characterized in that: The height of the protective layer along the direction perpendicular to the substrate is H0, the distance from the surface of the substrate close to the device to the outer surface of the cover plate along the direction perpendicular to the substrate is H1, and the height of the lead block along the direction perpendicular to the substrate is H4; wherein, H0-(H1+H4)>2μm.

10. The packaging structure according to claim 1, characterized in that: When the maximum dimension of the cavity along a direction parallel to the substrate is greater than 400 μm, the packaging structure further includes: At least one supporting column is disposed in the cavity, and the supporting column is used to support the cover plate and the conductive structure.

11. The packaging structure according to claim 1, characterized in that: The orthographic projection of the cover plate on the substrate is located within the outer contour range of the orthographic projection of the side plate on the substrate.

12. The packaging structure according to claim 1, characterized in that: The side plate comprises a first surface facing the cavity, a second surface facing away from the cavity, and a third surface and a fourth surface arranged opposite to each other in a direction perpendicular to the substrate, wherein the third surface is close to the substrate and the fourth surface is far from the substrate; The cover plate comprises a fifth surface and a sixth surface which are arranged opposite to each other in a direction perpendicular to the substrate, and a seventh surface for connecting the fifth surface and the sixth surface, wherein the fifth surface faces the cavity and the sixth surface faces away from the cavity; Wherein, the angle between the second surface of the side plate and the substrate is less than 90 degrees; or the angle between the seventh surface of the cover plate and the substrate is less than 90 degrees.

13. The packaging structure according to claim 1, characterized in that: The orthographic projection size of the lead-out portion on the substrate is less than 10 μm.