Starting process of electronic device and chip of electronic device
By designing a chip including interface control circuit, memory and computing circuit in an electronic device, dynamically selecting and loading external memory initialization parameters, multiple mirror preparation problems caused by hard-coded memory initialization program code in the prior art are solved, and the effect of simplifying the chip manufacturing process and reducing development complexity is achieved.
Patent Information
- Application Number
- CN202411707082.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-26
- Publication Date
- 2025-03-14
AI Technical Summary
In the startup process of existing electronic devices, the memory initialization program code is hardcoded into the startup loader, resulting in a startup loader mirror that corresponds to only one memory, increasing the time and complexity of chip manufacturers preparing multiple images.
A chip is designed, including an interface control circuit, memory and calculation circuit, and obtains numerical values through peripheral interface circuits, generates index values, and selects the target external memory initialization file based on the index value and external memory information, and loads its parameters to the memory to initialize external memory.
This solution reduces the need for chip manufacturers to prepare multiple startup loader images, simplifies the chip manufacturing process, and reduces the time and complexity of developing products.
Smart Images
Figure CN119621161A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the technical field of electronic devices, and in particular to a startup process of an electronic device and a chip of the electronic device. Background Art
[0002] See also Figure 1 , Figure 1 The boot process of an existing electronic device is displayed. The boot process 100 includes a ROM (read-only memory) execution program 110 and a boot loader (boot loader) execution program 120. The ROM execution program 110 includes initializing the central processing unit (CPU) (step S112) and loading and executing (running) MiniBoot (step S114). The boot loader execution program 120 includes initializing the memory (for example, dynamic random access memory (DRAM)) (step S122), loading and executing U-boot (step S124), initializing peripheral devices (step S126) and loading and executing the kernel (Kernel) (step S128). The details of the boot process 100 are well known to professionals in this technical field, so they are not repeated here.
[0003] Depend on Figure 1 It can be seen that the program code used to initialize the memory is hardcoded into the source code of the boot loader execution program 120, and the two are compiled to generate a boot loader image. In other words, one boot loader image only corresponds to one type of memory. The disadvantage of this design is that the chip (excluding the memory initialized in step S122) manufacturer must prepare multiple boot loader images to deal with different types of memory, which will increase the time and complexity of product development. Summary of the invention
[0004] Based on the deficiencies of the prior art, an object of the present application is to provide a startup process of an electronic device and a chip of the electronic device to improve the deficiencies of the prior art.
[0005] One embodiment of the present application provides a chip, coupled to an external memory, a peripheral interface circuit and a storage device. The storage device stores an external memory information and multiple external memory initialization files. The chip includes: an interface control circuit, a memory and a calculation circuit. The interface control circuit is used to control the peripheral interface circuit. The memory is used to store multiple program codes and / or program instructions. The calculation circuit is coupled to the interface control circuit and the memory, and is used to execute the program code and / or program instructions to perform the following steps: obtain a numerical value through the peripheral interface circuit; generate an index value based on the numerical value; determine a target external memory initialization file from the external memory initialization file based on the index value and the external memory information; and load an external memory parameter of the target external memory initialization file into the memory.
[0006] Another embodiment of the present application provides a startup process of an electronic device. The electronic device includes a chip, an external memory, a peripheral interface circuit and a storage device. The storage device stores an external memory information and multiple external memory initialization files. The startup process includes the following steps: obtaining a numerical value through the peripheral interface circuit; generating an index value according to the numerical value; determining a target external memory initialization file from the external memory initialization file according to the index value and the external memory information; and, loading an external memory parameter of the target external memory initialization file into a memory in the chip.
[0007] Another embodiment of the present application provides a startup process of an electronic device. The electronic device includes a chip, an external memory and a storage device. The storage device stores an external memory information, a first external memory parameter and a second external memory parameter. The startup process includes the following steps: selecting the first external memory parameter according to the external memory information, wherein the first external memory parameter corresponds to the external memory; before initializing the external memory, loading the first external memory parameter into a memory in the chip; and executing the first external memory parameter to initialize the external memory. When initializing the external memory, the memory stores the first external memory parameter, the storage device stores the second external memory parameter, and the first external memory parameter is not equal to the second external memory parameter.
[0008] The technical means embodied in the embodiments of the present application can improve at least one of the shortcomings of the prior art. Therefore, compared with the prior art, the present application can reduce the time and complexity of product development.
[0009] The features, implementation and effects of the present application are described in detail below with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS
[0010] Figure 1 Display the startup process of existing electronic devices;
[0011] Figure 2 is a functional block diagram of an embodiment of the electronic device of the present application;
[0012] Figure 3 is a flow chart of an embodiment of a startup process of an electronic device of the present application;
[0013] Figure 4 is a schematic diagram of an embodiment of the external memory initialization data of the present application; and
[0014] Figure 5 It is a flow chart of an embodiment of the external memory parameter loading procedure of the present application.
[0015] 100, 300: start the process;
[0016] 110: ROM executes the program;
[0017] 120, 330: boot loader execution program;
[0018] S112, S114, S122, S124, S126, S128, S332, S510, S520, S530, S540, S550: steps;
[0019] 200: electronic devices;
[0020] 210: Chip;
[0021] 211: Computational circuits;
[0022] 212: memory;
[0023] 213: Image processing circuit;
[0024] 214, 216: access control circuit;
[0025] 218: interface control circuit;
[0026] 220: external memory;
[0027] 230: peripheral interface circuit;
[0028] 232: GPIO (general purpose input and output);
[0029] 234: ADC (analog-to-digital converter);
[0030] 240: storage device;
[0031] 245: boot loader;
[0032] 250: Image sensor;
[0033] 400: External memory initialization data;
[0034] Va1, Va2: input signal;
[0035] Va1', Va2': numerical value;
[0036] 310: Peripheral interface circuit initialization procedure;
[0037] 320: External memory parameter loading program;
[0038] 405: basic information;
[0039] 410: Header section;
[0040] 420: Peripheral interface information;
[0041] 430: external memory information;
[0042] 440: Ending paragraph;
[0043] 450, 450_1, 450_2, 450_M: external memory initialization file;
[0044] 451, Id_1, Id_2, Id_M: index value;
[0045] 452, Sz_1, Sz_2, Sz_M: size;
[0046] 453: check code;
[0047] 454: Name;
[0048] 455: external memory parameters;
[0049] Oft_1, Oft_2, Oft_M: offset. DETAILED DESCRIPTION
[0050] The technical terms used in the following descriptions refer to the customary terms in the technical field. If some of the terms are explained or defined in this specification, the interpretation of the terms shall be based on the explanation or definition in this specification.
[0051] The disclosure of this application includes the startup process and chip of the electronic device. Since some of the components included in the electronic device of this application may be known components individually, the details of the known components will be omitted in the following description without affecting the full disclosure and feasibility of the device invention. In addition, part or all of the startup process of the electronic device of this application may be in the form of software and / or firmware, and can be executed by the chip of this application or its equivalent device. Without affecting the full disclosure and feasibility of the method invention, the following description of the method invention will focus on the step content rather than the hardware.
[0052] See also Figure 2 , Figure 2 2 is a functional block diagram of an embodiment of the electronic device of the present application. The electronic device 200 includes a chip 210, an external memory 220, a peripheral interface circuit 230, a storage device 240 and an image sensor 250 that are coupled to each other. The external memory 220 can be a volatile memory (e.g., DRAM), and the storage device 240 can be a non-volatile memory (e.g., flash memory).
[0053] The peripheral interface circuit 230 includes a general-purpose input / output (GPIO) 232 and an analog-to-digital converter (ADC) 234. The GPIO 232 and the ADC 234 are each an interface circuit. The ADC 234 includes, but is not limited to, a successive-approximation register (SAR) analog-to-digital converter (SAR ADC) and / or a pulse width modulation (PWM) analog-to-digital converter (PWM ADC).
[0054] The storage device 240 stores a boot loader 245 and external memory initialization data 400 .
[0055] The chip 210 includes a computing circuit 211, a memory 212, an image processing circuit 213, an access control circuit 214, an access control circuit 216, and an interface control circuit 218, which are coupled to each other. In some embodiments, the chip 210 may be an image processing chip.
[0056] The computing circuit 211 may be a circuit or electronic component with program execution capability, such as a central processing unit, a microprocessor, a microprocessing unit, a digital signal processor, an application specific integrated circuit (ASIC), or an equivalent circuit thereof. The computing circuit 211 implements some functions of the chip 210 by executing program codes and / or program instructions stored in the memory 212. The aforementioned some functions include but are not limited to the startup process 300 of the electronic device 200 (which will be described below in conjunction with Figure 3 details) and image processing.
[0057] The memory 212 may be a volatile memory, such as a static random access memory (SRAM).
[0058] The image processing circuit 213 may be an image signal processor (ISP) for processing the image signal captured by the image sensor 250 and storing the result in the external memory 220 via the access control circuit 214 .
[0059] The access control circuit 214 and the access control circuit 216 are used to control the access to the external memory 220 and the storage device 240, respectively. The computing circuit 211 accesses the external memory 220 and the storage device 240 through the access control circuit 214 and the access control circuit 216, respectively. The computing circuit 211 can load the boot loader 245 into the memory 212 through the access control circuit 216 to execute the boot loader execution program 330 of the boot loader 245 (which will be described below in conjunction with Figure 3 details).
[0060] The interface control circuit 218 is used to control at least one interface circuit of the peripheral interface circuit 230. More specifically, the interface control circuit 218 obtains the input signal Va1 and the input signal Va2 (for example, voltage, current, etc., or corresponding digital signals) input to the electronic device 200 through the GPIO 232 and the ADC 234, and then transmits the numerical values Va1' and the numerical value Va2' corresponding to the input signal Va1 and the input signal Va2 to the calculation circuit 211. In other embodiments, the interface control circuit 218 can also directly transmit the input signal Va1 and the input signal Va2 to the calculation circuit 211.
[0061] See also Figure 3 , Figure 33 is a flowchart of an embodiment of the boot process of the electronic device 200 of the present application. The boot process 300 is executed by the computing circuit 211, including the ROM execution program 110, the peripheral interface circuit initialization program 310, the external memory parameter loading program 320 and the boot loader execution program 330. The details of the ROM execution program 110 are as follows: Figure 1 In addition to steps S122, S124, S126 and S128 (wherein the memory in step S122 refers to the external memory 220), the boot loader execution program 330 also includes initialization of the system of the electronic device 200 (including but not limited to resetting the status and registers of the computing circuit 211, configuring the frequency and power management, and initializing the storage device 240, etc.) and initialization of the image sensor 250 (step S332).
[0062] The peripheral interface circuit initialization program 310 and the external memory parameter loading program 320 are located between the ROM execution program 110 and the boot loader execution program 330. The peripheral interface circuit initialization program 310 and the external memory parameter loading program 320 are stored in the memory 212 in the form of program codes and / or program instructions, and the computing circuit 211 executes the peripheral interface circuit initialization program 310 and the external memory parameter loading program 320 by executing these program codes and / or program instructions.
[0063] The peripheral interface circuit initialization procedure 310 is used to initialize the peripheral interface circuit 230. After the peripheral interface circuit initialization procedure 310 is completed, the calculation circuit 211 can obtain the input signal Va1 and the input signal Va2 or the value Va1' and the value Va2' through the interface control circuit 218. Initializing the peripheral interface circuit 230 is well known to those skilled in the art, so it will not be described in detail.
[0064] The details of the external memory parameter loading procedure 320 will be described below. Figure 5 Describe in detail.
[0065] See also Figure 4 , Figure 4 4 is a schematic diagram of an embodiment of the external memory initialization data 400 of the present application. The external memory initialization data 400 includes basic information 405 and M external memory initialization files 450 (including 450_1, 450_2, ..., 450_M, M is an integer greater than 1). The basic information 405 includes a header 410, peripheral interface information 420, external memory information 430 and a tailer 440. The M external memory initialization files are not equal; more specifically, the M external memory initialization files have different external memory parameters 455.
[0066] The header segment 410 is used to indicate the beginning of the external memory initialization data 400 , and includes a check code and information such as the version and size of the external memory initialization data 400 .
[0067] The peripheral interface information 420 indicates which addresses of the peripheral interface circuit 230 are to be used to read the input signal Va1 and the input signal Va2, and how to quantize the input signal into the value Va1' and the value Va2'. For example, the peripheral interface information 420 may record the third and fifth lines of the GPIO 232, and / or the first channel of the ADC 234. In some embodiments, the interface control circuit 218 may first perform a discretization or resolution reduction process on the input signal Va2, and then provide the value Va2' to the calculation circuit 211.
[0068] In other embodiments, the interface control circuit 218 does not quantize the input signal, but directly provides the input signal Va1 and the input signal Va2 to the calculation circuit 211. The calculation circuit 211 quantizes the input signal Va1 and the input signal Va2 to generate the value Va1' and the value Va2'.
[0069] The external memory information 430 records the index table of the external memory initialization file 450. Figure 4 As shown, the external memory information 430 includes the number (1-M), index value (Id_1, Id_2, ..., Id_M), offset (Oft_1, Oft_2, ..., Oft_M) and size (Sz_1, Sz_2, ..., Sz_M) of the external memory initialization file 450. The calculation circuit 211 can find the corresponding external memory initialization file (one of 450_1-450_M) according to the index value, and read the corresponding external memory initialization file from the storage device 240 according to the offset and size.
[0070] The index value may be a value Va1', a value Va2', or a combination thereof. For example, the index value may be equal to the value Va1' (e.g., the signal of the third line and the signal of the fifth line of the GPIO 232 correspond to the first bit and the second bit of the index value, respectively); the index value may be equal to the value Va2' (e.g., the output code of the first channel of the ADC 234); or, the index value may be equal to the combination of the value Va1' and the value Va2' (e.g., the upper 2 bits are the value Va1', and the lower 4 bits are the value Va2').
[0071] The end segment 440 is used to indicate the end of the basic information 405.
[0072] Each external memory initialization file 450 includes a plurality of data, such as an external memory initialization file 450_M, which includes an index value 451 (Id_M), a size 452 (Sz_M), a checksum 453, a name 454 and external memory parameters 455.
[0073] The check code 453 is used to check whether the external memory initialization file 450_M is correct.
[0074] The name 454 can be used by the user to confirm whether the selected external memory initialization file is correct when executing the external memory parameter loading program 320 .
[0075] The external memory parameter 455 corresponds to the initialization of a certain type of external memory 220 , which includes but is not limited to the setting and calibration of timing, the setting of voltage, etc.
[0076] Depend on Figure 4 It can be seen that the storage device 240 stores a plurality of external memory initialization files 450, and the calculation circuit 211 can select an external memory initialization file 450 matching the external memory 220 according to the index value to initialize the external memory 220. Figure 2 and Figure 3 It can be seen that the present application sets the external memory initialization data 400 outside the boot loader 245, so the external memory initialization data 400 is not a part of the boot loader 245, that is, the external memory initialization file 450 is not hardcoded into the boot loader 245, and the external memory parameter loader 320 and the boot loader execution program 330 are separate programs, so the manufacturer of the chip 210 only needs to prepare one boot loader image (i.e., the boot loader 245), and does not need to prepare multiple boot loader images according to multiple different types of external memories 220, which greatly simplifies the chip manufacturing process. This can reduce the time and complexity of product development.
[0077] See also Figure 5 , Figure 5 2 is a flowchart of an embodiment of the external memory parameter loading program 320 of the present application. The external memory parameter loading program 320 is executed by the computing circuit 211 and includes the following steps.
[0078] Step S510: Read the peripheral interface information 420 from the storage device 240 to obtain a target address of the peripheral interface circuit 230. After obtaining the peripheral interface information 420, the calculation circuit 211 can learn the definition of the index value (e.g., the value Va1', the value Va2', or a combination of the two) from the peripheral interface information 420, and learn the target address of the peripheral interface circuit 230. For example, the target address indicates one or more lines of the GPIO 232, and / or one or more channels of the ADC 234.
[0079] Step S520: Obtain at least one value (e.g., value Va1' and / or value Va2') through the peripheral interface circuit 230 according to the target address. More specifically, the calculation circuit 211 controls the interface control circuit 218 to read the input signal Va1 and / or the input signal Va2 input to the peripheral interface circuit 230 based on the target address. In addition, in some embodiments, the calculation circuit 211 sets the interface control circuit 218 according to the peripheral interface information 420, and then the interface control circuit 218 quantizes the input signal Va1 and / or the input signal Va2 to provide the value Va1' and / or the value Va2' to the calculation circuit 211. In other embodiments, the calculation circuit 211 obtains the input signal Va1 and / or the input signal Va2 from the interface control circuit 218, and then quantizes the input signal Va1 and / or the input signal Va2 according to the peripheral interface information 420 to generate the value Va1' and / or the value Va2'.
[0080] Step S530: Generate an index value (Id_1, Id_2, ..., Id_M) according to the at least one value. As mentioned above, the index value can be the value Va1', the value Va2' or a combination thereof.
[0081] Step S540: Select or determine a target external memory initialization file according to the index value and the external memory information 430. For example, the calculation circuit 211 can find the corresponding external memory initialization file 450_M as the target external memory initialization file according to the index value Id_M and the index table of the external memory information 430.
[0082] Step S550: Load the external memory parameters of the target external memory initialization file to the memory 212. Continuing with the above example, after finding the external memory initialization file 450_M, the computing circuit 211 reads the external memory parameters 455 of the external memory initialization file 450_M from the storage device 240 through the access control circuit 216, and stores the external memory parameters 455 in the memory 212. The external memory parameters 455 will be executed in the subsequent step (i.e., the memory initialization step S122 of the boot loader execution program 330) to initialize the external memory 220.
[0083] In summary, although the storage device 240 stores multiple external memory initialization files 450, in the external memory parameter loading procedure 320, the computing circuit 211 only loads one of these external memory initialization files 450 into the memory 212. That is, although the boot process 300 of the present application supports multiple types of external memories, when the initialization procedure of the external memory 220 (i.e., step S122 of the boot process 300) is being executed, the memory 212 only stores a set of external memory parameters 455 matching the external memory 220, while the storage device 240 stores at least another set of different external memory parameters 455. That is, compared with the prior art, the present application does not require a larger memory 212. It should be noted that the cost of the storage device 240 is much less than the cost of the memory 212.
[0084] Although the embodiments of the present application are described above, these embodiments are not intended to limit the present application. Technicians in this technical field may change the technical features of the present application based on the explicit or implicit contents of the present application. All these changes may fall within the scope of patent protection sought by the present application. The scope of patent protection of the present application shall be based on the scope of the patent application of this specification.
Claims
1. A chip, characterized in that: The chip is coupled to an external memory, a peripheral interface circuit and a storage device, wherein the storage device stores external memory information and a plurality of external memory initialization files. The chip includes: An interface control circuit, used to control the peripheral interface circuit; a memory for storing a plurality of program codes and / or program instructions; and A computing circuit, coupled to the interface control circuit and the memory, is used to execute the program code and / or program instructions to perform the following steps: Obtain a value through the peripheral interface circuit; Generate an index value according to the numerical value; Determine a target external memory initialization file from the external memory initialization files according to the index value and the external memory information; and An external memory parameter of the target external memory initialization file is loaded into the memory.
2. The chip according to claim 1, characterized in that: The storage device further stores peripheral interface information, and the computing circuit further performs the following steps: Reading the peripheral interface information to obtain a target address of the peripheral interface circuit; Wherein, the step of obtaining the numerical value through the peripheral interface circuit is to obtain the numerical value based on the target address.
3. The chip according to claim 2, characterized in that: The peripheral interface circuit includes a general purpose input output, the target address corresponds to at least one line of the general purpose input output, and the value corresponds to a signal on the at least one line.
4. The chip according to claim 2, characterized in that: The peripheral interface circuit includes an analog-to-digital converter, the target address corresponds to at least one channel of the analog-to-digital converter, and the value corresponds to at least one output code of the at least one channel.
5. The chip according to claim 1, characterized in that: The peripheral interface circuit includes a first interface circuit and a second interface circuit. The interface control circuit obtains a first value and a second value from the first interface circuit and the second interface circuit respectively, and the index value is a combination of the first value and the second value.
6. The chip according to claim 1, characterized in that: The chip is further coupled to an image sensor, and the storage device further stores a boot loader. The computing circuit further performs the following steps: After loading the external memory parameters into the memory, executing a boot loader executive of the boot loader; and Executing the external memory parameters in a memory initialization step of the boot loader execution program to initialize the external memory; The boot loader is used to reset a state of the computing circuit, initialize at least one register, initialize the storage device, and initialize the image sensor.
7. The chip according to claim 6, characterized in that: Initializing the image sensor is later than initializing the external memory.
8. A startup process of an electronic device, characterized in that: The electronic device includes a chip, an external memory, a peripheral interface circuit and a storage device, wherein the storage device stores external memory information and a plurality of external memory initialization files, and the startup process includes the following steps: Obtain a value through the peripheral interface circuit; Generate an index value according to the numerical value; Determine a target external memory initialization file from the external memory initialization files according to the index value and the external memory information; and An external memory parameter of the target external memory initialization file is loaded into a memory in the chip.
9. The startup process according to claim 8, characterized in that: The storage device also stores peripheral interface information, and the startup process also includes the following steps: Reading the peripheral interface information to obtain a target address of the peripheral interface circuit; Wherein, the step of obtaining the numerical value through the peripheral interface circuit is to obtain the numerical value based on the target address.
10. The startup process according to claim 9, characterized in that: The peripheral interface circuit includes a general purpose input output, the target address corresponds to at least one line of the general purpose input output, and the value corresponds to a signal on the at least one line.
11. The startup process according to claim 9, characterized in that: The peripheral interface circuit includes an analog-to-digital converter, the target address corresponds to at least one channel of the analog-to-digital converter, and the value corresponds to at least one output code of the at least one channel.
12. The startup process according to claim 8, characterized in that: The peripheral interface circuit includes a first interface circuit and a second interface circuit. The step of obtaining the numerical value through the peripheral interface circuit is to obtain a first numerical value and a second numerical value from the first interface circuit and the second interface circuit respectively, and the index value is a combination of the first numerical value and the second numerical value.
13. The startup process according to claim 8, characterized in that: The electronic device further includes a computing circuit and an image sensor, and the storage device further stores a boot loader. The boot process further includes the following steps: After loading the external memory parameters into the memory, executing a boot loader executive of the boot loader; and Executing the external memory parameters in a memory initialization step of the boot loader execution program to initialize the external memory; The boot loader is used to reset a state of the computing circuit, initialize at least one register, initialize the storage device, and initialize the image sensor.
14. The startup process according to claim 13, characterized in that: Initializing the image sensor is later than initializing the external memory.
15. A startup process of an electronic device, characterized in that: The electronic device includes a chip, an external memory and a storage device, wherein the storage device stores an external memory information, a first external memory parameter and a second external memory parameter, and the startup process includes the following steps: selecting the first external memory parameter according to the external memory information, wherein the first external memory parameter corresponds to the external memory; Before initializing the external memory, loading the first external memory parameter into a memory in the chip; and Executing the first external memory parameter to initialize the external memory; When the external memory is initialized, the memory stores the first external memory parameter, the storage device stores the second external memory parameter, and the first external memory parameter is not equal to the second external memory parameter.
16. The startup process according to claim 15, characterized in that: The electronic device further includes a peripheral interface circuit, and the startup process further includes the following steps: Obtain a value through the peripheral interface circuit; Generate an index value according to the value; and The first external memory parameter is selected according to the index value.
17. The startup process according to claim 16, characterized in that: The storage device also stores peripheral interface information, and the startup process also includes the following steps: Reading the peripheral interface information to obtain a target address of the peripheral interface circuit; Wherein, the step of obtaining the numerical value through the peripheral interface circuit is to obtain the numerical value based on the target address.
18. The startup process according to claim 16, characterized in that: The peripheral interface circuit includes a first interface circuit and a second interface circuit. The step of obtaining the numerical value through the peripheral interface circuit is to obtain a first numerical value and a second numerical value from the first interface circuit and the second interface circuit respectively, and the index value is a combination of the first numerical value and the second numerical value.
19. The startup process according to claim 15, characterized in that: The electronic device also includes a computing circuit and an image sensor. The storage device also stores a boot loader. The step of executing the first external memory parameter to initialize the external memory is part of the boot loader. The boot loader is used to reset a state of the computing circuit, initialize at least one register, initialize the storage device, and initialize the image sensor.