Semiconductor structure and forming method thereof

Abstract

The embodiment of the invention provides a semiconductor structure and a forming method thereof, and the forming method of the semiconductor structure comprises the steps: providing a substrate; sequentially forming a dielectric layer and a conductive layer on the substrate; forming a patterned target mask layer on the conductive layer, wherein the edge of the target mask layer at least exposes part of the edge of the conductive layer; based on the target mask layer, removing an area, which exposes the conductive layer, of the target mask layer; and forming a passivation layer on one side, on which the conductive layer is formed, of the substrate. According to the semiconductor structure formed by the semiconductor structure forming method provided by the embodiment of the invention, the yield of a device is improved.

Description

Technical Field

[0001] The present application relates to the field of semiconductor technology, and in particular to a semiconductor structure and a method for forming the same. Background Art

[0002] In the manufacturing process of integrated circuits, when etching the dielectric layer, the front side of the device often "sparks". The occurrence of "sparks" will cause the conductive structure in the dielectric layer to be damaged, which will reduce the yield of the device and even cause the device to be directly scrapped.

[0003] Therefore, how to improve the yield of devices has become a technical problem that technical personnel in this field need to solve urgently. Summary of the invention

[0004] In view of this, an embodiment of the present application provides a semiconductor structure and a method for forming the same to improve the yield of the device.

[0005] To achieve the above objectives, the embodiments of the present application provide the following technical solutions.

[0006] In a first aspect, an embodiment of the present application provides a method for forming a semiconductor structure, comprising:

[0007] providing a substrate;

[0008] forming a dielectric layer and a conductive layer in sequence on the substrate;

[0009] forming a patterned target mask layer on the conductive layer, wherein an edge of the target mask layer at least partially exposes an edge of the conductive layer;

[0010] Based on the target mask layer, removing the target mask layer to expose the region of the conductive layer;

[0011] A passivation layer is formed on the side of the substrate where the conductive layer is formed.

[0012] Optionally, the step of forming a patterned target mask layer on the conductive layer includes:

[0013] forming a target photolithography layer on the conductive layer;

[0014] The photoresist at a preset distance from the edge of the target photoresist layer is removed, and the remaining target photoresist layer is used as the target mask layer.

[0015] Optionally, the preset distance is greater than 2 mm.

[0016] Optionally, the target mask layer further exposes a portion of the conductive layer in the middle region.

[0017] Optionally, after forming a passivation layer on the side of the substrate where the conductive layer is formed, the method further comprises:

[0018] The passivation layer is patterned so that the passivation layer exposes a portion of the conductive layer.

[0019] Optionally, the step of sequentially forming a dielectric layer and a conductive layer on the substrate includes:

[0020] forming a dielectric layer on the substrate;

[0021] forming a plurality of through holes on the dielectric layer, wherein the through holes penetrate the dielectric layer;

[0022] forming a conductive plug filling the through hole;

[0023] A conductive layer electrically connected to the conductive plug is formed.

[0024] Optionally, the steps of sequentially forming a dielectric layer and a conductive layer on the substrate, forming a patterned target mask layer on the conductive layer, and removing the area of ​​the target mask layer exposing the conductive layer based on the target mask layer are performed once as a cycle, wherein the cycle is repeated and the number of times the cycle is performed is at least twice.

[0025] Optionally, in the step of removing the region of the target mask layer exposing the conductive layer based on the target mask layer, an etching process is used to remove the region of the target mask layer exposing the conductive layer.

[0026] Optionally, the etching process is one or both of a dry etching process and a wet etching process.

[0027] In a second aspect, an embodiment of the present application provides a semiconductor structure, which is formed based on the method for forming a semiconductor structure as described in the first aspect above.

[0028] Compared with the prior art, the technical solution of the embodiment of the present application has the following advantages:

[0029] An embodiment of the present application provides a semiconductor structure and a method for forming the same, wherein the method for forming the semiconductor structure comprises: providing a substrate; sequentially forming a dielectric layer and a conductive layer on the substrate; forming a patterned target mask layer on the conductive layer, wherein an edge of the target mask layer at least partially exposes an edge of the conductive layer; based on the target mask layer, removing an area of ​​the target mask layer that exposes the conductive layer; and forming a passivation layer on a side of the substrate where the conductive layer is formed.

[0030] It can be seen that a method for forming a semiconductor structure provided in an embodiment of the present application forms a patterned target mask layer on the conductive layer, the edge of the target mask layer at least exposes a portion of the edge of the conductive layer, and then based on the target mask layer, removes the area where the target mask layer exposes the conductive layer, so that the edge of the conductive layer is etched away, thereby avoiding the situation where the edge of the conductive layer is exposed during subsequent etching, so that under the action of plasma charging, electrons cannot form a conductive circuit in the device, thereby avoiding the occurrence of the "sparking" phenomenon and improving the yield of the device. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present application. For ordinary technical personnel in this field, other drawings can be obtained based on the provided drawings without paying any creative work.

[0032] Figure 1 It is a schematic diagram of the structure of a device forming a conductive loop in the prior art;

[0033] Figure 2-Figure 4 It is a structural schematic diagram corresponding to each step in the method for forming a semiconductor structure according to an embodiment of the present application.

[0034] The reference numerals are as follows:

[0035] 100 - substrate; 110 - dielectric layer; 120 - conductive layer; 130 - passivation layer; 01 - through hole. DETAILED DESCRIPTION

[0036] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technical staff in this field without creative work are within the scope of protection of this application.

[0037] As described in the background technology, in the manufacturing process of integrated circuits, when etching the dielectric layer of the device, the front side of the device often "sparks" occur. The occurrence of the "spark" phenomenon will cause the conductive structure in the dielectric layer of the device to be damaged. For ease of understanding, Figure 1 The schematic diagram of the structure of the device forming a conductive loop in the prior art is shown as an example. Figure 1The closer the device is to the edge, the thinner the dielectric layer 110 of the device is. As the etching proceeds, the conductive layer 120 will be exposed at the edge of the device. Under the action of plasma charging, electrons form a conductive loop through the conductive structure and plasma. Excessive current causes the conductive structure to overheat, which in turn produces a "sparking" phenomenon. The conductive structure refers to a physical structure in the device that can conduct electricity, usually composed of materials such as metals, semiconductors or electrolytes. There are electrons or ions that can move freely in these materials, allowing current to pass through the structure.

[0038] The occurrence of the "sparking" phenomenon will cause the conductive structure in the dielectric layer of the device to be damaged, which will reduce the yield of the device and even cause the device to be directly scrapped. The inventor analyzed that when forming the conductive layer, etching the edge of the conductive layer can avoid the edge of the conductive layer being exposed in the subsequent etching process, so that under the action of plasma charging, electrons cannot pass through the conductive structure of the device and the plasma to form a conductive circuit, thereby avoiding the occurrence of the "sparking" phenomenon and improving the yield of the device.

[0039] In order to solve the above problems, an embodiment of the present application provides a semiconductor structure and a method for forming the same, wherein the method for forming the semiconductor structure comprises: providing a substrate; forming a dielectric layer and a conductive layer in sequence on the substrate; forming a patterned target mask layer on the conductive layer, wherein an edge of the target mask layer at least partially exposes an edge of the conductive layer; based on the target mask layer, removing the area of ​​the target mask layer exposing the conductive layer; and forming a passivation layer on a side of the substrate where the conductive layer is formed.

[0040] It can be seen that a method for forming a semiconductor structure provided in an embodiment of the present application forms a patterned target mask layer on the conductive layer, the edge of the target mask layer at least exposes a portion of the edge of the conductive layer, and then based on the target mask layer, removes the area where the target mask layer exposes the conductive layer, so that the edge of the conductive layer is etched away, thereby avoiding the situation where the edge of the conductive layer is exposed during the subsequent etching process, so that under the action of plasma charging, electrons cannot pass through the conductive structure of the device and the plasma to form a conductive circuit, thereby avoiding the occurrence of the "sparking" phenomenon and improving the yield of the device.

[0041] In the following, in combination with the embodiments of the present application, a method for forming a semiconductor structure provided in the embodiments of the present application is described in detail.

[0042] Figure 2-Figure 4 The following is a schematic diagram of the structure corresponding to each step in the method for forming a semiconductor structure according to an embodiment of the present application. Since the "sparking" phenomenon occurs at the edge of the device, the following is an exemplary introduction to the edge structure corresponding to each step in the method for forming a semiconductor structure.

[0043] refer to Figure 2 , providing a substrate 100.

[0044] The substrate 100 is used to provide structural support for the device.

[0045] The material of the substrate 100 may be silicon. In other embodiments, the material of the substrate 100 may be, for example, one or more of silicon, germanium, silicon carbide, gallium arsenide, or indium gallium, or the substrate may be a silicon substrate on an insulator or a germanium substrate on an insulator. Those skilled in the art may select according to actual needs, and the embodiments of the present application are not limited thereto.

[0046] refer to Figure 3 , a dielectric layer 110 and a conductive layer 120 are sequentially formed on the substrate 100 .

[0047] The process for forming the dielectric layer 110 may include, but is not limited to, one or more of a chemical vapor deposition process, an atomic layer deposition process, a high-density plasma deposition process, a plasma enhanced deposition process, and a spin-on dielectric layer process. The material of the dielectric layer 110 includes, but is not limited to, silicon oxide, silicon nitride, aluminum oxide, or silicon oxynitride.

[0048] The step of sequentially forming a dielectric layer and a conductive layer on the substrate includes: forming a dielectric layer 110 on the substrate 100; forming a plurality of through holes 01 on the dielectric layer 110, wherein the through holes 01 penetrate the dielectric layer 110; forming conductive plugs filling the through holes 01; and forming a conductive layer 120 electrically connected to the conductive plugs.

[0049] In the embodiment of the present application, the conductive plug in the through hole 01 may be a tungsten plug, and the conductive layer 120 may be made of aluminum. The conductive plug and the conductive layer 120 may also be made of other materials known to those skilled in the art that can achieve electrical conductivity, and the embodiment of the present application does not limit this.

[0050] A patterned target mask layer is formed on the conductive layer, wherein the edge of the target mask layer at least partially exposes the edge of the conductive layer; based on the target mask layer, the area where the target mask layer exposes the conductive layer is removed, wherein the target mask layer also exposes part of the conductive layer in the middle area.

[0051] In the step of removing the target mask layer based on the target mask layer and exposing the conductive layer, an etching process may be used to remove the target mask layer and exposing the conductive layer. The etching process is one or both of a dry etching process and a wet etching process. That is, the etching process may be a dry etching process, a wet etching process, or an etching process combining dry and wet etching processes.

[0052] A patterned target mask layer is formed on the conductive layer, and then based on the target mask layer, the area of ​​the conductive layer exposed by the target mask layer is removed, so that the edge of the conductive layer is etched away, thereby avoiding the edge of the conductive layer being exposed during the subsequent etching process. Under the action of plasma charging, electrons cannot form a conductive circuit through the conductive structure of the device and the plasma, thereby avoiding the occurrence of the "sparking" phenomenon and improving the yield of the device.

[0053] The step of forming a patterned target mask layer on the conductive layer comprises: forming a target photoresist layer on the conductive layer; removing the photoresist at a preset distance from the edge of the target photoresist layer, and using the remaining target photoresist layer as the target mask layer. The preset distance is greater than 2 mm. In an embodiment of the present application, the preset distance is set to 2.2 mm. In a specific implementation, the photoresist edge removal EBR program can be set to 2.2 mm.

[0054] The steps of sequentially forming a dielectric layer and a conductive layer on the substrate, forming a patterned target mask layer on the conductive layer, and removing the target mask layer based on the target mask layer to expose the conductive layer are performed once as one cycle, wherein the cycle is repeated and the number of times the cycle is performed is at least twice.

[0055] That is to say, each time a conductive layer is formed, a patterned target mask layer needs to be formed on the conductive layer, and then based on the target mask layer, the target mask layer is removed to expose the area of ​​the conductive layer. By removing the target mask layer to expose the conductive layer, the edge of the conductive layer is etched away, thereby avoiding the situation where the edge of the conductive layer is exposed during the subsequent etching process, so that under the action of plasma charging, electrons cannot pass through the conductive structure of the device and the plasma to form a conductive circuit, thereby avoiding the occurrence of the "sparking" phenomenon and improving the yield of the device.

[0056] refer to Figure 4 A passivation layer 130 is formed on the side of the substrate 100 where the conductive layer 120 is formed, and the passivation layer 130 exposes a portion of the conductive layer 120. The material of the passivation layer 130 includes but is not limited to silicon oxide, silicon nitride, aluminum oxide or silicon oxynitride.

[0057] After forming the passivation layer 130 on the side of the substrate 100 with the conductive layer 120, the method further includes: patterning the passivation layer 130 so that the passivation layer 130 exposes a portion of the conductive layer 120. Exposing a portion of the conductive layer 120 can increase the contact area with an external circuit or element, thereby enhancing conductivity.

[0058] In the embodiment of the present application, by setting the preset distance to be greater than 2 mm, the edge of the conductive layer 120 can be etched away. Therefore, when the passivation layer 130 is etched, even if the edge of the passivation layer 130 is etched first, without the edge of the conductive layer 120 as a conductor, under the action of plasma charging, electrons cannot pass through the conductive structure of the device and the plasma to form a conductive circuit, thereby avoiding the occurrence of the "sparking" phenomenon.

[0059] It can be seen that a method for forming a semiconductor structure provided in an embodiment of the present application forms a patterned target mask layer on the conductive layer, and the edge of the target mask layer at least exposes a portion of the edge of the conductive layer; then, based on the target mask layer, the area where the target mask layer exposes the conductive layer is removed, so that the edge of the conductive layer is etched away, thereby avoiding the situation where the edge of the conductive layer is exposed during the subsequent etching process, so that under the action of plasma charging, electrons cannot pass through the conductive structure of the device and the plasma to form a conductive circuit, thereby avoiding the occurrence of the "sparking" phenomenon and improving the yield of the device.

[0060] In order to solve the aforementioned problem, an embodiment of the present application further provides a semiconductor structure, which is formed based on the semiconductor structure forming method as described above.

[0061] The above describes multiple implementation schemes provided by the embodiments of the present application. The various optional methods introduced in each implementation scheme can be combined and cross-referenced with each other without conflict, thereby extending a variety of possible implementation schemes, which can all be considered as implementation schemes disclosed and open in the embodiments of the present application.

[0062] Although the embodiments of the present application are disclosed above, the present application is not limited thereto. Any person skilled in the art may make various changes and modifications without departing from the spirit and scope of the present application. Therefore, the scope of protection of the present application shall be subject to the scope defined by the claims.

Claims

1. A method for forming a semiconductor structure, characterized in that: include: providing a substrate; forming a dielectric layer and a conductive layer in sequence on the substrate; forming a patterned target mask layer on the conductive layer, wherein an edge of the target mask layer at least partially exposes an edge of the conductive layer; Based on the target mask layer, removing the target mask layer to expose the region of the conductive layer; A passivation layer is formed on the side of the substrate where the conductive layer is formed.

2. The method according to claim 1, characterized in that The step of forming a patterned target mask layer on the conductive layer comprises: forming a target photolithography layer on the conductive layer; The photoresist at a preset distance from the edge of the target photoresist layer is removed, and the remaining target photoresist layer is used as the target mask layer.

3. The method according to claim 2, characterized in that The preset distance is greater than 2 mm.

4. The method according to claim 1, characterized in that The target mask layer also exposes a portion of the conductive layer in the middle region.

5. The method according to claim 1, characterized in that After forming a passivation layer on the side of the substrate where the conductive layer is formed, the method further comprises: The passivation layer is patterned so that the passivation layer exposes a portion of the conductive layer.

6. The method according to claim 1, characterized in that The step of sequentially forming a dielectric layer and a conductive layer on the substrate comprises: forming a dielectric layer on the substrate; forming a plurality of through holes on the dielectric layer, wherein the through holes penetrate the dielectric layer; forming a conductive plug filling the through hole; A conductive layer electrically connected to the conductive plug is formed.

7. The method according to claim 1, characterized in that The steps of sequentially forming a dielectric layer and a conductive layer on the substrate, forming a patterned target mask layer on the conductive layer, and removing the target mask layer based on the target mask layer to expose the conductive layer are performed once as one cycle, wherein the cycle is repeated and the number of times the cycle is performed is at least twice.

8. The method according to claim 1, characterized in that In the step of removing the target mask layer based on the target mask layer, the region where the target mask layer exposes the conductive layer is removed by an etching process.

9. The method according to claim 8, characterized in that The etching process is one or both of a dry etching process and a wet etching process.

10. A semiconductor structure, characterized in that: The semiconductor structure is formed based on the method for forming a semiconductor structure according to any one of claims 1 to 9.

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