Preparation method of brain-computer interface structure and brain-computer interface structure
By designing multi-layer structures and multi-layer signal transmission paths on brain-computer interface probes, the limitations of traditional probes in spatial resolution and multi-channel signal acquisition are solved, and more efficient neural signal acquisition and transmission are achieved.
Patent Information
- Application Number
- CN202411575720.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-05
- Publication Date
- 2025-03-14
- Estimated Expiration
- Not applicable · inactive patent
AI Technical Summary
The traditional silicon-based brain-computer interface probe design has limitations in spatial resolution and multi-channel signal acquisition, especially in complex neural networks, which cannot accurately detect neural activities in three-dimensional space.
The brain-computer interface design adopts a multi-layer structure. By setting the first and second electrodes on the first and second probes and connecting the electrodes at both ends with conductive columns, a multi-layer signal transmission path is formed to optimize signal acquisition and transmission.
It improves the spatial resolution, signal acquisition efficiency and transmission ability of neural signals, and can accurately record neural signals in three-dimensional space, which is suitable for long-term implantation.
Smart Images
Figure CN119627585A_ABST
Abstract
Description
Technical Field
[0001] The present invention belongs to the technical field of brain-computer interface, and in particular to a method for preparing a brain-computer interface structure and a brain-computer interface structure. Background Art
[0002] Brain-computer interface, sometimes also called "brain port" or "brain-computer fusion perception", is a direct connection pathway established between the human or animal brain (or brain cell culture) and external devices. As a multidisciplinary cross-technology, brain-computer interface has received widespread attention from scientific research and industry around the world.
[0003] At present, brain-computer interface systems are widely used in the fields of neuroscience, neural repair, cognitive research, etc., especially in recording and regulating neural activity. Traditional silicon-based brain-computer interface probes are usually designed and manufactured in a two-dimensional plane. Although they can realize the acquisition of neural signals to a certain extent, they have limitations in spatial resolution and multi-channel signal acquisition, especially in complex neural networks, and cannot accurately detect neural activity in three-dimensional space. Summary of the invention
[0004] The purpose of the embodiments of the present application is to provide a method for preparing a brain-computer interface structure, aiming to solve the problem of how to increase the application scope of the brain-computer interface structure.
[0005] To achieve the above purpose, the technical solution adopted in this application is:
[0006] In a first aspect, a method for preparing a brain-computer interface structure is provided, comprising the following steps:
[0007] Prepare a first probe, process the first probe on a first base layer and set a first electrode on the first probe;
[0008] Prepare a conductive column, deposit an intermediate layer on the first base layer, deposit a second base layer on the intermediate layer, and process a conductive column in the intermediate layer, wherein one end of the conductive column extends to the first base layer and is connected to the first electrode;
[0009] preparing a second probe, preparing a second probe on the second base layer and setting a second electrode on the second probe, wherein the second electrode is connected to the other end of the conductive column;
[0010] The middle layer surrounding the conductive pillar is removed to release and prepare a brain-computer interface structure.
[0011] In some embodiments, the step of preparing the first probe comprises:
[0012] S11: processing a first probe having a two-dimensional shape on the first base layer, and arranging the first electrode on the first probe;
[0013] S12: etching the first probe on the first base layer using an etching process according to the first probe having a two-dimensional shape.
[0014] In some embodiments, the first probe includes a first body and a first probe connected to the first body, the first electrode is arranged on the first body, and a first interface is provided on the first probe. The step of preparing the first probe also includes S13, and the S13 step includes: setting a lead, and the lead connects the first electrode and the first interface.
[0015] In some embodiments, the step of preparing the conductive pillars includes:
[0016] S21: processing a conductive path on the second base layer, wherein the conductive path passes through the middle layer and extends to the first probe;
[0017] S22: depositing a conductive material in the conductive channel to form the conductive column.
[0018] In some embodiments, the step of preparing the conductive pillar further includes: planarizing the surface of the intermediate layer, and then depositing the second base layer on the intermediate layer.
[0019] In some embodiments, the step of preparing the second probe comprises:
[0020] S31: processing a second probe with a two-dimensional shape on the second base layer, and arranging the second electrode on the second probe;
[0021] S32: etching the second probe on the second base layer using an etching process according to the two-dimensional shape of the second probe.
[0022] In some embodiments, the second probe includes a second body and a second probe connected to the second body, the second electrode is arranged on the second body, and a second interface is provided on the second probe. The step of preparing the second probe also includes S33, and the S33 step includes: setting a lead, and the lead connects the second electrode and the second interface.
[0023] In some embodiments, in the step of preparing the second probe, a protective layer is deposited on the second base layer and a surface of the protective layer is planarized.
[0024] In some embodiments, the method for preparing the brain-computer interface structure further comprises:
[0025] S41: Spin-coating photoresist on the first base layer, and grinding and thinning the protective layer:
[0026] S42: removing part of the intermediate layer through a wet etching process to obtain the brain-computer interface structure.
[0027] In a second aspect, a brain-computer interface structure is provided, which is prepared by the method for preparing the brain-computer interface structure.
[0028] The beneficial effects of the present application are: the brain-computer interface structure method can prepare a brain-computer interface structure, the brain-computer interface structure includes a first probe and a second probe, and the first probe and the second probe are arranged in multiple layers in space, and the multi-layer structure can optimize the signal acquisition and transmission of the first probe and the second probe. The two ends of the conductive column are respectively connected to the first electrode and the second electrode, which can realize the transmission of multi-layer signals, and effectively improve the spatial resolution, signal acquisition efficiency and transmission capacity of neural signals. BRIEF DESCRIPTION OF THE DRAWINGS
[0029] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the embodiments or exemplary technical descriptions will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.
[0030] Figure 1 is a schematic diagram of preparing a first probe in a two-dimensional state provided in an embodiment of the present application;
[0031] Figure 2 is a schematic structural diagram of a first probe provided in another embodiment of the present application;
[0032] Figure 3 is a schematic diagram of depositing an intermediate layer on a first probe provided by another embodiment of the present application;
[0033] Figure 4 is a schematic diagram of depositing a second base layer on an intermediate layer and processing a second probe in a two-dimensional state, provided by another embodiment of the present application;
[0034] Figure 5 is a schematic diagram of a structure of a conductive column prepared according to another embodiment of the present application;
[0035] Figure 6 is a schematic structural diagram of preparing a second probe provided in another embodiment of the present application;
[0036] Figure 7 is a schematic diagram of depositing a protective layer on a second substrate layer provided by another embodiment of the present application;
[0037] Figure 8 is a schematic diagram of a three-dimensional structure of a brain-computer interface structure provided by another embodiment of the present application;
[0038] Fig. 9 This is a flow chart of the method for preparing the brain-computer interface structure provided in this application.
[0039] Among them, the reference numerals in the figure are:
[0040] 100, brain-computer interface structure; 51, first base layer; 52, second base layer; 10, first probe; 11, first electrode; 12, first interface; 13, middle layer; 20, second probe; 30, conductive column; 60, protective layer; 21, second electrode; 22, second interface; 101, first body; 102, first probe; 201, second body; 202, second probe; DETAILED DESCRIPTION
[0041] In order to make the purpose, technical solution and advantages of the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present application.
[0042] It should be noted that when a component is referred to as being "fixed on" or "disposed on" another component, it may be directly on the other component or indirectly on the other component. When a component is referred to as being "connected to" another component, it may be directly or indirectly connected to the other component. The orientation or positional relationship indicated by the terms "upper", "lower", "left", "right", etc. is based on the orientation or positional relationship shown in the accompanying drawings, and is only for the convenience of description, and does not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present application. For ordinary technicians in this field, the specific meanings of the above terms can be understood according to the specific circumstances. The terms "first" and "second" are only used for the purpose of convenience of description, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features. The meaning of "multiple" is two or more, unless otherwise clearly and specifically defined.
[0043] See also Figures 1 to 8 , an embodiment of the present application provides a method for preparing a brain-computer interface structure, which is used to prepare a brain-computer interface structure 100.
[0044] See also Figures 1 to 3 , a method for preparing a brain-computer interface structure comprises the following steps:
[0045] S1: Prepare the first probe 10, process the first probe 10 on the first base layer 51 and set the first electrode 11 on the first probe 10; the material of the first base layer 51 can be a silicon-based material. The first probe 10 made of silicon-based material has excellent mechanical strength, implantation stability and biocompatibility, and can be suitable for long-term implantation in the human body. The material of the first electrode 11 can be a highly conductive material. The first electrode 11 made of a highly conductive material can effectively reduce signal transmission loss and ensure that the collected neural signal is of high quality.
[0046] See also Figures 1 to 8 , S2: Prepare a conductive column 30, deposit an intermediate layer 13 on the first substrate layer 51, and deposit a second substrate layer 52 on the intermediate layer 13, process the conductive column 30 in the intermediate layer 13, and one end of the conductive column 30 extends to the first substrate layer 51 and connects to the first electrode 11; it can be understood that the material of the conductive column 30 can be titanium nitride or tungsten, which has high conductivity and good corrosion resistance.
[0047] See also Figures 1 to 8 , S3: Prepare a second probe 20, prepare the second probe 20 on the second base layer 52 and set a second electrode 21 on the second probe 20, the second electrode 21 is connected to the other end of the conductive column 30; it can be understood that the material of the second base layer 52 can also be a silicon-based material, and the material of the second electrode 21 can also be a highly conductive material.
[0048] S4: removing the middle layer 13 surrounding the conductive pillar 30 to release and prepare the brain-computer interface structure 100 .
[0049] See also Figures 1 to 8 The brain-computer interface structure 100 method provided in the present application can prepare a brain-computer interface structure 100, and the brain-computer interface structure 100 includes a first probe 10 and a second probe 20, and the first probe 10 and the second probe 20 are arranged in multiple layers in space. The multi-layer structure can optimize the signal acquisition and transmission of the first probe 10 and the second probe 20. The two ends of the conductive column 30 are respectively connected to the first electrode 11 and the second electrode 21, which can realize the transmission of multi-layer signals, effectively improving the spatial resolution, signal acquisition efficiency and transmission capacity of neural signals.
[0050] It can be understood that the number of the first electrodes 11 and the number of the second electrodes 21 can be set to multiple, and the number of the conductive columns 30 is adapted to the number of the first electrodes 11 or the number of the second electrodes 21. In this embodiment, the number of the first electrodes 11 and the second electrodes 21 is set to four. In other embodiments, the selection can be made according to actual conditions, and there is no limitation here.
[0051] Optionally, the brain-computer interface structure 100 prepared in the embodiment of the present application is a three-dimensional silicon-based brain-computer interface structure 100. Through the three-dimensional structure setting and the application of silicon-based materials, the acquisition efficiency and spatial resolution of neural signals can be significantly improved. The brain-computer interface structure 100 can accurately record neural signals in three-dimensional space, has good biocompatibility, and is suitable for long-term implantation.
[0052] Alternatively, the highly conductive material may be platinum, gold or indium tin oxide;
[0053] Platinum (Pt) is a precious metal with high conductivity and good biocompatibility. Therefore, it is widely used in neural electrodes and other biomedical devices. It has the characteristics of high conductivity and corrosion resistance. It is relatively high and can effectively conduct neural signals, especially suitable for high-precision neural signal recording and transmission.
[0054] Gold is also a precious metal and is often used as a conductive material in microelectronic devices. It has the characteristics of extremely high conductivity, high biocompatibility and corrosion resistance.
[0055] Indium Tin Oxide (ITO) is a transparent conductive material with the following properties:
[0056] Conductivity and transparency: Although ITO's conductivity is not as good as gold and platinum, it is sufficient to meet most neural signal acquisition needs. At the same time, its transparency helps to integrate optical measurement with electrical signal acquisition.
[0057] Low resistance: ITO has low resistance, which can reduce the loss caused by resistance during signal transmission and help improve signal accuracy.
[0058] Wear resistance and chemical stability: ITO has a certain degree of chemical stability in biological environments, but its corrosion resistance is not as good as platinum and gold, so it is usually suitable for short-term implant applications or in combination with other materials.
[0059] Lower cost: Compared with precious metals, ITO materials are relatively cheap and suitable for large-scale production and application.
[0060] See also Figures 1 to 8 In some embodiments, the step of preparing the first probe 10 includes:
[0061] S11: Processing a first probe 10 in a two-dimensional shape on the first substrate layer 51, and arranging a first electrode 11 on the first probe 10; using MEMS technology to first process the first probe 10 in a two-dimensional state on the first substrate layer 51, the first probe 10 in a two-dimensional state has a certain thickness, and then arranging the first electrode 11 on the first probe 10 in a two-dimensional state.
[0062] S12: Etching the first probe 10 on the first base layer 51 according to the two-dimensional shape of the first probe 10 by using an etching process; the etching depth is greater than the thickness of the first probe 10 in the two-dimensional state. Optionally, the etching depth can be 3 times the thickness of the first probe 10 in the two-dimensional state, so as to facilitate the subsequent release of the first probe 10.
[0063] Optionally, the first probe 10 is manufactured by an etching process so that the shape and size of the first probe 10 can be precisely controlled. The etching process has high resolution and can reduce manufacturing errors, thereby improving the dimensional accuracy of the first probe 10. After the first probe 10 in a two-dimensional state is prepared, the first electrode 11 is arranged to ensure the precise positioning of the first electrode 11 and improve the stability and reliability of signal acquisition.
[0064] See also Figures 1 to 8 In some embodiments, the first probe 10 includes a first body 101 and a first probe 102 connected to the first body 101, the first electrode 11 is arranged on the first body 101, and the first probe 102 is provided with a first interface 12. The step of preparing the first probe also includes S13. The S13 step also includes: setting a lead, the lead connecting the first electrode 11 and the first interface 12, and the first interface 12 can be connected to an external connector signal.
[0065] Optionally, two first probes 102 are arranged at intervals, and each first probe 102 is provided with two first interfaces 12, and each first interface 12 is respectively connected to each first electrode 11. The first interface 12 on the first probe 102 provides a more flexible external connection mode, facilitates integration and debugging with an external connector, and improves the compatibility of the probe.
[0066] See also Figures 1 to 8 In some embodiments, the step of preparing the conductive pillar 30 includes:
[0067] S21: processing a conductive path on the second base layer 52, the conductive path passing through the middle layer 13 and extending to the first probe 10;
[0068] S22 : depositing a conductive material in the conductive channel to form a conductive pillar 30 .
[0069] Optionally, a conductive channel connected to the first probe 10 can be etched on the second base layer 52 by steps such as photolithography and etching. Titanium nitride or tungsten is then deposited in the conductive channel, and then the titanium nitride or tungsten on the surface of the second base layer 52 is ground off by a chemical mechanical polishing process. It is understandable that the photolithographic position of the conductive channel is determined by the position of the first electrode 11, and alignment is required during the photolithography process. The conductive material deposited in the conductive channel can ensure low-loss transmission of the signal and improve the overall transmission efficiency of the brain-computer interface structure 100.
[0070] See also Figures 1 to 8 In some embodiments, the step of preparing the conductive pillar 30 further includes: planarizing the surface of the intermediate layer 13 , and then depositing a second base layer 52 on the intermediate layer 13 .
[0071] Optionally, a certain thickness of silicon dioxide is deposited on the first base layer 51 and boron and phosphorus are injected to form an intermediate layer 13, wherein the intermediate layer 13 has a BPSG layer, and then the surface of the intermediate layer 13 is planarized using a CMP process, and then a certain thickness of silicon, silicon dioxide or silicon nitride is deposited on the intermediate layer 13 to prepare a second probe 20.
[0072] Optionally, the surface of the intermediate layer 13 is planarized to ensure that the second base layer 52 deposited thereon has good adhesion and uniformity, which can not only improve the structural stability between layers, but also reduce process defects and reduce the production defect rate of the brain-computer interface structure 100.
[0073] See also Figures 1 to 8 In some embodiments, the step of preparing the second probe 20 includes:
[0074] S31: Processing a second probe 20 in a two-dimensional shape on the second substrate layer 52, and arranging a second electrode 21 on the second probe 20; using MEMS technology to first process the second probe 20 in a two-dimensional state on the second substrate layer 52, the second probe 20 in a two-dimensional state has a certain thickness, and then arranging the second electrode 21 on the second probe 20 in a two-dimensional state.
[0075] S32: According to the second probe 20 in a two-dimensional shape, an etching process is used to etch the second probe 20 on the second base layer 52. The etching depth is greater than the thickness of the second probe 20 in a two-dimensional state. Optionally, the etching depth can be 3 times the thickness of the second probe 20 in a two-dimensional state, so as to facilitate the subsequent release of the second probe 20.
[0076] Optionally, the second probe 20 is manufactured by an etching process so that the shape and size of the second probe 20 can be precisely controlled. The etching process has high resolution and can reduce manufacturing errors, thereby improving the dimensional accuracy of the second probe 20. After the second probe 20 in a two-dimensional state is prepared, the second electrode 21 is arranged to ensure the precise positioning of the second electrode 21 and improve the stability and reliability of signal acquisition.
[0077] Optionally, the dual-probe structure can effectively improve the spatial resolution and coverage of signal acquisition, and is suitable for simultaneously monitoring multiple neural areas or performing multi-point electrical stimulation. After the brain-computer interface structure 100 is implanted in the cerebral cortex, neural signal acquisition in cortical areas at different depths can be achieved.
[0078] Each first electrode 11 is connected to each conductive column 30, and each second electrode 21 is connected to each conductive column 30, respectively, ensuring that each first electrode 11 and each second electrode 21 has an independent electrical signal transmission system, reducing signal interference and attenuation, and enhancing the flexibility and stability of the system during neural signal acquisition and processing.
[0079] See also Figures 1 to 9 In some embodiments, the second probe 20 includes a second body 201 and a second probe 202 connected to the second body 201, the second electrode 21 is arranged on the second probe 20 body, and the second probe 202 is provided with a second interface 22, and the step of preparing the second probe also includes S33, and the S33 step includes: setting a lead wire, and the lead wire connects the second electrode 21 and the second interface 22. The second interface 22 can be connected to an external connector signal.
[0080] Optionally, two second probes 202 are arranged at intervals, and each second probe 202 is provided with two second interfaces 22, and each second interface 22 is respectively connected to each second electrode 21. The second interface 22 on the second probe 202 provides a more flexible external connection mode, facilitates integration and debugging with an external connector, and improves the compatibility of the probe.
[0081] See also Figures 1 to 8 In some embodiments, in the step of preparing the second probe 20 , a protective layer 60 is deposited on the second base layer 52 and a surface of the protective layer 60 is planarized.
[0082] Optionally, a certain thickness of silicon dioxide is deposited on the second base layer 52 and boron and phosphorus are injected to form a protective layer 60, wherein the protective layer 60 has a BPSG layer, and then the surface of the protective layer 60 is planarized using a CMP process. The protective layer 60 can effectively improve the durability of the second probe 20, prevent the second probe 20 from being affected by the external environment during the implantation process, and extend the service life of the probe.
[0083] See also Figures 1 to 8 In some embodiments, the method for preparing the brain-computer interface structure further comprises:
[0084] S41: Spin-coat photoresist on the first base layer 51, and grind and thin the protective layer 60 using a back grinding technique until the BPSG layer is exposed, with a certain loss of the BPSG layer.
[0085] S42 : removing a portion of the intermediate layer 13 by a wet etching process to obtain a brain-computer interface structure 100 , and a portion of the intermediate layer 13 remains on the first probe 10 .
[0086] It can be understood that the surface of the first base layer 51 on which the first probe 10 is prepared is the front side, and the surface facing away from the front side is the back side. Thinning the back side of the protective layer 60 can reduce the overall thickness, making it more flexible when implanted in brain tissue.
[0087] Please refer to Figure 8 The present invention also proposes a brain-computer interface structure 100, which is prepared by the above-mentioned brain-computer interface structure preparation method, and therefore also has all the beneficial effects brought by the technical solutions of the above-mentioned embodiments, which will not be described one by one here.
[0088] The brain-computer interface structure 100 provided in the present application significantly improves the spatial resolution and acquisition efficiency of neural signals through the arrangement of three-dimensional electrode arrays and the application of silicon-based materials. The brain-computer interface structure 100 has good biocompatibility and implant stability, and is suitable for various application scenarios in brain-computer interface systems.
[0089] The first probe 10 and the second probe 20 are respectively provided with a first electrode 11 and a second electrode 21, which can simultaneously record neural signals at multiple depths and positions. The first electrode 11 and the second electrode 21 are both made of highly conductive materials (such as platinum, gold or indium tin oxide) to ensure high efficiency and stability of signal transmission.
[0090] Each of the first electrode 11 and the second electrode 21 is connected to an external connector via an independent signal transmission channel. The signal transmission channel adopts a low impedance design to reduce signal attenuation and interference.
[0091] The brain-computer interface structure 100 can be applied to neural signal acquisition and stimulation applications in different brain regions such as the cerebral cortex, basal ganglia, hippocampus, etc. It can simultaneously acquire neural signals at different depths, has good mechanical strength and signal transmission performance, and is suitable for long-term neural monitoring and regulation.
[0092] The above are only optional embodiments of the present application and are not intended to limit the present application. For those skilled in the art, the present application may have various changes and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application should be included in the scope of the claims of the present application.
Claims
1. A method for preparing a brain-computer interface structure, characterized in that: The steps include: Prepare a first probe, process the first probe on a first base layer and set a first electrode on the first probe; Prepare a conductive column, deposit an intermediate layer on the first base layer, deposit a second base layer on the intermediate layer, and process a conductive column in the intermediate layer, wherein one end of the conductive column extends to the first base layer and is connected to the first electrode; preparing a second probe, preparing a second probe on the second base layer and setting a second electrode on the second probe, wherein the second electrode is connected to the other end of the conductive column; The middle layer surrounding the conductive pillar is removed to release and prepare a brain-computer interface structure.
2. The method for preparing a brain-computer interface structure according to claim 1, characterized in that: The step of preparing the first probe comprises: S11: processing a first probe having a two-dimensional shape on the first base layer, and arranging the first electrode on the first probe; S12: etching the first probe on the first base layer using an etching process according to the first probe having a two-dimensional shape.
3. The method for preparing a brain-computer interface structure according to claim 1, characterized in that: The first probe includes a first body and a first probe connected to the first body, the first electrode is arranged on the first body, and a first interface is provided on the first probe. The step of preparing the first probe also includes S13, and the S13 step includes: setting a lead, and the lead connects the first electrode and the first interface.
4. The method for preparing a brain-computer interface structure according to claim 1, characterized in that: The step of preparing the conductive column comprises: S21: processing a conductive path on the second base layer, wherein the conductive path passes through the middle layer and extends to the first probe; S22: depositing a conductive material in the conductive channel to form the conductive column.
5. The method for preparing a brain-computer interface structure according to claim 1, characterized in that: The step of preparing the conductive pillars also includes: planarizing the surface of the intermediate layer, and then depositing the second base layer on the intermediate layer.
6. The method for preparing a brain-computer interface structure according to claim 1, characterized in that: The step of preparing the second probe comprises: S31: processing a second probe with a two-dimensional shape on the second base layer, and arranging the second electrode on the second probe; S32: etching the second probe on the second base layer using an etching process according to the two-dimensional shape of the second probe.
7. The method for preparing a brain-computer interface structure according to claim 1, characterized in that: The second probe includes a second body and a second probe connected to the second body, the second electrode is arranged on the second body, and a second interface is provided on the second probe. The step of preparing the second probe also includes S33, and the S33 step includes: setting a lead, and the lead connects the second electrode and the second interface.
8. The method for preparing a brain-computer interface structure according to claim 6, characterized in that: In the step of preparing the second probe, a protective layer is deposited on the second base layer and a surface of the protective layer is planarized.
9. The method for preparing a brain-computer interface structure according to claim 8, characterized in that: The method for preparing the brain-computer interface structure also includes: S41: Spin-coating photoresist on the first base layer, and grinding and thinning the protective layer: S42: removing part of the intermediate layer through a wet etching process to obtain the brain-computer interface structure.
10. A brain-computer interface structure, characterized in that: Prepared by the method for preparing a brain-computer interface structure as described in any one of claims 1-9.