High-bandwidth multi-path motor driving device with online upgrading capability

Abstract

The embodiment of the invention relates to the technical field of photoelectric detection, and discloses a high-bandwidth multi-path motor driving device with online upgrading capability, which comprises a sensor signal acquisition unit, an FPGA (Field Programmable Gate Array) unit, a DSP (Digital Signal Processor) unit, an optical coupler isolation unit, a motor driving unit and a communication unit, the FPGA unit acquires multiple paths of sensor signals in parallel through the sensor signal acquisition unit; the DSP unit is used for calculating a closed-loop control instruction driven by multiple paths of motors on the basis of multiple paths of sensor signals and outputting enabling and direction signals of the multiple paths of motors; the FPGA unit is used for converting the enabling and direction signals of the multi-path motor into sequential control signals of the multi-path motor; the optocoupler isolation unit performs optocoupler isolation on sequential control signals of multiple paths of motors; the motor driving unit converts the sequential control signals of the multiple paths of motors after optical coupling isolation into driving signals of the multiple paths of motors; and the communication unit communicates with an upper computer and receives the upgrading instruction and the upgrading file so as to carry out online upgrading.

Description

Technical Field

[0001] Embodiments of the present application relate to the field of photoelectric detection technology, and in particular to a high-bandwidth multi-channel motor drive device with online upgrade capability. Background Art

[0002] Photoelectric detection equipment is a complex of technologies involving multiple fields such as light and electricity. Photoelectric detection equipment often contains multiple servo control loops and multiple motors. Modular motor drivers generally use MCU (Microcontroller Unit) or DSP (Digital Signal Processor) as the core control chip, matching related interface circuits and drive circuits to realize motor drive functions. Such motor drivers have problems such as limited operation by the serial processing capability of the control chip, limited control bandwidth, low flexibility, and a small number of drive motors.

[0003] With the continuous improvement of the performance requirements of photoelectric detection equipment and the continuous increase in the demand for miniaturization and lightweight products, products need to continuously improve their integration. The current motor driver is large in size and can only control one motor. At the same time, in order to reduce costs, sensor signal acquisition and motor drive voltage and current signal acquisition are all collected through the A / D conversion circuit of the MCU or DSP. The accuracy is relatively low, which is not conducive to achieving high-precision control of the servo control system.

[0004] Using multiple motor drivers in conjunction with the system servo control board for motor driving can achieve motion control of the servo control system of the photoelectric detection equipment to a certain extent, but the servo control board cannot obtain the control results of the current loop (torque loop) in real time, which is not conducive to improving the control accuracy and control bandwidth of the current loop. Generally speaking, PWM (Pulse Width Modulation) is used to transmit control instructions between the servo control board and the motor driver, and this transmission method will also have certain instruction transmission errors. The above situations are not conducive to the realization of high-performance servo control systems, which greatly limits the further improvement of the control system performance. Summary of the invention

[0005] In view of this, the embodiments of the present application propose a high-bandwidth multi-channel motor drive device with online upgrade capability, which can meet the requirements of photoelectric detection equipment for integration and miniaturization, and has online upgrade capability, which can effectively reduce product maintenance costs.

[0006] To achieve the above-mentioned purpose, an embodiment of the present application provides a high-bandwidth multi-channel motor drive device with online upgrade capability, the motor drive device comprising: a sensor signal acquisition unit, an FPGA unit, a DSP unit, an optocoupler isolation unit, a motor drive unit and a communication unit; the FPGA unit is used to instantiate the sensor signal acquisition unit and the motor drive unit, and collect multiple sensor signals in parallel through the sensor signal acquisition unit, and transmit them to the DSP unit through the X1TNF port; the DSP unit is used to calculate the closed-loop control instructions of the multi-channel motor drive in sequence based on the multiple sensor signals, and output the enable and direction signals of the multiple motors to the FPGA unit; the FPGA unit is also used to convert the enable and direction signals of the multiple motors into timing control signals of the multiple motors, and input them to the optocoupler isolation unit; the optocoupler isolation unit is used to perform optocoupler isolation on the timing control signals of the multiple motors and transmit them to the motor drive unit; the motor drive unit is used to convert the timing control signals of the multiple motors after optocoupler isolation into drive signals of the multiple motors respectively, and output them to the corresponding motors; the communication unit is used to communicate with the host computer, receive upgrade instructions and upgrade files, so as to perform online upgrade of the FPGA unit and / or the DSP unit.

[0007] To achieve the above-mentioned purpose, an embodiment of the present application also provides a high-bandwidth multi-channel motor driving method with online upgrade capability, and the method includes the following steps: parallel acquisition of multi-channel sensor signals; calculation of closed-loop control instructions for multi-channel motor driving in sequence based on the multi-channel sensor signals to obtain enable and direction signals of the multi-channel motors; conversion of the enable and direction signals of the multi-channel motors into timing control signals of the multi-channel motors; optical coupling isolation of the timing control signals of the multi-channel motors, and then conversion of the timing control signals of the multi-channel motors after optical coupling isolation into drive signals of the multi-channel motors, and outputting them to corresponding motors; and real-time reception of upgrade instructions and upgrade files for online upgrade.

[0008] To achieve the above-mentioned purpose, an embodiment of the present application also provides an electronic device, comprising: at least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor so that the at least one processor can execute a high-bandwidth multi-channel motor driving method with online upgrade capability as described above.

[0009] To achieve the above objectives, an embodiment of the present application further provides a computer-readable storage medium storing a computer program, which, when executed by a processor, can implement a high-bandwidth multi-channel motor driving method with online upgrade capability as described above.

[0010] The embodiment of the present application provides a high-bandwidth multi-channel motor drive device with online upgrade capability, which makes full use of the DSP, FPGA, high-precision multi-channel A / D conversion chip and other device resources of the servo control board, realizes multi-channel and multiple motor drive capabilities through the parallel capability of FPGA, and has the advantage of flexible configuration. The acquisition of sensor signals of multi-channel motors through FPGA can reduce the occupation of DSP computing resources by repetitive simple calculation operations, and use more resources for closed-loop calculation of servo control system, thereby improving the control bandwidth of the system. By setting a communication unit to communicate with the host computer, receiving upgrade instructions and upgrade files, the online upgrade of DSP and FPGA can be realized, which can meet the requirements of product in-situ upgrade and improve the maintainability of the product.

[0011] In some optional embodiments, the FPGA unit includes an FPGA circuit, a clock and related configuration circuits; the DSP unit includes a DSP circuit, a clock and related configuration circuits; the communication unit includes an RS422 transceiver circuit, and can expand the CAN bus circuit; the motor drive unit includes a half-bridge drive circuit, a MOSFET circuit, an under-voltage and over-voltage protection circuit and an over-current protection circuit.

[0012] In some optional embodiments, the motor drive device further includes a storage unit, which includes a RAM, a FLASH circuit and an EEPROM circuit that are compatible with the DSP unit, and a PROM circuit that is compatible with the FPGA unit.

[0013] In some optional embodiments, the motor drive device also includes a power conversion unit, which includes a conversion circuit for converting an external +28V power supply into +15V, +5V, +3.3V, +2.5V, +1.8V and +1.2V power supplies, and related filtering circuits.

[0014] In some optional embodiments, DSP software is provided in the DSP unit, and the DSP software is used to configure the control instruction calculation cycle in a targeted manner according to the characteristics of different motors, increase the control instruction calculation cycle for low-speed, low-precision control loops, and reduce the control instruction calculation cycle for high-speed, high-precision control loops.

[0015] In some optional embodiments, during the DSP software upgrade process, the DSP unit writes the received upgrade file into the FLASH matched with the DSP unit through the upgrade instruction, completes the burning of the DSP software upgrade file, and then completes the upgrade of the DSP software.

[0016] In some optional embodiments, during the FPGA logic upgrade process, the IO port of the DSP unit is used to simulate JTAG timing to communicate with the FPGA configuration chip, and the FPGA logic upgrade file is written into the FPGA configuration chip to complete the FPGA logic upgrade. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] One or more embodiments are exemplarily described by the pictures in the corresponding drawings, and these exemplary descriptions do not constitute limitations on the embodiments.

[0018] Figure 1 It is a structural schematic diagram of a high-bandwidth multi-channel motor driving device with online upgrade capability provided in one embodiment of the present application;

[0019] Figure 2 is a schematic diagram of main signals in a high-bandwidth multi-channel motor drive device with online upgrade capability provided in one embodiment of the present application;

[0020] Figure 3 is a structural schematic diagram of a motor drive unit provided in an embodiment of the present application;

[0021] Figure 4 is a schematic diagram of a dual-channel motor control example provided in an embodiment of the present application;

[0022] Figure 5 is a schematic diagram of a circuit related to online upgrading provided in one embodiment of the present application;

[0023] Figure 6 is an online upgrade software execution flow chart provided in one embodiment of the present application;

[0024] Figure 7 Another embodiment of the present application provides a flow chart of a high-bandwidth multi-channel motor driving method with online upgrade capability;

[0025] Figure 8 It is a structural schematic diagram of an electronic device provided by another embodiment of the present application. DETAILED DESCRIPTION

[0026] To make the purpose, technical scheme and advantages of the embodiments of the present application clearer, the embodiments of the present application will be described in detail below in conjunction with the accompanying drawings. However, it will be appreciated by those skilled in the art that in the present application, many technical details are proposed in order to enable the reader to better understand the present application. However, even without these technical details and various changes and modifications based on the following embodiments, the technical scheme claimed in the present application can also be implemented. The division of the following embodiments is for the convenience of description, and the specific implementation of the present application should not be construed as any limitation, and the various embodiments can be combined and referenced with each other under the premise of no contradiction.

[0027] An embodiment of the present application proposes a high-bandwidth multi-channel motor drive device with online upgrade capability. The implementation details of the high-bandwidth multi-channel motor drive device with online upgrade capability proposed in this embodiment are described in detail below. The following content is only the implementation details provided for the convenience of understanding and is not necessary for the implementation of this solution.

[0028] The specific structure of the high-bandwidth multi-channel motor driving device with online upgrade capability proposed in this embodiment can be as follows: Figure 1 As shown, it includes: a sensor signal acquisition unit 11, an FPGA unit 12, a DSP unit 13, an optical coupling isolation unit 14, a motor drive unit 15 and a communication unit 16.

[0029] The FPGA unit 12 is used to instantiate the sensor signal acquisition unit 11 and the motor drive unit 15, and collects multiple sensor signals in parallel through the sensor signal acquisition unit 11, and transmits them to the DSP unit 13 through the XITNF port. The DSP unit 13 is used to calculate the closed-loop control instructions of the multiple motor drives in sequence based on the multiple sensor signals, and output the enable and direction signals of the multiple motors to the FPGA unit 12. The FPGA unit 12 is also used to convert the enable and direction signals of the multiple motors into the timing control signals of the multiple motors, and input them to the optocoupler isolation unit 14. The optocoupler isolation unit 14 is used to perform optocoupler isolation on the timing control signals of the multiple motors and transmit them to the motor drive unit 15. The motor drive unit 15 is used to convert the timing control signals of the multiple motors after optocoupler isolation into the drive signals of the multiple motors, and output them to the corresponding motors. The communication unit 16 is used to communicate with the host computer, receive upgrade instructions and upgrade files, and perform online upgrades of the FPGA unit and / or DSP unit.

[0030] The functions of each module of the motor drive device are described in detail below based on the signal flow. The main signals in a high-bandwidth multi-channel motor drive device with online upgrade capability proposed in this embodiment can be as follows Figure 2 shown.

[0031] The sensor signal acquisition unit is respectively connected to various sensors of the multi-channel motors. After being instantiated by the FPGA unit, the sensor signals of the multi-channel motors (ie, multi-channel sensor signals) can be acquired in parallel and input into the FPGA unit.

[0032] The FPGA unit includes FPGA circuits, clocks, and related configuration circuits, which mainly realize the parallel acquisition and processing of sensor signals and drive circuit voltage and current signals, as well as the parallel output of control signals of various motors. Since FPGA has rich interface resources, it can meet the parallel control signal output of multiple motors during use. The FPGA unit collects multiple sensor signals in parallel through the sensor signal acquisition unit, and can pass the multiple sensor signals to the DSP unit through the XITNF port, waiting for the response of the DSP unit.

[0033] The DSP unit includes DSP circuits, clocks and related configuration circuits, which mainly realize the servo control algorithm execution function. When the DSP unit receives multi-channel sensor signals, it can execute the servo control algorithm, and calculate the closed-loop control instructions of multi-channel motor drives in sequence based on the multi-channel sensor signals, thereby obtaining the enable and direction signals of the multi-channel motors, and then transmit them to the FPGA unit through the XITNF port.

[0034] It is understandable that in addition to reading sensor information through the XINTF interface and writing control instructions to the FPGA, the DSP unit only needs to execute the closed-loop control algorithm, which effectively improves the execution efficiency of the DSP control algorithm, reduces the calculation cycle, and is conducive to improving the control system bandwidth.

[0035] After receiving the enable and direction signals of multiple motors, the FPGA unit needs to convert the enable and direction signals of multiple motors into timing control signals of multiple motors and input them into the optocoupler isolation unit. Taking two motors as an example, the FPGA unit can convert the enable and direction signals of the two motors into the timing control signals of A+, A-, B+, and B- for the two motors.

[0036] After receiving the timing control signals of multiple motors, the optocoupler isolation unit can perform optocoupler isolation on the timing control signals of the multiple motors to avoid mutual contamination of the timing control signals of the multiple motors. After completing the optocoupler isolation, the timing control signals of the multiple motors after optocoupler isolation are transmitted to the motor drive unit.

[0037] The specific structure of the motor drive unit can be as follows Figure 3 As shown, it includes a half-bridge drive circuit, a MOSFET circuit, an undervoltage and overvoltage protection circuit, and an overcurrent protection circuit. The motor drive unit converts the timing control signals of the multiple motors after optical coupling isolation into drive signals of the multiple motors, and outputs them to the corresponding motors to realize multi-channel motor drive.

[0038] The communication unit includes an RS422 transceiver circuit and can expand the CAN bus circuit when necessary. The communication unit communicates with the host computer (or main control CPU) through the RS422 interface to receive upgrade instructions and upgrade files, thereby performing online upgrades of the FPGA unit and / or DSP unit.

[0039] In one example, Figure 4 A dual-channel motor control example is demonstrated. The two-channel motor control loop is a reference example. The two-channel motor and sensor can be expanded to multiple-channel motor and sensor. The motor is not limited to a stepper motor, and the sensor is not limited to an SSI interface sensor.

[0040] In an example, Figure 1 As shown, the motor drive device further includes a storage unit 17 , which includes a RAM, a FLASH circuit and an EEPROM circuit that are matched with the DSP unit 13 , and a PROM circuit that is matched with the FPGA unit 12 .

[0041] In an example, Figure 1 As shown, the motor drive device also includes a power conversion unit 18, which includes a conversion circuit for converting an external +28V power supply into +15V, +5V, +3.3V, +2.5V, +1.8V and +1.2V power supplies, as well as related filtering circuits.

[0042] In an example, Figure 1 As shown, the motor drive device further includes an indicator light unit 19 for indicating the working state of the motor drive device.

[0043] In one example, the DSP unit is provided with DSP software, and the DSP software is used to configure the control instruction calculation cycle in a targeted manner according to the characteristics of different motors, increase the control instruction calculation cycle for low-speed, low-precision control loops, and reduce the control instruction calculation cycle for high-speed, high-precision control loops.

[0044] In one example, the circuitry for online upgrading can be as follows: Figure 5 As shown, the online upgrade software execution process can be as follows Figure 6 As shown. During the DSP software upgrade process, the DSP unit writes the received upgrade file into the FLASH matched with the DSP unit through the upgrade instruction, completes the burning of the DSP software upgrade file, and then completes the upgrade of the DSP software. During the FPGA logic upgrade process, the IO port of the DSP unit is used to simulate the JTAG timing to communicate with the FPGA configuration chip, write the FPGA logic upgrade file into the FPGA configuration chip, and complete the upgrade of the FPGA logic.

[0045] The FPGA configuration chip JTAG interface and the FPGA chip JTAG interface are led out separately, and the two are no longer directly connected, and an anti-interference circuit is added. This solution can ensure the independence and reliability of the online upgrade process and FPGA work. When it is necessary to use an emulator to burn, the emulator can be used to connect to the FPGA configuration chip JTAG interface for burning. When it is necessary to use an emulator to cooperate with FPGA for real-time simulation testing, the emulator can be used to connect to the FPGA chip JTAG interface for work, and the two do not interfere with each other.

[0046] The servo control software runs in the DSP unit, and the simulator is used for the first time to complete the startup software burning.

[0047] After power-on, the loader starts from FLASH and responds to the programming command timer interrupt.

[0048] Determine whether there is a correct configuration flag for the configuration item, and determine whether the application has been burned normally. If there is no correct application, wait for the burning command. If there is a normal application, enter the main program execution task cycle to query whether there is a burning command.

[0049] Until the software / logic burning instruction is received, stop other tasks and enter the software / logic upgrade branch.

[0050] Take the DSP software upgrade branch as an example. Erase the DSP's FLASH by sector, keep the sector 0 where the burning code is located, receive the burning file in interrupt mode, verify the upgrade code, and feedback the receiving status. If the verification is normal, it can be written into the DSP flash, and the burning status will be fed back to the DSP. After the upgrade file transfer and burning process are completed, the newly burned application can be booted and run for testing.

[0051] In the FPGA logic branch, the upgrade file transfer process is basically the same as the DSP software upgrade branch. In the burning process, the DSP's IO port is used to simulate the FPGA configuration chip JTAG interface timing (meeting the IEEE1194.1 protocol requirements), the configuration chip storage area is erased, and the upgrade file is written into the configuration chip to complete the logic upgrade.

[0052] This embodiment makes full use of the DSP, FPGA, high-precision multi-channel A / D conversion chip and other device resources of the servo control board, realizes multi-channel and multiple motor driving capabilities through the parallel capability of FPGA, has the advantage of flexible configuration, and realizes the acquisition of sensor signals of multiple motors through FPGA, which can reduce the occupation of DSP computing resources by repetitive simple calculation operations, and use more resources for closed-loop calculation of servo control system, thereby improving the control bandwidth of the system. By setting up a communication unit to communicate with the host computer, receiving upgrade instructions and upgrade files, the online upgrade of DSP and FPGA can be realized, which can meet the requirements of product in-situ upgrade and improve the maintainability of the product.

[0053] It is worth mentioning that all modules involved in this embodiment are logic modules. In practical applications, a logic unit can be a physical unit, a part of a physical unit, or a combination of multiple physical units. In addition, in order to highlight the innovative part of this application, this embodiment does not introduce units that are not closely related to solving the technical problems proposed by this application, but this does not mean that there are no other units in this embodiment.

[0054] Another embodiment of the present application proposes a high-bandwidth multi-channel motor driving method with online upgrade capability. The implementation details of the high-bandwidth multi-channel motor driving method with online upgrade capability proposed in this embodiment are specifically described below. The following content is only for the convenience of understanding the implementation details provided, and is not necessary for the implementation of this solution. The specific process of the high-bandwidth multi-channel motor driving method with online upgrade capability proposed in this embodiment can be as follows Figure 7 As shown, including:

[0055] Step 201: Collect multiple sensor signals in parallel.

[0056] Step 202 , based on the multi-channel sensor signals, the closed-loop control instructions for driving the multi-channel motors are calculated in sequence to obtain the enable and direction signals of the multi-channel motors.

[0057] Step 203, converting the enable and direction signals of the multiple motors into timing control signals of the multiple motors.

[0058] Step 204 , performing optical coupling isolation on the timing control signals of the multiple motors, and then converting the timing control signals of the multiple motors after optical coupling isolation into driving signals of the multiple motors, and outputting them to the corresponding motors.

[0059] Step 205: Receive the upgrade instruction and upgrade file in real time to perform online upgrade.

[0060] The step division of the above methods is only for clear description. When implemented, they can be combined into one step or some steps can be split and decomposed into multiple steps. As long as they include the same logical relationship, they are all within the scope of protection of this application; adding insignificant modifications to the algorithm or process or introducing insignificant designs without changing the core design of the algorithm and process are all within the scope of protection of this application.

[0061] It is not difficult to find that this embodiment is a method embodiment corresponding to the above embodiment, and this embodiment can be implemented in conjunction with the above embodiment. The technical details and technical effects mentioned in the above embodiment are still valid in this embodiment, and in order to reduce repetition, they are not repeated here. Accordingly, the technical details mentioned in this embodiment can also be applied in the above embodiment.

[0062] Another embodiment of the present application provides an electronic device, whose specific structure can be as follows: Figure 8 As shown, it includes: at least one processor 301; and a memory 302 that is communicatively connected to the at least one processor 301; wherein the memory 302 stores instructions that can be executed by the at least one processor 301, and the instructions are executed by the at least one processor 301 so that the at least one processor 301 can execute a high-bandwidth multi-channel motor driving method with online upgrade capability as described in the above-mentioned method embodiments.

[0063] The memory and the processor are connected by a bus, which may include any number of interconnected buses and bridges, and the bus connects various circuits of one or more processors and memories together. The bus can also connect various other circuits such as peripherals, voltage regulators, and power management circuits, which are well known in the art and are not further described herein. The bus interface provides an interface between the bus and the transceiver. The transceiver can be one element or multiple elements, such as multiple receivers and transmitters, providing a unit for communicating with various other devices on a transmission medium.

[0064] The processor is responsible for managing the bus and general processing, and can also provide various functions, including timing, peripheral interfaces, voltage regulation, power management, and other control functions. Memory can be used to store data used by the processor when performing operations.

[0065] Another embodiment of the present application provides a computer-readable storage medium storing a computer program. When the computer program is executed by a processor, it can implement a high-bandwidth multi-channel motor driving method with online upgrade capability as described in the above method embodiments.

[0066] That is, those skilled in the art can understand that all or part of the steps in the above-mentioned embodiment method can be completed by instructing the relevant hardware through a program, and the program is stored in a storage medium, including a number of instructions to enable a device (which can be a single-chip microcomputer, chip, etc.) or a processor to execute all or part of the steps of the method described in each embodiment of the present application. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (Read-Only Memory, referred to as: ROM), random access memory (Random Access Memory, referred to as: RAM), disk or optical disk and other media that can store program codes.

[0067] Those skilled in the art will appreciate that the above embodiments are specific embodiments for implementing the present application, and in actual applications, various changes may be made thereto in form and detail without departing from the spirit and scope of the present application.

Claims

1. A high-bandwidth multi-channel motor drive device with online upgrade capability, characterized in that: include: Sensor signal acquisition unit, FPGA unit, DSP unit, optocoupler isolation unit, motor drive unit and communication unit; The FPGA unit is used to instantiate the sensor signal acquisition unit and the motor drive unit. The sensor signal acquisition unit collects multiple sensor signals in parallel and transmits them to the DSP unit through the XITNF port. The DSP unit is used to calculate the closed-loop control instructions of the multi-channel motor drive in sequence based on the multi-channel sensor signals, and output the enable and direction signals of the multi-channel motors to the FPGA unit; The FPGA unit is also used to convert the enable and direction signals of the multiple motors into timing control signals of the multiple motors, and input them into the optocoupler isolation unit; The optical coupling isolation unit is used to perform optical coupling isolation on the timing control signals of multiple motors and then transmit them to the motor drive unit; The motor drive unit is used to convert the timing control signals of the multiple motors after optical coupling isolation into driving signals of the multiple motors, and output them to the corresponding motors; The communication unit is used to communicate with the host computer and receive upgrade instructions and upgrade files to perform online upgrade of the FPGA unit and / or DSP unit.

2. A high-bandwidth multi-channel motor drive device with online upgrade capability according to claim 1, characterized in that: The FPGA unit includes FPGA circuit, clock and related configuration circuit; the DSP unit includes DSP circuit, clock and related configuration circuit; the communication unit includes RS422 transceiver circuit and can expand CAN bus circuit; the motor drive unit includes half-bridge drive circuit, MOSFET circuit, under-voltage and over-voltage protection circuit and over-current protection circuit.

3. The high-bandwidth multi-channel motor driving device with online upgrade capability according to claim 1, characterized in that: The motor driving device also includes a storage unit, which includes a RAM, a FLASH circuit and an EEPROM circuit that are matched with the DSP unit, and a PROM circuit that is matched with the FPGA unit.

4. The high-bandwidth multi-channel motor driving device with online upgrade capability according to claim 1, characterized in that: The motor drive device also includes a power conversion unit, which includes a conversion circuit for converting an external +28V power supply into +15V, +5V, +3.3V, +2.5V, +1.8V and +1.2V power supplies, and a related filtering circuit.

5. The high-bandwidth multi-channel motor driving device with online upgrade capability according to claim 1, characterized in that: The DSP unit is provided with DSP software, which is used to configure the control instruction calculation cycle in a targeted manner according to the characteristics of different motors, increase the control instruction calculation cycle for low-speed, low-precision control loops, and reduce the control instruction calculation cycle for high-speed, high-precision control loops.

6. A high-bandwidth multi-channel motor driving device with online upgrade capability according to claim 5, characterized in that: During the DSP software upgrade process, the DSP unit writes the received upgrade file into the FLASH matched with the DSP unit through the upgrade instruction, completes the burning of the DSP software upgrade file, and then completes the upgrade of the DSP software.

7. A high-bandwidth multi-channel motor driving device with online upgrade capability according to claim 6, characterized in that: During the FPGA logic upgrade process, the IO port of the DSP unit is used to simulate the JTAG timing to communicate with the FPGA configuration chip, and the FPGA logic upgrade file is written into the FPGA configuration chip to complete the FPGA logic upgrade.

8. A high-bandwidth multi-channel motor driving method with online upgrade capability, characterized in that: include: Parallel acquisition of multi-channel sensor signals; Based on the multi-channel sensor signals, the closed-loop control instructions of the multi-channel motor drive are calculated in sequence to obtain the enable and direction signals of the multi-channel motor; Convert the enable and direction signals of multiple motors into timing control signals of multiple motors; Performing optical coupling isolation on the timing control signals of the multiple motors, and then converting the timing control signals of the multiple motors after optical coupling isolation into driving signals of the multiple motors, and outputting them to the corresponding motors; Receive upgrade instructions and upgrade files in real time for online upgrade.

9. An electronic device, characterized in that: include: at least one processor; as well as, a memory communicatively connected to the at least one processor; wherein, The memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor so that the at least one processor can execute the high-bandwidth multi-channel motor driving method with online upgrade capability as described in claim 8.

10. A computer-readable storage medium storing a computer program, characterized in that: When the computer program is executed by a processor, it can implement a high-bandwidth multi-channel motor driving method with online upgrade capability as claimed in claim 8.

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