Ring oscillator

Abstract

The invention relates to a ring oscillator. The ring oscillator comprises a starting circuit which drives the ring oscillator to start normal work when the ring oscillator is powered on; the first current source circuit is connected to the starting circuit and generates first current in direct proportion to absolute temperature; a second current source circuit connected to the first current source circuit and generating a second current having a negative temperature coefficient capable of compensating the absolute temperature based on the first current; the third current source circuit is connected to the first current source circuit and the second current source circuit, and generates third current irrelevant to absolute temperature based on the first current and the second current; an oscillator core circuit connected to the third current source circuit and generating an oscillator output frequency based on the bias voltage; and the frequency compensation circuit is connected to the first current source circuit, the third current source circuit and the oscillator core circuit, and generates control current based on the first current and the third current to compensate the output frequency of the oscillator.

Description

Technical Field

[0001] The present application relates to the field of integrated circuit technology, and more specifically to a ring oscillator. Background Art

[0002] In the vast landscape of modern electronic technology, ring oscillators, as one of the core components, bear the heavy responsibility of generating accurate and stable high-frequency signals, and are crucial to wireless communications, frequency synthesis, clock generators and other fields. Although the traditional ring oscillator design can meet basic oscillation requirements, it still faces several major technical bottlenecks in practical applications: first, the challenge of frequency stability. Due to factors such as ambient temperature fluctuations and power supply voltage changes, the oscillation frequency is prone to drift; second, the problem of temperature sensitivity. Especially in high temperature environments, the oscillation frequency tends to drop significantly; third, the locking phenomenon of the oscillator under certain conditions, that is, the inability to start or maintain a normal oscillation state, has become a key factor affecting system reliability. Summary of the invention

[0003] In one aspect, according to an embodiment of the present application, a ring oscillator is provided, comprising: a startup circuit, configured to drive the ring oscillator to start normal operation when the ring oscillator is powered on; a first current source circuit, connected to the startup circuit, configured to generate a first current proportional to the absolute temperature; a second current source circuit, connected to the first current source circuit, configured to generate a second current with a negative temperature coefficient that can compensate for the absolute temperature based on the first current; a third current source circuit, connected to the first current source circuit and the second current source circuit, configured to generate a third current that is independent of the absolute temperature based on the first current and the second current; an oscillator core circuit, connected to the third current source circuit, configured to generate an oscillator output frequency based on a bias voltage; and a frequency compensation circuit, connected to the first current source circuit, the third current source circuit and the oscillator core circuit, configured to generate a control current based on the first current and the third current to compensate for the oscillator output frequency.

[0004] The ring oscillator according to the embodiment of the present application can ensure the long-term stability and accuracy of the oscillator output frequency, achieve frequency stability optimization within the full temperature range, and effectively prevent the deadlock phenomenon. BRIEF DESCRIPTION OF THE DRAWINGS

[0005] Various aspects of the present application may be best understood through the following detailed description when read in conjunction with the accompanying drawings. Note that, in accordance with standard industry practice, various features are not necessarily drawn to scale. In the various figures, like numerical numerals describe like components. In the drawings:

[0006] Figure 1 The figure shows the circuit schematic of a traditional ring oscillator.

[0007] Figure 2 The graph shows the output frequency of a conventional ring oscillator at different temperatures.

[0008] Figure 3 A schematic block diagram of a ring oscillator according to an embodiment of the present application is illustrated.

[0009] Figure 4 The figure shows a circuit schematic diagram of a ring oscillator according to an embodiment of the present application.

[0010] Figure 5 The diagram shows the output frequencies of the ring oscillator according to the embodiment of the present application at different temperatures. DETAILED DESCRIPTION

[0011] The features and exemplary embodiments of various aspects of the application will be described in detail below. In the detailed description below, many specific details are proposed to provide a comprehensive understanding of the application. However, it is obvious to those skilled in the art that the application can be implemented without the need for some of these specific details. The following description of the embodiments is only to provide a better understanding of the application by illustrating the example of the application. The application is by no means limited to any specific configuration and algorithm proposed below, but covers any modification, replacement and improvement of elements, parts and algorithms without departing from the spirit of the application. In the accompanying drawings and the following description, known structures and technologies are not shown to avoid causing unnecessary ambiguity to the application.

[0012] Figure 1 The figure shows a schematic diagram of a traditional ring oscillator. Figure 1 As shown, the conventional ring oscillator 100 includes a core circuit, which is formed by three inverters connected end to end through their output and input ends to form a ring. In order to ensure the clock regularity of the output signal, the output signal is then shaped by two inverters before output. The oscillation output frequency is controlled by controlling the magnitude of the inverter bias current and the magnitude of the load capacitor charge and discharge current.

[0013] Specifically, see Figure 1The core circuit of the conventional ring oscillator 100 includes PMOS transistors P1-P10, NMOS transistors N1-N10 and capacitors C1-C2. The source of PMOS transistor P1, the source of PMOS transistor P2, the upper plate of capacitor C1, the source of PMOS transistor P3, the source of PMOS transistor P4, the source of PMOS transistor P5, the source of PMOS transistor P9 and the source of PMOS transistor P10 are simultaneously connected to the power supply terminal VDD; the gate of PMOS transistor P1 is simultaneously connected to the drain of PMOS transistor P1, the drain of NMOS transistor N1, the gate of PMOS transistor P2, the lower plate of capacitor C1, the gate of PMOS transistor P3, the gate of PMOS transistor P4 and the gate of PMOS transistor P5. The drain of the PMOS tube P2 is connected to the source of the PMOS tube P6; the gate of the PMOS tube P6 is simultaneously connected to the gate of the NMOS tube N2, the drain of the PMOS tube P8, the drain of the NMOS tube N4, the gate of the PMOS tube P9 and the gate of the NMOS tube N5; the drain of the PMOS tube P6 is simultaneously connected to the drain of the NMOS tube N2, the gate of the PMOS tube P7 and the gate of the NMOS tube N3; the source of the NMOS tube N2 is connected to the drain of the NMOS tube N7; the gate of the NMOS tube N7 is simultaneously connected to the gate of the NMOS tube N8, the gate of the NMOS tube N9, the upper plate of the capacitor C2, the gate of the NMOS tube N10, the drain of the NMOS tube N10 and the drain of the PMOS tube P5. The drain of PMOS tube P3 is connected to the source of PMOS tube P7; the drain of PMOS tube P7 is simultaneously connected to the drain of NMOS tube N3, the gate of PMOS tube P8 and the gate of NMOS tube N4; the source of NMOS tube N3 is connected to the drain of NMOS tube N8; the drain of PMOS tube P4 is connected to the source of PMOS tube P8; the drain of PMOS tube P8 is simultaneously connected; the source of NMOS tube N4 is connected to the drain of NMOS tube N9; the drain of PMOS tube P9 is simultaneously connected to the drain of NMOS tube N5, the gate of PMOS tube P10 and the gate of NMOS tube N6 The drain of the PMOS tube P10 is simultaneously connected to the drain of the NMOS tube N6 and further connected to the output VOUT; the gate of the NMOS tube N1 is connected to the gate of the NMOS tube N0, and the gate and drain of the NMOS tube N0 are connected and connected to the reference current IREF; the source of the NMOS tube N0, the source of the NMOS tube N1, the source of the NMOS tube N7, the source of the NMOS tube N8, the source of the NMOS tube N9, the lower plate of the capacitor C2 and the source of the NMOS tube N5, the source of the NMOS tube N6 and the source of the NMOS tube N10 are simultaneously connected to the ground terminal GND.

[0014] Figure 2 The graph shows the output frequency of a conventional ring oscillator at different temperatures. Figure 2 The horizontal axis is time (in μs), and the vertical axis is frequency (in MHz). Figure 2As shown, the output frequency of the conventional ring oscillator is 12.3 MHz (indicated by the red line) at a typical process angle of 25°C (TEMP = 25°C); the output frequency is 13.3 MHz (indicated by the blue line) at a typical process angle of -40°C (TEMP = -40°C); the output frequency is 11 MHz (indicated by the green line) at a typical process angle of 125°C (TEMP = 125°C). It can be seen that the output frequency of the conventional oscillator is greatly affected by the ambient temperature, which is unacceptable in the system.

[0015] In view of this, the present application provides an improved ring oscillator, which can fundamentally improve the performance of the ring oscillator.

[0016] Figure 3 FIG. 1 is a schematic block diagram of a ring oscillator according to an embodiment of the present application. Figure 3 As shown, the ring oscillator 300 according to the embodiment of the present application includes:

[0017] The start-up circuit 301 is configured to drive the ring oscillator to start normal operation when the ring oscillator is powered on;

[0018] A first current source circuit 302, connected to the start-up circuit 301, configured to generate a first current proportional to the absolute temperature;

[0019] The second current source circuit 303 is connected to the first current source circuit 302 and is configured to generate a second current having a negative temperature coefficient capable of compensating for absolute temperature based on the first current;

[0020] A third current source circuit 304, connected to the first current source circuit 302 and the second current source circuit 303, configured to generate a third current that is independent of absolute temperature based on the first current and the second current;

[0021] an oscillator core circuit 305 , connected to the third current source circuit, configured to generate an oscillator output frequency based on the bias voltage; and

[0022] The frequency compensation circuit 306 is connected to the first current source circuit, the third current source circuit and the oscillator core circuit, and is configured to generate a control current based on the first current and the third current to compensate the oscillator output frequency.

[0023] In some implementations, the startup circuit 301 is further configured to be disconnected from the first current source circuit 302 after the ring oscillator operates normally.

[0024] In some implementations, the startup circuit 301 includes a current limiting unit 3011, a driving unit 3012, and a first current mirror unit 3013, wherein the current limiting unit 3011 is configured to provide a first voltage based on a power supply voltage; the driving unit 3012 is configured to drive a first current source circuit to generate a first current based on the power supply voltage and the first voltage; the first current mirror unit 3013 is configured to copy the first current and provide the first current to a second current source circuit, a third current source circuit, and a frequency compensation circuit.

[0025] In some implementations, the first current source circuit 302 includes a first current generating unit 3021 and a second current mirror unit 3022, wherein the first current generating unit 3021 is configured to generate a first current under the drive of a start driving unit; the second current mirror unit 3022 is configured to copy the first current and provide the first current to the second current source circuit.

[0026] In some implementations, the second current source circuit 303 includes a bias unit 3031 and a second current generating unit 3032 , wherein the bias unit 3031 is configured to provide a bias current based on the first current; and the second current generating unit 3032 is configured to generate a second current based on the bias current.

[0027] In some implementations, the third current source circuit 304 includes a third current generating unit 3041 and a bias voltage generating unit 3042, wherein the third current generating unit 3041 is configured to copy the first current and the second current and sum the first current and the second current to obtain a third current; and the bias voltage generating unit 3042 is configured to generate a bias voltage based on the third current.

[0028] In some implementations, the oscillator core circuit 305 includes an inverter unit 3051, a voltage regulator unit 3052, and a shaping unit 3053, wherein the inverter unit 3051 is configured to generate an oscillator output frequency based on a bias voltage; the voltage regulator unit 3052 is configured to stabilize the bias voltage; and the shaping unit 3053 is configured to shape the oscillator output frequency.

[0029] In some implementations, the frequency compensation circuit includes a third current mirror unit 3061, a fourth current mirror unit 3062, and a frequency compensation unit 3063, wherein the third current mirror unit 3061 is configured to copy the first current; the fourth current mirror unit 3062 is configured to copy the third current; and the frequency compensation unit 3063 is configured to generate a control current for compensating the oscillator output frequency based on the first current and the third current.

[0030] In some implementations, the frequency compensation unit 3063 is configured to: generate a voltage inversely proportional to the oscillator output frequency based on the third current, and generate a first control signal for adjusting the oscillator output frequency based on a comparison of the voltage with a preset reference voltage; generate a second control signal for adjusting the oscillator output frequency based on the first current, wherein the control current is generated based on the first control signal and the second control signal.

[0031] The ring oscillator according to the embodiment of the present application can ensure the long-term stability and accuracy of the oscillation frequency, achieve frequency stability optimization within the full temperature range, and effectively prevent the deadlock phenomenon.

[0032] Figure 4 FIG. 1 is a circuit diagram of a ring oscillator according to an embodiment of the present application. Figure 4 As shown, the ring oscillator 400 according to the embodiment of the present application includes:

[0033] The start-up circuit 401 is configured to drive the ring oscillator to start normal operation when the ring oscillator is powered on;

[0034] A first current source circuit 402, connected to the start-up circuit 401, configured to generate a first current proportional to the absolute temperature;

[0035] A second current source circuit 403, connected to the first current source circuit 402, configured to generate a second current having a negative temperature coefficient capable of compensating for absolute temperature based on the first current;

[0036] A third current source circuit 404, connected to the first current source circuit 402 and the second current source circuit 403, configured to generate a third current that is independent of absolute temperature based on the first current and the second current;

[0037] an oscillator core circuit 405 , connected to the third current source circuit, configured to generate an oscillator output frequency based on the bias voltage;

[0038] The frequency compensation circuit 406 is connected to the first current source circuit, the third current source circuit and the oscillator core circuit, and is configured to generate a control current based on the first current and the third current to compensate the oscillator output frequency.

[0039] like Figure 4As shown, the startup circuit 401 includes NMOS transistors N1-N3 and PMOS transistors P1-P2. The sources of the PMOS transistors P1-P2 are connected to the power supply terminal VDD; the gates of the NMOS transistors N1-N3 are simultaneously connected to the power supply terminal VDD; the gate of the PMOS transistor P1 is connected to the gate of the PMOS transistor P4 in the second current source circuit 402; the drain of the PMOS transistor P1 is simultaneously connected to the gate of the PMOS transistor P2 and the drain of the NMOS transistor N1; the drain of the PMOS transistor P2 is connected to the drain of the PMOS transistor P3 in the second current source circuit 402; the source of the NMOS transistor N1 is connected to the drain of the NMOS transistor N2; the source of the NMOS transistor N2 is connected to the drain of the NMOS transistor N3; and the drain of the NMOS transistor N3 is connected to the ground terminal GND. Through this configuration, the start-up circuit 401 drives the ring oscillator to get rid of the "degenerate" zero bias point when the ring oscillator is powered on, thereby starting normal operation; when the ring oscillator works normally, the start-up circuit 401 is disconnected from the first current source circuit 402, which does not affect the normal operation of the ring oscillator.

[0040] like Figure 4 As shown, the first current source circuit 402 includes PMOS transistors P3-P4, NMOS transistors N4-N5 and resistor R1. The sources of the PMOS transistors P3-P4 are connected to the power supply terminal VDD; the gate of the PMOS transistor P3 is simultaneously connected to the gate of the PMOS transistor P4, the drain of the PMOS transistor P4, the drain of the NMOS transistor N5, the gate of the PMOS transistor P1 in the startup circuit 401, the gate of the PMOS transistor P6 in the second current source circuit 403 and the gate of the PMOS transistor P13 in the frequency compensation circuit 406; the drain of the PMOS transistor P3 is simultaneously connected to the drain of the NMOS transistor N4, the gate of the NMOS transistor N4, the gate of the NMOS transistor N5 and the drain of the PMOS transistor P2 in the startup circuit 401; the source of the NMOS transistor N5 is connected to the positive electrode of the resistor R1; the source of the NMOS transistor N4 and the negative electrode of the resistor R1 are used to connect to the ground terminal GND. Through this configuration, the first current source circuit 402 utilizes the gate-source voltage difference ΔV between the NMOS transistors N4 and N5. gs Generates a current I proportional to the absolute temperature PTAT =(ΔV gs / R1), PMOS tubes P3~P4 act as mirror tubes to "copy" the current I PTAT The first current source circuit 402 is also referred to as a PTAT current source circuit.

[0041] like Figure 4As shown, the second current source circuit 403 includes PMOS transistors P5-P7, NMOS transistors N6-N7, resistors R2-R3 and capacitor C1. The sources of the PMOS transistors P5-P7 are connected to the power supply terminal VDD; the gate of the PMOS transistor P5 is simultaneously connected to the drain of the PMOS transistor P5, the drain of the NMOS transistor N6, the gate of the PMOS transistor P7 and the gate of the PMOS transistor P8 in the third current source circuit 404; the gate of the PMOS transistor P6 is connected to the gate of the PMOS transistor P4 in the first current source circuit 402; the drain of the PMOS transistor P6 is simultaneously connected to the gate of the NMOS transistor N6, the upper plate of the capacitor C1 and the drain of the NMOS transistor N7; the drain of the PMOS transistor P7 is connected to the positive electrode of the resistor R2; the negative electrode of the resistor R2 is simultaneously connected to the gate of the NMOS transistor N7 and the positive electrode of the resistor R3; the source of the NMOS transistor N6, the lower plate of the capacitor C1, the source of the NMOS transistor N7 and the negative electrode of the resistor R3 are simultaneously connected to the ground terminal GND. In this configuration, NMOS transistor N6 and PMOS transistors P5 and P7 form a negative feedback loop to maintain the current I on resistor R3. CTAT =V gs7 / R3, gate-source voltage of NMOS tube N7 V gs7 has a linear negative temperature coefficient, so the current I CTAT The second current source circuit 403 has a negative temperature coefficient that can compensate for absolute temperature.

[0042] like Figure 4 As shown, the third current source circuit 404 includes PMOS transistors P8-P9 and NMOS transistors N8-N9. The sources of the PMOS transistors P8-P9 are connected to the power supply terminal VDD; the gate of the PMOS transistor P8 is connected to the gate of the PMOS transistor P5 in the second current source circuit 403; the gate of the PMOS transistor P9 is connected to the gate of the PMOS transistor P4 in the first current source circuit 402; the drain of the PMOS transistor P8 is simultaneously connected to the drain of the PMOS transistor P9, the drain of the NMOS transistor N8, the gate of the NMOS transistor N8, the gate of the NMOS transistor N9 and the gate of the NMOS transistor N14 in the oscillator core circuit 405; the drain of the NMOS transistor N9 is connected to the drain of the PMOS transistor P10 in the frequency compensation circuit 406; the source of the NMOS transistor N8 and the source of the NMOS transistor N9 are simultaneously connected to the ground terminal GND. In this configuration, the third current source circuit 404 "copies" the current I PTAT and current I CTAT Current and current I PTAT and current I CTAT The summation produces a third current I that is independent of absolute temperature. REF The third current source circuit 404 is also referred to as an IREF current source circuit.

[0043] like Figure 4As shown, the frequency compensation circuit 406 includes PMOS transistors P10-P16, NMOS transistors N10-N13, resistors N4-N7 and capacitors C2-C4. The sources of the PMOS tubes P10 to P13 and the positive electrode of the resistor R7 are simultaneously connected to the power supply terminal VDD; the gate of the PMOS tube P10 is simultaneously connected to the drain of the PMOS tube P10, the drain of the NMOS tube N9 in the third current source circuit 404, the gate of the PMOS tube P11 and the gate of the PMOS tube P12; the drain of the PMOS tube P11 is simultaneously connected to the positive electrode of the resistor R4 and the positive electrode of the resistor R5; the drain of the PMOS tube P12 is simultaneously connected to the drain of the PMOS tube P13, the drain of the PMOS tube P14 and the drain of the PMOS tube P15; the gate of the PMOS tube P13 is connected to the gate of the PMOS tube P4 of the first current source circuit 402; the negative electrode of the resistor R5 is simultaneously connected to the upper plate of the capacitor C2 and the gate of the PMOS tube P14; the drain of the PMOS tube P14 is simultaneously connected to The drain of the PMOS tube P10, the gate of the PMOS tube P10 and the gate of the NMOS tube N13 are connected; the drain of the PMOS tube P15 is simultaneously connected to the drain of the NMOS tube N11 and the gate of the NMOS tube N11; the gate of the PMOS tube P15 is simultaneously connected to the upper plate of the capacitor C3 and the negative electrode of the resistor R6; the negative electrode of the resistor R7 is simultaneously connected to the positive electrode of the resistor R6 and the source of the PMOS tube P16; the gate of the PMOS tube P16 is simultaneously connected to the gate of the NMOS tube N12 and the drain of the PMOS tube P24 in the oscillator core circuit 405; the drain of the PMOS tube P16 is simultaneously connected to the drain of the NMOS tube N12 and the upper plate of the capacitor C4; the negative electrode of the resistor R4, the sources of the NMOS tubes N10~N13 and the lower plates of the capacitors C2~C4 are simultaneously connected to the ground terminal GND. In this configuration, the frequency compensation circuit 406 converts the oscillator output frequency into a voltage signal, compares the voltage signal with a preset reference voltage, and generates a control signal for feedback adjustment of the oscillation output frequency based on the comparison result. The frequency compensation circuit 406 also introduces a bias current with a positive temperature coefficient to provide a control signal to compensate for the low oscillation output frequency at high temperatures. The frequency compensation circuit 406 also provides an anti-lock mechanism and a large current wake-up function.

[0044] like Figure 4As shown, the oscillator core circuit 405 includes PMOS transistors P17-P25, NMOS transistors N14-N22 and capacitors C5-C6. The sources of PMOS transistors P17-P18, the upper plate of capacitor C5, the source of PMOS transistor P20, the source of PMOS transistor P22 and the sources of PMOS transistors P24-P25 are simultaneously connected to the power supply terminal VDD; the gate of PMOS transistor P17 is simultaneously connected to the drain of PMOS transistor P17, the drain of NMOS transistor N14 and the drain of NMOS transistor N13 of the frequency compensation circuit 406, the gate of PMOS transistor P18, the lower plate of capacitor C5, the gate of PMOS transistor P20, the gate of PMOS transistor P22 and the gate of PMOS transistor P25. The gate of the NMOS tube N14 is connected to the gate of the NMOS tube N8 in the third current source circuit 404; the drain of the PMOS tube P18 is connected to the source of the PMOS tube P19; the gate of the PMOS tube P19 is simultaneously connected to the gate of the NMOS tube N15, the drain of the PMOS tube P23, the drain of the NMOS tube N19, the gate of the PMOS tube P24 and the gate of the NMOS tube N21; the drain of the PMOS tube P19 is simultaneously connected to the drain of the NMOS tube N15, the gate of the PMOS tube P21 and the gate of the NMOS tube N17; the NMOS tube N The source of NMOS tube 15 is connected to the drain of NMOS tube N16; the gate of NMOS tube N16 is connected to the gate of NMOS tube N18, the gate of NMOS tube N20, the upper plate of capacitor C6, the gate of NMOS tube N22, the drain of NMOS tube N22 and the drain of PMOS tube P25; the drain of PMOS tube P20 is connected to the source of PMOS tube P21; the drain of PMOS tube P21 is connected to the drain of NMOS tube N17, the gate of PMOS tube P23 and the gate of NMOS tube N19; the source of NMOS tube N17 is connected The drain of NMOS tube N18; the drain of PMOS tube P22 is connected to the source of PMOS tube P23; the source of NMOS tube N19 is connected to the drain of NMOS tube N20; the drain of PMOS tube P24 is simultaneously connected to the drain of NMOS tube N21 and the gate of PMOS tube P16 of frequency compensation circuit 406; the source of NMOS tube N14, the source of NMOS tube N16, the source of NMOS tube N18, the source of NMOS tube N20, the lower plate of capacitor C6 and the sources of NMOS tubes N21-N22 are simultaneously connected to the ground terminal GND. Through this configuration, the oscillator core circuit 405 generates an oscillator output frequency based on the bias voltage from the third current source circuit and the control current from the frequency compensation circuit.

[0045] The working principle of the ring oscillator according to the embodiment of the present application is described in detail below.

[0046] The startup circuit 401 is composed of NMOS tubes N1-N3 and PMOS tubes P1-P2, wherein the NMOS tubes N1-N3 work in the linear region and are used as current limiting resistors (current limiting units); the PMOS tube P1 is used as the first current mirror unit; and the PMOS tube P2 is a switch tube and is used as a driving unit. When the ring oscillator is powered on, its circuit is at a "degenerate" zero bias point. Since the gate voltage of the NMOS tubes N1-N3 is equal to the power supply voltage, the NMOS tubes N1-N3 are turned on; the gate voltage of the PMOS tube P2 is one threshold voltage lower than its source voltage, so the PMOS tube P2 is turned on, forcing the NMOS tubes N4-N5 in the first current source circuit 402 to generate current, so that the circuit starts to work, and at the same time the PMOS tube P1 starts to have current. When the gate voltage of the PMOS tube P2 is one threshold voltage lower than its source voltage, it will force the PMOS tube P2 to turn off, and the circuit startup is completed.

[0047] The first current source circuit 402 is composed of PMOS transistors P3-P4, NMOS transistors N4-N5 and resistor R1, wherein the PMOS transistors P3-P4 work in the saturation region and are used as the second current mirror unit; the NMOS transistors N4-N5 work in the subthreshold region and are used as the first current generating unit. The first current source circuit 402 uses the gate-source voltage difference ΔVgs of the NMOS transistors N4-N5 to generate a first current I proportional to the absolute temperature. PTAT =(ΔVgs / R1), PMOS tubes P3~P4 act as mirror units to "copy" the current I PTAT .

[0048] The second current source circuit 403 is composed of PMOS transistors P5-P7, NMOS transistors N6-N7, resistors R2-R3 and capacitor C1, wherein the PMOS transistor P6 is used as a bias unit to provide a bias current, the NMOS transistor N6 and the PMOS transistors P5 and P7 form a negative feedback loop, and the resistor R3 determines the second current I CTAT The second current source circuit 403 is based on the idea that the NMOS tube N6 and the PMOS tubes P5 and P7 form a negative feedback loop to maintain the current I on the resistor R3. CTAT =Vgs7 / R3, gate-source voltage of NMOS tube N7 V gs7 has a linear negative temperature coefficient, so the current I CTATIt has a negative temperature coefficient that can compensate for absolute temperature. Assuming that the voltage on the resistor R3 increases, that is, the gate-source voltage of the NMOS tube N7 increases, according to the common-source characteristic of the MOS tube, the drain-source voltage of the NMOS tube N7 decreases, and the gate-source voltage of the NMOS tube N6 decreases, causing the drain current of the NMOS tube N6 to decrease. The PMOS tubes P5 and P7 are proportional current mirrors, so the drain current of the PMOS tube P7 decreases. As the drain current of the PMOS tube P7 decreases, the voltage on the resistor R3 also decreases, forcing the gate-source voltage of the NMOS tube N7 to decrease; Assuming that the voltage on resistor R3 decreases, that is, the gate-source voltage of NMOS tube N7 decreases, according to the common source characteristic of MOS tube, the drain-source voltage of NMOS tube N7 increases, and the gate-source voltage of NMOS tube N6 rises, so that the drain current of NMOS tube N6 increases. PMOS tubes P5 and P7 are proportional current mirrors, so the drain current of PMOS tube P7 increases. Due to the increase in the drain current of PMOS tube P7, the voltage on resistor R3 will also increase, forcing the gate-source voltage of NMOS tube N7 to increase. In addition, in order to balance the current of the two branches of the current mirror, an adjustment resistor R2 is introduced into the circuit; in order to stabilize the frequency of the circuit, a frequency compensation capacitor C1 is introduced into the circuit.

[0049] The third current source circuit 404 is composed of PMOS tubes P8-P9 and NMOS tubes N8-N9, wherein the PMOS tubes P8-P9 are used as third current generating units, and the NMOS tubes N8-N9 are used as bias voltage generating units. The PMOS tubes P8-P9 are used as mirror tubes to "copy" I PTAT and I CTAT The currents are summed to produce a current I that is independent of absolute temperature. REF , and then generate a bias voltage VIBREF through NMOS tubes N8~N9.

[0050] The oscillator core circuit 405 is composed of PMOS tubes P17-P25, NMOS tubes N14-N22 and capacitors C5-C6, wherein PMOS tubes P17-P23 and NMOS tubes N15-N20 constitute an inverter unit, capacitors C5-C6 are used as voltage stabilizing units, and PMOS tubes P24 and NMOS tubes N21 are used as shaping units. The idea of ​​the oscillator core circuit 405 is to effectively control the bias current of the inverter and control the speed of charging and discharging the output node capacitor, thereby controlling the output frequency of the ring oscillator. Figure 4As shown in the figure, PMOS tubes P17-P19 and NMOS tubes N15-N16 form the first stage circuit, which is composed of an inverter plus a current source and a current sink. The currents In and Ip of the current source and current sink control the charging and discharging speed of the output node capacitance of the inverter, making the inverter work in a current-starved state, so this type of ring oscillator is called a "current-starved ring oscillator". Assuming that the capacitance of the output node of the first stage circuit is C, the charging time required for the output node level to rise from 0 to VDD is:

[0051]

[0052] The discharge time required for the output node level to go from VDD to 0 is:

[0053]

[0054] Assuming that the charging and discharging currents are equal, the output frequency of the ring oscillator is:

[0055]

[0056] It can be seen from the above formula that the output frequency f of the current starved ring oscillator is proportional to the charge and discharge current I. In order to stabilize the bias voltage of the current source and current sink, voltage stabilizing capacitors C5-C6 are introduced into the circuit. In addition, the PMOS tube P24 and the NMOS tube N21 form an inverter to shape the oscillator output signal.

[0057] The frequency compensation circuit 406 is composed of PMOS transistors P10-P16, NMOS transistors N10-N13, resistors R4-R7 and capacitors C2-C4, wherein the PMOS transistor P13 is used as the third current mirror unit, the NMOS transistors N10-N11 are used as the fourth current mirror unit, and the PMOS transistors P12, P14-P16, NMOS transistors N12-N13, resistors R4-R7 and capacitors C2-C4 constitute a frequency compensation unit. The frequency compensation circuit 406 can realize three types of frequency compensation.

[0058] The idea of ​​the first frequency compensation is to convert the oscillator output frequency directly into a voltage signal, and compare it with a preset reference voltage in real time through a comparator to achieve instant feedback adjustment of the oscillator output frequency. Specifically, the first frequency compensation can be regarded as realizing a switched capacitor resistor and a comparator.

[0059] The switched capacitor resistor is composed of a PMOS transistor P16, an NMOS transistor N12 and a capacitor C4. The switched capacitor resistor generates a resistor that is inversely proportional to the output frequency of the oscillator. Its resistance is (f OSC C4) -1 ; Furthermore, the voltage value that is inversely proportional to the oscillator output frequency is:

[0060]

[0061] The comparator is composed of PMOS tubes P13~P15, NMOS tubes N10~N11, resistors R4~R7 and capacitors C2~C3, which are used to convert the voltage V OSC Compared with the preset threshold voltage to generate a frequency compensation control signal to adjust the oscillator output frequency. Specifically, when the oscillator output frequency increases, V OSC Decreases. Since PMOS tubes P14~P15 form a common-source differential pair, the drain current of PMOS tube P15 increases, and the drain current of PMOS tube P14 decreases. According to the Sachtung equation, the gate voltage of NMOS tube N10 decreases, and the gate voltage of NMOS tube N13 decreases. According to the common-source characteristic of MOS tubes, the drain voltage of NMOS tube N13 increases, and the gate-source voltage of PMOS tube P18 decreases, so the input current of the oscillator decreases. Because the frequency of the "current-starved ring oscillator" is proportional to the input current, the output frequency of the oscillator decreases when the input current decreases, forming a negative feedback loop; when the output frequency of the oscillator decreases, V OSC Increases, because the PMOS tubes P14~P15 form a common-source differential pair, the drain current of the PMOS tube P15 decreases, and the drain current of the PMOS tube P14 increases. According to the Sachtung equation, the gate voltage of the NMOS tube N10 increases, and the gate voltage of the NMOS tube N13 increases. According to the common-source characteristic of the MOS tube, the drain voltage of the NMOS tube N13 decreases, and the gate-source voltage of the PMOS tube P18 increases, so the input current of the oscillator increases. Because the frequency of the "current-starved ring oscillator" is proportional to the input current, the output frequency of the oscillator increases when the input current increases, forming a negative feedback loop.

[0062] The second frequency compensation idea is to introduce a bias current with a positive temperature coefficient to compensate for the problem of the oscillator's output frequency decreasing when the oscillator is at high temperature. The influence of temperature on the oscillator's output frequency mainly comes from the dependence of carrier mobility and threshold voltage on temperature. As the temperature increases, the carrier mobility and threshold voltage decrease. The temperature and the oscillator's output frequency are negatively correlated. The higher the temperature, the lower the oscillator's output frequency. Due to the mirror current I PTAT , when the temperature rises, the current I PTAT The input current of the oscillator core circuit 405 gradually increases with the increase of temperature, and the oscillator output frequency also gradually increases.

[0063] The idea of ​​the third frequency compensation is to introduce an anti-lock mechanism and a large current wake-up function. Assuming that the gate voltage of PMOS tube P16 and NMOS tube N12 is 0 at the moment of power-on, PMOS tube P16 is turned on to charge the capacitor, and the voltage at point VA is much greater than the voltage at point VB. Since PMOS tubes P14 to P15 form a common-source differential pair, the drain current of PMOS tube P14 is much greater than the drain current of PMOS tube P15. According to the Saxdon equation, the gate-source voltage of NMOS tube N10 is relatively large, and the gate-source voltage of NMOS tube N13 is relatively large. According to the common-source characteristics of MOS tubes, the drain voltage of NMOS tube N13 is relatively small, and the gate-source voltage of PMOS tube P18 is relatively large. The input current at the moment of oscillator startup is relatively large, so the ring oscillator is easier to start. Assume that the gate voltages of PMOS tube P16 and NMOS tube N12 are VDD at the moment of starting, PMOS tube P16 is not turned on, and the voltage at point VA is much larger than the voltage at point VB. Since PMOS tubes P14 and P15 form a common-source differential pair, the drain current of PMOS tube P14 is much larger than the drain current of PMOS tube P15. According to the Saxdon equation, the gate-source voltage of NMOS tube N10 is relatively large, and the gate-source voltage of NMOS tube N13 is relatively large. According to the common-source characteristics of MOS tubes, the drain voltage of NMOS tube N13 is relatively small, and the gate-source voltage of PMOS tube P18 is relatively large. The input current of the oscillator at the moment of starting is relatively large, so the ring oscillator is easier to start.

[0064] Figure 5 The diagram shows the output frequencies of the ring oscillator according to the embodiment of the present application at different temperatures. Figure 5 The horizontal axis is time (in μs), and the vertical axis is frequency (in MHz). Figure 5 As shown, according to the embodiment of the present application, the output frequency at a typical process angle of 25°C (TEMP = 25°C) is 11.4MHz (indicated by the red line); at a typical process angle of -40°C (TEMP = -40°C), the output frequency is 11.5MHz (indicated by the blue line); at a typical process angle of 125°C (TEMP = 125°C), the output frequency is 11.3MHz (indicated by the green line). It can be seen that the ring oscillator according to the embodiment of the present application can ensure good consistency of the oscillator output frequency in the full temperature range.

[0065] The ring oscillator according to the embodiment of the present application can provide the following beneficial effects.

[0066] The ring oscillator according to the embodiment of the present application adopts frequency-voltage conversion feedback control: Different from the traditional method of directly adjusting the parameters of the oscillation circuit components to stabilize the frequency, the present application realizes a mechanism for the first time to directly convert the frequency generated by the oscillator into a corresponding voltage signal and compare it with a preset reference voltage in real time. This comparison result is used to dynamically adjust the oscillation circuit to ensure that the frequency deviation is quickly identified and corrected, thereby greatly improving the long-term stability and accuracy of the oscillation frequency.

[0067] The ring oscillator according to the embodiment of the present application adopts the positive temperature coefficient (PTAT) auxiliary temperature compensation technology: to solve the problem of oscillation frequency drop at high temperature, the present application creatively introduces positive temperature coefficient current into the oscillator. As the temperature rises, I PTAT As the current increases, the current flowing into the oscillator is automatically adjusted to compensate for the decrease in oscillation frequency in a high temperature environment, thereby optimizing the frequency stability over the entire temperature range and significantly enhancing the oscillator's environmental adaptability.

[0068] According to the embodiment of the present application, the ring oscillator adopts an anti-locking mechanism and a high-current wake-up function: In order to solve the possible startup difficulties of the oscillator, the present application designs a set of default high-current injection protection strategies. At the moment of starting, the system automatically activates this mechanism, injects a high-current pulse into the oscillation circuit in a short period of time, prompting the oscillator to quickly resume normal oscillation, effectively preventing the lock phenomenon and enhancing the robustness and self-recovery ability of the system.

[0069] Taken together, these three innovations not only break through the technical barriers of existing ring oscillators, but also bring unprecedented stability and reliability improvements to electronic system design, and are expected to play an important role in many high-demand fields such as high-end communication equipment, aerospace, and precision testing instruments.

[0070] The mechanism of the present application has been described above with reference to the accompanying drawings and various embodiments. It should be understood that the present application is not limited thereto, but can be implemented in other forms without departing from the subject matter and essential features of the present application. The current embodiments are to be considered in all respects as illustrative rather than restrictive, the scope of the present invention is defined by the appended claims rather than the above description, and all changes falling within the meaning and equivalents of the claims are included within the scope of the present application.

Claims

1. A ring oscillator, comprising: a startup circuit, configured to drive the ring oscillator to start normal operation when the ring oscillator is powered on; A first current source circuit, connected to the startup circuit, configured to generate a first current proportional to an absolute temperature; A second current source circuit, connected to the first current source circuit, configured to generate a second current having a negative temperature coefficient capable of compensating for absolute temperature based on the first current; a third current source circuit connected to the first current source circuit and the second current source circuit, configured to generate a third current and a bias voltage that are independent of absolute temperature based on the first current and the second current; an oscillator core circuit, connected to the third current source circuit, configured to generate an oscillator output frequency based on the bias voltage; The frequency compensation circuit is connected to the first current source circuit, the third current source circuit and the oscillator core circuit, and is configured to generate a control current based on the first current and the third current to compensate the oscillator output frequency.

2. The ring oscillator according to claim 1, wherein: The startup circuit is further configured to be disconnected from the first current source circuit after the ring oscillator operates normally.

3. The ring oscillator according to claim 1, wherein: The startup circuit includes a current limiting unit, a driving unit and a first current mirror unit, wherein The current limiting unit is configured to provide a first voltage based on a power supply voltage; The driving unit is configured to drive the first current source circuit to generate the first current based on the power supply voltage and the first voltage; The first current mirror unit is configured to copy the first current and provide the first current to the second current source circuit, the third current source circuit, and the frequency compensation circuit.

4. The ring oscillator according to claim 3, wherein: The first current source circuit includes a first current generating unit and a second current mirror unit, wherein The first current generating unit is configured to generate the first current under the driving of the starting driving unit; The second current mirror unit is configured to copy the first current and provide the first current to the second current source circuit.

5. The ring oscillator according to claim 4, wherein: The second current source circuit includes a bias unit and a second current generating unit, wherein The bias unit is configured to provide a bias current based on the first current; The second current generating unit is configured to generate the second current based on the bias current.

6. The ring oscillator according to claim 5, wherein: The third current source circuit includes a third current generating unit and a bias voltage generating unit, wherein The third current generating unit is configured to copy the first current and the second current and sum the first current and the second current to obtain the third current; The bias voltage generating unit is configured to generate the bias voltage based on the third current.

7. The ring oscillator according to claim 6, wherein: The oscillator core circuit includes an inverter unit, a voltage stabilizing unit and a shaping unit, wherein The inverter unit is configured to generate the oscillator output frequency based on the bias voltage; The voltage stabilization unit is configured to stabilize the bias voltage; The shaping unit is configured to shape the oscillator output frequency.

8. The ring oscillator according to claim 7, wherein the frequency compensation circuit comprises a third current mirror unit, a fourth current mirror unit and a frequency compensation unit, The third current mirror unit is configured to replicate the first current; The fourth current mirror unit is configured to replicate the third current; The frequency compensation unit is configured to generate a control current for compensating an oscillator output frequency based on the first current and the third current.

9. The ring oscillator according to claim 8, wherein: The frequency compensation unit is configured as follows: Based on the third current, a voltage inversely proportional to the output frequency of the oscillator is generated, and based on a comparison between the voltage and a preset reference voltage, a first control signal for adjusting the output frequency of the oscillator is generated; generating a second control signal for adjusting the output frequency of the oscillator based on the first current, The control current is generated based on the first control signal and the second control signal.

10. The ring oscillator according to any one of claims 1 to 3, wherein: The startup circuit includes first to third NMOS transistors and first to second PMOS transistors. The sources of the first to second PMOS tubes are connected to the power supply terminal, the gates of the first to third NMOS tubes are simultaneously connected to the power supply terminal VDD, the gate of the first PMOS tube is connected to the second current source circuit, the drain of the first PMOS tube is simultaneously connected to the gate of the second PMOS tube and the drain of the first NMOS tube, the drain of the second PMOS tube is connected to the second current source circuit, the source of the first NMOS tube is connected to the drain of the second NMOS tube, the source of the second NMOS tube is connected to the drain of the third NMOS tube, and the drain of the third NMOS tube N3 is connected to the ground terminal.

11. The ring oscillator according to claim 10, wherein: The first current source circuit includes: third to fourth PMOS transistors, fourth to fifth NMOS transistors and a first resistor, The sources of the third to fourth PMOS tubes are connected to the power supply end, the gate of the third PMOS tube is simultaneously connected to the gate of the fourth PMOS tube, the drain of the fourth PMOS tube, the drain of the fifth NMOS tube, the gate of the first PMOS tube in the startup circuit, and the second current source circuit, the drain of the third PMOS tube is simultaneously connected to the drain of the fourth NMOS tube, the gate of the fourth NMOS tube N4, the gate of the fifth NMOS tube N5 and the drain of the second PMOS tube P2 in the startup circuit, the source of the fifth NMOS tube is connected to the positive electrode of the resistor, and the source of the fourth NMOS tube and the negative electrode of the resistor are used to connect to the ground end.

12. The ring oscillator according to claim 11, wherein the second current source circuit comprises: The fifth to seventh PMOS transistors, the sixth to fourth NMOS transistors, the second to third resistors and the first capacitor C1, The sources of the fifth to seventh PMOS tubes are connected to the power supply terminal, and the gate of the fifth PMOS tube is simultaneously connected to the drain of the fifth PMOS tube, the drain of the sixth NMOS tube, the gate of the seventh PMOS tube and the third current source circuit; The gate of the sixth PMOS tube is connected to the gate of the fourth PMOS tube in the first current source circuit, the drain of the sixth PMOS tube is simultaneously connected to the gate of the sixth NMOS tube, the upper plate of the first capacitor and the drain of the seventh NMOS tube, the drain of the seventh PMOS tube is connected to the positive electrode of the second resistor, and the negative electrode of the second resistor is simultaneously connected to the gate of the seventh NMOS tube and the positive electrode of the third resistor; The source of the sixth NMOS tube, the lower plate of the first capacitor, the source of the seventh NMOS tube and the negative electrode of the third resistor are connected to the ground terminal at the same time.

13. The ring oscillator according to claim 12, wherein the third current source circuit comprises: The eighth to ninth PMOS tubes and the eighth to ninth NMOS tubes, The sources of the eighth to ninth PMOS tubes are connected to the power supply terminal, the gate of the eighth PMOS tube is connected to the gate of the fifth PMOS tube P5 in the second current source circuit, the gate of the ninth PMOS tube is connected to the gate of the fourth PMOS tube in the first current source circuit, the drain of the eighth PMOS tube is simultaneously connected to the drain of the ninth PMOS tube, the drain of the eighth NMOS tube, the gate of the eighth NMOS tube, the gate of the ninth NMOS tube and the oscillator core circuit, and the drain of the ninth NMOS tube is connected to the frequency compensation circuit; The source of the eighth NMOS tube and the source of the ninth NMOS tube are connected to the ground terminal at the same time.

14. The ring oscillator of claim 13, wherein the frequency compensation circuit comprises: the tenth to sixteenth PMOS tubes, the tenth to thirteenth NMOS tubes, the fourth to seventh resistors, and the second to fourth capacitors, The sources of the tenth to thirteenth PMOS tubes and the positive electrode of the seventh resistor are simultaneously connected to the power supply terminal, and the gate of the tenth PMOS tube is simultaneously connected to the drain of the tenth PMOS tube, the drain of the ninth NMOS tube in the third current source circuit, the gate of the eleventh PMOS tube and the gate of the twelfth PMOS tube; The drain of the eleventh PMOS tube is simultaneously connected to the positive electrode of the fourth resistor and the positive electrode of the fifth resistor, the drain of the twelfth PMOS tube is simultaneously connected to the drain of the thirteenth PMOS tube, the drain of the fourteenth PMOS tube and the drain of the fifteenth PMOS tube, the gate of the thirteenth PMOS tube is connected to the gate of the fourth PMOS tube in the first current source circuit, and the negative electrode of the fifth resistor R5 is simultaneously connected to the upper plate of the second capacitor and the gate of the PMOS tube; The drain of the fourteenth PMOS tube is simultaneously connected to the drain of the tenth PMOS tube, the gate of the fourteenth PMOS tube and the gate of the thirteenth NMOS tube, the drain of the fifteenth PMOS tube is simultaneously connected to the drain of the eleventh NMOS tube and the gate of the eleventh NMOS tube, the gate of the fifteenth PMOS tube is simultaneously connected to the upper plate of the third capacitor and the negative electrode of the sixth resistor, and the negative electrode of the seventh resistor is simultaneously connected to the positive electrode of the sixth resistor and the source of the sixteenth PMOS tube; The gate of the sixteenth PMOS tube is connected to the gate of the twelfth NMOS tube and the oscillator core circuit at the same time, and the drain of the sixteenth PMOS tube is connected to the drain of the twelfth NMOS tube and the upper plate of the fourth capacitor at the same time; The cathode of the fourth resistor, the sources of the tenth to thirteenth NMOS transistors and the lower plates of the second to fourth capacitors are connected to the ground terminal at the same time.

15. The ring oscillator of claim 14, wherein the oscillator core circuit comprises: The seventeenth to twenty-fifth PMOS tubes, the fourteenth to twenty-second NMOS tubes and the fifth to sixth capacitors, The source electrodes of the seventeenth to eighteenth PMOS tubes, the upper plate of the fifth capacitor, the source electrode of the twentieth PMOS tube, the source electrode of the twenty-second PMOS tube, and the source electrodes of the twenty-fourth to twenty-fifth PMOS tubes are simultaneously connected to the power supply terminal; The gate of the seventeenth PMOS tube is simultaneously connected to the drain of the seventeenth PMOS tube, the drain of the fourteenth NMOS tube and the drain of the thirteenth NMOS tube in the frequency compensation circuit, the gate of the eighteenth PMOS tube, the lower plate of the fifth capacitor, the gate of the twentieth PMOS tube, the gate of the twenty-second PMOS tube and the gate of the twenty-fifth PMOS tube, and the gate of the fourteenth NMOS tube is connected to the gate of the eighth NMOS tube in the third current source circuit; The drain of the eighteenth PMOS tube is connected to the source of the nineteenth PMOS tube, and the gate of the nineteenth PMOS tube is simultaneously connected to the gate of the fifteenth NMOS tube, the drain of the twenty-third PMOS tube, the drain of the nineteenth NMOS tube, the gate of the twenty-fourth PMOS tube, and the gate of the twenty-first NMOS tube; The drain of the nineteenth PMOS tube is simultaneously connected to the drain of the fifteenth NMOS tube, the gate of the twenty-first PMOS tube and the gate of the seventeenth NMOS tube, the source of the fifteenth NMOS tube is connected to the drain of the sixteenth NMOS tube, the gate of the sixteenth NMOS tube is simultaneously connected to the gate of the eighteenth NMOS tube, the gate of the twentieth NMOS tube, the upper plate of the sixth capacitor, the gate of the twenty-second NMOS tube, the drain of the twenty-second NMOS tube and the drain of the twenty-fifth PMOS tube; The drain of the 20th PMOS tube is connected to the source of the 21st PMOS tube, the drain of the 21st PMOS tube is simultaneously connected to the drain of the 17th NMOS tube, the gate of the 23rd PMOS tube and the gate of the 19th NMOS tube, and the source of the 17th NMOS tube N17 is connected to the drain of the 18th NMOS tube; The drain of the twenty-second PMOS tube is connected to the source of the twenty-third PMOS tube, the source of the nineteenth NMOS tube is connected to the drain of the twentieth NMOS tube, and the drain of the twenty-fourth PMOS tube is simultaneously connected to the drain of the twenty-first NMOS tube and the gate of the PMOS tube in the frequency compensation circuit; The source of the fourteenth NMOS tube, the source of the sixteenth NMOS tube, the source of the eighteenth NMOS tube, the source of the twentieth NMOS tube, the lower plate of the sixth capacitor and the sources of the twenty-first to twenty-second NMOS tubes are connected to the ground terminal at the same time.

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