Thermal resistance measuring device and method

Abstract

The invention provides a thermal resistance measuring device and method. The thermal resistance measuring device comprises a current source, a main control module, a controllable load module and a current detection module. The current source is connected with a temperature-sensitive device of a chip to be tested, and the main control module and the controllable load module are both electrically connected with the chip to be tested. The current source supplies power to a temperature-sensitive device of a to-be-tested chip so as to acquire temperature rise information of the to-be-tested chip. The main control module is used for changing the equivalent resistance value of the controllable load module so as to change the temperature state of the chip to be tested; the current detection module is used for detecting the total current of the controllable load module and the chip to be detected; the main control module is also used for detecting the first voltage of the chip to be detected and the second voltage of the controllable load module; and according to the total current, the first voltage, the second voltage, the equivalent resistance value of the controllable load module and the temperature rise information of the to-be-tested chip, the thermal resistance of the to-be-tested chip is obtained. According to the invention, the cost can be obviously saved under the condition of ensuring the measurement accuracy.

Description

Technical Field

[0001] The invention relates to the technical field of thermal resistance measurement, and in particular to a thermal resistance measurement device and method. Background Art

[0002] The junction temperature of a chip (such as a microcontroller) directly affects the performance, reliability and service life of the chip. When the chip is working, an excessively high junction temperature will have many adverse effects on the chip, such as reduced performance, reduced reliability and shortened life. With the expansion of the scale of chip use and the gradual increase in the importance of reliability, how to thermally manage chips has become one of the important research topics for technicians in this field. To thermally manage the chip, it is necessary to quickly and accurately know the thermal resistance of the chip during the chip design process and actual use. The thermal resistance of the chip is a parameter used to evaluate the heat dissipation performance of the device. Thermal resistance is the ratio between the temperature difference at both ends of an object and the power of the heat source when heat is transferred to the object.

[0003] In the related art, the thermal resistance of a chip is usually obtained by conventional methods, such as simulation measurement or measurement using large test instruments. Simulation testing cannot guarantee its accuracy, and purchasing large instruments will incur high costs. In addition, the power consumption of a chip is generally low, and the thermal resistance measured by conventional methods is usually not accurate enough.

[0004] It should be noted that the information disclosed in the background technology section of the invention is only intended to deepen the understanding of the general background technology of the invention, and should not be regarded as an admission or suggestion in any form that the information constitutes prior art already known to those skilled in the art. Summary of the invention

[0005] The purpose of the present invention is to provide a thermal resistance measuring device and method to address one or more of the problems of high cost and low accuracy in the thermal resistance measuring method of the chip in the prior art. The thermal resistance value of the chip to be measured by the present invention is not only highly accurate, but also low in cost, simple in structure and easy to implement.

[0006] To achieve the above object, the present invention is implemented through the following technical scheme: a thermal resistance measuring device for a chip, the thermal resistance measuring device comprising: a current source, a main control module, and a controllable load module and a current detection module electrically connected to the main control module; the current source is connected to a temperature-sensitive device of a chip to be measured, and the main control module and the controllable load module are both electrically connected to the chip to be measured;

[0007] The current source is used to supply power to the temperature-sensitive device of the chip to be tested, so that the main control module can obtain the temperature rise information of the chip to be tested;

[0008] The main control module is configured to change the equivalent resistance of the controllable load module to change the temperature state of the chip to be tested;

[0009] The current detection module is used to detect the total current of the controllable load module and the chip to be tested;

[0010] The main control module is used to detect the first voltage of the chip to be tested and the second voltage of the controllable load module; and obtain the thermal resistance of the chip to be tested according to the total current, the first voltage, the second voltage, the equivalent resistance of the controllable load module and the temperature rise information of the chip to be tested.

[0011] Optionally, the controllable load module includes a load circuit consisting of at least one of a resistor, a capacitor and a digital potentiometer.

[0012] Optionally, the controllable load module comprises a resistance circuit, the resistance circuit comprises at least two sub-resistance circuits connected in parallel, each sub-resistance circuit comprises a switch device and a resistor connected in series;

[0013] The resistance circuit is electrically connected to one of the IO ports of the chip to be tested;

[0014] The changing of the equivalent resistance of the controllable load module includes: the main control module controlling the off and on states of the switch device.

[0015] Optionally, the controllable load module includes a plurality of sub-resistance circuits, each of which includes a resistor; each of which is electrically connected to a different IO port of the chip to be tested;

[0016] The changing of the equivalent resistance value of the controllable load module includes: the chip under test controls the level of the output of the IO port connected to the sub-resistance circuit.

[0017] Optionally, the resistance of the resistor in the sub-resistance circuit satisfies the following relationship:

[0018]

[0019] Wherein, N is the number of the sub-resistance circuits, R0 is the resistance value of the resistor in one of the sub-resistance circuits, R N is the resistance value of the resistor in the Nth sub-resistance circuit.

[0020] Optionally, the thermal resistance measuring device further comprises a human-computer interaction module electrically connected to the main control module;

[0021] The human-computer interaction module is configured to receive target load information of the chip to be tested, and send the target load information to the main control module, so that the main control module controls the equivalent resistance value of the controllable load module.

[0022] Optionally, the thermal resistance measuring device further includes a main control board and a sub-board, the current source, the main control module, the controllable load module, the current detection module and the human-computer interaction module are all arranged on the main control board, and the chip to be tested is arranged on the sub-board.

[0023] Optionally, the temperature-sensitive device includes an ESD protection diode of the pin of the chip to be tested, and the current source provides a constant current to the ESD protection diode so that a voltage drop of the ESD protection diode is only related to the temperature.

[0024] In order to achieve the above object, the present invention also provides a method for measuring the thermal resistance of a chip, comprising:

[0025] Electrically connecting a controllable load module to the chip to be tested, and allowing the chip to be tested to drive the controllable load module;

[0026] Supplying power to the temperature-sensitive device of the chip to be tested to obtain temperature rise information of the chip to be tested;

[0027] Changing the equivalent resistance of the controllable load module to change the temperature state of the chip to be tested;

[0028] Detecting the total current of the controllable load module and the chip to be tested, as well as the first voltage of the chip to be tested and the second voltage of the controllable load module;

[0029] The thermal resistance of the chip to be tested is obtained according to the total current, the first voltage, the second voltage, the equivalent resistance of the controllable load module, and the temperature rise information of the chip to be tested.

[0030] Optionally, the temperature rise information of the chip to be tested is obtained by the following steps:

[0031] Acquire the junction temperature of the chip to be tested according to the pre-acquired thermal sensitivity coefficient of the temperature-sensitive device and the voltage drop of the temperature-sensitive device at different temperatures;

[0032] Measuring and obtaining the temperature of a target position of the chip to be tested;

[0033] The temperature rise information of the chip to be tested is obtained according to the junction temperature of the chip to be tested and the temperature of the target position.

[0034] Optionally, obtaining the thermal resistance of the chip to be tested according to the total current, the first voltage, the second voltage, the equivalent resistance of the controllable load module, and the temperature rise information of the chip to be tested includes:

[0035] Obtaining a candidate thermal resistance of the chip to be tested at at least one temperature rise point, and obtaining the thermal resistance of the chip to be tested according to the number of the temperature rise points and the candidate thermal resistance at each temperature rise point; at each temperature rise point, the candidate thermal resistance of the chip to be tested is obtained by the following steps:

[0036] Obtaining a total power of the chip under test according to the total current and the first voltage;

[0037] Obtaining the total load power of the chip to be tested according to the second voltage and the equivalent resistance value of the controllable load module;

[0038] Obtaining the dissipated power of the chip under test according to the total power and the total load power;

[0039] A candidate thermal resistance of the chip to be tested is obtained according to the dissipated power and the temperature rise information of the chip to be tested.

[0040] Compared with the prior art, the thermal resistance measurement device and method of a chip provided by the present invention has the following advantages:

[0041] The thermal resistance measuring device of a chip provided by the present invention comprises a current source, a main control module, and a controllable load module and a current detection module electrically connected to the main control module; the current source is connected to the temperature-sensitive device of the chip to be measured, and the main control module and the controllable load module are both electrically connected to the chip to be measured. The thermal resistance measuring device provided by the present invention can supply power to the temperature-sensitive device of the chip to be tested (such as the ESD protection circuit of the pin of the chip to be tested) through the current source, thereby enabling the main control module to obtain the temperature rise information of the chip to be tested (the temperature-sensitive device is a thermal-sensitive device, and by applying a constant current to the temperature-sensitive device, the temperature rise information of the chip to be tested can be obtained according to the change in the forward voltage drop of the temperature-sensitive device); the equivalent resistance of the controllable load module is changed by the main control module to change the temperature state of the chip to be tested (such as increasing the power consumption temperature rise of the chip to be tested, so as to make the measured thermal resistance value more accurate); the total current of the controllable load module and the chip to be tested can be detected by the current detection module; the first voltage of the chip to be tested and the second voltage of the controllable load module can be detected by the main control module; the main control module can obtain the thermal resistance of the chip to be tested according to the total current, the first voltage, the second voltage, the equivalent resistance of the controllable load module and the temperature rise information of the chip to be tested. It can be seen that the thermal resistance measuring device provided by the present invention does not need to use a large thermal resistance testing instrument, and only needs to use commonly used functional devices to achieve the purpose of obtaining the thermal resistance of the chip to be tested, which can significantly save costs; and the thermal resistance measuring device provided by the present invention has a simple structure and is easy to implement. Further, the thermal resistance measuring device provided by the present invention includes the controllable load module, which can increase the power consumption temperature rise of the chip to be tested, so that the measured thermal resistance of the chip to be tested is more accurate; further, the equivalent resistance value of the controllable load module of the thermal resistance measuring device provided by the present invention can be changed, so that the thermal resistance of the chip to be tested can be calculated under different temperature rise conditions, which can improve the measurement accuracy. Further, the thermal resistance measuring device provided by the present invention can automatically perform the entire thermal resistance measurement process without manual participation, which can significantly save manpower and material resources.

[0042] Since the thermal resistance measuring method of the chip provided by the present invention and the thermal resistance measuring device of the chip provided by the present invention belong to the same inventive concept, the thermal resistance measuring method of the chip provided by the present invention at least has all the advantages of the thermal resistance measuring device of the chip provided by the present invention. For more details, please refer to the relevant description of the beneficial effects of the thermal resistance measuring device of the chip above, which will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0043] Figure 1 A schematic diagram of the structure of a thermal resistance measurement device for a chip provided by one embodiment of the present invention;

[0044] Figure 2A schematic diagram of a circuit structure of a controllable load module of a chip thermal resistance measuring device provided by the present invention;

[0045] Figure 3 Another schematic diagram of the circuit structure of the controllable load module of the thermal resistance measuring device of a chip provided by the present invention;

[0046] Figure 4 A schematic flow chart of a method for measuring thermal resistance of a chip provided by another embodiment of the present invention;

[0047] The reference numerals are as follows:

[0048] Chip under test-100, temperature sensitive device-110;

[0049] Current source-210, main control module-220, controllable load module-230, current detection module-240, human-computer interaction module-250;

[0050] Power supply - 300;

[0051] Sub-resistance circuit-410, switching device-411. DETAILED DESCRIPTION

[0052] The following is a further detailed description of the thermal resistance measurement device and method of the chip proposed in the present invention in conjunction with the accompanying drawings. According to the following description, the advantages and features of the present invention will be clearer. It should be noted that the drawings are in a very simplified form and all use non-precise proportions, which are only used to conveniently and clearly assist in explaining the purpose of the embodiments of the present invention. In order to make the purposes, features and advantages of the present invention more obvious and easy to understand, please refer to the accompanying drawings. It should be noted that the structures, proportions, sizes, etc. illustrated in the drawings of this specification are only used to match the contents disclosed in the specification for people familiar with this technology to understand and read, and are not used to limit the limiting conditions for the implementation of the present invention. Any modification of the structure, change in the proportional relationship or adjustment of the size, in the case of the same or similar effects and purposes that can be achieved by the present invention, should still fall within the scope of the technical content disclosed by the present invention. The specific design features of the present invention disclosed herein include, for example, specific dimensions, directions, positions and shapes, which will be determined in part by the specific environment to be applied and used. And, in the embodiments described below, sometimes the same figure mark is used in common between different drawings to represent the same part or part with the same function, and its repeated description is omitted. In this specification, similar reference numerals and letters are used to denote similar items, and thus, once an item is defined in one figure, it need not be further discussed in subsequent figures.

[0053] It should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "comprise a ..." do not exclude the existence of other identical elements in the process, method, article or device including the elements. The singular forms "a", "an" and "the" include plural objects, the term "or" is generally used in a sense including "and / or", the term "several" is generally used in a sense including "at least one", and the term "at least two" is generally used in a sense including "two or more". In addition, the terms "first", "second" and "third" are used for descriptive purposes only and are not to be understood as indicating or suggesting relative importance or implicitly indicating the number of the indicated technical features.

[0054] In addition, those skilled in the art should be able to understand that although the method described below includes multiple operations that appear in a specific order, the order of these operations presented herein is not necessarily the only order in which these operations can be performed. In fact, these operations can be performed sequentially or in parallel (for example, using a parallel processor or a multi-threaded environment). Further, those skilled in the art should also clearly understand that some of the steps described can be omitted and / or some other steps not described herein can be added to the method, and the present invention does not make any limitation to this.

[0055] In order to facilitate understanding and explanation of the present invention, before specifically describing the device and method for measuring the thermal resistance of a chip proposed in the present invention, the relevant contents of the thermal resistance are briefly described as follows.

[0056] In electronic design, if current flows through a resistor, a pressure difference will be generated. Similarly, if heat flows through a thermal resistor, a temperature difference will be generated. A large thermal resistance means that heat is not easily conducted, so the temperature rise of the device is relatively high. The thermal resistance can be used to determine the heat dissipation performance of the device. As mentioned earlier, thermal resistance can be understood as the resistance encountered by heat on the heat transfer path, reflecting the size of the heat transfer capacity of the medium or between media, that is, the degree of junction temperature rise caused by unit dissipated power, and the unit is K / W or ℃ / W. Specifically, taking integrated circuits as an example, thermal resistance is a standard and measure of the ability of the package to conduct the heat generated by the die to the circuit board or the surrounding environment. The thermal resistance value is generally represented by θ. Specifically, the thermal resistance can be calculated using the following formula (1):

[0057]

[0058] In formula (1), θ JX is the thermal resistance of the chip (Die), T J is the chip temperature (junction temperature), T X is the temperature of a target point on the chip where heat is conducted, and P is the input dissipated power.

[0059] Generally speaking, as the junction temperature of a chip increases, the life of the chip will be reduced and the failure rate will increase. When the temperature exceeds the maximum junction temperature given by the chip, the chip may be damaged. The thermal resistance of an IC package (such as the chip under test) is a measure of the ability of the package to conduct the heat generated by the die to the circuit board or the surrounding environment. Given the temperature of two different points, the amount of heat flow from one point to the other is completely determined by the thermal resistance.

[0060] Based on this, the core idea of ​​the present invention is to provide a thermal resistance measuring device for a chip, which can quickly and accurately obtain the thermal resistance of the chip to be measured at a relatively low cost.

[0061] One embodiment of the present invention provides a device for measuring the thermal resistance of a chip. Figure 1 , which schematically shows the structure of the thermal resistance measurement device of the chip provided in this embodiment. Figure 1 It can be seen that the thermal resistance measuring device provided in this embodiment includes: a current source 210, a main control module 220, and a controllable load module 230 and a current detection module 240 electrically connected to the main control module 220; the current source 210 is connected to the temperature-sensitive device 110 (such as an ESD diode) of the chip to be tested 100, and the main control module 220 and the controllable load module 230 are both electrically connected to the chip to be tested 100.

[0062] Specifically, the current source 210 is used to supply power to the temperature-sensitive device 110 of the chip under test 100, so that the main control module 220 can obtain the temperature rise information of the chip under test 100. The main control module 220 is configured to change the equivalent resistance of the controllable load module 230 to change the temperature state of the chip under test 100. The current detection module 240 is used to detect the total current of the controllable load module 230 and the chip under test 100. The main control module 220 is used to detect the first voltage of the chip under test 100 and the second voltage of the controllable load module 230; and obtain the thermal resistance of the chip under test 100 according to the total current, the first voltage, the second voltage, the equivalent resistance of the controllable load module 230 and the temperature rise information of the chip under test 100.

[0063] Therefore, the thermal resistance measuring device provided in this embodiment does not need to use a large thermal resistance testing instrument, and only needs to use commonly used functional devices to achieve the purpose of obtaining the thermal resistance of the chip to be tested 100, which can significantly save costs; and the thermal resistance measuring device provided in this embodiment has a simple structure and is easy to implement. Further, the thermal resistance measuring device provided in this embodiment includes the controllable load module 230, which can increase the power consumption temperature rise of the chip to be tested 100, so that the measured thermal resistance of the chip to be tested 100 is more accurate; further, the equivalent resistance value of the controllable load module 230 of the thermal resistance measuring device provided in this embodiment can be changed, so that the thermal resistance of the chip to be tested 100 can be calculated under different temperature rise conditions, which can improve the measurement accuracy. Further, the thermal resistance measuring device provided in this embodiment, the entire thermal resistance measurement process can be automatically executed without manual participation, which can significantly save manpower and material resources.

[0064] It should be noted that, as those skilled in the art can understand, the present invention does not limit the current source 210. Preferably, the current source 210 can be a pull-in current source. In addition, the present invention does not limit the chip to be tested 100. For example, the chip to be tested includes but is not limited to a microcontroller, a memory, and a sensor. Further, taking the chip to be tested as a microcontroller as an example, the present invention does not limit the width of the internal data bus of the chip to be tested 100. The chip to be tested 100 can be but is not limited to an 8-bit microcontroller, a 16-bit microcontroller, and a 32-bit microcontroller. For another example, the present invention does not limit the specific application field of the chip to be tested 100. The chip to be tested 100 can be but is not limited to an industrial control microcontroller 100, an automotive electronic microcontroller, a home appliance microcontroller, and a smart wearable microcontroller. Further, as those skilled in the art can understand, the chip to be tested 100 has an executable program pre-burned (before the thermal resistance test), and the executable program can drive the controllable load module 230. Furthermore, those skilled in the art should be able to understand that when using the thermal resistance measurement device for a chip provided by the present invention to measure the thermal resistance of the chip to be tested 100, a power supply 300 is also required to power the thermal resistance measurement device and the chip to be tested 100. Preferably, the chip to be tested 100 and the controllable load module 230 use different power supplies 300 or single-point connections with other components of the thermal resistance measurement device to further improve the accuracy of the test.

[0065] In addition, as can be understood by those skilled in the art, the present invention does not limit the specific implementation of the main control module 220. Specifically, the main control module 220 referred to herein is implemented by a dedicated hardware-based system for performing a specified function or action, or can be implemented by a combination of dedicated hardware and computer instructions. Exemplarily, the main control module 220 referred to herein can be a central processing unit (CPU), or other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), field-programmable gate arrays (FPGA) or other programmable logic devices, discrete gates or transistor logic devices, discrete hardware components, etc. The general-purpose processor can be a microprocessor or the processor can also be any conventional processor, etc.

[0066] Preferably, in some exemplary embodiments, the temperature-sensitive device includes an ESD protection diode at the pin 100 of the chip to be tested, and the current source 210 provides a constant current to the ESD protection diode so that the voltage drop of the ESD protection diode is only related to the temperature. Therefore, the thermal resistance measurement device of the chip provided by the present invention directly uses the ESD protection diode at the pin 100 of the chip to be tested as a temperature-sensitive device to obtain the temperature rise information of the chip to be tested, and can conveniently and quickly obtain the junction temperature of the chip to be tested without increasing any hardware cost, which can further save costs. It should be noted that the use of the ESD protection diode at the pin 100 of the chip to be tested as a temperature-sensitive device is only an exemplary description of a preferred embodiment, and not a limitation of the present invention. The present invention does not limit the specific implementation of the temperature-sensitive device. In other implementations, the temperature-sensitive device may also be a thermistor, etc.

[0067] Preferably, in some exemplary embodiments, the controllable load module 230 includes a load circuit composed of at least one of a resistor, a capacitor, and a digital potentiometer. Therefore, the thermal resistance measuring device provided in this embodiment only needs to use common functional devices such as resistors, capacitors, and digital potentiometers, which is not only low in cost, but also can increase and change the power consumption and temperature rise of the chip to be tested 100, and can improve the accuracy of the thermal resistance measurement of the microcontroller.

[0068] Specifically, as can be understood by those skilled in the art, the present invention does not limit the specific structure of the controllable load module 230. For example, in some embodiments, the controllable load module 230 can be a resistance circuit load consisting of only resistors in parallel, first in series and then in parallel, adjustable resistors, etc.; in other embodiments, the controllable load module 230 can also be a capacitance circuit load consisting of only capacitors in parallel, first in series and then in parallel, adjustable capacitors, etc.; in some other embodiments, the controllable load module 230 can also be a digital potentiometer; further, the controllable load module 230 can also be a mixed circuit load consisting of at least two of a resistor, a capacitor and a digital potentiometer. Furthermore, the load circuit can control the on and off of the resistor, capacitor and / or digital potentiometer through a switch module such as an analog switch, a relay, a jump point, etc.

[0069] For example, in some of the exemplary embodiments, see Figure 2 , which schematically shows one circuit structure diagram of the controllable load module 230 of the thermal resistance measurement device of the chip provided by the present invention. Figure 2 It can be seen that the controllable load module 230 includes a resistance circuit, and the resistance circuit includes at least two sub-resistance circuits 410 connected in parallel, and each sub-resistance circuit 410 includes a switch device 411 and a resistor ( Figure 2 R1, R2, R3, ... or R N ); the resistance circuit is electrically connected to one of the IO ports (GPIO interface, General Purpose I / O Ports) of the chip under test 100. Correspondingly, the change of the equivalent resistance of the controllable load module 230 includes: controlling the on and off states of the switch device 411. Preferably, the on and off states of the switch device 411 can be controlled by the main control module 220 to change the equivalent resistance of the controllable load module 230 (i.e., changing the resistances R1, R2, R3, ... and R N and the chip under test 100), thereby changing the temperature rise of the chip under test 100.

[0070] Therefore, in the thermal resistance measuring device provided in this embodiment, the controllable load module 230 is electrically connected to only one IO port of the chip under test 100, so that the connection between the thermal resistance measuring device and the chip under test 100 is very simple and easy to implement.

[0071] It should be noted that, as those skilled in the art can understand, the present invention does not limit the switch device 411 , and the switch device 411 may be, but is not limited to, an analog switch, a relay, or a jumper.

[0072] In particular, if Figure 2 As shown, one end of the resistance circuit is connected to the IO port of the chip to be tested 100, so when the IO port of the chip to be tested 100 outputs a high level, the other end of the resistance circuit is connected to the ground (low level); when the IO port of the chip to be tested 100 outputs a low level, the other end of the resistance circuit is connected to the power supply 300 (high level). Specifically, as mentioned above, the off and on states of the switch device 411 can be controlled by the main control module 220, thereby changing the equivalent resistance value of the controllable load module 230. The chip to be tested 100 only needs to set the level of the IO port high or low.

[0073] Preferably, in other exemplary embodiments, see Figure 3 , which schematically shows another circuit structure diagram of the controllable load module 230 of the thermal resistance measurement device for a chip provided by the present invention. Figure 3 It can be seen that the controllable load module 230 includes a plurality of sub-resistance circuits 410, each of which includes a resistor; each of the sub-resistance circuits 410 is electrically connected to different IO ports of the chip under test 100. Correspondingly, the change of the equivalent resistance value of the controllable load module 230 includes: the chip under test 100 controls the output level of the IO port connected to the sub-resistance circuit 410.

[0074] Preferably, in one exemplary embodiment, the sub-resistance circuit 410 (the present invention does not limit the connection relationship between the sub-resistance circuit 410 and the chip under test 100, which can be Figure 2 The sub-resistance circuit 410 in Figure 3 The resistance value of the resistor in the sub-resistance circuit 410) satisfies the following relationship:

[0075]

[0076] Wherein, N is the number of the sub-resistance circuits 410, R0 is the resistance value of the resistor in the first sub-resistance circuit 410, and R N is the resistance value of the resistor in the Nth sub-resistance circuit 410.

[0077] It should be noted that, as those skilled in the art can understand, the present invention does not limit the number of sub-resistance circuits 410, but preferably, N is an integer greater than or equal to 2.

[0078] Specifically, the resistors in the sub-resistance circuit 410 are numbered according to their resistance values, as shown in the following formula:

[0079]

[0080] For example, in some embodiments, Figure 2 As shown, R1, R2, R3, ..., R N In other embodiments, the Figure 3 As shown, the sub-resistance circuits are connected to multiple IO ports of the chip under test 100. By using the main control module 220 to control R1, R2, R3, ..., R N The on-off of the IO port of the chip under test 100 is controlled so that the IO of the chip under test 100 obtains an N-bit adjustable resistance load. N The equivalent resistance of the controllable load module 230 can be accurately controlled by changing the value of -1 (for example, the equivalent resistance of the controllable load is input to the main control module 220 through the human-computer interaction module 250 described below). For example, if the value is 0 (for example, the equivalent resistance of the controllable load is input to the main control module 220 through the human-computer interaction module 250 described below), it is converted to binary 000…000, and R1, R2, R3,…, R N are disconnected, the equivalent resistance of the controllable load module 230 (i.e., the load size of the chip under test 100) is 0; if the value is 2 N -1 (the equivalent resistance value 2^N-1 of the controllable load is input to the main control module 220 through the human-computer interaction module 250 described below), which is converted into binary 111...111, R1, R2, R3,..., R N All are connected, and the equivalent resistance of the controllable load module 230 (i.e., the load size of the chip under test 100) is as follows (3):

[0081]

[0082] Please continue to see Figure 1 ,from Figure 1 It can be seen that the thermal resistance measuring device provided in some exemplary embodiments further includes a human-computer interaction module 250 electrically connected to the main control module 220. The human-computer interaction module 250 is configured to receive the target load information of the chip to be tested 100 and send the target load information to the main control module 220 so that the main control module 220 controls the equivalent resistance of the controllable load module 230. Therefore, the thermal resistance measuring device provided in this embodiment, through the human-computer interaction module 250, is not only more convenient for controlling the thermal resistance test of the chip to be tested 100 (for example, inputting the equivalent resistance of the controllable load module 230 through the human-computer interaction module 250 so that the main control module 220 controls the switch device 411), but also more convenient for the process of real-time thermal resistance testing (for example, the temperature rise information of the chip to be tested 100, the thermal resistance value, the equivalent resistance of the controllable load module 230, etc.).

[0083] It should be noted that, as those skilled in the art can understand, the present invention does not limit the human-computer interaction module 250. Exemplarily, the human-computer interaction module 250 may include but is not limited to a display screen, a computer, and a mobile terminal.

[0084] Preferably, the thermal resistance measuring device provided in some exemplary embodiments further includes a main control board (not shown in the figure) and a sub-board (not shown in the figure), the current source 210, the main control module 220, the controllable load module 230, the current detection module 240 and the human-computer interaction module 250 are all arranged on the main control board, and the chip to be tested 100 is arranged on the sub-board. Therefore, the thermal resistance measuring device provided in this embodiment, in which the chip to be tested 100 is arranged on the sub-board, and the current source 210, the main control module 220, the controllable load module 230, the current detection module 240 and the human-computer interaction module 250 are all arranged on the main control board, is more convenient to implement.

[0085] Specifically, in one exemplary embodiment, the daughter board is drawn according to the JESD51 standard, the chip to be tested 100 can be placed on the daughter board as required, and the power pins and other used IO ports of the chip to be tested 100 are brought out through gold fingers; and then the current source 210, the main control module 220, the controllable load module 230 and the current detection module 240 located on the main control board are electrically connected through the gold fingers.

[0086] It is particularly important to note that for more detailed information about how the main control module 220 obtains the thermal resistance of the chip to be tested 100 based on the total current, the first voltage, the second voltage, the equivalent resistance of the controllable load module 230 and the temperature rise information of the chip to be tested 100, please refer to the relevant description of the thermal resistance measurement method of the chip provided in the following embodiment for adaptive understanding. In order to avoid repetition, it will not be expanded here.

[0087] Another embodiment of the present invention provides a method for measuring the thermal resistance of a chip. Figure 4 , which schematically shows a flow chart of the thermal resistance measurement method of the chip provided in this embodiment. Figure 4 It can be seen that the thermal resistance measurement method provided in this embodiment includes:

[0088] S100: electrically connecting a controllable load module to a chip to be tested, and allowing the chip to be tested to drive the controllable load module;

[0089] S200: supplying power to the temperature-sensitive device of the chip to be tested to obtain temperature rise information of the chip to be tested;

[0090] S300: changing the equivalent resistance of the controllable load module to change the temperature state of the chip to be tested;

[0091] S400: Detecting the total current of the controllable load module and the chip to be tested, as well as the first voltage of the chip to be tested and the second voltage of the controllable load module;

[0092] S500: Acquire the thermal resistance of the chip to be tested according to the total current, the first voltage, the second voltage, the equivalent resistance of the controllable load module, and the temperature rise information of the chip to be tested.

[0093] It can be seen that the thermal resistance measurement method of the chip provided in this embodiment changes the load size of the chip to be tested by changing the equivalent resistance of the controllable load module, thereby increasing the power consumption temperature rise of the chip to be tested, thereby making the measured thermal resistance of the chip to be tested more accurate; further, the thermal resistance measurement method provided in this embodiment changes the equivalent resistance of the controllable load module, thereby being able to calculate the thermal resistance of the chip to be tested under different temperature rise conditions, thereby improving the measurement accuracy. Furthermore, in the thermal resistance measurement method provided by the present invention, the entire thermal resistance measurement process can be automatically executed without manual participation, which can significantly save manpower and material resources.

[0094] Preferably, in some exemplary embodiments, the temperature rise information of the chip to be tested in step S200 is obtained by the following steps:

[0095] S210: Acquire the junction temperature of the chip to be tested according to the pre-acquired thermal sensitivity coefficient of the temperature-sensitive device and the voltage drop of the temperature-sensitive device at different temperatures;

[0096] S220: Measure and obtain the temperature of the target position of the chip to be tested;

[0097] S230: Obtaining temperature rise information of the chip to be tested according to the junction temperature of the chip to be tested and the temperature of the target position.

[0098] It can be seen that the thermal resistance measurement method of the chip provided in this embodiment uses the temperature-sensitive device of the chip to be tested as the temperature-sensitive device, thereby being able to quickly and conveniently obtain the junction temperature of the chip to be tested without increasing any hardware cost, thereby laying a solid foundation for obtaining the temperature rise information of the chip to be tested and being able to improve the measurement efficiency of the thermal resistance of the chip to be tested.

[0099] It should be noted that, as can be understood by those skilled in the art, by applying a constant current to a temperature-sensitive device as a thermal device, the temperature rise information of the chip to be tested can be obtained according to the change in the forward voltage drop of the temperature-sensitive device. Specifically, the relationship between the change in the forward voltage drop of the temperature-sensitive device and its temperature rise can be expressed by the following formula (4):

[0100] ΔT J =K×ΔV D (4)

[0101] In the above formula, K is the thermal sensitivity coefficient of the temperature sensitive device, ΔT J is the temperature rise of the temperature sensitive device, ΔV D is the change in the forward voltage drop of the temperature sensitive device.

[0102] It should be further explained that the present invention does not limit the method for obtaining the temperature of the target position of the chip to be tested. For example, it can be obtained by real-time measurement by a temperature sensor. Further, the temperature sensor can be a thermistor sensor, a non-contact sensor, or an infrared temperature sensor. In addition, the target position of the chip to be tested is also not limited. The target position can be located at any position on the surface of the chip to be tested. For example, the target position can be located on the upper surface of the chip to be tested, or on the lower surface of the chip to be tested, or on the side of the chip to be tested, which will not be described in detail.

[0103] After the temperature rise information of the chip under test is obtained in step S200, step S300 can calculate the dissipated power of the chip under test according to the total current, the first voltage, the second voltage, and the equivalent resistance of the controllable load module.

[0104] Preferably, in some exemplary embodiments, the power dissipation of the chip under test can be calculated by the following formulas (5), (6) and (7):

[0105] P D =P T -P R (5)

[0106] P T =L T *V T (6)

[0107]

[0108] In equations (5), (6) and (7), P D is the power dissipation of the chip under test, P T is the total power of the chip under test and the controllable load module, P R is the power of the controllable load module (i.e., the total load power of the chip to be tested), I T is the total current, V T is the first voltage of the chip under test, V R is the second voltage of the controllable load module, and R is the equivalent resistance of the controllable load module.

[0109] In some other exemplary embodiments, for example Figure 3 In the embodiment of the IO port of the chip under test controlling the controllable load module, the dissipated power can also be calculated in the following manner:

[0110] P D =P T总 -P R总 (8)

[0111] P T =I T *V T (9)

[0112]

[0113] In equations (8), (9) and (10), P D is the power dissipation of the chip under test, P T总 is the total power of the chip under test and the controllable load module, which is composed of the power P of each IO branch T Add together, P R总 is the power of the controllable load module (i.e., the total load power of the chip to be tested), I T is the current of each IO branch, V T is the first voltage of the chip under test, V R is the second voltage of the controllable load module, and R is the resistance of each IO branch. Further, in some preferred embodiments, if the controllable load module includes multiple sub-load circuits, the power of the controllable load module can also be obtained according to the power of the multiple sub-load circuits. For more details on how to calculate the power of the controllable load module according to the power of the sub-load circuits, please refer to the relevant technical adaptability understanding known to those skilled in the art. Due to space limitations, it will not be described in detail here.

[0114] It should be noted that, when implementing the present invention, the thermal resistance of the chip to be tested measured at one of the temperature rise points can be used as the thermal resistance of the chip to be tested, or the thermal resistance of the chip to be tested measured at multiple temperature rise points can be used as candidate thermal resistance. Then, the thermal resistance of the chip to be tested can be obtained based on the candidate thermal resistances of these multiple temperature rise points, so as to further improve the accuracy of the measured thermal resistance of the chip to be tested.

[0115] For example, in some exemplary implementations, obtaining the thermal resistance of the chip to be tested according to the total current, the first voltage, the second voltage, the equivalent resistance of the controllable load module, and the temperature rise information of the chip to be tested in step S500 includes:

[0116] Obtain the candidate thermal resistance of the chip under test at at least one temperature rise point, and obtain the thermal resistance of the chip under test according to the number of the temperature rise points and the candidate thermal resistance at each temperature rise point. Specifically, at each temperature rise point, the candidate thermal resistance of the chip under test is obtained by the following steps:

[0117] S510: Obtaining a total power of the chip under test according to the total current and the first voltage;

[0118] S520: Obtaining the total load power of the chip to be tested according to the second voltage and the equivalent resistance of the controllable load module;

[0119] S530: Obtaining the dissipated power of the chip under test according to the total power and the total load power;

[0120] S540: Obtaining a candidate thermal resistance of the chip to be tested according to the dissipated power and the temperature rise information of the chip to be tested.

[0121] Therefore, the chip thermal resistance measurement method provided in this embodiment adopts a method of obtaining the thermal resistance of the chip to be measured based on candidate thermal resistances of multiple temperature rise points, which can further improve the accuracy of the measured thermal resistance of the chip to be measured.

[0122] Specifically, the thermal resistance of the chip to be tested can be calculated by formula (11):

[0123]

[0124] In formula (11), θ is the thermal resistance of the chip to be tested, θ Ji is the candidate thermal resistance of the ith temperature rise point (ie, the thermal resistance of the chip to be tested measured at the ith temperature rise point), and n is the number of temperature rise points.

[0125] In summary, compared with the prior art, the thermal resistance measurement device and method of a chip provided by the present invention has the following advantages:

[0126] The thermal resistance measuring device provided by the present invention does not need to use a large thermal resistance testing instrument, and only needs to use commonly used functional devices to achieve the purpose of obtaining the thermal resistance of the chip to be tested, which can significantly save costs; and the thermal resistance measuring device provided by the present invention has a simple structure and is easy to implement. Furthermore, the thermal resistance measuring device provided by the present invention includes the controllable load module, which can increase the power consumption and temperature rise of the chip to be tested, so that the measured thermal resistance of the chip to be tested is more accurate; further, the equivalent resistance value of the controllable load module of the thermal resistance measuring device provided by the present invention can be changed, so that the thermal resistance of the chip to be tested can be calculated under different temperature rise conditions, which can improve the measurement accuracy. Furthermore, the thermal resistance measuring device provided by the present invention can automatically perform the entire thermal resistance measurement process without manual participation, which can significantly save manpower and material resources.

[0127] Since the thermal resistance measuring method of the chip provided by the present invention and the thermal resistance measuring device of the chip provided by the present invention belong to the same inventive concept, the thermal resistance measuring method of the chip provided by the present invention at least has all the advantages of the thermal resistance measuring device of the chip provided by the present invention. For more details, please refer to the relevant description of the beneficial effects of the thermal resistance measuring device of the chip above, which will not be repeated here.

[0128] It should be noted that the devices and methods disclosed in the embodiments of this article can also be implemented in other ways. The device implementation described above is only schematic. For example, the flowcharts and block diagrams in the accompanying drawings show the possible architecture, functions and operations of the devices, methods and computer program products according to multiple embodiments of this article. In this regard, each box in the flowchart or block diagram can represent a part of a module, program or code, and the module, program segment or part of the code contains one or more executable instructions for implementing the specified logical function, and the module, program segment or part of the code contains one or more executable instructions for implementing the specified logical function. It should also be noted that in some alternative implementations, the functions marked in the box can also occur in a different order from the order marked in the accompanying drawings. For example, two consecutive boxes can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved. It should also be noted that each box in the block diagram and / or flowchart, and the combination of boxes in the block diagram and / or flowchart.

[0129] In addition, the functional modules in the various embodiments of this document may be integrated together to form an independent part, or each module may exist independently, or two or more modules may be integrated to form an independent part.

[0130] The above description is only a description of the preferred embodiment of the present invention, and is not intended to limit the scope of the present invention. Any changes and modifications made by a person skilled in the art in the field of the present invention based on the above disclosure are within the scope of protection of the present invention. Obviously, a person skilled in the art can make various changes and modifications to the present invention without departing from the spirit and scope of the present invention. Thus, if these modifications and variations fall within the scope of the present invention and its equivalents, the present invention is also intended to include these modifications and variations.

Claims

1. A thermal resistance measuring device for a chip, characterized in that: include: A current source, a main control module, and a controllable load module and a current detection module electrically connected to the main control module; the current source is connected to the temperature-sensitive device of the chip to be tested, and the main control module and the controllable load module are both electrically connected to the chip to be tested; The current source is used to supply power to the temperature-sensitive device of the chip to be tested, so that the main control module can obtain the temperature rise information of the chip to be tested; The main control module is configured to change the equivalent resistance of the controllable load module to change the temperature state of the chip to be tested; The current detection module is used to detect the total current of the controllable load module and the chip to be tested; The main control module is used to detect the first voltage of the chip to be tested and the second voltage of the controllable load module; And according to the total current, the first voltage, the second voltage, the equivalent resistance of the controllable load module and the temperature rise information of the chip to be tested, the thermal resistance of the chip to be tested is obtained.

2. The thermal resistance measuring device according to claim 1, characterized in that: The controllable load module includes a load circuit composed of at least one of a resistor, a capacitor and a digital potentiometer.

3. The thermal resistance measuring device according to claim 2, characterized in that: The controllable load module comprises a resistance circuit, the resistance circuit comprises at least two sub-resistance circuits connected in parallel, each sub-resistance circuit comprises a switch device and a resistor connected in series; The resistance circuit is electrically connected to one of the IO ports of the chip to be tested; The changing of the equivalent resistance of the controllable load module includes: the main control module controlling the off and on states of the switch device.

4. The thermal resistance measuring device according to claim 2, characterized in that: The controllable load module includes a plurality of sub-resistance circuits, each of which includes a resistor; each of which is electrically connected to different IO ports of the chip to be tested; The changing of the equivalent resistance value of the controllable load module includes: the chip under test controls the level of the output of the IO port connected to the sub-resistance circuit.

5. The thermal resistance measuring device according to claim 3 or 4, characterized in that: The resistance value of the resistor in the sub-resistance circuit satisfies the following relationship: Wherein, N is the number of the sub-resistance circuits, R0 is the resistance value of the resistor in one of the sub-resistance circuits, R N is the resistance value of the resistor in the Nth sub-resistance circuit.

6. The thermal resistance measuring device according to claim 1, characterized in that: It also includes a human-computer interaction module electrically connected to the main control module; The human-computer interaction module is configured to receive target load information of the chip to be tested, and send the target load information to the main control module, so that the main control module controls the equivalent resistance value of the controllable load module.

7. The thermal resistance measuring device according to claim 6, characterized in that: It also includes a main control board and a sub-board. The current source, the main control module, the controllable load module, the current detection module and the human-computer interaction module are all arranged on the main control board, and the chip to be tested is arranged on the sub-board.

8. The thermal resistance measuring device according to claim 1, characterized in that: The temperature-sensitive device includes an ESD protection diode of the pin of the chip to be tested, and the current source provides a constant current to the ESD protection diode so that the voltage drop of the ESD protection diode is only related to the temperature.

9. A method for measuring the thermal resistance of a chip, characterized in that: include: Electrically connecting a controllable load module to the chip to be tested, and allowing the chip to be tested to drive the controllable load module; Supplying power to the temperature-sensitive device of the chip to be tested to obtain temperature rise information of the chip to be tested; Changing the equivalent resistance of the controllable load module to change the temperature state of the chip to be tested; Detecting the total current of the controllable load module and the chip to be tested, as well as the first voltage of the chip to be tested and the second voltage of the controllable load module; The thermal resistance of the chip to be tested is obtained according to the total current, the first voltage, the second voltage, the equivalent resistance of the controllable load module, and the temperature rise information of the chip to be tested.

10. The thermal resistance measurement method according to claim 9, characterized in that: The temperature rise information of the chip to be tested is obtained by the following steps: Acquire the junction temperature of the chip to be tested according to the pre-acquired thermal sensitivity coefficient of the temperature-sensitive device and the voltage drop of the temperature-sensitive device at different temperatures; Measuring and obtaining the temperature of a target position of the chip to be tested; The temperature rise information of the chip to be tested is obtained according to the junction temperature of the chip to be tested and the temperature of the target position.

11. The thermal resistance measurement method according to claim 9, characterized in that: Acquiring the thermal resistance of the chip to be tested according to the total current, the first voltage, the second voltage, the equivalent resistance of the controllable load module, and the temperature rise information of the chip to be tested, including: Obtaining a candidate thermal resistance of the chip to be tested at at least one temperature rise point, and obtaining the thermal resistance of the chip to be tested according to the number of the temperature rise points and the candidate thermal resistance at each temperature rise point; at each temperature rise point, the candidate thermal resistance of the chip to be tested is obtained by the following steps: Obtaining a total power of the chip under test according to the total current and the first voltage; The total load power of the chip to be tested is obtained by using the second voltage and the equivalent resistance of the controllable load module; Obtaining the dissipated power of the chip under test according to the total power and the total load power; A candidate thermal resistance of the chip to be tested is obtained according to the dissipated power and the temperature rise information of the chip to be tested.

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