Rail-to-rail operational amplifier analog IC chip with self-biasing circuit

Abstract

The invention relates to the technical field of integrated circuits, in particular to a rail-to-rail operational amplifier analog IC chip with a self-biasing circuit, which comprises a reference current source circuit and an operational amplifier circuit, the reference current source circuit comprises a starting circuit, a positive temperature coefficient circuit, a negative temperature coefficient circuit and a current summing circuit; the operational amplifier circuit comprises an input stage circuit, an intermediate stage circuit and an output stage circuit. According to the invention, the reference current source circuit without an operational amplifier is used as a self-biasing circuit, so that the precision is improved and the chip area is reduced; by adopting a level shift technology, a common-mode input voltage range is between a negative power supply rail and a positive power supply rail, and a feedforward type AB-class amplifying circuit is adopted as an output stage circuit. Compared with a traditional level shifting technology, the level shifting technology only uses two differential pairs, and a source follower used in the traditional level shifting technology is not added.

Description

Technical Field

[0001] The invention relates to the technical field of integrated circuits, and in particular to a rail-to-rail operational amplifier analog IC chip with a self-bias circuit. Background Art

[0002] In recent years, with the continuous development of information industries such as the Internet of Things, quantum communications, artificial intelligence, and portable devices, integrated circuits have become the basis for all walks of life to achieve informatization and intelligence. Integrated circuits play an irreplaceable role in both military and civilian use. In the field of national security and defense, it plays a key role in maintaining national interests and defending national sovereignty; in the process of economic construction and enhancing comprehensive national strength, integrated circuits are the concrete manifestation of core competitiveness. As system performance becomes more and more complex and integrated circuits are more and more widely used, people have found that the importance of analog circuits in integrated circuits is unquestionable, and it is still irreplaceable in practice and application, and operational amplifiers are the most basic and important part of analog integrated circuits.

[0003] An operational amplifier, or op amp for short, is a circuit unit with a very high amplification factor. In actual circuit applications, it is usually combined with a feedback network to form a combination with specific functions. In recent years, due to the further development of electronic information systems towards low power consumption and low power supply voltage, higher requirements have been placed on the input and output voltage range and power consumption of operational amplifiers. Some traditional operational amplifiers may be unable to meet the existing requirements, which reduces their applicability.

[0004] In summary, the problem that some traditional operational amplifiers may be unable to meet existing requirements has become a difficult problem that needs to be solved urgently in this field. Therefore, it is necessary to propose a rail-to-rail operational amplifier analog IC chip with a self-bias circuit. Summary of the invention

[0005] In order to solve the above problems, the present invention provides a rail-to-rail operational amplifier analog IC chip with a self-bias circuit, which uses a reference current source circuit without an operational amplifier as a self-bias circuit, thereby reducing the use of transistors while achieving high precision and saving chip area; by adopting level shifting technology, the common-mode input voltage range is between the negative power rail and the positive power rail, and a feedforward AB class output stage is used as the output stage of the output stage circuit. Compared with the traditional level shifting technology, this level shifting technology only uses two pairs of differential pairs, and does not add the source follower used in the traditional level shifting technology.

[0006] In order to achieve the above object, the technical solution of the present invention is as follows: a rail-to-rail operational amplifier analog IC chip with a self-bias circuit includes a reference current source circuit and an operational amplifier circuit.

[0007] The reference current source circuit includes the following circuits:

[0008] The startup circuit is used to control the startup and shutdown of the reference current source circuit.

[0009] A positive temperature coefficient circuit is used to increase the current through the positive temperature coefficient circuit as the temperature increases.

[0010] A negative temperature coefficient circuit is used to reduce the current passing through the negative temperature coefficient circuit as the temperature increases.

[0011] The current summing circuit is used for collecting the positive temperature coefficient current generated by the positive temperature coefficient module and the negative temperature coefficient current generated by the negative temperature coefficient module, and adding all the currents to generate a constant reference current.

[0012] The operational amplifier circuit includes the following circuits:

[0013] Input stage circuit used to level shift the differential pair.

[0014] Intermediate stage circuit used to sum the currents from the input modules and provide a load to them.

[0015] The output stage circuit is used to form a folded network feedforward class AB output stage with a minimum current selection circuit.

[0016] Furthermore, the input stage circuit includes a PMOS current mirror, a PMOS differential pair, an NMOS differential pair, an NMOS current mirror and a diode-connected transistor M20, wherein two ends of the transistor M20 are electrically connected to the NMOS current mirror and the NMOS differential pair, respectively; the PMOS current mirror is electrically connected to the PMOS differential pair; the PMOS differential pair is electrically connected to the NMOS differential pair; the NMOS differential pair is electrically connected to the NMOS current mirror; both the PMOS current mirror and the NMOS current mirror are used to provide bias current; and both the PMOS differential pair and the NMOS differential pair are used to transmit differential signals.

[0017] Furthermore, the output stage circuit includes a minimum current selection circuit and a feedforward class AB amplifier circuit, the minimum current selection circuit is electrically connected to the class AB amplifier circuit; the minimum current selection circuit is used to select the minimum output stage bias current; the class AB amplifier circuit is used to control the gate voltage of the output transistor, improve current utilization, and reduce heat loss.

[0018] Furthermore, the positive temperature coefficient circuit is electrically connected to transistors Q1 and Q2, and the negative temperature coefficient circuit is electrically connected to transistor Q3; when the temperature rises, the current passing through the positive temperature coefficient circuit increases linearly, and the specific formula is as follows:

[0019] Ic=Ico.e Vbe / Vt(1)

[0020]

[0021] ΔVbe=Vt*ln(n)=|Vbe1-Vbe2| (3)

[0022]

[0023] Where Vt is the thermal voltage, which is proportional to the temperature coefficient. is a negative temperature coefficient voltage, Ic is the collector current, Ico is the saturation current of the transistor, Vbe1 and Vbe2 are the base-emitter voltages of transistors Q1 and Q2 respectively, ΔVbe is the difference between the base-emitter voltage of transistor Q1 and the base-emitter voltage of transistor Q2, I PTAT is the current of the positive temperature coefficient circuit, R PTAT is the resistance of a circuit with a positive temperature coefficient.

[0024] Furthermore, when the temperature rises, the current through the negative temperature coefficient circuit decreases, and the current is inversely proportional to the temperature. The specific formula is as follows:

[0025] Vbe3=I CTAT *R CTAT (5)

[0026] Where Vbe3 is the base-emitter voltage of transistor Q3, I CTAT is the current of the negative temperature coefficient circuit, R CTAT is the resistance of the circuit with negative temperature coefficient.

[0027] Furthermore, after the differential pair is distinguished, the minimum voltage of the NMOS differential pair is calculated, and the calculation formula is as follows:

[0028] Vin=Vovn+Vgsn+Vgsn (6)

[0029] Wherein, Vovn is the over-drive voltage of NMOS, and Vgsn is the gate-source voltage of NMOS.

[0030] Furthermore, the intermediate stage circuit is composed of transistors M23-M32, and the self-biased common source and common gate circuit is used as the intermediate stage circuit in the operational amplifier circuit, and the bias is provided by transistors M25 and M30.

[0031] The transistor M25 and the transistor M30 work in the same way. The bias current determines the working area of ​​the transistor M25 and the transistor M30. The working area of ​​the transistor M32 is determined by the output current Iin of the input stage and the drain voltage of the transistor M32. The working area of ​​the transistor M31 is determined by the output current and the bias current of the input stage. The specific formula is as follows:

[0032] VdsM31=VgsM31-VgsM30 (7)

[0033] Wherein, VdsM31 is the source-drain voltage of the transistor M31 , VgsM31 is the gate-source voltage of the transistor M31 , and VgsM30 is the gate-source voltage of the transistor M30 .

[0034] Furthermore, the output stage circuit is composed of transistors M33-M41. In the class AB amplifier circuit, when the output stage is in a static state, the gate voltage of transistor M39 is equal to the gate voltage of transistor M41. The bias current is controlled by the class AB amplifier circuit, and the static current is calculated. The specific formula is as follows:

[0035]

[0036] Among them, I Q is the quiescent current, W 41 is the width of transistor M41, L 41 is the length of transistor M41, L 40 is the length of transistor M40, W 40 is the width of transistor M40, I ref is the bias current;

[0037] When the transistor M39 generates an output current, so that the gate-source voltage of the transistor M39 is between the positive power supply voltage and the source voltage of the transistor M38, the transistors M36, M37 and M38 form a folded cascode current mirror, which mirrors the current from the transistor M40 to the transistor M35, and regulates the bias current of the transistor M40 to half of the static current value;

[0038] When the transistor M41 generates an output current, the transistor M38 and the transistor M39 are used as an output current mirror to reduce the current of the transistor M39 to half of the static current value through the output current mirror. The current value of the transistor M39 is calculated as follows:

[0039]

[0040] Among them, I Q is the quiescent current, W 41 is the width of transistor M41, L 41 is the length of transistor M41, L 40 is the length of transistor M40, W 40 is the width of transistor M40, I min is the output current of M39, I ref Represents the reference current.

[0041] Further, another way to verify the behavior of the Class AB amplifier circuit is as follows:

[0042] Find the relationship between the drain current of transistor M41, the drain current of transistor M39 and the bias current. The specific formula is as follows:

[0043]

[0044] Among them, I 39 represents the drain current of transistor M39, I 41 represents the drain current of transistor M41, I ref Represents the bias current.

[0045] Furthermore, the current passing through transistor Q2 is a multiple of the current passing through transistor Q1, and this multiple is determined by the voltage difference ΔVbe between transistor Q1 and transistor Q2 and resistor R2. The voltage difference ΔVbe between transistor Q1 and transistor Q2 is determined by the area ratio of Q1 and Q2.

[0046] The above scheme has the following beneficial effects:

[0047] 1. The present invention improves the accuracy of the self-bias circuit by using a reference current source circuit without an operational amplifier as a self-bias circuit; by adopting a level shifting technique, the common-mode input voltage range is stabilized between the negative power rail and the positive power rail, while ensuring that the input stage transconductance GM remains substantially unchanged within the entire input voltage range, and adopts a feedforward class AB output stage as the output stage of the output stage circuit.

[0048] 2. The reference current source circuit of the present invention is a reference circuit without an operational amplifier. While having high-precision performance, it reduces the use of transistors, thereby reducing the overall area.

[0049] 3. The method for realizing rail-to-rail input proposed by the present invention is a level shifting method. Compared with the traditional level shifting method, this structure uses only two pairs of differential pairs of transistors and cleverly uses a diode-connected NMOS as the key to realizing constant input stage transconductance.

[0050] 4. In the present invention, the intermediate stage circuit adopts a self-biased folded common source and common gate structure, which is well combined with the two pairs of differential pairs of the input stage to play the role of current addition. At the same time, the structure can work normally without providing additional bias, and only the bias is provided by two internal transistors, which greatly reduces the use of transistors and further reduces the area of ​​the circuit.

[0051] 5. The output stage circuit proposed by the present invention adopts a feedforward AB class amplifier circuit. This structure can well ensure the stability of the circuit. Compared with the A class amplifier and the B class amplifier, it can not only ensure that the transistor is always in working state, eliminate the crossover distortion phenomenon, but also greatly reduce the bias current and the static power consumption of the circuit. At the same time, the addition of the minimum current selection circuit can reduce the power consumption of the circuit while maintaining normal operation, and the structure has little effect on the circuit noise.

[0052] Additional aspects and advantages of the present invention will be given in part in the following description and in part will be obvious from the following description, or will be learned through practice of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0053] Figure 1 The schematic diagram of the structure of the reference current source circuit in the embodiment of the rail-to-rail operational amplifier analog IC chip with a self-bias circuit of the present invention.

[0054] Figure 2 The schematic diagram of the structure of the operational amplifier circuit in the embodiment of the rail-to-rail operational amplifier analog IC chip with a self-bias circuit of the present invention.

[0055] Figure 3 The schematic diagram of the structure of the input stage circuit in the embodiment of the rail-to-rail operational amplifier analog IC chip with a self-bias circuit of the present invention.

[0056] Figure 4 The schematic diagram of the structure of the output stage circuit in the embodiment of the rail-to-rail operational amplifier analog IC chip with a self-bias circuit of the present invention.

[0057] Figure 5 The schematic diagram of the circuit of the reference current source in the embodiment of the rail-to-rail operational amplifier analog IC chip with a self-bias circuit of the present invention.

[0058] Figure 6 The schematic diagram of the input and output stages of the rail-to-rail operational amplifier in the embodiment of the rail-to-rail operational amplifier analog IC chip with a self-bias circuit of the present invention is shown. DETAILED DESCRIPTION

[0059] The following is further described in detail through specific implementation methods:

[0060] Embodiment 1:

[0061] As attached Figure 1 , Figure 2 , Figure 3 , Figure 4 , Figure 5 and Figure 6Shown: A rail-to-rail operational amplifier analog IC chip with a self-bias circuit, including a reference current source circuit and an operational amplifier circuit.

[0062] The reference current source circuit includes a startup circuit, a positive temperature coefficient circuit, a negative temperature coefficient circuit and a current summing circuit. The startup circuit is electrically connected to the positive temperature coefficient circuit, the positive temperature coefficient circuit is electrically connected to the current summing circuit, and the current summing circuit is electrically connected to the negative temperature coefficient circuit.

[0063] like Figure 5 As shown, in this embodiment, a startup circuit is composed of R1, M1, and M2. The startup circuit is used to control the startup and shutdown of the reference current source circuit. After power-on, M2 is turned on and M1 is turned off. After the positive temperature coefficient circuit and the negative temperature coefficient circuit are stable, the startup circuit is turned off to achieve a self-shutdown function.

[0064] like Figure 5 As shown, in this embodiment, M3, M4, M5, M6, Q1, Q2, and R2 constitute a positive temperature coefficient circuit. The positive temperature coefficient circuit is used to linearly increase the current passing through the positive temperature coefficient circuit as the temperature increases. The specific formula is as follows:

[0065] Ic=Ico.e Vbe / Vt (1)

[0066]

[0067] ΔVbe=Vt*ln(n)=|Vbe1-Vbe2| (3)

[0068]

[0069] Where Vt is the thermal voltage, which is proportional to the temperature coefficient. is a negative temperature coefficient voltage, Ic is the collector current, n is the area ratio of transistors Q1 and Q2, k is the Boltzmann constant, q is the charge, Ico is the saturation current of the transistor, Vbe1 and Vbe2 are the base-emitter voltages of transistors Q1 and Q2 respectively, ΔVbe is the difference between the base-emitter voltage of transistor Q1 and the base-emitter voltage of transistor Q2, R PTAT is the resistance of a circuit with a positive temperature coefficient.

[0070] In this process, the current passing through transistor Q2 is controlled to be a multiple of the current passing through transistor Q1 to offset the effect of the negative temperature coefficient. This multiple relationship is determined by the difference ΔVbe between the base-emitter voltage of transistor Q1 and the base-emitter voltage of transistor Q2 and resistor R2. At this time, transistors M3, M4, M5, and M6 are in saturation. By increasing the area of ​​transistor Q2, the current passing through transistor M6 is greater than the current passing through transistor M4, and the resistance value of resistor R2 is changed to change the magnitude of the current. The final positive temperature coefficient current is determined by the width-to-length ratio W / L of transistor M6, resistor R2, and the area of ​​Q2 / area coefficient of Q1.

[0071] like Figure 5 As shown, in this embodiment, M10, M11, M12, M13, Q3, and R3 constitute a negative temperature coefficient circuit, and the negative temperature coefficient circuit is used to reduce the current passing through the negative temperature coefficient circuit as the temperature increases.

[0072] When the temperature rises, the current through the negative temperature coefficient circuit decreases, and the current is inversely proportional to the temperature. The specific formula is as follows:

[0073] Vbe3=I CTAT *R CTAT (5)

[0074] Where Vbe3 is the base-emitter voltage of transistor Q3, I CTAT is the current of the negative temperature coefficient circuit, R CTAT is the resistance of the negative temperature coefficient circuit. In this process, transistors M10, M11, M12, and M13 are all in saturation state.

[0075] like Figure 5 As shown, in this embodiment, M7, M8, and M9 constitute a current summing circuit, which is used to collect the positive temperature coefficient current generated by the positive temperature coefficient module and the negative temperature coefficient current generated by the negative temperature coefficient module, and scale all currents to generate a constant reference current.

[0076] The operational amplifier circuit comprises an input stage circuit, an intermediate stage circuit and an output stage circuit. The input stage circuit is electrically connected to the intermediate stage circuit, and the intermediate stage circuit is electrically connected to the output stage circuit.

[0077] like Figure 6 As shown, in this embodiment, M14-M22 constitute an input stage circuit, and the input stage circuit is used to perform level shifting on the differential pair.

[0078] The input stage circuit includes a PMOS current mirror, a PMOS differential pair, an NMOS differential pair, an NMOS current mirror and a diode-connected transistor M20, the two ends of the transistor M20 are electrically connected to the NMOS current mirror and the NMOS differential pair respectively; the PMOS current mirror is electrically connected to the PMOS differential pair; the PMOS differential pair is electrically connected to the NMOS differential pair; the NMOS differential pair is electrically connected to the NMOS current mirror; the PMOS current mirror and the NMOS current mirror are both used to provide bias current; the PMOS differential pair and the NMOS differential pair are both used to transmit differential signals. In this embodiment, M18 and M19 constitute an NMOS differential pair, M16 and M17 constitute a PMOS differential pair, M14 and M15 constitute a pair of PMOS current mirrors, and M21 and M22 constitute a pair of NMOS current mirrors. The diode-connected transistor M20 is located between the NMOS differential pair and the NMOS current mirror, and plays a role in constant transconductance of the input stage.

[0079] After the differential pairs are distinguished, the minimum voltage of the NMOS differential pair is calculated. The specific formula is as follows:

[0080] Vin=Vovn+Vgsn+Vgsn (6)

[0081] Wherein, Vovn is the over-drive voltage of NMOS, and Vgsn is the gate-source voltage of NMOS.

[0082] like Figure 6 As shown, in this embodiment, the transistors M23-M32 constitute an intermediate stage circuit, and the intermediate stage circuit is used to add the current from the input module and provide a load therefor.

[0083] The self-biased cascode circuit is used as an intermediate stage circuit in the operational amplifier circuit, and the bias is provided by the transistor M25 and the transistor M30. Specifically, the transistor M25 drives the drain voltage of the transistor M23, and the transistor M30 drives the drain voltage of the transistor M31.

[0084] The transistor M25 and the transistor M30 work in the same way. The bias current determines the working area of ​​the transistor M25 and the transistor M30. The working area of ​​the transistor M32 is jointly determined by the output current Iin of the input stage and the drain voltage of the transistor M32. The working area of ​​the transistor M31 is jointly determined by the output current and the bias current of the input stage.

[0085] When the bias current is too low, transistor M30 works in the weak inversion region, otherwise it works in the saturation region. If the output current Iin of the input stage is large and the drain voltage of transistor M32 is small, M32 will work in the linear region, increase the drain voltage of transistor M32, and the working area of ​​M32 becomes the saturation region. When the output current Iin of the input stage is small and the bias current is large, the gate-source voltage of transistor M31 is high, but because Iin is small, transistor M31 is still in the linear region.

[0086] The specific formula is as follows:

[0087] VdsM31=VgsM31-VgsM30 (7)

[0088] Wherein, VdsM31 is the drain-source voltage of the transistor M31 , VgsM31 is the gate-source voltage of the transistor M31 , and VgsM30 is the gate-source voltage of the transistor M30 .

[0089] like Figure 6 As shown, in this embodiment, the output stage circuit is composed of transistors M33-M41, and the output stage circuit is used to form a folded network feedforward class AB output stage with a minimum current selection circuit.

[0090] The output stage circuit includes a minimum current selection circuit and a feedforward AB class amplifier, and the minimum current selection circuit is electrically connected to the AB class amplifier circuit.

[0091] like Figure 6 As shown, in this embodiment, the minimum current selection circuit is composed of transistors M36, M37, and M38, and the minimum current selection circuit is used to select the minimum output stage bias current. The transistor M36 in the minimum current selection circuit mainly works in the linear region, and only when the transistor M39 passes a large output current, the transistor M36 can work in the saturation region. The drain current of the transistor M38 is the output of the minimum current selection circuit.

[0092] like Figure 6As shown, in this embodiment, the class AB amplifier circuit is composed of transistors M29 and M34. The class AB amplifier circuit is used to control the gate voltage of the output transistor. The specific control method is that the class AB amplifier circuit controls the current through the transistor M35 to be the same as the reference current of the branch where M28 is located to control the gate voltage of the output transistor. When the output stage is in a static state, the gate voltage of the transistor M39 is equal to the gate voltage of M41. At this time, the gate-source voltages of the transistors M36, M37 and M38 are equal. Because M36 works in the linear region, the transistors M36 and M38 can be combined and regarded as a transistor with a length twice the original length. Therefore, the current passing through the transistors M37 and M40 is twice the current passing through the transistor M35, and the bias current is controlled by the class AB amplifier circuit. At this time, the calculation formula of the static current is as follows:

[0093]

[0094] Among them, I Q is the quiescent current, W 41 is the width of transistor M41, L 41 is the length of transistor M41, L 40 is the length of transistor M40, W 40 is the width of transistor M40, I ref is the bias current.

[0095] When transistor M39 generates an output current, so that the gate-source voltage of transistor M39 is between the positive power supply voltage and the source voltage of transistor M38, transistors M36, M37 and M38 form a folded cascode current mirror, which mirrors the current of transistors M40 to M35. At this time, the bias current of transistor M40 is regulated to a fixed value, which is equal to half of the static current value. When transistor M2 generates a large output current, more current flows through transistors M37 and M40. Transistor M36 pushes the source voltage of transistor M38 close to the positive power supply voltage. At this time, transistors M38 and transistor M39 act as output current mirrors, and the current flows to transistor M35 through the output current mirror, thereby reducing the current of transistor M39. At this time, transistor M39 is an inactive tube, and the current value of transistor M39 is controlled to be half of the static current value. The specific formula is as follows:

[0096]

[0097] Among them, I Q is the quiescent current, W 41 is the width of transistor M41, L 41 is the length of transistor M41, L 40 is the length of transistor M40, W 40 is the width of transistor M40, Imin is the output current of transistor M39, I ref Represents the reference current.

[0098] Embodiment 2:

[0099] As attached Figure 5 As shown, the difference from Example 1 is that another way to verify the behavior of the class AB amplifier circuit is as follows:

[0100] Find the relationship between the drain current of transistor M39, the drain current of transistor M41 and the bias current. The specific formula is as follows:

[0101]

[0102] Among them, I 39 represents the drain-source current of transistor M39, I 41 represents the drain-source current of transistor M41, I ref Represents the bias current.

[0103] The specific implementation process is as follows: This method can express the transfer function from the drain current of the transistor M39 to the drain current of the transistor M38 as a function of the drain-source voltage of the transistor M36.

[0104] Obviously, the above embodiments are merely examples for the purpose of clear explanation, and are not intended to limit the implementation methods. For those skilled in the art, other different forms of changes or modifications can be made based on the above description. It is not necessary and impossible to list all the implementation methods here. The obvious changes or modifications derived therefrom are still within the scope of protection of the invention.

Claims

1. A rail-to-rail operational amplifier analog IC chip with a self-bias circuit, characterized in that: It includes a reference current source circuit and an operational amplifier circuit; The reference current source circuit includes the following circuits: A startup circuit, used for controlling the startup of a reference current source circuit; A positive temperature coefficient circuit is used to increase the current through the positive temperature coefficient circuit as the temperature increases; A negative temperature coefficient circuit is used to reduce the current through the negative temperature coefficient circuit as the temperature increases; The current summing circuit is used to collect the positive temperature coefficient current generated by the positive temperature coefficient module and the negative temperature coefficient current generated by the negative temperature coefficient module, and add all the currents to generate a constant reference current; The operational amplifier circuit includes the following circuits: An input stage circuit for level shifting the differential pair; An intermediate stage circuit for summing the currents from the input modules and providing a load thereto; The output stage circuit is used to form a folded network feedforward class AB output stage with a minimum current selection circuit.

2. The rail-to-rail operational amplifier analog IC chip with a self-bias circuit according to claim 1, characterized in that: The input stage circuit includes a PMOS current mirror, a PMOS differential pair, an NMOS differential pair, an NMOS current mirror and a diode-connected transistor M20, wherein two ends of the transistor M20 are electrically connected to the NMOS current mirror and the NMOS differential pair respectively; the PMOS current mirror is electrically connected to the PMOS differential pair; the PMOS differential pair is electrically connected to the NMOS differential pair; the NMOS differential pair is electrically connected to the NMOS current mirror; both the PMOS current mirror and the NMOS current mirror are used to provide bias current; and both the PMOS differential pair and the NMOS differential pair are used to transmit differential signals.

3. The rail-to-rail operational amplifier analog IC chip with a self-bias circuit according to claim 2, characterized in that: The output stage circuit includes a minimum current selection circuit and a feedforward class AB amplifier circuit, the minimum current selection circuit is electrically connected to the class AB amplifier circuit; the minimum current selection circuit is used to select the minimum output stage bias current; the class AB amplifier circuit is used to control the gate voltage of the output transistor, improve current utilization, and reduce heat loss.

4. The rail-to-rail operational amplifier analog IC chip with a self-bias circuit according to claim 3, characterized in that: The positive temperature coefficient circuit has three transistors Q1 and Q2 electrically connected; when the temperature rises, the current through the positive temperature coefficient circuit increases linearly, and the specific formula is as follows: Ic=Ico.e Vbe / Vt (1) ΔVbe=Vt*ln(n)=|Vbe1-Vbe2| (3) Where Vt is the thermal voltage, which is proportional to the temperature coefficient. is a negative temperature coefficient voltage, Ic is the transistor collector current, Ico is the transistor saturation current, Vbe1 and Vbe2 are the base-emitter voltages of transistors Q1 and Q2 respectively, ΔVbe is the difference between the base-emitter voltage of transistor Q1 and the base-emitter voltage of transistor Q2, I PTAT is the current of the positive temperature coefficient circuit, R PTAT is the resistance of a circuit with a positive temperature coefficient.

5. The rail-to-rail operational amplifier analog IC chip with a self-bias circuit according to claim 4, characterized in that: The negative temperature coefficient circuit is electrically connected to a three-stage tube Q3. When the temperature rises, the current passing through the negative temperature coefficient circuit decreases, and the current is inversely proportional to the temperature. The specific formula is as follows: Vbe3=I CTAT *R CTAT (5) Where Vbe3 is the base-emitter voltage of transistor Q3, I CTAT is the current of the negative temperature coefficient circuit, R CTAT is the resistance of the circuit with negative temperature coefficient.

6. The rail-to-rail operational amplifier analog IC chip with a self-bias circuit according to claim 5, characterized in that: After the differential pairs are distinguished, the minimum voltage of the NMOS differential pair is calculated using the following formula: Vin=Vovn+Vgsn+Vgsn (6) Wherein, Vovn is the over-drive voltage of NMOS, and Vgsn is the gate-source voltage of NMOS.

7. The rail-to-rail operational amplifier analog IC chip with a self-bias circuit according to claim 6, characterized in that: The intermediate stage circuit is composed of transistors M23-M32, and a self-biased common source and common gate circuit is used as the intermediate stage circuit in the operational amplifier circuit, and the bias is provided by transistors M25 and M30; The transistor M25 and the transistor M30 work in the same way, and the bias current determines the working region of the transistor M25 and the transistor M30; The working area of ​​transistor M32 is determined by the output current Iin of the input stage and the drain voltage of transistor M32; the working area of ​​transistor M31 is determined by the output current and bias current of the input stage. The specific formula is as follows: VdsM31=VgsM31-VgsM30 (7) Wherein, VdsM31 is the drain-source voltage of the transistor M31 , VgsM31 is the gate-source voltage of the transistor M31 , and VgsM30 is the gate-source voltage of the transistor M30 .

8. The rail-to-rail operational amplifier analog IC chip with a self-bias circuit according to claim 7, characterized in that: The output stage circuit is composed of transistors M33-M41. In the class AB amplifier circuit, when the output stage is in a static state, the gate voltage of transistor M39 is equal to the gate voltage of transistor M41. The bias current is controlled by the class AB amplifier circuit, and the static current is calculated. The specific formula is as follows: Among them, I Q is the quiescent current, W 41 is the width of transistor M41, L 41 The length of M41, L 40 is the length of transistor M40, W 40 is the width of transistor M40, I ref is the bias current; When the transistor M39 generates an output current, so that the gate-source voltage of the transistor M39 is between the positive power supply voltage and the source voltage of the transistor M38, the transistors M36, M37 and M38 form a folded cascode current mirror, which mirrors the current from the transistor M40 to the transistor M35, and regulates the bias current of the transistor M40 to half of the static current value; When the transistor M41 generates an output current, the transistor M38 and the transistor M39 are used as an output current mirror to reduce the current of the transistor M39 to half of the static current value through the output current mirror. The current value of the transistor M39 is calculated as follows: Among them, I Q is the quiescent current, W 41 is the width of transistor M41, L 41 is the length of transistor M41, L 40 is the length of transistor M40, W 40 is the width of transistor M40, I min is the output current of M39, I ref Represents the bias current.

9. The rail-to-rail operational amplifier analog IC chip with a self-bias circuit according to claim 8, characterized in that: Another way to verify the behavior of the Class AB amplifier circuit is as follows: Find the relationship between the drain current of transistor M39, the drain current of transistor M41 and the bias current. The specific formula is as follows: Among them, I 39 represents the drain current of transistor M39, I 41 represents the drain current of transistor M41, I ref Represents the bias current.

10. The rail-to-rail operational amplifier analog IC chip with a self-bias circuit according to claim 9, characterized in that: The current passing through the transistor Q2 is a multiple of the current passing through the transistor Q1, and the multiple is determined by the voltage difference ΔVbe between the transistor Q1 and the transistor Q2 and the resistance value of the resistor R2. The voltage difference ΔVbe between the transistor Q1 and the transistor Q2 is determined by the area ratio of Q1 and Q2.

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