Ultrahigh-order signal transmission optimization method and system based on discrete memristor

Abstract

The invention discloses an ultra-high-order signal transmission optimization method and system based on a discrete memristor, and relates to the technical field of optical fiber communication, and the method comprises the following steps: receiving bit data, carrying out the serial-to-parallel conversion and constellation mapping of the bit data, carrying out the conversion to obtain a QAM constellation, carrying out the discrete multi-tone modulation DMT of the QAM constellation, and obtaining a DMT signal; performing DSM modulation on the DMT signal to obtain a low-order PAM4 signal, and performing two-dimensional encryption on symbols and time slots on the low-order PAM4 signal through a key group generated by a pre-established discrete memristor to obtain encrypted information; and performing inverse operation on the encrypted information by using the disturbance vector, recovering a high-order QAM signal through a pre-established low-pass filter, and recovering the high-order QAM signal through QAM de-mapping to obtain original bit data.

Description

Technical Field

[0001] The present invention relates to the field of optical fiber communication technology, and in particular to an ultra-high-order signal transmission optimization method and system based on discrete memristors. Background Art

[0002] In recent years, with the widespread application of fifth-generation communication technology, Internet traffic has grown rapidly, and the demand for larger capacity and higher-speed communication networks has become increasingly urgent. In particular, with the rapid development of smartphone technology, the data usage of end users has also risen sharply, further increasing the requirements for mobile fronthaul (MFH) technology. Currently, MFH mainly relies on the Common Public Radio Interface (CPRI) protocol. The CPRI interface uses 16 bits to quantize the signal, which requires a larger bandwidth and is therefore not suitable for large-capacity 5G mobile services.

[0003] Nowadays, high-order signal transmission based on Delta-Sigma Modulation (DSM) has been widely studied in the field of optical and wireless access systems. DSM is a common digital signal processing technology used for digitization and processing of analog signals. DSM provides higher efficiency and accuracy for signal transmission through noise suppression, high-precision conversion, data compression, anti-interference ability and signal reconstruction during signal transmission, making digital signal processing and communication systems work more reliably and efficiently. Therefore, using DSM to replace CPRI to build a new MFH architecture to solve the transmission capacity bottleneck problem of the existing MFH architecture is one of the current research hotspots.

[0004] In the field of security of optical network systems, encryption technology plays a vital role in the current digital world. Existing encryption technologies mainly use chaotic systems. Chaotic encryption is an encryption technology based on chaos theory, which uses the randomness and complexity characteristics of chaotic dynamical systems to encrypt and decrypt data. Chaotic dynamical systems are extremely sensitive to initial conditions, and small initial changes can cause the system behavior to be completely different. Chaotic encryption technology has been widely used in various fields to protect various types of sensitive information. In the study of chaotic systems, one element stands out significantly, that is, memristors. Memristors are two-terminal non-volatile memory elements known for their ability to modify resistance in response to applied voltage. Its inherent nonlinear characteristics make it a prominent candidate for chaotic systems, and enhancing chaos through methods such as memristors has far-reaching significance in multiple fields of science and technology.

[0005] Currently, there is little research on the security of the new DSM-based MFH architecture. Summary of the invention

[0006] In order to solve the deficiencies mentioned in the above background technology, the object of the present invention is to provide an ultra-high-order signal transmission optimization method and system based on discrete memristors.

[0007] In a first aspect, the purpose of the present invention can be achieved by the following technical solution: a method for optimizing ultra-high-order signal transmission based on discrete memristors, the method comprising the following steps:

[0008] Receive bit data, perform serial-to-parallel conversion and constellation mapping on the bit data, convert it into a QAM constellation, and perform discrete multi-tone modulation DMT on the QAM constellation to obtain a DMT signal;

[0009] The DMT signal is modulated by DSM to obtain a low-order PAM4 signal, and the low-order PAM4 signal is two-dimensionally encrypted in symbols and time slots through a key group generated by a pre-established discrete memristor to obtain encrypted information;

[0010] The encrypted information is inversely operated using the disturbance vector, and the high-order QAM signal is restored through a pre-established low-pass filter, and the high-order QAM signal is restored through QAM demapping to obtain the original bit data.

[0011] In combination with the first aspect, in some implementations of the first aspect, the method further includes: the process of subjecting the QAM constellation to discrete multi-tone modulation DMT:

[0012] The fast Fourier transform length of DMT is determined according to the system requirements and performance. The subcarriers in the first half are QAM signals, and the subcarriers in the second half are conjugate symmetrical with the subcarriers modulated with the QAM signal. The set number of frames needs to cover all symbols required for high-order QAM. After the inverse fast Fourier transform, the frequency domain DMT symbols are converted into DMT signals in the time domain.

[0013] In combination with the first aspect, in certain implementations of the first aspect, the method further includes: when performing DSM modulation on the DMT signal, a fourth-order DSM modulator based on a cascade resonator feedback structure is used.

[0014] In combination with the first aspect, in certain implementations of the first aspect, the method also includes: the fourth-order DSM modulator based on the cascaded resonator feedback structure is composed of four integrators, the four integrators are grouped in pairs, and every two integrators 1 / (z-1) and z / (z-1) are cascaded together to form a resonator, the transfer function of the cascaded resonator is the noise transfer function NTF, and the number of integrators in the resonator represents the order of the NTF.

[0015] In combination with the first aspect, in some implementations of the first aspect, the method further includes: the pre-established discrete memristor generates a memristor hyperchaotic map by enhancing chaos, as shown in formula (1):

[0016]

[0017] In the formula, x n+1 is the first chaotic sequence, y n+1 is the second chaotic sequence, z n+1 is the third chaotic sequence, a and b are system parameters;

[0018] In combination with the first aspect, in some implementations of the first aspect, the method further includes: n It is used to generate an amplitude disturbance vector for disturbing the amplitude of the DSM signal. The process is shown in the following formula:

[0019]

[0020] Among them, x n ' is the new sequence after processing the initial chaotic sequence, fix(·) represents rounding, N represents the length of the signal, and the first disturbance vector X generated is n is a sequence consisting of (1,-1), and the first perturbation vector X n Multiply it with the DSM signal to complete the first encryption.

[0021] In combination with the first aspect, in some implementations of the first aspect, the method further includes: n Processing generates the second disturbance vector Y t , thereby encrypting the DSM signal in the time slot, Y t The generation of is represented as:

[0022] Y t =Mat{mod(y n ,1)g[mod(y n ,1))]'},t=1,2,…,T (3)

[0023] Where Mat{·} means taking non-integer elements in the matrix as 0, T represents the size of the time slot, and the perturbation vector Y t Multiply it with the first encrypted signal to complete the second encryption.

[0024] In a second aspect, in order to achieve the above-mentioned object, the present invention discloses an ultra-high-order signal transmission optimization system based on discrete memristors, comprising:

[0025] A signal conversion module is used to receive bit data, perform serial-to-parallel conversion and constellation mapping on the bit data, convert it to obtain a QAM constellation, and perform discrete multi-tone modulation DMT on the QAM constellation to obtain a DMT signal;

[0026] A signal modulation module is used to perform DSM modulation on the DMT signal to obtain a low-order PAM4 signal, and perform two-dimensional encryption on the low-order PAM4 signal in terms of symbols and time slots through a key group generated by a pre-established discrete memristor to obtain encrypted information;

[0027] The signal recovery module is used to perform inverse operation on the encrypted information using the disturbance vector, and recover the high-order QAM signal through a pre-established low-pass filter, and recover the high-order QAM signal through QAM demapping to obtain the original bit data.

[0028] In another aspect of the present invention, in order to achieve the above-mentioned purpose, a terminal device is disclosed, including a memory, a processor, and a computer program stored in the memory and capable of running on the processor, wherein the memory stores a computer program capable of running on the processor, and when the processor loads and executes the computer program, the ultra-high-order signal transmission optimization method based on discrete memristors as described above is adopted.

[0029] In another aspect of the present invention, in order to achieve the above-mentioned purpose, a computer-readable storage medium is disclosed, in which a computer program is stored. When the computer program is loaded and executed by a processor, the ultra-high-order signal transmission optimization method based on discrete memristors as described above is adopted.

[0030] Beneficial effects of the present invention:

[0031] The present invention combines discrete memristors with chaotic systems to enhance the security and strength of encryption systems, making them more resistant to various common cryptanalysis methods, and effectively improving the overall reliability of encryption systems. In addition, two-layer encryption of DSM signals can effectively prevent brute force cracking of illegal receivers in the QAM constellation dimension, and the disturbance on the time slot can effectively reduce the interference of burst noise during signal transmission. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, for those skilled in the art, other drawings can be obtained based on these drawings without creative work.

[0033] Figure 1 It is a schematic flow chart of the method of the present invention;

[0034] Figure 2 It is a schematic diagram of a fourth-order DSM modulator based on a cascade resonator feedback structure of the present invention;

[0035] Figure 3It is a schematic diagram of the waveform change of the signal of the present invention passing through the DSM;

[0036] Figure 4 It is a typical chaotic oscillation schematic diagram of the present invention;

[0037] Figure 5 It is a schematic diagram of the encryption process on the PAM4 signal time slot of the present invention;

[0038] Figure 6 It is a schematic diagram of the workflow of the present invention;

[0039] Figure 7 It is a schematic diagram of the system structure of the present invention. DETAILED DESCRIPTION

[0040] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0041] Embodiment 1:

[0042] The following is an introduction to the relevant terms involved in the embodiments of the present application:

[0043] Memristor, full name memory resistor (Memristor). It is a circuit device that represents the relationship between magnetic flux and charge. Memristor has the dimension of resistance, but unlike resistance, the resistance of memristor is determined by the charge flowing through it. Therefore, by measuring the resistance of memristor, we can know the amount of charge flowing through it, so it has the function of memorizing charge. From the perspective of logic and axioms, it is pointed out that there should be a circuit element in nature that represents the relationship between magnetic flux and charge. Researchers at HP made nano-memristor devices for the first time, setting off a wave of memristor research. The emergence of nano-memristor devices is expected to realize non-volatile random access memory. In addition, the integration, power consumption, and read and write speed of random access memory based on memristor are superior to traditional random access memory. In addition, memristor is the best way to realize artificial neural network synapses in hardware. Due to the nonlinear nature of memristor, chaotic circuits can be generated, which also has many applications in confidential communications.

[0044] like Figure 1 As shown, a method for optimizing ultra-high-order signal transmission based on discrete memristors comprises the following steps:

[0045] S101: receiving bit data, performing serial-to-parallel conversion and constellation mapping on the bit data to obtain a QAM constellation, and performing discrete multi-tone modulation DMT on the QAM constellation to obtain a DMT signal;

[0046] In the signal processing stage at the transmitter, the information at the transmitter is first coded and modulated in the digital domain, the bit data is mapped to ultra-high-order QAM, and then DMT modulation is performed. The fast Fourier transform length of DMT is determined according to the system requirements and performance. The subcarriers in the first half are QAM signals, and the subcarriers in the second half are conjugate symmetrical with the subcarriers modulated with the QAM signal. In order to fully traverse every symbol of the high-order QAM, the set number of frames needs to cover all the symbols required by the high-order QAM to ensure the integrity and accuracy of data transmission. After the inverse fast Fourier transform, the frequency domain DMT symbol is converted into the DMT signal in the time domain, and then the DMT signal is modulated by DSM.

[0047] S102: performing DSM modulation on the DMT signal to obtain a low-order PAM4 signal, and performing two-dimensional encryption on the low-order PAM4 signal in terms of symbols and time slots using a key group generated by a pre-established discrete memristor to obtain encrypted information;

[0048] When DMT signals are subjected to DSM modulation, a fourth-order DSM modulator based on a cascade resonator feedback structure is used.

[0049] The fourth-order DSM modulator model is as follows Figure 2 As shown. The fourth-order DSM modulator consists of four integrators, which are grouped in pairs. Every two integrators 1 / (z-1) and z / (z-1) are cascaded together to form a resonator. The cascaded resonator is regarded as a filter for quantization noise. Its transfer function is the noise transfer function (NTF), and the number of integrators in the resonator represents the order of the NTF.

[0050] Figure 3 The waveform changes of the signal after 1-bit quantization and 2-bit quantization by DSM are shown. It can be seen that the analog waveform is quantized into a digital bit stream after DSM modulation. Under the condition of 1-bit quantization, a signal composed of +1 or -1 is output, and under the condition of 2-bit quantization, a PAM4 signal composed of ±1 or ±3 is output.

[0051] S103: Perform an inverse operation on the encrypted information using the disturbance vector, and restore the high-order QAM signal through a pre-established low-pass filter, and restore the high-order QAM signal through QAM demapping to obtain original bit data.

[0052] The pre-established discrete memristor generates a memristor hyperchaotic map by enhancing chaos, as shown in formula (1):

[0053]

[0054] In the formula, x n+1 is the first chaotic sequence, y n+1is the second chaotic sequence, z n+1 is the third chaotic sequence, a and b are system parameters;

[0055] Typical chaotic oscillations are Figure 4 The amplitude and polarity of the attractor can be well adjusted by the system parameters.

[0056] Typical phase trajectory of memristor mapping under the condition of (x0, y0, z0) = (0.1, 0.1, 0.1), where (a) magenta: a = 4, blue: a = 3.5, orange: a = 3, (b) magenta: b = -6, green: b = -3, orange: b = 3, blue: b = 6.

[0057] The original key of the present invention is only used as a parameter of the chaotic map. During the transmission process, the sequence generated by the chaotic map is processed to obtain a disturbance vector for encrypting the signal. This experiment requires two-dimensional perturbation of the DSM signal, which requires two perturbation vectors. Therefore, we process the chaotic sequences xn and yn respectively. The generated perturbation vector is passed into the symbol and time slot encryption module to encrypt the PAM4 signal.

[0058] The first chaotic sequence X n It is used to generate an amplitude disturbance vector for disturbing the amplitude of the DSM signal. The process is shown in the following formula:

[0059]

[0060] Among them, x n ' is the new sequence after processing the initial chaotic sequence, fix(·) represents rounding, N represents the length of the signal, and the first disturbance vector X generated is n is a sequence consisting of (1,-1), and the first perturbation vector X n Multiply it with the DSM signal to complete the first encryption.

[0061] The second chaotic sequence y n Processing generates the second disturbance vector Y t , thereby encrypting the DSM signal in the time slot, Y t The generation of is represented as:

[0062] Y t =Mat{mod(y n ,1)g[mod(y n ,1))]'},t=1,2,…,T (3)

[0063] Where Mat{·} means taking non-integer elements in the matrix as 0, T represents the size of the time slot, and the perturbation vector Y t Multiply it with the first encrypted signal to complete the second encryption.

[0064] Specifically, the present invention is further described below by way of embodiments:

[0065] The second encryption process of PAM4 signal is as follows Figure 5 As shown in the figure, the first step is to rearrange the symbol-encrypted array into a matrix with 200 elements in each column. We scramble the order of the PAM4 sub-signals by multiplying the perturbation vector with the first encrypted signal. So far, we have realized the encryption of DSM signals using discrete memristor-enhanced chaos.

[0066] At the receiving end, we need to make an initial judgment on the received DSM signal in order to restore the low-order signal transmitted in the channel to a standard form. Taking the PAM4 signal as an example, after the signal is transmitted through the channel, due to the influence of factors such as noise, the received signal is not in the standard (3,1,-1,-3) form. We make the first judgment and restore it to the standard form before we can further demodulate the DSM. After that, we de-disturb the low-order signal, use the same key to drive the chaotic system again, obtain the same sequence as the de-scrambling sequence, and then perform the reverse operation on the signal opposite to the encryption process to restore the correct low-order signal. After that, the low-order signal is low-pass filtered to obtain the correct high-order QAM signal. Finally, we judge and demap the high-order QAM signal to restore our original data.

[0067] Embodiment 2: In the second aspect, as Figure 7 As shown, in order to achieve the above-mentioned purpose, the present invention discloses an ultra-high-order signal transmission optimization system based on discrete memristors, comprising:

[0068] The signal conversion module 11 is used to receive bit data, perform serial-to-parallel conversion and constellation mapping on the bit data, convert it to obtain a QAM constellation, and perform discrete multi-tone modulation DMT on the QAM constellation to obtain a DMT signal;

[0069] The signal modulation module 12 is used to perform DSM modulation on the DMT signal to obtain a low-order PAM4 signal, and perform two-dimensional encryption on the low-order PAM4 signal in terms of symbols and time slots through a key group generated by a pre-established discrete memristor to obtain encrypted information;

[0070] The signal recovery module 13 is used to perform an inverse operation on the encrypted information using the disturbance vector, and to recover the high-order QAM signal through a pre-established low-pass filter, and to recover the high-order QAM signal through QAM demapping to obtain the original bit data.

[0071] Based on the same inventive concept, the present invention also provides a computer device, which includes: one or more processors, and a memory for storing one or more computer programs; the program includes program instructions, and the processor is used to execute the program instructions stored in the memory. The processor may be a central processing unit (CPU), or other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), field-programmable gate arrays (FPGA) or other programmable logic devices, discrete gates or transistor logic devices, discrete hardware components, etc. It is the computing core and control core of the terminal, which is used to implement one or more instructions, specifically for loading and executing one or more instructions in a computer storage medium to implement the above method.

[0072] It needs to be further explained that, based on the same inventive concept, the present invention also provides a computer storage medium, on which a computer program is stored, and the computer program is executed by a processor to execute the above method. The storage medium can adopt any combination of one or more computer-readable media. The computer-readable medium can be a computer-readable signal medium or a computer-readable storage medium. The computer-readable storage medium can be, for example, but not limited to, an electrical, magnetic, optical, electrical, magnetic, infrared, or semiconductor system, device or device, or any combination of the above. More specific examples (non-exhaustive list) of computer-readable storage media include: an electrical connection with one or more wires, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the above. In the present invention, a computer-readable storage medium can be any tangible medium containing or storing a program, which can be used by an instruction execution system, device or device or used in combination with it.

[0073] In the description of this specification, the description with reference to the terms "one embodiment", "example", "specific example", etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present disclosure. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described can be combined in any one or more embodiments or examples in a suitable manner.

[0074] The above shows and describes the basic principles, main features and advantages of the present disclosure. Those skilled in the art should understand that the present disclosure is not limited by the above embodiments, and the above embodiments and descriptions are only for explaining the principles of the present disclosure. Without departing from the spirit and scope of the present disclosure, the present disclosure may have various changes and improvements, and these changes and improvements fall within the scope of the present disclosure to be protected.

Claims

1. A method for optimizing ultra-high-order signal transmission based on discrete memristors, characterized in that: The method comprises the following steps: Receive bit data, perform serial-to-parallel conversion and constellation mapping on the bit data, convert it into a QAM constellation, and perform discrete multi-tone modulation DMT on the QAM constellation to obtain a DMT signal; The DMT signal is modulated by DSM to obtain a low-order PAM4 signal, and the low-order PAM4 signal is two-dimensionally encrypted in symbols and time slots through a key group generated by a pre-established discrete memristor to obtain encrypted information; The encrypted information is inversely operated using the disturbance vector, and the high-order QAM signal is restored through a pre-established low-pass filter, and the high-order QAM signal is restored through QAM demapping to obtain the original bit data.

2. The method for optimizing ultra-high-order signal transmission based on discrete memristors according to claim 1, characterized in that: The process of applying discrete multi-tone modulation (DMT) to the QAM constellation is as follows: The fast Fourier transform length of DMT is determined according to the system requirements and performance. The subcarriers in the first half are QAM signals, and the subcarriers in the second half are conjugate symmetrical with the subcarriers modulated with the QAM signal. The set number of frames needs to cover all symbols required for high-order QAM. After the inverse fast Fourier transform, the frequency domain DMT symbols are converted into DMT signals in the time domain.

3. The method for optimizing ultra-high-order signal transmission based on discrete memristors according to claim 1, characterized in that: When performing DSM modulation on the DMT signal, a fourth-order DSM modulator based on a cascade resonator feedback structure is used.

4. The method for optimizing ultra-high-order signal transmission based on discrete memristors according to claim 3, characterized in that: The fourth-order DSM modulator based on the cascade resonator feedback structure is composed of four integrators, which are grouped in pairs. Every two integrators 1 / (z-1) and z / (z-1) are cascaded together to form a resonator. The transfer function of the cascade resonator is the noise transfer function NTF, and the number of integrators in the resonator represents the order of the NTF.

5. The method for optimizing ultra-high-order signal transmission based on discrete memristors according to claim 1, characterized in that: The pre-established discrete memristor generates a memristor hyperchaotic map by enhancing chaos, as shown in formula (1): In the formula, x n+1 is the first chaotic sequence, y n+1 is the second chaotic sequence, z n+1 is the third chaotic sequence, a and b are system parameters.

6. The method for optimizing ultra-high-order signal transmission based on discrete memristors according to claim 5, characterized in that: The first chaotic sequence X n It is used to generate an amplitude disturbance vector for disturbing the amplitude of the DSM signal. The process is shown in the following formula: Among them, x n ' is the new sequence after processing the initial chaotic sequence, fix(·) represents rounding, N represents the length of the signal, and the first disturbance vector X generated is n is a sequence consisting of (1,-1), and the first perturbation vector X n Multiply it with the DSM signal to complete the first encryption.

7. The method for optimizing ultra-high-order signal transmission based on discrete memristors according to claim 6, characterized in that: The second chaotic sequence y n Processing generates the second disturbance vector Y t , thereby encrypting the DSM signal in the time slot, Y t The generation of is represented as: Y t =Mat{mod(y n ,1)g[mod(y n ,1))]'},t=1,2,…,T (3) Where Mat{·} means taking non-integer elements in the matrix as 0, T represents the size of the time slot, and the perturbation vector Y t Multiply it with the first encrypted signal to complete the second encryption.

8. An ultra-high-order signal transmission optimization system based on discrete memristors, characterized in that: include: A signal conversion module is used to receive bit data, perform serial-to-parallel conversion and constellation mapping on the bit data, convert it to obtain a QAM constellation, and perform discrete multi-tone modulation DMT on the QAM constellation to obtain a DMT signal; A signal modulation module is used to perform DSM modulation on the DMT signal to obtain a low-order PAM4 signal, and perform two-dimensional encryption on the low-order PAM4 signal in terms of symbols and time slots through a key group generated by a pre-established discrete memristor to obtain encrypted information; The signal recovery module is used to perform inverse operation on the encrypted information using the disturbance vector, and recover the high-order QAM signal through a pre-established low-pass filter, and recover the high-order QAM signal through QAM demapping to obtain the original bit data.

9. A terminal device, comprising a memory, a processor, and a computer program stored in the memory and capable of running on the processor, characterized in that: The memory stores a computer program that can be run on the processor. When the processor loads and executes the computer program, an ultra-high-order signal transmission optimization method based on discrete memristors as described in any one of claims 1 to 7 is adopted.

10. A computer-readable storage medium having a computer program stored therein, characterized in that: When the computer program is loaded and executed by the processor, an ultra-high-order signal transmission optimization method based on discrete memristors as described in any one of claims 1 to 7 is adopted.

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