Radio frequency chip mass production calibration test system and method

Abstract

According to the radio frequency chip mass production calibration test system and method provided by the invention, a waveform sequence corresponding to a plurality of calibration values is generated at one time through a chip, a plurality of continuous waveforms are captured at one time through a test machine, the waveforms are split and calculated to find out an optimal calibration value, and calibration can be realized only through one-time interaction. According to the invention, the number of times of interaction between the chip and the machine can be greatly reduced, so that the purposes of reducing the test time and improving the test output are achieved. And moreover, the calibration precision is not sacrificed when the efficiency is improved, and the values of all the calibration registers can be covered, so that the optimal calibration within the precision range of the test machine is realized.

Description

Technical Field

[0001] The present invention relates to the field of radio frequency chip testing, and in particular to a radio frequency chip mass production calibration testing system and method. Background Art

[0002] As chip integration becomes higher and higher, more and more RF modules are integrated on SoC, and more and more RF circuit calibration tests need to be completed before leaving the factory. Accordingly, under the existing calibration test methods, the test time of FT test or CP test is getting longer and longer, and the test efficiency is getting lower and lower.

[0003] The existing calibration method mainly uses point-by-point scanning and interactive calibration. As more and more RF modules are integrated into chips, more and more test items need to be calibrated, and at the same time, more and more parameters to be calibrated are required for the calibration test items. The original point-by-point scanning and interactive calibration method will cause the test time to be too long, the test efficiency to be low, the test capacity to be reduced, and the test cost to increase. Summary of the invention

[0004] In view of the above-mentioned shortcomings of the prior art, an object of the present invention is to provide a radio frequency chip mass production calibration test system and method for solving the above-mentioned problems of the prior art.

[0005] To achieve the above-mentioned purpose and other related purposes, the present invention provides a radio frequency chip mass production calibration test system, the system comprising: a chip, which is provided with a register to be calibrated and a chip status register, for generating a waveform sequence for each calibration value of the configured calibration register after power-on, and sending a corresponding signal sequence after configuring the chip status register to a ready state; a test machine, which establishes a communication connection with the chip, for determining the optimal calibration parameter value of the calibration register based on each captured signal sequence, and configuring the chip status register to a calibration completion state after transmitting the calibration information back to the chip, so that the chip can record the corresponding calibration value and complete the test.

[0006] In one embodiment of the present invention, a waveform sequence is generated for each calibration value of a configured calibration register, and a corresponding signal sequence is sent after the chip status register is configured to a ready state, including: configuring a fixed number of calibration values ​​of the calibration register for the calibration register bit width; generating a waveform sequence for each calibration value of the configured calibration register; after each waveform sequence is generated, configuring the chip status register to a ready state; and sending a signal sequence corresponding to each waveform sequence.

[0007] In one embodiment of the present invention, the optimal calibration parameter value of the calibration register is determined based on each captured signal sequence, and the calibration information is transmitted back to the chip before configuring the chip status register to a calibration completion state, including: when it is detected that the chip status register is configured to a ready state, capturing each signal sequence sent by the chip; parsing each signal sequence and calculating the corresponding calibration parameter value respectively; traversing each calibration parameter value to determine the calibration parameter value that best meets the requirements as the optimal calibration parameter value; transmitting the number of the signal sequence corresponding to the optimal calibration parameter value back to the chip; and configuring the current chip status register to a calibration completion state.

[0008] In one embodiment of the present invention, if it is detected that the current chip status register is in a calibration complete state, the chip records the corresponding calibration value based on the number of the signal sequence returned by the test machine, then the calibration is completed and the chip is normal.

[0009] In one embodiment of the present invention, if it is not detected that the current chip status register is in the calibration completion state, the test is terminated and the chip is invalid.

[0010] In one embodiment of the present invention, the method of traversing each calibration parameter value to determine the calibration parameter value that best meets the requirement includes: traversing each calibration parameter value to determine the calibration parameter value that best meets the test threshold.

[0011] In one embodiment of the present invention, each signal sequence is analyzed by a fast Fourier transform algorithm and the corresponding calibration parameter values ​​are calculated respectively.

[0012] To achieve the above-mentioned purpose and other related purposes, the present invention provides a radio frequency chip mass production calibration test method, the method comprising: after the chip is powered on, a waveform sequence is generated for each calibration value of the configured calibration register, and the chip status register is configured to a ready state and then a corresponding signal sequence is sent; the optimal calibration parameter value of the calibration register is determined by a test machine based on each signal sequence sent by the chip, and the state of the chip status register is changed after the calibration information is transmitted back to the chip; the chip records the corresponding optimal calibration value based on the calibration information transmitted back by the test machine to complete the test.

[0013] In one embodiment of the present invention, after the chip is powered on and initialized, a fixed number of calibration values ​​of the calibration register are configured according to the bit width of the calibration register, and a waveform sequence is generated for each calibration value of the configured calibration register; after each waveform sequence is generated, the chip status register is configured to a ready state, and a signal sequence corresponding to each waveform sequence is sent.

[0014] In one embodiment of the present invention, when a test machine detects that a chip status register is configured as a ready state, each signal sequence sent by the chip is captured; each signal sequence is parsed and the corresponding calibration parameter value is calculated respectively, and each calibration parameter value is traversed to determine the calibration parameter value that best meets the requirements as the optimal calibration parameter value; the number of the signal sequence corresponding to the optimal calibration parameter value is transmitted back to the chip, and the current chip status register is configured as a calibration completion state.

[0015] As described above, the present invention is a radio frequency chip mass production calibration test system and method, which has the following beneficial effects: the present invention generates a waveform sequence corresponding to multiple calibration values ​​at one time through the chip and captures multiple continuous waveforms at one time through the test machine, and splits and calculates the waveform to find the optimal calibration value, and calibration can be achieved with only one interaction. The present invention can greatly reduce the number of interactions between the chip and the machine, thereby achieving the purpose of reducing test time and improving test output. And while improving efficiency, the calibration accuracy is not sacrificed. In addition, since the values ​​of all calibration registers can be covered, the optimal calibration within the accuracy range of the test machine can be achieved. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 Shown is a schematic diagram of the structure of a radio frequency chip mass production calibration test system in one embodiment of the present invention.

[0017] Figure 2 Shown is a calibration test flow chart of a radio frequency chip mass production calibration test system in one embodiment of the present invention.

[0018] Figure 3 Shown is a flow chart of a radio frequency chip mass production calibration test method in one embodiment of the present invention. DETAILED DESCRIPTION

[0019] The following describes the embodiments of the present invention by specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present invention. It should be noted that the following embodiments and features in the embodiments can be combined with each other without conflict.

[0020] It should be noted that in the following description, reference is made to the accompanying drawings, which describe several embodiments of the present invention. It should be understood that other embodiments may also be used, and that mechanical composition, structural, electrical and operational changes may be made without departing from the spirit and scope of the present invention. The following detailed description should not be considered restrictive, and the scope of the embodiments of the present invention is limited only by the claims of the published patents. The terms used herein are only for describing specific embodiments and are not intended to limit the present invention. Spatially related terms, such as "upper", "lower", "left", "right", "below", "below", "lower", "above", "upper", etc., may be used in the text to facilitate the description of the relationship between an element or feature shown in the figure and another element or feature.

[0021] Throughout the specification, when a part is said to be "connected" to another part, this includes not only the case of "direct connection" but also the case of "indirect connection" by placing other elements therebetween. In addition, when a part is said to "include" a certain constituent element, unless otherwise stated, it does not exclude other constituent elements, but means that other constituent elements may be included.

[0022] The terms first, second and third mentioned herein are used to describe various parts, components, regions, layers and / or segments, but are not limited thereto. These terms are only used to distinguish a certain part, component, region, layer or segment from other parts, components, regions, layers or segments. Therefore, the first part, component, region, layer or segment described below may refer to the second part, component, region, layer or segment within the scope of the present invention.

[0023] Furthermore, as used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless there is an indication to the contrary in the context. It should be further understood that the terms "comprise", "include" indicate the presence of the described features, operations, elements, components, items, kinds, and / or groups, but do not exclude the presence, occurrence or addition of one or more other features, operations, elements, components, items, kinds, and / or groups. The terms "or" and "and / or" used herein are interpreted as inclusive, or mean any one or any combination. Therefore, "A, B or C" or "A, B and / or C" means "any of the following: A; B; C; A and B; A and C; B and C; A, B and C". Exceptions to this definition will only occur when the combination of elements, functions or operations is inherently mutually exclusive in some way.

[0024] A radio frequency chip mass production calibration test method of the present invention generates a waveform sequence corresponding to multiple calibration values ​​at one time through the chip and captures multiple continuous waveforms at one time through the test machine, and the waveform is split and calculated to find the optimal calibration value, and calibration can be achieved with only one interaction. The present invention can greatly reduce the number of interactions between the chip and the machine, thereby achieving the purpose of reducing test time and improving test output. And while improving efficiency, the calibration accuracy is not sacrificed. In addition, since the values ​​of all calibration registers can be covered, the optimal calibration within the accuracy range of the test machine can be achieved.

[0025] At the same time, in order to make the purpose, technical solution and advantages of the present invention more clear, the technical solution in the embodiment of the present invention is further described in detail through the following embodiments and in combination with the accompanying drawings. It should be understood that the specific embodiments described here are only used to explain the present invention and are not used to limit the invention.

[0026] Before further describing the present invention in detail, the nouns and terms involved in the embodiments of the present invention are explained. The nouns and terms involved in the embodiments of the present invention are applicable to the following interpretations:

[0027] <1> SOC (System on Chip), also known as system-on-chip, means that it is a product, an integrated circuit with a dedicated purpose, which contains all the contents of a complete system and embedded software.

[0028] <2> FT test (Functional Test) is a test that conducts power-on tests on electrical components to test whether they can work normally.

[0029] <3> CP test (Chip Probing) is between wafer manufacturing and packaging in the entire chip production process. It is a test for each die in the entire wafer. The specific operation is that after the wafer is made, thousands of bare DIEs (unpackaged chips) are regularly distributed all over the wafer. Since the wafer has not yet been diced and packaged, only the exposed chip pins need to be connected to the test machine through probes, and the chip test is CP test.

[0030] <4> RF (Radio Frequency) refers to the electromagnetic frequency that can be radiated into space, ranging from 300kHz to 300GHz. Radio frequency is radio frequency current, abbreviated as RF, which is the abbreviation of a high-frequency alternating electromagnetic wave.

[0031] The following is a detailed description of the embodiments of the present invention with reference to the accompanying drawings so that those skilled in the art can easily implement the present invention. The present invention can be embodied in many different forms and is not limited to the embodiments described herein.

[0032] like Figure 1 A schematic diagram of the structure of a radio frequency chip mass production calibration test system in an embodiment of the present invention is shown.

[0033] The system includes: a chip 1 and a test machine 2; the chip 1 is in communication connection with the test machine 2;

[0034] Among them, chip 1 has a register to be calibrated and a chip status register, which is used to generate a waveform sequence for each calibration value of the configured calibration register after power-on, and send a corresponding signal sequence after configuring the chip status register to the ready state; the chip 1 can be integrated with multiple RF modules, and the parameters to be tested can be one or more. For example, the chip 1 is a complete SOC chip, and there will be more parameters that need to be tested in the chip CP or FT stage.

[0035] Test machine 2 is used to determine the optimal calibration parameter value of the calibration register based on each captured signal sequence, and after transmitting the calibration information back to the chip, configure the chip status register to the calibration completion state, so that the chip can record the corresponding calibration value and complete the test. Test machine 2 has an analog quantity comparison function. Test machine 2 is used to connect to chip 1, and can receive the analog quantity output by the chip, determine the relationship between the analog quantity and the preset range value, and output the measurement result to the chip. Test machine 2 can also be a host computer.

[0036] It should be noted that this embodiment only tests one calibration parameter, and the same steps are used for the calibration test of multiple parameters. This solution adopts the method of capturing continuous interval signals at one time to optimize the calibration process of the calibration parameters with longer calibration register bit width during the RF calibration process in terms of time and efficiency, and this solution does not reduce the calibration accuracy.

[0037] In one embodiment, the chip 1 generates a waveform sequence for each calibration value of the configured calibration register after power-on, and sends a corresponding signal sequence after configuring the chip status register to a ready state, including:

[0038] Step 1: Power on and complete initialization.

[0039] Step 2: Configure the calibration values ​​of a fixed number of calibration registers according to the calibration register bit width; specifically, set the corresponding number of calibration values ​​according to the bit width of the register of the parameter to be calibrated; if the calibration register bit width is n, the calibration value of the corresponding calibration register is 2n indivual.

[0040] Step 3: Generate a waveform sequence for each calibration value of the configured calibration register; specifically, generate a waveform sequence for each calibration value in sequence. It should be noted that the waveform sequences generated in sequence are arranged in order.

[0041] Step 4: After each waveform sequence is generated, configure the chip status register to the ready state;

[0042] Step 5: After configuring the chip status register to the ready state, the signal sequences corresponding to the waveform sequences are sent. The signal sequences sent are arranged in order and have a corresponding number.

[0043] In one embodiment, the test machine 2 determines the optimal calibration parameter value of the calibration register based on each captured signal sequence, and transmits the calibration information back to the chip and configures the chip status register to the calibration completion state in the following manner:

[0044] Step 1: When it is detected that the chip status register is configured as a ready state, capturing each signal sequence sent by the chip;

[0045] Step 2: Analyze each signal sequence and calculate the corresponding calibration parameter values ​​respectively;

[0046] Step 3: traverse each calibration parameter value to determine the calibration parameter value that best meets the requirements as the optimal calibration parameter value;

[0047] Step 4: Transmitting the number of the signal sequence corresponding to the optimal calibration parameter value back to the chip;

[0048] Step 5: Configure the current chip status register to the calibration completion state.

[0049] In a preferred embodiment, the method of traversing each calibration parameter value to determine the calibration parameter value that best meets the requirements includes: traversing each calibration parameter value to determine the calibration parameter value that best meets the test threshold. Preferably, traversing each calibration parameter value to determine the calibration parameter value that best meets the specification requirements of the chip data sheet.

[0050] In a preferred embodiment, each signal sequence is analyzed by a fast Fourier transform algorithm and the corresponding calibration parameter values ​​are calculated respectively.

[0051] In one embodiment, if it is detected that the current chip status register is in a calibration complete state, the chip records the corresponding calibration value based on the number of the signal sequence returned by the test machine, and the calibration is completed and the chip is normal.

[0052] In one embodiment, if it is not detected that the current chip status register is in the calibration completion state, the test is terminated and the chip is disabled.

[0053] In order to better illustrate the above-mentioned radio frequency chip mass production calibration test system, the present invention provides the following specific embodiments.

[0054] Embodiment 1: A radio frequency chip mass production calibration test system. Figure 2 This is a calibration test flow chart of the RF chip mass production calibration test system in this embodiment.

[0055] The system includes: a chip and a test machine. The specific calibration test process is as follows:

[0056] Step 1: Chip power-on initialization is completed;

[0057] Step 2: The chip generates waveforms;

[0058] a. Assume that the maximum value of the register of the chip parameter to be calibrated is n;

[0059] b. The register values ​​corresponding to the parameters to be calibrated in the configuration chip are 0, 1, 2…n respectively;

[0060] c. The chip generates n waveform sequences in the order of 0, 1, 2…n;

[0061] d. Set the chip status register to READY;

[0062] e. The chip sends out n signal sequences of the chip corresponding to the current n waveform sequences;

[0063] Step 3: The machine captures the waveform and calculates it;

[0064] a. Capture the n signal sequences sent by the chip;

[0065] b. Analyze the above signal sequence and calculate the calibration parameter value, which is recorded as Test (0, 1…n);

[0066] c. Traverse n calculation results Test (0, 1…n) to find the Test value that best meets the requirements;

[0067] d. Send the serial number x corresponding to the Test that best meets the requirements back to the chip;

[0068] e. Configure the chip status register to indicate calibration is complete;

[0069] Step 4: The machine sends back the calibration information, the chip records the calibration information, and the test is completed.

[0070] The comparison of the test time between the existing calibration test method and the calibration test method of this embodiment is as follows:

[0071] The time consumed in the existing calibration process of point-by-point scanning and interaction is divided into three parts: chip configuration, chip-machine interaction, and machine measurement and calculation of parameters to be calibrated. The chip configuration itself depends on the chip's own hardware and software execution efficiency. Generally speaking, the test time for this part is relatively fixed, and each configuration change consumes about 1.5ms. The test time for the chip-machine interaction part mainly depends on the rate of the chip-machine communication interface and the size of each data transmission. The current project interaction time is about 10ms each time. The time for the machine to measure and calculate the parameters to be calibrated depends on the selected machine model and the measurement time required by the test plan. According to the current project, each measurement and calculation is estimated to be 3ms. The time consumed by other parts of the chip is a fixed value of about 150ms.

[0072] The calibration time of point-by-point scanning calibration will increase with the increase of the calibration register bit width. The time of existing chips is roughly estimated as follows: each time the calibration register value is changed, the test time increases by (1.5+10+3)ms (1.5ms is the chip interaction time, 10ms is the machine interaction time, and 3ms is the time for capturing waveforms and calculations). If the calibration register bit width is n, the corresponding calibration register value is 2 n The time required for calibration is (1.5+10+3)*2. n ms.

[0073] Use the existing project to replace n in the above solution and calculate the test time as follows (150ms is the chip power-on and initialization time):

[0074] n=1: test time=150ms+(1.5+10+3)*2ms=179ms;

[0075] n=2: test time=150ms+(1.5+10+3)*4ms=208ms, an increase of 16% compared with the last time;

[0076] n=3: test time=150ms+(1.5+10+3)*8ms=266ms, an increase of 28% over the last time;

[0077] n=4: test time=150ms+(1.5+10+3)*16ms=382ms, an increase of 44% over the last time;

[0078] n=5: test time=150ms+(1.5+10+3)*32ms=614ms, an increase of 61% compared with the last time;

[0079] n=6: test time=150ms+(1.5+10+3)*64ms=1078ms, an increase of 78% over the last time;

[0080] n=7: test time=150ms+(1.5+10+3)*128ms=2006ms, an increase of 86% compared with the last time;

[0081] It can be seen from the above calculation that in this point-by-point scanning and successive interaction method, while ensuring the calibration accuracy, the test time required for calibration will increase linearly with the bit width of the calibration register. Comparing n=7 and n=1, it is found that the calibration time has increased by nearly 11 times, which is not conducive to the cost and output of the chip testing process.

[0082] Using the same chip and test machine to perform calibration test using the new solution of this embodiment, the test time is calculated as follows:

[0083] n=1: test time=150+11.5+3*2=167.5ms, which is 7% less than the original solution;

[0084] n=2: test time=150+11.5+3*4=173.5ms, 16% more than last time, 17% less than original solution;

[0085] n=3: test time=150+11.5+3*8=185.5ms, 28% more than last time, 30% less than original solution;

[0086] n=4: test time=150+11.5+3*16=209.5ms, 44% more than last time, 40% less than the original solution;

[0087] n=5: test time=150+11.5+3*32=257.5ms, 61% more than the last time, 58% less than the original solution;

[0088] n=6: test time=150+11.5+3*64=353.5ms, 78% more than the last time, 67% less than the original solution;

[0089] n=7: test time=150+11.5+3*128=545.5ms, an increase of 86% over the last time and a decrease of 72% over the original solution.

[0090] It can be seen from calculation that the optimization efficiency of the solution of this embodiment will become more obvious as the bit width of the calibration register increases.

[0091] Similar to the principle of the above embodiment, the present invention provides a calibration test method for mass production of radio frequency chips.

[0092] The following provides specific embodiments in conjunction with the accompanying drawings:

[0093] like Figure 3A flow chart showing a radio frequency chip mass production calibration test method according to an embodiment of the present invention.

[0094] The method comprises:

[0095] Step S1: After the chip is powered on, it generates a waveform sequence for each calibration value of the configured calibration register, and sends a corresponding signal sequence after configuring the chip status register to a ready state.

[0096] In one embodiment, step S1 includes: after the chip is powered on and initialized, a fixed number of calibration register calibration values ​​are configured according to the calibration register bit width, and a waveform sequence is generated for each calibration value of the configured calibration register; after each waveform sequence is generated, the chip status register is configured to a ready state, and a signal sequence corresponding to each waveform sequence is sent.

[0097] Step S2: determining the optimal calibration parameter value of the calibration register based on each signal sequence sent by the chip through the test machine, and changing the state of the chip status register after the calibration information is transmitted back to the chip.

[0098] In one embodiment, when a test machine detects that a chip status register is configured as a ready state, each signal sequence sent by the chip is captured; each signal sequence is parsed and the corresponding calibration parameter value is calculated respectively, and each calibration parameter value is traversed to determine the calibration parameter value that best meets the requirements as the optimal calibration parameter value; the number of the signal sequence corresponding to the optimal calibration parameter value is transmitted back to the chip, and the current chip status register is configured to be in a calibration completion state.

[0099] In one embodiment, the method of traversing each calibration parameter value to determine the calibration parameter value that best meets the requirement includes: traversing each calibration parameter value to determine the calibration parameter value that best meets the test threshold.

[0100] In one embodiment, each signal sequence is analyzed by a fast Fourier transform algorithm and the corresponding calibration parameter values ​​are calculated respectively.

[0101] Step S3: The chip records the corresponding optimal calibration value based on the calibration information sent back by the test machine to complete the test.

[0102] In one embodiment, if it is detected that the current chip status register is in a calibration complete state, the chip records the corresponding calibration value based on the number of the signal sequence returned by the test machine, and the calibration is completed and the chip is normal.

[0103] In one embodiment, if it is not detected that the current chip status register is in the calibration completion state, the test is terminated and the chip is disabled.

[0104] In summary, the RF chip mass production calibration test system and method of the present invention generates waveform sequences corresponding to multiple calibration values ​​at one time through the chip and captures multiple continuous waveforms at one time through the test machine, and splits and calculates the waveform to find the optimal calibration value, and calibration can be achieved with only one interaction. The present invention can greatly reduce the number of interactions between the chip and the machine, thereby achieving the purpose of reducing test time and improving test output. And while improving efficiency, the calibration accuracy is not sacrificed. In addition, since the values ​​of all calibration registers can be covered, the optimal calibration within the accuracy range of the test machine can be achieved. Therefore, the present invention effectively overcomes the various shortcomings in the prior art and has a high industrial utilization value.

[0105] The above embodiments are merely illustrative of the principles and effects of the present invention, and are not intended to limit the present invention. Anyone familiar with the technology may modify or change the above embodiments without violating the spirit and scope of the present invention. Therefore, all equivalent modifications or changes made by a person of ordinary skill in the art without departing from the spirit and technical ideas disclosed by the present invention shall still be covered by the claims of the present invention.

Claims

1. A radio frequency chip mass production calibration test system, characterized in that: The system comprises: A chip, which has a register to be calibrated and a chip status register, for generating a waveform sequence for each calibration value of the configured calibration register after power-on, and sending a corresponding signal sequence after configuring the chip status register to a ready state; The test machine establishes a communication connection with the chip, is used to determine the optimal calibration parameter value of the calibration register based on the captured signal sequences, and after transmitting the calibration information back to the chip, configures the chip status register to a calibration completion state so that the chip can record the corresponding calibration value and complete the test.

2. The RF chip mass production calibration test system according to claim 1, characterized in that: Generating a waveform sequence for each calibration value of the configured calibration register, and sending a corresponding signal sequence after configuring the chip status register to the ready state includes: The calibration values ​​of the fixed number of calibration registers are configured according to the calibration register bit width; Generating a waveform sequence for each calibration value of the configured calibration register; After each waveform sequence is generated, the chip status register is configured to be in a ready state; Send the signal sequence corresponding to each waveform sequence.

3. The RF chip mass production calibration test system according to claim 1, characterized in that: Determining the optimal calibration parameter value of the calibration register based on each captured signal sequence, and configuring the chip status register to a calibration completion state after transmitting the calibration information back to the chip includes: When it is detected that the chip status register is configured in a ready state, capturing each signal sequence sent by the chip; Analyze each signal sequence and calculate the corresponding calibration parameter value respectively; Traversing each calibration parameter value to determine the calibration parameter value that best meets the requirements as the optimal calibration parameter value; Transmitting the number of the signal sequence corresponding to the optimal calibration parameter value back to the chip; Configure the current chip status register to the calibration completion state.

4. The RF chip mass production calibration test system according to claim 3, characterized in that: If it is detected that the current chip status register is in a calibration complete state, the chip records the corresponding calibration value based on the number of the signal sequence returned by the test machine, and the calibration is completed and the chip is normal.

5. The RF chip mass production calibration test system according to claim 3, characterized in that: If the current chip status register is not detected to be in the calibration completed state, the test is terminated and the chip becomes invalid.

6. The RF chip mass production calibration test system according to claim 3, characterized in that: The method of traversing each calibration parameter value to determine the calibration parameter value that best meets the requirements includes: traversing each calibration parameter value to determine the calibration parameter value that best meets the test threshold.

7. The RF chip mass production calibration test system according to claim 3, characterized in that: Each signal sequence is analyzed by the fast Fourier transform algorithm and the corresponding calibration parameter values ​​are calculated respectively.

8. A radio frequency chip mass production calibration test method, characterized in that: The method comprises: After the chip is powered on, it generates a waveform sequence for each calibration value of the configured calibration register, and sends a corresponding signal sequence after configuring the chip status register to a ready state; Determining the optimal calibration parameter value of the calibration register based on each signal sequence sent by the chip through the test machine, and changing the state of the chip status register after transmitting the calibration information back to the chip; The chip records the corresponding optimal calibration value based on the calibration information sent back by the test machine to complete the test.

9. The RF chip mass production calibration test method according to claim 1, characterized in that: After the chip is powered on and initialized, a fixed number of calibration register calibration values ​​are configured according to the calibration register bit width, and a waveform sequence is generated for each calibration value of the configured calibration register; after each waveform sequence is generated, the chip status register is configured to a ready state, and a signal sequence corresponding to each waveform sequence is sent.

10. The RF chip mass production calibration test method according to claim 1, characterized in that: When the test machine detects that the chip status register is configured in the ready state, each signal sequence sent by the chip is captured; each signal sequence is parsed and the corresponding calibration parameter value is calculated respectively, and each calibration parameter value is traversed to determine the calibration parameter value that best meets the requirements as the optimal calibration parameter value; The number of the signal sequence corresponding to the optimal calibration parameter value is transmitted back to the chip, and the current chip status register is configured to be in a calibration completion state.

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