Isolated gate driving circuit using packaging cover plate parasitic element

Abstract

The invention relates to an isolated gate drive circuit using a packaging cover plate parasitic element, which is combined with a power supply module and comprises a non-magnetic core transformer, a DSP (Digital Signal Processor) control chip, a transmitter, a primary capacitor, a secondary capacitor, a receiver and a gate drive controller, wherein the non-magnetic-core transformer is arranged on the power module shell, and the DSP control chip and the gate drive controller are located on the packaging cover plate; the non-magnetic core transformer is respectively connected with the primary side capacitor and the secondary side capacitor, the DSP control chip is connected with the primary side capacitor through the transmitter, and the gate driving controller is connected with the secondary side capacitor through the receiver. The circuit can achieve equivalent isolation, is suitable for a high-power-density power module scene, is low in transmission delay, and achieves absolute insulation at the same time. Due to the fact that a relative distance exists between the PCB and the transformer in physical space, circuit conduction interference of components on the transformer is reduced.

Description

Technical Field

[0001] The present application relates to the technical field of switching power supplies, and in particular to an isolated gate drive circuit utilizing a package cover parasitic element. Background Art

[0002] In the power module, the PWM (Pulse Width Modulation) control signal generated by the control chip cannot be directly connected to the power tube, but needs to pass through the isolation barrier and the gate driver chip to generate a drive signal to control the power tube in the power module. In order to improve the isolation voltage level of the gate driver chip, a traditional solution is to use a transformer to isolate the gate driver chip from the power tube, and the low-side non-isolated gate driver chip applies pulses to the transformer to control the opening and closing of the power tube. Although the transmission delay of this solution is low, the transformer is large in size and requires a high cost, which is not suitable for high power density applications. In addition, in high power density power modules, current research is gradually developing towards small size and high integration, resulting in a gradual increase in the number of layers of PCB boards (Printed Circuit Boards) and a gradual decrease in the layout area. The components in the multi-layer PCB board fit each other, which greatly limits the difficulty of routing and layout between components.

[0003] Transformers are widely used in power modules to convert voltage from one amplitude to another. Traditional transformers consist of a pair of conductive windings around a magnetic core. This configuration is easy to manufacture, but has disadvantages in terms of size, weight and brittleness of the magnetic material. Summary of the invention

[0004] Based on this, it is necessary to provide an isolated gate drive circuit that utilizes package cover parasitic elements and has strong anti-interference ability, low loss, saves board area, and achieves high power density of the power module to address the above technical problems.

[0005] The present application provides an isolated gate drive circuit using a package cover parasitic element. The circuit is combined with a power module and includes a coreless transformer, a DSP (Digital Signal Processor) control chip, a transmitter, a primary capacitor, a secondary capacitor, a receiver and a gate drive controller. The coreless transformer is arranged on a power module housing, and the DSP control chip and the gate drive controller are located on the package cover. The coreless transformer is connected to the primary capacitor and the secondary capacitor respectively, the DSP control chip is connected to the primary capacitor via a transmitter, and the gate drive controller is connected to the secondary capacitor via a receiver.

[0006] In one embodiment, the package cover includes a PCB board, and the DSP control chip and the gate drive controller are respectively arranged on a first side and a second side of the PCB board.

[0007] In one embodiment, the PCB board is connected to the signal ground, and the power module housing is connected to the ground.

[0008] In one embodiment, the primary capacitor and the secondary capacitor both include parasitic capacitors between the PCB board and the power module housing and parasitic capacitors of the coreless transformer.

[0009] In one of the embodiments, the DSP control chip sends a PWM control signal, modulates the PWM control signal through a transmitter and a primary capacitor, couples the PWM control signal through a coreless transformer, and transmits the coupled PWM control signal to a gate drive controller for demodulation through a receiver and a secondary capacitor to generate a drive signal for a power module.

[0010] In one of the embodiments, the output end of the DSP control chip is connected to the input end of the transmitter, the output end of the transmitter is connected to the primary capacitor, the input end of the receiver is connected to the secondary capacitor, and the output end of the receiver is connected to the input end of the gate drive controller; when the PWM control signal is switched from a low level to a high level, the transmitter and the primary capacitor encode the rising edge as a positive polarity narrow pulse; when the PWM control signal is switched from a high level to a low level, the transmitter and the primary capacitor encode the falling edge as a negative polarity narrow pulse; the pulse signal modulated by the transmitter and the primary capacitor is coupled to the secondary side through a coreless transformer, and the receiver and the secondary capacitor restore the positive polarity narrow pulse to a rising edge and the negative polarity narrow pulse to a falling edge according to the received pulse polarity.

[0011] In one embodiment, the coreless transformer includes a square metal coil, in which a primary winding and a secondary winding are located in the same layer.

[0012] In one embodiment, a contact pad is provided at the tap of the metal coil.

[0013] The above-mentioned isolated gate drive circuit using the package cover parasitic element abandons the traditional scheme of using the transformer core to transmit signals, adopts a coreless transformer coupling method, and transmits a control signal modulated in the form of current pulses in a transformer composed of a metal coil and a silicon oxide insulating medium, thereby achieving a higher anti-interference ability. The circuit has low loss and good stability while increasing the voltage change rate dv / dt. In this application, the coreless transformer fits the power module housing to avoid occupying the PCB bare board area inside the power module, and cleverly realizes the transmission of the gate drive control signal through the power module housing, saving the space area of ​​the PCB bare board and improving the power density of the power module. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Figure 1 It is a schematic diagram of a traditional isolated gate drive circuit;

[0015] Figure 2 This is a simulation waveform diagram of a traditional isolated gate drive circuit;

[0016] Figure 3 is a schematic diagram of an isolated gate driving circuit using a package cover parasitic element in one embodiment;

[0017] Figure 4 is a schematic diagram of a coreless transformer in one embodiment;

[0018] Figure 5 An equivalent circuit diagram of a coreless transformer in one embodiment;

[0019] Figure 6 A schematic diagram of an isolated gate drive brick power module using package cover parasitic elements in one embodiment;

[0020] Figure 7 FIG. 4 is a waveform diagram of an isolated gate driver circuit using a package cover parasitic element in one embodiment. DETAILED DESCRIPTION

[0021] In the power module, the PWM control signal generated by the control chip cannot be directly connected to the power tube. It needs to pass through the isolation barrier and the gate drive chip to generate a drive signal to control the power tube in the power module.

[0022] In the gate drive control circuit, half-bridge gate drive has been widely used in various applications, but the design is difficult because of the need for isolation and the need to provide isolated power for the high-side gate driver. According to the medium used in the isolation barrier and the physical quantity transmitted through the isolation barrier, the isolation method can be divided into optical coupling isolation, magnetic coupling isolation, and capacitive isolation.

[0023] Different applications have different requirements for isolation levels, which can be divided into four levels: functional, basic, double and reinforced. In commercial products, reinforced isolation is the highest isolation level available. Although it consists of a single isolation barrier, the isolation barrier usually performs double-level equivalent isolation.

[0024] In order to improve the isolation voltage level of the gate driver chip, a traditional solution is to use a transformer to isolate the gate driver chip from the power tube. The low-side non-isolated gate driver chip applies pulses to the transformer to control the on and off of the power tube. Although this solution has a low transmission delay, the transformer is large and is not suitable for high power density applications.

[0025] Magnetic isolation uses the changing magnetic field between inductively coupled coils to transmit signals. The front-stage circuit generates a changing current signal flowing through the primary coil, generating a changing magnetic field on the primary coil. Due to the magnetic field coupling between the primary coil and the secondary coil, the secondary coil will induce a changing current. The rate of change of the current is proportional to the rate of change of the current in the primary coil, thereby realizing signal transmission.

[0026] Magnetic coupling isolation has faster transmission speed, longer service life, and wider operating temperature range. Magnetic coupling isolation can transmit both data and energy. However, the on-chip transformer used in magnetic coupling isolation has no magnetic core. Such an air-core transformer is easily disturbed by the external magnetic field (noise) and has low magnetic field immunity. At the same time, the on-chip transformer itself is a radiation source and has EMI (Electromagnetic Interference) interference problems. When magnetic coupling isolation works in a humid environment, polyimide is easily affected. The on-chip transformer needs to use MEMS (Micro-Electro-Mechanical System) technology and occupies a large area. The process is difficult and the cost is high.

[0027] Transformers are widely used in power modules to convert voltage from one amplitude to another. Traditional transformers consist of a pair of conductive windings around a magnetic core. This configuration is easy to manufacture, but has disadvantages in terms of size, weight, and brittleness of magnetic materials. In order to improve the power density of power modules, coreless transformers are becoming more and more popular and are widely used in highly integrated isolated gate drive circuits. However, high integration means that the components in the circuit will cause circuit conduction interference to the transformer. Therefore, how to use coreless transformers while reducing the conducted interference of isolated gate drive circuits is still a problem to be solved.

[0028] The schematic diagram of the traditional isolated gate drive circuit is as follows Figure 1 As shown in FIG. 1 , the conventional magnetic isolation gate drive circuit is mainly composed of a capacitor Cp, a transformer parasitic resistance Rp, a transformer primary inductance Lp and a secondary inductance Ls, a capacitor Cs and a load Rd. The input end is a high-frequency PWM control signal generated by DSP (Digital Signal Processing) and connected to the capacitor Cp. Due to the high-frequency signal at the edge of the PWM control signal, the inductor and capacitor in the circuit are in high-frequency resonance, generating a high-frequency current pulse signal. The signal modulation function of the primary side is realized through edge detection, as shown in the following formula (1), where VIN is the input voltage, I s is the secondary current:

[0029]

[0030] Figure 2This is a simulation waveform diagram of a traditional magnetically isolated gate drive circuit, where VIN is the input signal, Ip is the primary current, and Is is the secondary current; when the input signal is rising, the capacitor detects the signal and generates a corresponding positive current pulse. Due to magnetic coupling isolation, the corresponding signal is induced in the power module transformer and transmitted to the secondary side, and a positive or negative pulse is generated according to the transformer winding; when the input signal is falling, the capacitor detects the signal and generates a corresponding negative current pulse. The corresponding signal is induced in the power module transformer and transmitted to the secondary side, and a negative or positive current pulse is generated according to the transformer winding, thereby realizing signal modulation. The transformer transmits the modulated signal to the receiver, and the gate drive chip implements the corresponding demodulation function to obtain a control signal corresponding to the PWM signal, completing the signal transmission.

[0031] In the traditional isolated gate drive circuit, at the high-frequency rising edge of the PWM control signal, the resonance period of the magnetic coupling isolation circuit is affected by the circuit parasitic parameters. The primary capacitor Cp, transformer inductance Lp and Ls, transformer parasitic resistance Rs and secondary capacitor Cs should be reasonably adjusted. Therefore, in the PWM high-frequency signal, if the resonance time of the magnetic coupling gate drive circuit is too long, the values ​​of parasitic parameters such as the primary capacitors Cp and Cs can be appropriately reduced to keep the resonance time within an appropriate range.

[0032] The present application proposes an isolated gate drive solution based on a coreless transformer, which includes an isolated gate drive circuit utilizing a package cover parasitic element. This structure adopts a coreless transformer coupling method, has strong anti-interference ability, low loss, saves board area, and achieves high power density of the power module.

[0033] In order to make the purpose, technical solution and advantages of the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0034] In an exemplary embodiment, Figure 3 As shown, an isolated gate drive circuit using a package cover parasitic element is provided. The circuit is combined with a power module and includes a coreless transformer, a DSP control chip, a primary capacitor, a secondary capacitor, a transmitter, a receiver and a gate drive controller; wherein the coreless transformer is arranged on the power module housing, the DSP control chip and the gate drive controller are located on the package cover; the coreless transformer is connected to the primary capacitor and the secondary capacitor respectively, the DSP control chip is connected to the primary capacitor through a transmitter, and the gate drive controller is connected to the secondary capacitor through a receiver. The transmitter is located in the DSP control chip, and the receiver is located in the gate drive controller (IC).

[0035] Specifically, the main components of the isolated gate drive circuit using the parasitic elements of the package cover plate implemented by the coreless transformer in the present application include a DSP control chip, a transmitter, a primary capacitor, a coreless transformer, a secondary capacitor, a receiver and a gate drive controller. In the isolated gate drive circuit using the parasitic elements of the package cover plate, the DSP control chip located in the package cover plate sends a PWM control signal, and the PWM wave is modulated by the transmitter and the primary capacitor, coupled by the coreless transformer in the power module housing, and transmitted to the gate drive controller on the other side of the package cover plate for demodulation to generate a drive signal for the power tube of the power module. The package cover plate includes a bare PCB board.

[0036] In an exemplary embodiment, Figure 3 As shown, the package cover includes a PCB board, and the DSP control chip and the gate drive controller are respectively arranged on the first side and the second side of the PCB board.

[0037] Specifically, the isolated resonant gate drive circuit realizes corresponding functions in a packaged power module, wherein the DSP control chip and the gate drive controller are located on both sides of the PCB board, and the coreless converter is located in the power module housing.

[0038] In an exemplary embodiment, Figure 3 As shown, the PCB board is connected to the signal ground and the power module housing is connected to the ground.

[0039] Specifically, in the scheme of the magnetically isolated gate drive power module provided in the embodiments of the present application, the DSP module and the gate drive control chip are on a bare PCB board in the power module, wherein the gate drive control chip is the gate drive controller, the PCB board and the power module housing are respectively connected to the signal ground GND and the earth EGND, and the housing of the power module adopts a coreless transformer to realize magnetic coupling, thereby realizing the transmission of the modulated PWM control signal.

[0040] In an exemplary embodiment, Figure 3 As shown, both the primary capacitor and the secondary capacitor include the parasitic capacitor between the PCB board and the power module housing and the parasitic capacitor of the coreless transformer.

[0041] Specifically, Figure 3 The middle dotted line represents parasitic. The primary and secondary capacitors include the parasitic capacitance of the PCB board and the power module housing and the parasitic capacitance of the coreless transformer, realizing the coreless magnetic coupling isolation technology.

[0042] In an exemplary embodiment, the DSP control chip sends a PWM control signal, modulates the PWM control signal through a transmitter and a primary capacitor, couples the PWM control signal through a coreless transformer, and transmits the coupled PWM control signal to a gate drive controller for demodulation through a receiver and a secondary capacitor to generate a drive signal for a power module.

[0043] In an exemplary embodiment, the output of the DSP control chip is connected to the input of the transmitter, the output of the transmitter is connected to the primary capacitor, the input of the receiver is connected to the secondary capacitor, and the output of the receiver is connected to the input of the gate drive controller; when the PWM control signal switches from a low level to a high level, the transmitter and the primary capacitor encode the rising edge as a positive narrow pulse; when the PWM control signal switches from a high level to a low level, the transmitter and the primary capacitor encode the falling edge as a negative narrow pulse; the pulse signal modulated by the transmitter and the primary capacitor is coupled to the secondary side through a coreless transformer, and the receiver and the secondary capacitor restore the positive narrow pulse to a rising edge and the negative narrow pulse to a falling edge according to the received pulse polarity.

[0044] Specifically, in the isolated resonant gate drive system-level circuit, that is, in the isolated gate drive circuit using the package cover parasitic elements, the output terminal of the DSP control chip is connected to the input terminal of the transmitter, and the output terminal of the transmitter is connected to the primary capacitor. When the PWM control signal is switched from a low level to a high level, the primary transmitter and the parasitic capacitor encode the rising edge as a positive polarity narrow pulse, that is, the transmitter and the primary capacitor encode the rising edge as a positive polarity narrow pulse; when the control signal is switched from a high level to a low level, the primary transmitter and the parasitic capacitor encode the falling edge as a negative polarity narrow pulse, that is, the transmitter and the primary capacitor encode the falling edge as a negative polarity narrow pulse. The pulse signal obtained after modulation is coupled to the secondary side through the coreless transformer in the power module housing, and the secondary side receiver restores the positive polarity narrow pulse to the rising edge and the negative polarity narrow pulse to the falling edge according to the received pulse polarity, that is, the receiver and the secondary capacitor restore the received pulse polarity, thereby restoring the carrier signal to a square wave signal, and realizing the magnetically coupled isolated gate drive solution.

[0045] The magnetic isolation gate drive power supply module in the above embodiment, that is, the isolated gate drive circuit using the package cover parasitic element, the DSP module and the gate drive control chip IC are on the PCB bare board in the power module, wherein the gate drive control chip IC is the gate drive controller, the PCB board and the power module housing are connected to the signal ground GND and the earth EGND respectively, and the housing of the power module adopts a coreless transformer to realize magnetic coupling, so as to realize the transmission of the modulated PWM control signal. The parasitic capacitance between the housing of the power module and the PCB bare board ground will also affect the modulation of the PWM control signal, so it is necessary to reasonably adjust the values ​​of the primary capacitor Cp and the secondary capacitor Cs to reduce the influence of the parasitic capacitance between the power module housing and the PCB bare board ground. In the figure, when the DSP controller sends the PWM control signal through the primary capacitor Cp to the power module housing, it has been modulated into a current pulse signal, which is coupled to the gate drive controller through the transformer.

[0046] In an exemplary embodiment, the coreless transformer includes a square metal coil, in which a primary winding and a secondary winding are located in the same layer.

[0047] Specifically, the coreless magnetic coupling transformer structure in the present application, i.e., the coreless transformer is as follows: Figure 4 As shown, the coreless magnetic coupling transformer structure in the present application is composed of a square metal coil to achieve isolation between the primary and secondary sides, avoid large-sized magnetic cores occupying the power module space, and improve the space utilization of the power module. The primary and secondary coil input ports of the transformer are Pa and Pb, the output ports are Sa and Sb, and the width of the inner ring of the square coil is d in , the width of the outer ring is d out In the coreless metal coil, the primary winding and the secondary winding are designed to be located on the same layer to avoid the introduction of planar parasitic capacitance of the primary and secondary coils due to not being on the same layer.

[0048] In an exemplary embodiment, a contact pad is provided at the tap of the metal coil.

[0049] Specifically, since the primary and secondary metal coils of the transformer are on the same layer, the primary and secondary coils are wound side by side, generating line-to-line parasitic capacitance. The coil at the power module packaging shell designed in the present application will also affect the packaging shell, generating an eddy current field in the packaging shell, thereby affecting the magnetic field of the transformer metal coil, and further affecting the transmitted pulse current signal. In order to ensure the insulation of the package, a contact pad is designed at the coil tap. In order to ensure that the modulated signal can be better transmitted, a low-resistance coil is used to increase the current.

[0050]

[0051] As shown in formula (2) and formula (3), according to the square metal coil size and winding resistance in this application, the inductance value of the square coil can be obtained, where μ0 is the vacuum magnetic permeability, K1 and K2 are the primary and secondary inductance coefficients of the square metal coil, n is the transformer coil turns ratio, and f r is the ratio of the difference in the width of the metal coil to the sum, d avg is the average width of the primary and secondary metal coils, and the width of the inner ring of the square coil is d in , the width of the outer ring is d out .

[0052] Furthermore, in the isolated gate drive circuit using the package cover parasitic element in the present application, the upper limit of the self-resonant frequency fsr of the coil at the power module package shell is determined by the parasitic capacitance and the inductance of the coil; the coupling coefficient k is mainly determined by the inductance Loc measured by the secondary open circuit and the inductance Lsc measured by the secondary short circuit, as shown in formula (4):

[0053]

[0054] The winding capacitance is determined by the transformer's self-resonant frequency. Shortening the insulation between the primary and secondary coils can suppress the influence of the winding capacitance.

[0055] Furthermore, the equivalent circuit diagram of the coreless transformer in this application is as follows: Figure 5 As shown, the equivalent circuit is two coupled inductors (i.e., inductor Leq) in parallel with capacitor C. By using symmetry in the coreless transformer, the inductor L1 and the inductor L2 are the same here. Capacitor C is the equivalent capacitor of capacitor C3 and capacitor C4 placed in parallel. Capacitor C1 and capacitor C2 determine the self-resonant frequency. Resistors R1 and R2 are parasitic resistances determined by the transformer coil. Capacitor C is the equivalent capacitor of capacitor C3 and capacitor C4 placed in parallel. Capacitor C1 and capacitor C2 are the parasitic capacitances between the primary coil and the secondary coil. Resistors R1 and R2 are parasitic resistances determined by the transformer coil. According to the coreless transformer equivalent circuit, the corresponding parasitic parameters such as capacitance and resistance can be measured, and then the corresponding inductance value can be designed according to the control signal frequency of the power module, thereby reducing the impact of various parasitics inside the power module on the modulated signal and achieving high-performance signal transmission.

[0056] In this embodiment, according to the equivalent circuit of the coreless transformer, the corresponding parasitic parameters such as resistance and capacitance can be measured, and then the corresponding values ​​are designed according to the control signal frequency of the power module, so as to reduce the influence of various parasitics inside the power module on the modulated signal and achieve high-performance signal transmission.

[0057] In one embodiment, Figure 6As shown, a schematic diagram of an isolated gate drive brick power module using a package cover parasitic element is provided, wherein a coreless transformer coil 601 is located on a cover 602 and connected to EGND, and a DSP control chip 603 and a gate drive controller IC 604 are located on a PCB bare board 605 in the power module and connected to GND. There is a parasitic capacitance Cp between the transformer coil 601 and the DSP control chip 603, and there is a parasitic capacitance Cs between the transformer coil 601 and the gate drive controller IC 604. Furthermore, the effect waveform of the circuit is as follows: Figure 7 As shown, VIN is the input signal, VOUT is the output signal, Ip is the primary current, and Is is the secondary current. It can be seen from the waveform diagram that after the transformer coil is added to the cover plate 602, due to the parasitic resistance and parasitic capacitance, the primary current Ip and the secondary current Is show obvious oscillations, but can eventually output the drive voltage VOUT waveform normally to achieve the correct gate drive function. This solution reduces transmission delay and reduces interference from components.

[0058] Different from the traditional magnetic isolation gate drive circuit, the magnetic isolation gate drive circuit in the above embodiment is combined with the power module, and the power module housing is cleverly used to realize the magnetic coupling of the PWM control signal, which greatly reduces the area of ​​the bare board of the power module and improves the power density of the power module. The coreless transformer is installed on the packaging housing, and the PCB mainboard components are reduced, achieving equivalent isolation, which is suitable for high-power density power module scenarios, has low transmission delay, and also achieves absolute insulation. At the same time, since the PCB circuit board and the transformer are physically spaced relative to each other, the circuit conduction interference of the components on the transformer is reduced.

[0059] For those skilled in the art, several modifications and improvements can be made without departing from the concept of the present application, and these modifications and improvements are all within the scope of protection of the present application. Therefore, the scope of protection of the present application shall be subject to the attached claims.

Claims

1. An isolated gate drive circuit using a package cover parasitic element, characterized in that: The circuit is combined with a power module, and includes a coreless transformer, a DSP control chip, a transmitter, a primary capacitor, a secondary capacitor, a receiver and a gate drive controller; wherein the coreless transformer is arranged on a power module housing, and the DSP control chip and the gate drive controller are located on a package cover; the coreless transformer is connected to the primary capacitor and the secondary capacitor respectively, the DSP control chip is connected to the primary capacitor via a transmitter, and the gate drive controller is connected to the secondary capacitor via a receiver.

2. The circuit according to claim 1, characterized in that The package cover plate comprises a PCB board, and a DSP control chip and a gate drive controller are respectively arranged on a first side and a second side of the PCB board.

3. The circuit according to claim 2, characterized in that The PCB board is connected to the signal ground, and the power module housing is connected to the ground.

4. The circuit according to claim 3, characterized in that The primary capacitor and the secondary capacitor both include parasitic capacitors between the PCB board and the power module housing and parasitic capacitors of the coreless transformer.

5. The circuit according to claim 4, characterized in that The DSP control chip sends a PWM control signal, modulates the PWM control signal through a transmitter and a primary capacitor, couples the PWM control signal through a coreless transformer, and transmits the coupled PWM control signal to a gate drive controller for demodulation through a receiver and a secondary capacitor to generate a drive signal for a power module.

6. The circuit according to claim 5, characterized in that The output end of the DSP control chip is connected to the input end of the transmitter, the output end of the transmitter is connected to the primary capacitor, the input end of the receiver is connected to the secondary capacitor, and the output end of the receiver is connected to the input end of the gate drive controller; when the PWM control signal is switched from a low level to a high level, the transmitter and the primary capacitor encode the rising edge as a positive polarity narrow pulse; when the PWM control signal is switched from a high level to a low level, the transmitter and the primary capacitor encode the falling edge as a negative polarity narrow pulse; the pulse signal modulated by the transmitter and the primary capacitor is coupled to the secondary side through a coreless transformer, and the receiver and the secondary capacitor restore the positive polarity narrow pulse to a rising edge and restore the negative polarity narrow pulse to a falling edge according to the received pulse polarity.

7. The circuit according to claim 1, characterized in that The coreless transformer comprises a square metal coil, in which a primary winding and a secondary winding are located in the same layer.

8. The circuit according to claim 7, characterized in that A contact pad is provided at the tap of the metal coil.

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