Isolation timing counter supporting RS422 level

Abstract

The invention discloses an isolation timing counter supporting an RS422 level. The isolation timing counter comprises a front panel connector, a protection circuit unit, an interface transceiver, an isolation buffer module, a microcontroller unit FPGA, a storage unit EEPROM, a power management unit, a level conversion unit and a CPCI connector. The isolation timing counter performs information interaction with an upper computer through a CPCI (Compact Peripheral Component Interconnect) bus, programmable PWM (Pulse Width Modulation) signals with adjustable output frequency and duty ratio are respectively controlled through a microcontroller unit FPGA (Field Programmable Gate Array), and the output programmable PWM signals realize conversion from TTL (Transistor-Transistor Logic) level single-ended signals to RS422 differential level signals through a level conversion chip MAX3160. According to the isolation timing counter supporting the RS422 level, programmable PWM signal output is converted from a TTL level single-end signal to an RS422 differential level for transmission, the anti-interference capability of PWM signal transmission is improved, the signal transmission distance is greatly increased, and the problems that the TTL level transmission distance is short and the anti-interference capability is weak are solved.

Description

Technical Field

[0001] The invention relates to the technical field of data acquisition control, in particular to an isolation timing counter supporting RS422 level. Background Art

[0002] Programmable PWM signals control DC motors, stepper motors, and servo motors. Currently, the existing programmable PWM outputs are all in the form of TTL level single-ended signal outputs. The signal has poor anti-interference ability and short transmission distance. It may cause signal distortion during long-distance transmission, which has an adverse impact on customer use and system safety. Summary of the invention

[0003] 1. Technical issues to be resolved

[0004] In view of the deficiencies in the prior art, the present invention provides an isolated timing counter supporting RS422 level, which solves the problems of short transmission distance and weak anti-interference ability of TTL level.

[0005] (II) Technical solution

[0006] To achieve the above purpose, the present invention is implemented by the following technical scheme: an isolated timing counter supporting RS422 level, including a front panel connector, a protection circuit unit, an interface transceiver, an isolation buffer module, a microcontroller unit FPGA, a storage unit EEPROM, a power management unit, a level conversion unit and a CPCI connector;

[0007] The isolated timing counter exchanges information with the host computer through the CPCI bus, and controls the output frequency and duty cycle of the programmable PWM signal respectively through the microcontroller unit FPGA. The output programmable PWM signal is converted from TTL level single-ended signal to RS422 differential level signal through the level conversion chip MAX3160, and finally output through the SCSI 68 connector.

[0008] Preferably, the host computer transmits control instructions to the microcontroller unit FPGA of the isolated timer / counter module that supports the RS422 level standard through the CPCI bus. The microcontroller unit FPGA parses the instructions and outputs a programmable PWM signal of the TTL level standard. The programmable PWM signal of the TTL level standard is converted into an RS422 differential level signal through the interface transceiver and output to the front panel connector for use by the test unit.

[0009] Preferably, the front panel connector is used to connect a test unit, and the storage unit EEPROM is used to store user information.

[0010] Preferably, the protection circuit unit is composed of 8 protection circuits, which are used to prevent the external input signal from being too high to damage the internal circuit of the board and cause irreversible damage to the board.

[0011] Preferably, the number of the interface transceivers is 8, which are used to convert TTL level single-ended signals into RS422 differential levels.

[0012] Preferably, the number of the isolation buffer modules is 8, which are used to isolate the internal and external signals of the module with the isolation line as the boundary.

[0013] Preferably, the microcontroller unit FPGA is used to communicate and interact with the CPCI bus and control the programmable PWM signal output, and can also interact with the storage unit EEPROM.

[0014] Preferably, the power management unit supports various voltages required by an isolation timer or counter module of RS422 level standard, and ensures voltage stability.

[0015] Preferably, the level conversion unit is used to ensure the conversion of the microcontroller unit IO safe working level and the CPCI bus level;

[0016] Preferably, the CPCI connector supports a connector between an isolation timer or counter module of RS422 level standard and the CPCI bus.

[0017] (III) Beneficial effects

[0018] The invention provides an isolated timing counter supporting RS422 level. Compared with the prior art, the invention has the following beneficial effects: the isolated timing counter supporting RS422 level includes a front panel connector, a protection circuit unit, an interface transceiver, an isolation buffer module, a microcontroller unit FPGA, a storage unit EEPROM, a power management unit, a level conversion unit and a CPCI connector; the isolated timing counter performs information exchange with a host computer through a CPCI bus, and controls the output frequency and a programmable PWM signal with adjustable duty cycle respectively through the microcontroller unit FPGA, and the output programmable PWM signal is converted from a TTL level single-ended signal to an RS422 differential level signal through a level conversion chip MAX3160, and finally output through a SCSI 68 connector, and the programmable PWM signal output is converted from a TTL level single-ended signal to an RS422 differential level form for transmission, thereby improving the anti-interference ability of PWM signal transmission, greatly increasing the transmission distance of the signal, and solving the problem of short transmission distance and weak anti-interference ability of TTL level. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 It is a functional block diagram of the present invention. DETAILED DESCRIPTION

[0020] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0021] See also Figure 1 The embodiment of the present invention provides a technical solution: an isolated timing counter supporting RS422 level, specifically including the following embodiments:

[0022] Embodiment 1: An isolated timing counter supporting RS422 level, comprising a front panel connector, a protection circuit unit, an interface transceiver, an isolation buffer module, a microcontroller unit FPGA, a storage unit EEPROM, a power management unit, a level conversion unit and a CPCI connector;

[0023] The isolated timing counter exchanges information with the host computer through the CPCI bus, and controls the output frequency and duty cycle of the programmable PWM signal respectively through the microcontroller unit FPGA. The output programmable PWM signal is converted from TTL level single-ended signal to RS422 differential level signal through the level conversion chip MAX3160, and finally output through the SCSI 68 connector.

[0024] In an embodiment of the present invention, the host computer transmits control instructions to the microcontroller unit FPGA of the isolated timer / counter module that supports the RS422 level standard through the CPCI bus. The microcontroller unit FPGA parses the instructions and outputs a programmable PWM signal of the TTL level standard. The programmable PWM signal of the TTL level standard is converted into an RS422 differential level signal through the interface transceiver and output to the front panel connector for use by the test unit.

[0025] In the embodiment of the present invention, the front panel connector is used to connect the test unit, and the storage unit EEPROM is used to store user information.

[0026] In the embodiment of the present invention, the protection circuit unit is composed of 8 protection circuits, which are used to prevent the external input signal from being too high to damage the internal circuit of the board and cause irreversible damage to the board.

[0027] In the embodiment of the present invention, the number of interface transceivers is 8, which are used to convert TTL level single-ended signals into RS422 differential level signals.

[0028] Embodiment 2: An isolated timing counter supporting RS422 level, comprising a front panel connector, a protection circuit unit, an interface transceiver, an isolation buffer module, a microcontroller unit FPGA, a storage unit EEPROM, a power management unit, a level conversion unit and a CPCI connector;

[0029] The isolated timing counter exchanges information with the host computer through the CPCI bus, and controls the output frequency and duty cycle of the programmable PWM signal respectively through the microcontroller unit FPGA. The output programmable PWM signal is converted from TTL level single-ended signal to RS422 differential level signal through the level conversion chip MAX3160, and finally output through the SCSI 68 connector.

[0030] In an embodiment of the present invention, the host computer transmits control instructions to the microcontroller unit FPGA of the isolated timer / counter module that supports the RS422 level standard through the CPCI bus. The microcontroller unit FPGA parses the instructions and outputs a programmable PWM signal of the TTL level standard. The programmable PWM signal of the TTL level standard is converted into an RS422 differential level signal through the interface transceiver and output to the front panel connector for use by the test unit.

[0031] In the embodiment of the present invention, the front panel connector is used to connect the test unit, and the storage unit EEPROM is used to store user information.

[0032] In the embodiment of the present invention, the protection circuit unit is composed of 8 protection circuits, which are used to prevent the external input signal from being too high to damage the internal circuit of the board and cause irreversible damage to the board.

[0033] In the embodiment of the present invention, the number of interface transceivers is 8, which are used to convert TTL level single-ended signals to RS422 differential levels.

[0034] In the embodiment of the present invention, the number of isolation buffer modules is 8, which are used to isolate the internal and external signals of the module with the isolation line as the boundary.

[0035] In the embodiment of the present invention, the microcontroller unit FPGA is used to communicate and interact with the CPCI bus and control the output of programmable PWM signals, and can also interact with the storage unit EEPROM.

[0036] In the embodiment of the present invention, the power management unit supports various voltages required by an isolation timer or counter module of RS422 level standard and ensures voltage stability.

[0037] Embodiment 3: An isolated timing counter supporting RS422 level, comprising a front panel connector, a protection circuit unit, an interface transceiver, an isolation buffer module, a microcontroller unit FPGA, a storage unit EEPROM, a power management unit, a level conversion unit and a CPCI connector;

[0038] The isolated timing counter exchanges information with the host computer through the CPCI bus, and controls the output frequency and duty cycle of the programmable PWM signal respectively through the microcontroller unit FPGA. The output programmable PWM signal is converted from TTL level single-ended signal to RS422 differential level signal through the level conversion chip MAX3160, and finally output through the SCSI 68 connector.

[0039] In an embodiment of the present invention, the host computer transmits control instructions to the microcontroller unit FPGA of the isolated timer / counter module that supports the RS422 level standard through the CPCI bus. The microcontroller unit FPGA parses the instructions and outputs a programmable PWM signal of the TTL level standard. The programmable PWM signal of the TTL level standard is converted into an RS422 differential level signal through the interface transceiver and output to the front panel connector for use by the test unit.

[0040] In the embodiment of the present invention, the front panel connector is used to connect the test unit, and the storage unit EEPROM is used to store user information.

[0041] In the embodiment of the present invention, the protection circuit unit is composed of 8 protection circuits, which are used to prevent the external input signal from being too high to damage the internal circuit of the board and cause irreversible damage to the board.

[0042] In the embodiment of the present invention, the number of interface transceivers is 8, which are used to convert TTL level single-ended signals to RS422 differential levels.

[0043] In the embodiment of the present invention, the number of isolation buffer modules is 8, which are used to isolate the internal and external signals of the module with the isolation line as the boundary.

[0044] In the embodiment of the present invention, the microcontroller unit FPGA is used to communicate and interact with the CPCI bus and control the output of programmable PWM signals, and can also interact with the storage unit EEPROM.

[0045] In the embodiment of the present invention, the power management unit supports various voltages required by an isolation timer or counter module of RS422 level standard and ensures voltage stability.

[0046] In the embodiment of the present invention, the level conversion unit is used to ensure the conversion of the safe working level of the microcontroller unit IO and the CPCI bus level;

[0047] In the embodiment of the present invention, the CPCI connector supports a connector between an isolation timer or counter module of RS422 level standard and the CPCI bus.

[0048] In summary, the present invention improves the anti-interference ability of PWM signal transmission by converting the programmable PWM signal output from a TTL level single-ended signal to an RS422 differential level form for transmission, greatly increases the signal transmission distance, and solves the problem of short TTL level transmission distance and weak anti-interference ability.

[0049] Meanwhile, the contents not described in detail in this specification belong to the prior art known to those skilled in the art.

[0050] It should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device.

[0051] Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present invention, and that the scope of the present invention is defined by the appended claims and their equivalents.

Claims

1. An isolated timing counter supporting RS422 level, characterized in that: It includes a front panel connector, a protection circuit unit, an interface transceiver, an isolation buffer module, a microcontroller unit FPGA, a storage unit EEPROM, a power management unit, a level conversion unit and a CPCI connector; The isolated timing counter exchanges information with the host computer through the CPCI bus, and controls the output frequency and duty cycle of the programmable PWM signal respectively through the microcontroller unit FPGA. The output programmable PWM signal is converted from TTL level single-ended signal to RS422 differential level signal through the level conversion chip MAX3160, and finally output through the SCSI 68 connector.

2. The isolated timing counter supporting RS422 level according to claim 1, characterized in that: The host computer transmits control instructions to the microcontroller unit FPGA of the isolated timer / counter module supporting the RS422 level standard through the CPCI bus. The microcontroller unit FPGA parses the instructions and outputs a programmable PWM signal of the TTL level standard. The programmable PWM signal of the TTL level standard is converted into an RS422 differential level signal through the interface transceiver and output to the front panel connector for use by the test unit.

3. The isolated timing counter supporting RS422 level according to claim 1, characterized in that: The front panel connector is used to connect the test unit, and the storage unit EEPROM is used to store user information.

4. The isolated timing counter supporting RS422 level according to claim 1, characterized in that: The protection circuit unit is composed of 8 protection circuits, which are used to prevent the external input signal from being too high to damage the internal circuit of the board and cause irreversible damage to the board.

5. The isolated timing counter supporting RS422 level according to claim 1, characterized in that: The number of the interface transceivers is 8, and they are used for converting TTL level single-ended signals into RS422 differential level signals.

6. The isolated timing counter supporting RS422 level according to claim 1, characterized in that: The number of the isolation buffer modules is 8, and they are used to isolate the internal and external signals of the modules with isolation lines as boundaries.

7. The isolated timing counter supporting RS422 level according to claim 1, characterized in that: The microcontroller unit FPGA is used for communicating and interacting with the CPCI bus and controlling the output of programmable PWM signals, and can also interact with the storage unit EEPROM.

8. The isolated timing counter supporting RS422 level according to claim 1, characterized in that: The power management unit supports various voltages required by an isolated timer or counter module of RS422 level standard, and ensures voltage stability.

9. The isolated timing counter supporting RS422 level according to claim 1, characterized in that: The level conversion unit is used to ensure the conversion between the safe working level of the microcontroller unit IO and the CPCI bus level.

10. The isolated timing counter supporting RS422 level according to claim 1, characterized in that: The CPCI connector supports a connector between an isolated timer or counter module and a CPCI bus in accordance with RS422 level standards.

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