Manufacturing method of circuit board containing Airgap and circuit board
By opening through holes on the multi-layer board of the circuit board and performing copper plating pre-treatment, combined with the method of plating the main line on the top or bottom surface of the multi-layer board, the problem that the prior art cannot effectively provide the production method of the Airgap circuit board, and realizes copper plating communication of the inner wall of the through hole, improving the user experience.
Patent Information
- Application Number
- CN202411740233.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-29
- Publication Date
- 2025-03-21
AI Technical Summary
The prior art cannot effectively provide a production method of Airgap-containing circuit boards, resulting in the inability to copper plating of the inner wall of the through holes, and the user experience is poor.
By making a multi-layer board, a through hole is opened, and the inner wall of the through hole is pre-plated, including black holes, black shadows, chemically deposition copper or ion implantation of the first metal layer. Subsequently, the main line is plated on the top or bottom surface of the multi-layer board, and the inner wall of the through-hole is plated with copper to the main line.
The inner wall of the through hole is copper-plated and the main circuit on the top or bottom surface of the multi-layer board is connected, which improves the user experience and meets the user's use needs in more scenarios.
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Figure CN119676991A_ABST
Abstract
Description
Technical Field
[0001] The invention belongs to the technical field of circuit board manufacturing, and in particular relates to a manufacturing method of an Airgap circuit board and a circuit board. Background Art
[0002] The inner wall of the traditional flexible copper clad laminate is insulated after bonding and drilling of via holes. It is necessary to add black holes, black shadows and other preliminary processing processes before copper plating again. This will increase the surface copper thickness, which is not conducive to the thinning of the board and the production of ultra-fine circuits. It is not in line with the development direction of lightweight and miniaturization of terminals, so it is urgently needed to be improved. Summary of the invention
[0003] In view of the above-mentioned deficiencies in the prior art, an object of the present invention is to provide a method for manufacturing a circuit board containing Airgap and a circuit board, aiming to solve the problem that the prior art cannot provide an effective method for manufacturing a circuit board containing Airgap, resulting in the inability to copper plate the inner wall of the via hole and poor user experience.
[0004] In one aspect, the present invention provides a method for manufacturing an Airgap circuit board, the method comprising the following steps:
[0005] Making multilayer boards;
[0006] Opening vias on multilayer boards;
[0007] Performing copper plating pretreatment on the inner wall of the via hole;
[0008] A main circuit is plated on the top surface or the bottom surface of the multilayer board, and the inner wall of the through hole is copper plated to connect the main circuit.
[0009] Preferably, the method further comprises:
[0010] Sub-circuits are plated on the main circuits.
[0011] Furthermore, the copper plating pre-treatment of the inner wall of the via hole includes:
[0012] The inner wall of the via hole is subjected to any one of black hole, black shadow, chemical copper deposition and ion implantation into the first metal layer.
[0013] Further, plating a main circuit on the top surface or the bottom surface of the multilayer board includes:
[0014] forming a second metal layer on the top or bottom surface of the multilayer board;
[0015] Laminating a dry film on the surface of the second metal layer;
[0016] Expose and develop the dry film to remove unexposed portions and then expose the second metal layer;
[0017] The step of forming the second metal layer on the top or bottom surface of the multilayer board comprises: plating copper on the top or bottom surface of the multilayer board to form the second metal layer, or ion implanting the second metal layer on the top or bottom surface of the multilayer board;
[0018] The copper plating includes: electroplating copper or chemical copper plating.
[0019] Furthermore, the manufacturing of the multilayer board includes:
[0020] The multilayer board is manufactured by bonding the first flexible copper clad laminate and the second flexible copper clad laminate back to back.
[0021] Further preferably, the manufacturing of the multilayer board comprises:
[0022] The multilayer board is manufactured by bonding the first substrate board and the second substrate board.
[0023] Furthermore, the method further comprises:
[0024] The second metal layer is connected to the first metal layer, copper is plated on the exposed surface of the second metal layer to form the main circuit, and the dry film and the second metal layer directly below the dry film are removed.
[0025] Further preferably, before laminating the dry film on the surface of the second metal layer, the method includes: copper plating the inner wall of the via hole and connecting the second metal layer on the top surface or the bottom surface of the multilayer board;
[0026] The method further includes: removing the exposed second metal layer, removing the first copper foil layer or the second copper foil layer on the multilayer board directly below the exposed second metal layer to generate the main circuit, and then removing the dry film.
[0027] Furthermore, the first substrate plate or the second substrate plate is made of polyimide;
[0028] The step of bonding the side of the second substrate board facing away from the second copper foil layer to the side of the first substrate board facing away from the first copper foil layer to form the multilayer board comprises: bonding the side of the second substrate board facing away from the second copper foil layer to the side of the first substrate board facing away from the first copper foil layer by heat pressing to form the multilayer board;
[0029] The step of bonding the first substrate plate and the second substrate plate to form the multi-layer plate comprises: bonding the first substrate plate and the second substrate plate by heat-pressing to form the multi-layer plate.
[0030] Preferably, the bonding to form the multilayer board comprises: using an adhesive layer to bond the multilayer board; and opening a plurality of air gap holes on the adhesive layer.
[0031] On the other hand, the present invention provides a circuit board, which is made by the above-mentioned method for making a circuit board containing Airgap.
[0032] The beneficial effects of the present invention are: manufacturing a multilayer board; opening a via hole on the multilayer board; performing copper plating pre-treatment on the inner wall of the via hole; plating a main circuit on the top surface or bottom surface of the multilayer board, copper plating the inner wall of the via hole and connecting the main circuit; thereby achieving copper plating of the inner wall of the via hole and connecting the main circuit on the top surface or bottom surface of the multilayer board, meeting the user's usage needs in more scenarios and greatly improving the user experience. BRIEF DESCRIPTION OF THE DRAWINGS
[0033] Figure 1 It is a flow chart of the method for manufacturing the Airgap circuit board provided in the first and second embodiments of the present invention;
[0034] Figure 2 is a cross-sectional view of a circuit board in a first state during the manufacturing process of the method for manufacturing a circuit board containing an Airgap provided in Embodiment 1 of the present invention;
[0035] Figure 3 is a cross-sectional view of a circuit board in a second state during the manufacturing process of the method for manufacturing a circuit board containing an Airgap provided in Embodiment 1 of the present invention;
[0036] Figure 4 is a cross-sectional view of a circuit board in a third state during the manufacturing process of the method for manufacturing a circuit board containing an Airgap provided in Embodiment 1 of the present invention;
[0037] Figure 5 is a cross-sectional view of a circuit board in a fourth state during the manufacturing process of the method for manufacturing a circuit board containing an Airgap provided in Embodiment 1 of the present invention;
[0038] Figure 6 is a cross-sectional view of a circuit board in a fifth state during the manufacturing process of the method for manufacturing a circuit board containing an Airgap provided in Embodiment 1 of the present invention;
[0039] Figure 7 is a cross-sectional view of a circuit board in a sixth state during the manufacturing process of the method for manufacturing a circuit board containing an Airgap provided in Embodiment 1 of the present invention;
[0040] Figure 8 is a cross-sectional view of a circuit board in a first state during the manufacturing process of a method for manufacturing a circuit board containing an Airgap provided in Embodiment 2 of the present invention;
[0041] Fig. 9 is a cross-sectional view of a circuit board in a second state during the manufacturing process of the method for manufacturing a circuit board containing an Airgap provided in Embodiment 2 of the present invention;
[0042] Fig.10 is a cross-sectional view of a circuit board in a third state during the manufacturing process of the method for manufacturing a circuit board containing an Airgap provided in Embodiment 2 of the present invention;
[0043] Fig.11 is a cross-sectional view of a circuit board in a fourth state during the manufacturing process of the method for manufacturing a circuit board containing an Airgap provided in Embodiment 2 of the present invention;
[0044] Fig.12 is a cross-sectional view of a circuit board in a fifth state during the manufacturing process of the method for manufacturing a circuit board containing an Airgap provided in Embodiment 2 of the present invention;
[0045] Fig.13 is a cross-sectional view of a circuit board in a sixth state during the manufacturing process of the method for manufacturing a circuit board containing an Airgap provided in Embodiment 2 of the present invention;
[0046] Fig.14 is a cross-sectional view of a circuit board in a seventh state during the manufacturing process of the method for manufacturing a circuit board containing an Airgap provided in Embodiment 2 of the present invention;
[0047] Fig.15 It is a further implementation flow chart of the method for manufacturing an Airgap circuit board provided in the second embodiment of the present invention. DETAILED DESCRIPTION
[0048] In order to make the purpose, technical solution and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention.
[0049] The specific implementation of the present invention is described in detail below in conjunction with specific embodiments:
[0050] Embodiment 1:
[0051] Figure 1 The implementation process of the method for manufacturing a circuit board containing Airgap provided in the first embodiment of the present invention is shown. For the convenience of description, only the part related to the embodiment of the present invention is shown. Figures 2 to 7 , as detailed below:
[0052] Step S101, making a multilayer board;
[0053] In an embodiment of the present invention, manufacturing the multilayer board 100 includes: bonding a first flexible copper clad laminate 1000 and a second flexible copper clad laminate 2000 back to back to form the multilayer board 100 (i.e., a single + single multilayer board, or multiple flexible copper clad laminates can be bonded to form a multilayer board with more layers, and circuits can be set in any middle layer of the multilayer board with more layers to meet different usage requirements).
[0054] The bonding process to form the multilayer board 100 includes: using an adhesive layer 130 to bond the multilayer board 100, preferably using a hot pressing bonding process; opening a plurality of air gap holes 131 on the adhesive layer 130 to reduce the contact area between the first flexible copper clad laminate 1000 and the second flexible copper clad laminate 2000, so that the formed multilayer board 100 can be bent arbitrarily and have a layered effect to meet different usage requirements, wherein the adhesive layer 130 is made of glue.
[0055] The first flexible copper clad laminate 1000 is formed by laminating a first copper foil layer 111 on one surface of a first substrate 110, and the second flexible copper clad laminate 2000 is formed by laminating a second copper foil layer 121 on one surface of a second substrate 120. The side of the second substrate 120 facing away from the second copper foil layer 121 and the side of the first substrate 110 facing away from the first copper foil layer 111 are bonded to form the multilayer laminate 100, wherein the substrate is made of an insulating material, such as Figure 2 shown.
[0056] Step S102, opening a via hole on the multilayer board;
[0057] In an embodiment of the present invention, a via hole 140 is formed on the multilayer board 100 so as to subsequently copper plate the inner wall 141 of the via hole 140. Figure 3 shown.
[0058] Step S103, performing copper plating pre-treatment on the inner wall of the via hole;
[0059] In an embodiment of the present invention, the copper plating pre-treatment for the inner wall 141 of the via hole 140 includes: performing any one of black hole, black shadow, and chemical copper deposition on the inner wall 141 of the via hole 140 .
[0060] Step S104, plating a main circuit on the top surface or the bottom surface of the multilayer board, copper plating the inner wall of the via hole and connecting the main circuit.
[0061] In an embodiment of the present invention, plating a main circuit on the top surface or the bottom surface of the multilayer board 100 includes:
[0062] A second metal layer 200 is formed on the top or bottom surface of the multilayer board 100, such as Figure 4 As shown;
[0063] A dry film 300 is attached to the surface of the second metal layer 200, such as Figure 5 As shown;
[0064] The dry film 300 is exposed and developed to remove the unexposed portion to expose the second metal layer 200. Figure 6 As shown; wherein, the second metal layer 200 at the edge of the via hole 140 and the inner wall 141 of the via hole 140 do not need to be exposed (the dry film 300 directly above them needs to be exposed);
[0065] The second metal layer 200 is formed on the top or bottom surface of the multilayer board 100, comprising: copper plating on the top or bottom surface of the multilayer board 100 to form the second metal layer 200; wherein the copper plating comprises: electroplating copper or chemical copper plating;
[0066] Furthermore, before the dry film 300 is attached to the surface of the second metal layer 200, the process includes: copper plating the inner wall 141 of the via hole 140 (i.e., making the first metal layer 400) and connecting the second metal layer 200 on the top or bottom surface of the multilayer board 100; preferably, copper plating the inner wall 141 of the via hole 140 and making the second metal layer 200 on the top or bottom surface of the multilayer board 100 are performed simultaneously;
[0067] Furthermore, the method further includes: removing the exposed second metal layer 200, and removing the first copper foil layer 111 or the second copper foil layer 121 on the multilayer board 100 directly below the exposed second metal layer 200 to generate a main circuit, and then removing the dry film 300, such as Figure 7 shown.
[0068] In an embodiment of the present invention, further preferably, the method further comprises: plating a sub-circuit on the main circuit to meet different usage requirements and reduce the internal resistance of the circuit;
[0069] Among them, plating a sub-circuit on the main circuit includes: using insulating oil to fill the gap between the main circuits until it is flush with the main circuit, then attaching another dry film (or directly brushing insulating oil) (not shown in the figure), exposing and developing the other dry film to remove part of the other dry film directly above the main circuit, plating a sub-circuit on the main circuit (not shown in the figure), and removing the other dry film or insulating oil.
[0070] In the embodiment of the present invention, the first substrate plate 110 or the second substrate plate 120 is made of polyimide;
[0071] The step of bonding the side of the second substrate 120 away from the second copper foil layer 121 to the side of the first substrate 110 away from the first copper foil layer 111 to form the multilayer board 100 includes: bonding the side of the second substrate 120 away from the second copper foil layer 121 to the side of the first substrate 110 away from the first copper foil layer 111 by heat pressing to form the multilayer board 100;
[0072] In an embodiment of the present invention, a multilayer board 100 is manufactured; a via hole 140 is opened on the multilayer board 100; an inner wall 141 of the via hole 140 is pre-treated by copper plating; a main circuit is plated on the top surface or the bottom surface of the multilayer board 100, and the inner wall 141 of the via hole 140 is copper-plated and connected to the main circuit; thereby, the inner wall 141 of the via hole 140 is copper-plated and connected to the main circuit on the top surface or the bottom surface of the multilayer board 100, thereby meeting the user's usage needs in more scenarios and greatly improving the user experience.
[0073] Embodiment 2:
[0074] Figure 1 The implementation process of the method for manufacturing a circuit board containing Airgap provided in the second embodiment of the present invention is shown. For the convenience of explanation, only the part related to the embodiment of the present invention is shown. Figures 8 to 15 , as detailed below:
[0075] In step S101, a multilayer board is manufactured;
[0076] In an embodiment of the present invention, manufacturing the multilayer board 500 includes:
[0077] The first substrate board 510 and the second substrate board 520 are bonded together to form a multilayer board 500 (i.e., a single+single multilayer board, or multiple substrate boards can be bonded together to form a multilayer board with more layers, and a circuit is set in any middle layer of the multilayer board with more layers to meet different usage requirements), such as Figure 8 As shown; preferably, a heat-compression bonding process is used, wherein the substrate plate is an insulating material.
[0078] The bonding process to form the multilayer board 500 includes: using an adhesive layer 530 to bond the multilayer board 500, preferably using a hot pressing bonding process; opening a plurality of air gap holes (Airgap holes) 531 on the adhesive layer 530 to reduce the contact area between the first substrate board 510 and the second substrate board 520, so that the formed multilayer board can be bent arbitrarily and have a layered effect to meet different usage requirements, wherein the adhesive layer 130 is made of glue.
[0079] In step S102, a via hole is opened on the multilayer board;
[0080] In an embodiment of the present invention, a via hole 600 is formed on the multilayer board 500 so as to subsequently perform ion implantation of the first metal layer 610 into the inner wall of the via hole 600. Fig. 9 As shown; further, a positioning hole (not shown in the figure) can be opened when the conducting hole 600 is opened to facilitate processing.
[0081] In step S103, the inner wall of the via hole is subjected to copper plating pre-treatment;
[0082] In an embodiment of the present invention, the copper plating pre-treatment of the inner wall of the via hole 600 includes: ion implantation into the first metal layer 610, such as Fig.10 shown.
[0083] In step S104, a main circuit is plated on the top or bottom surface of the multilayer board, and the inner wall of the via hole is copper plated to connect the main circuit.
[0084] In an embodiment of the present invention, plating a main circuit 800 on the top surface or the bottom surface of the multilayer board 500 includes:
[0085] A second metal layer 620 is formed on the top or bottom surface of the multilayer board 500, such as Fig.10 As shown;
[0086] A dry film 700 is attached to the surface of the second metal layer 620, such as Fig.11 As shown;
[0087] The dry film 700 is exposed and developed to remove the unexposed portion and then the second metal layer 620 is exposed. Fig.12 As shown; wherein, the second metal layer 620 at the edge of the via hole 600 and the inner wall of the via hole 600 need to be exposed (the dry film 700 directly above it does not need to be exposed);
[0088] Fabricating the second metal layer 620 on the top surface or the bottom surface of the multilayer board 500 includes: ion implanting the second metal layer 620 on the top surface or the bottom surface of the multilayer board 500 .
[0089] Preferably, the copper plating pretreatment ion implantation of the first metal layer 610 on the inner wall of the via hole 600 and the ion implantation of the second metal layer 620 on the top or bottom surface of the multilayer board 500 are performed simultaneously to improve efficiency;
[0090] Furthermore, the method further includes: connecting the second metal layer 620 with the first metal layer 610, and copper plating (copper thickness corresponding to the thickness of the main circuit) on the surface of the exposed second metal layer 620 to form the main circuit 800, such as Fig.13 (In an embodiment of the present invention, further preferably, the method further comprises: plating a sub-circuit on the main circuit 800 to meet different usage requirements and reduce the internal resistance of the circuit.) Remove the dry film 700 and the second metal layer 620 directly below the dry film 700, as shown Fig.14 As shown; wherein, further, copper plating is performed on the surface of the exposed second metal layer 620 and copper plating is performed on the inner wall of the via 600 at the same time.
[0091] In the embodiment of the present invention, the first substrate plate 510 or the second substrate plate 520 is made of polyimide material.
[0092] In an embodiment of the present invention, a multilayer board 500 is manufactured; a via hole 600 is opened on the multilayer board 500; the inner wall of the via hole 600 is pre-treated by copper plating; a main circuit 800 is plated on the top or bottom surface of the multilayer board 500, and the inner wall of the via hole 600 is copper-plated and connected to the main circuit 800; thereby, the inner wall of the via hole 600 is copper-plated and connected to the main circuit 800 on the top or bottom surface of the multilayer board 500, thereby meeting the user's usage needs in more scenarios and greatly improving the user experience.
[0093] It should be noted that in Example 2, the multilayer board can be replaced by the multilayer board in Example 1, and in Example 1, the multilayer board can be replaced by the multilayer board in Example 2; further, any step / manufacturing method in Example 2 and Example 1 can be interchanged or added to another example.
[0094] In this embodiment 2, the implementation process of step S101 to step S104 can be further summarized as follows. Fig.15 :
[0095] In step S201, a multilayer board containing air gap holes is manufactured;
[0096] In step S202, via holes and positioning holes are opened on the multilayer board;
[0097] In step S203, ions are implanted into the inner wall of the via hole with the first metal layer and ions are implanted into the top or bottom surface of the multilayer board with the second metal layer;
[0098] In step S204, a dry film is laminated on the surface of the second metal layer, and the dry film is exposed and developed to remove unexposed portions, thereby exposing the second metal layer and the vias;
[0099] In step S205, copper is plated on the exposed surface of the second metal layer and the inner wall of the via hole to obtain a required thickness of the main circuit;
[0100] In step S206 , the dry film and the second metal layer directly below the dry film are removed to form a main circuit.
[0101] It reduces the hole processing process and multiple copper plating processes, reduces the thickness of the circuit board, meets the user's usage needs in more scenarios, and greatly improves the user experience.
[0102] Embodiment three:
[0103] A method for manufacturing an Airgap circuit board and a circuit board provided in a third embodiment of the present invention are manufactured by the method provided in the first embodiment or the second embodiment.
[0104] What has been described herein in this specification and the accompanying drawings includes examples of methods for making circuit boards containing Airgap and circuit boards. Of course, it is not possible to describe every conceivable combination of elements and / or methods for the purpose of describing the various features of the present disclosure, but it is recognized that many other combinations and permutations of the disclosed features are possible. Therefore, it is obvious that various modifications can be made to the present disclosure without departing from the scope or spirit of the present disclosure. In addition, or in an alternative, other embodiments of the present disclosure may be apparent from consideration of the present specification and the accompanying drawings and from the practice of the present disclosure as presented herein. It is intended that the examples set forth in this specification and the accompanying drawings are considered to be illustrative and not restrictive in all respects. Although specific terms are employed herein, they are used in a general and descriptive sense and are not used for limiting purposes.
Claims
1. A method for manufacturing a circuit board containing Airgap and a circuit board, characterized in that: The method comprises the following steps: Making multilayer boards; Opening vias on multilayer boards; Performing copper plating pretreatment on the inner wall of the via hole; A main circuit is plated on the top surface or the bottom surface of the multilayer board, and the inner wall of the through hole is copper plated to connect the main circuit.
2. The method according to claim 1, characterized in that The method further comprises: Sub-circuits are plated on the main circuits.
3. The method according to claim 1, characterized in that The copper plating pre-treatment of the inner wall of the via hole comprises: The inner wall of the via hole is subjected to any one of black hole, black shadow, chemical copper deposition and ion implantation into the first metal layer.
4. The method according to claim 1, characterized in that Plating a main circuit on the top or bottom surface of the multilayer board comprises: forming a second metal layer on the top or bottom surface of the multilayer board; Laminating a dry film on the surface of the second metal layer; Expose and develop the dry film to remove unexposed portions and then expose the second metal layer; The step of forming the second metal layer on the top or bottom surface of the multilayer board comprises: plating copper on the top or bottom surface of the multilayer board to form the second metal layer, or ion implanting the second metal layer on the top or bottom surface of the multilayer board; The copper plating includes: electroplating copper or chemical copper plating.
5. The method according to claim 4, characterized in that The manufacturing of the multilayer board comprises: The multilayer board is manufactured by bonding the first flexible copper clad laminate and the second flexible copper clad laminate back to back.
6. The method according to claim 4, characterized in that The manufacturing of the multilayer board comprises: The multilayer board is manufactured by bonding the first substrate board and the second substrate board.
7. The method according to claim 4, characterized in that The method further comprises: The second metal layer is connected to the first metal layer, copper is plated on the exposed surface of the second metal layer to form the main circuit, and the dry film and the second metal layer directly below the dry film are removed.
8. The method according to claim 4, characterized in that Before the dry film is attached to the surface of the second metal layer, the method includes: copper plating the inner wall of the via hole and connecting the second metal layer on the top surface or the bottom surface of the multilayer board; The method further includes: removing the exposed second metal layer, removing the first copper foil layer or the second copper foil layer on the multilayer board directly below the exposed second metal layer to generate the main circuit, and then removing the dry film.
9. The method according to claim 5 or 6, characterized in that The first substrate plate or the second substrate plate is made of polyimide; The step of bonding the side of the second substrate board facing away from the second copper foil layer to the side of the first substrate board facing away from the first copper foil layer to form the multilayer board comprises: bonding the side of the second substrate board facing away from the second copper foil layer to the side of the first substrate board facing away from the first copper foil layer by heat pressing to form the multilayer board; The step of bonding the first substrate plate and the second substrate plate to form the multi-layer plate comprises: bonding the first substrate plate and the second substrate plate by heat-pressing to form the multi-layer plate.
10. The method according to claim 5 or 6, characterized in that: The bonding to form the multilayer board comprises: bonding the multilayer board using an adhesive layer; A plurality of air gap holes are opened in the adhesive layer.
11. A circuit board, characterized in that: Made by the method according to any one of claims 1 to 10.