Sensor control method and device, computer equipment and computer readable storage medium

Abstract

The invention relates to a sensor control method and device, computer equipment and a computer readable storage medium. The method comprises the following steps: inputting a clock signal to a first branch and a second branch in the sensor circuit through a single input / output interface; sending the clock signal to the sensor based on the first branch, so that the sensor enters a starting state based on the clock signal; based on the second branch, performing integral voltage conversion on the clock signal to obtain integral voltage corresponding to each time sequence moment; when the integral voltage corresponding to the current moment is greater than the reference voltage, generating a reset signal; and based on the second branch, the reset signal is sent to the sensor, so that the sensor executes a reset action in a starting state and enters a working state. By adopting the method and the device, hardware resources of the embedded system can be saved.

Description

Technical Field

[0001] The present application relates to the field of digital communication technology, and in particular to a sensor control method, device, computer equipment and computer-readable storage medium. Background Art

[0002] When enabling a sensor in an embedded system (such as an image sensor of a camera device), it is necessary to first generate a reset signal and a clock signal through the I / O port to start the sensor so as to control the sensor to perform the corresponding function.

[0003] However, when the embedded system generates a reset signal and a clock signal, two I / O ports of the embedded system will be occupied. If the embedded system is connected to many peripherals and the hardware resources are relatively tight, some functions need to be abandoned or a higher-level embedded system needs to be used to access the peripherals, which increases the hardware resource cost of the embedded system. Summary of the invention

[0004] Based on this, it is necessary to provide a sensor control method, device, computer equipment, computer readable storage medium and computer program product to address the above technical problems, which can save hardware resources of embedded systems.

[0005] In a first aspect, the present application provides a sensor control method, comprising:

[0006] Inputting a clock signal to the first branch and the second branch in the sensor circuit through a single input-output interface;

[0007] Based on the first branch, a clock signal is sent to the sensor, so that the sensor enters a startup state based on the clock signal;

[0008] Based on the second branch, the clock signal is converted into an integral voltage to obtain an integral voltage corresponding to each timing moment;

[0009] When the integrated voltage corresponding to the current moment is greater than the reference voltage, a reset signal is generated;

[0010] Based on the second branch, a reset signal is sent to the sensor, so that the sensor performs a reset action in the startup state and enters the working state.

[0011] In a second aspect, the present application provides a sensor control device, comprising:

[0012] A signal output module, used for inputting a clock signal to a first branch and a second branch in the sensor circuit through a single input-output interface;

[0013] A first branch module, configured to send a clock signal to the sensor based on the first branch, so that the sensor enters a startup state based on the clock signal;

[0014] The second branch module is used to perform integral voltage conversion on the clock signal based on the second branch to obtain the integral voltage corresponding to each timing moment; when the integral voltage corresponding to the current moment is greater than the reference voltage, generate a reset signal;

[0015] The reset module is used to send a reset signal to the sensor based on the second branch, so that the sensor performs a reset action in the startup state and enters the working state.

[0016] In a third aspect, the present application provides a computer device, the computer device comprising a memory and a processor, the memory storing a computer program, and the processor implementing the steps in the above method when executing the computer program.

[0017] In a fourth aspect, the present application provides a computer-readable storage medium having a computer program stored thereon, which implements the steps in the above method when executed by a processor.

[0018] In a fifth aspect, the present application provides a computer program product, which includes a computer program, and when the computer program is executed by a processor, it implements the steps in the above method.

[0019] The above-mentioned sensor control method, device, computer equipment, computer-readable storage medium and computer program product input a clock signal to the first branch and the second branch in the sensor circuit through a single input-output interface. The sensor in the sensor circuit can receive the clock signal through the first branch to enter the startup state, and receive the reset signal generated by the branch according to the clock signal through the second branch, perform the reset action in the startup state and enter the working state. It can output the clock signal using only a single input-output interface, input the clock signal to the sensor through the sensor circuit, and generate a reset signal according to the clock signal and input it into the sensor, thereby realizing the synchronous input of the clock signal and the reset signal of the sensor without occupying an additional dedicated interface to transmit the reset signal, thereby saving interface hardware resources. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 An application environment diagram of a sensor control method provided in an embodiment of the present application;

[0021] Figure 2 A schematic diagram of a flow chart of a sensor control method provided in an embodiment of the present application;

[0022] Figure 3 A flow chart of another sensor control method provided in an embodiment of the present application;

[0023] Figure 4 A schematic diagram of a sensor circuit of an image sensor provided in an embodiment of the present application;

[0024] Figure 5 A schematic diagram of a sensor circuit logic provided in an embodiment of the present application;

[0025] Figure 6 A structural block diagram of a sensor control device provided in an embodiment of the present application;

[0026] Figure 7 An internal structure diagram of a computer device provided in an embodiment of the present application; Figure 8 An internal structure diagram of a computer-readable storage medium provided in an embodiment of the present application. DETAILED DESCRIPTION

[0027] In order to make the purpose, technical solution and advantages of the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0028] The sensor control method provided in the embodiment of the present application can be applied to Figure 1 In the application environment shown. Among them, a single input and output interface can be provided by the embedded system of the terminal 102, and the sensor can be a sensor of a corresponding device in the terminal, such as an image sensor of a camera device in the terminal, a sound sensor of a sound receiving device, etc. The embedded system in the terminal 102 communicates with the sensor through the input and output interface. Among them, the terminal 102 can be, but is not limited to, various personal computers, laptops, smart phones, tablet computers, Internet of Things devices and portable wearable devices. The Internet of Things devices can be smart speakers, smart TVs, smart air conditioners, smart car-mounted devices, etc. Portable wearable devices can be smart watches, smart bracelets, head-mounted devices, etc.

[0029] like Figure 2 As shown, the embodiment of the present application provides a sensor control method, which is applied to Figure 1 The embedded system of the terminal 102 is used as an example for explanation. The method comprises the following steps:

[0030] Step 202: Input a clock signal to a first branch and a second branch in a sensor circuit through a single input / output interface.

[0031] Among them, the input and output interface refers to the communication interface used for information exchange in the embedded system, which can send clock signals. The sensor circuit refers to the physical connection circuit used to send signals to the controlled sensor in the embedded system. The first branch and the second branch are both branch circuits in the sensor circuit. The first branch is used to send a clock signal to the sensor, and the second branch is used to generate a reset signal according to the clock signal and send a reset signal to the sensor. The sensor refers to the current control object of the embedded system, which is the controlled sensor of the embedded system.

[0032] Specifically, the input and output interface may be an input and output interface of an embedded system in a terminal, and there is a corresponding sensor circuit between the embedded system and each sensor. When the terminal receives an activation operation of a target device by a user, the embedded system in the terminal sends a driving signal to a sensor corresponding to the target device through a sensor circuit, so that the target device is activated and performs a corresponding function. For example, when receiving an activation operation of a terminal camera by a user, the embedded system sends a driving signal to an image sensor corresponding to the camera device, so that the camera device is activated and performs a photo taking function.

[0033] The driving signal includes a clock signal and a reset signal, and the sensor circuit includes a first branch and a second branch. When the embedded system drives the corresponding sensor, it can input the clock signal to the first branch and the second branch in the sensor circuit through a single input and output interface according to the preset configuration information, and can obtain the driving signal corresponding to the sensor based on the clock signal of the first branch and the reset signal generated by the second branch according to the clock signal.

[0034] Step 204: Based on the first branch, send the clock signal to the sensor, so that the sensor enters a startup state based on the clock signal.

[0035] Specifically, the embedded system inputs a clock signal to a first branch and a second branch in the sensor circuit, and sends the clock signal to the sensor through the first branch. The first branch may be a circuit branch without electronic devices between the input and output interface of the embedded system and the sensor. When the sensor receives the clock signal, it divides and multiplies the clock signal according to the frequency requirements of each internal component to synchronize the operating frequencies of the components. At this time, the sensor is in the startup state.

[0036] Step 206: Based on the second branch, perform integrated voltage conversion on the clock signal to obtain the integrated voltage corresponding to each timing moment.

[0037] The integrated voltage refers to the voltage value obtained after performing integrated voltage conversion on the clock signal.

[0038] Specifically, the second branch includes an integration circuit, and the embedded system inputs a clock signal to the first branch and the second branch in the sensor circuit, which may be a clock signal corresponding to each timing moment input according to a preset frequency. The clock signal corresponding to each timing moment is sequentially input into the integration circuit in the second branch for integration calculation, and the integration circuit outputs an integrated voltage corresponding to each timing moment.

[0039] Step 208: When the integrated voltage corresponding to the current moment is greater than the reference voltage, a reset signal is generated.

[0040] The reference voltage is used to compare with the integrated voltage, and whether to generate a reset signal is determined according to the comparison result.

[0041] Specifically, the second branch also includes a voltage comparator and a voltage monitoring chip, the voltage comparator is used to compare voltages and output corresponding status signals, and the voltage monitoring chip is used to generate a reset signal. In the second branch, the integrated voltages at each timing moment are sequentially input into the voltage comparator, and the integrated voltages corresponding to each timing moment are compared with the reference voltage by the voltage comparator. When the integrated voltage corresponding to the current moment is greater than the reference voltage, the voltage comparator outputs a corresponding status signal to the voltage monitoring chip, triggering the voltage monitoring chip to generate a reset signal.

[0042] Step 210: Based on the second branch, a reset signal is sent to the sensor, so that the sensor performs a reset action in the startup state and enters the working state.

[0043] Specifically, in the second branch, after the voltage monitoring chip generates a reset signal, the reset signal is sent to the sensor. After receiving the reset signal, the sensor performs a reset action and enters a working state after the reset is completed.

[0044] It can be seen that in the embodiment of the present application, a clock signal is input into the first branch and the second branch in the sensor circuit through a single input-output interface, the sensor in the sensor circuit can receive the clock signal through the first branch to enter the startup state, and receive the reset signal generated by the branch according to the clock signal through the second branch, perform the reset action in the startup state and enter the working state, and can output the clock signal using only a single input-output interface, input the clock signal to the sensor through the sensor circuit, and generate a reset signal according to the clock signal and input it into the sensor, thereby realizing the synchronous input of the clock signal and the reset signal of the sensor, without the need to occupy an additional dedicated interface to transmit the reset signal, thereby saving interface hardware resources.

[0045] In some embodiments, the second branch includes an isolation resistor and an integration circuit; Figure 3As shown, step 206, based on the second branch, the clock signal is converted into an integral voltage to obtain an integral voltage corresponding to each timing moment, including:

[0046] Step 302: Based on the second branch, the clock signal is input into the isolation resistor for signal attenuation to obtain an attenuated signal corresponding to each timing moment;

[0047] Step 304: Input the attenuation signal corresponding to each timing moment into the integration circuit for integration calculation to obtain the integration voltage corresponding to each timing moment.

[0048] The isolation resistor is used to isolate the clock signal in the second branch to avoid affecting the clock signal in the first branch. The attenuated signal refers to the signal after the clock information has a voltage drop after passing through the isolation resistor.

[0049] Specifically, the second branch includes an isolation resistor and an integration circuit connected to the isolation resistor. The embedded system inputs clock signals corresponding to each timing moment to the second branch through a single input / output interface. In the second branch, the clock signals corresponding to each timing moment are attenuated by the isolation resistor to obtain attenuated signals corresponding to each timing moment. Then, the attenuated signals corresponding to each timing moment are sequentially input into the integration circuit for integration calculation, and the integration circuit outputs the integrated voltage corresponding to each timing moment.

[0050] It can be seen that in this embodiment, an isolation resistor is set to avoid signal interference between the first branch and the second branch, and an integral voltage is output through an integral circuit so that the integral voltage can be compared later to determine whether a reset signal is generated, thereby ensuring the effective generation of the reset signal.

[0051] In some embodiments, the second branch further includes a voltage comparator connected to the integration circuit and a voltage monitoring chip connected to the voltage comparator; step 208, when the integration voltage corresponding to the current moment is greater than the reference voltage, generating a reset signal, includes:

[0052] The integrated voltages corresponding to each timing moment output by the integration circuit are sequentially input into the voltage comparator;

[0053] The integrated voltage corresponding to each timing moment is compared with the reference voltage by a voltage comparator;

[0054] When the integrated voltage corresponding to the current moment is greater than the reference voltage, a positive jump signal is output to the voltage monitoring chip through the voltage comparator, and after a preset time period, a reset signal is generated through the voltage monitoring chip.

[0055] The positive jump signal refers to a voltage signal after the output of the voltage comparator undergoes a positive level jump, and may refer to a high level voltage after the output of the voltage comparator undergoes a jump from a low level.

[0056] Specifically, the second branch also includes a voltage comparator and a voltage monitoring chip, the integration circuit is connected to the voltage comparator, and the voltage comparator is connected to the voltage monitoring chip. In the second branch, the integration circuit can be connected to the positive input terminal of the voltage comparator, and the integration circuit inputs the integration voltage corresponding to each timing moment to the positive input terminal of the voltage comparator, and the reference voltage can refer to the set voltage of the reverse input terminal of the voltage comparator, which is used to compare with the integration voltage input at the positive input terminal. The voltage comparator compares the integration voltage corresponding to each timing moment with the reference voltage respectively. Specifically, when the integration voltage corresponding to each timing moment is less than or equal to the reference voltage, the voltage comparator continuously outputs a low-level voltage to the voltage monitoring chip until the integration voltage corresponding to the current moment is greater than the reference voltage. The output of the voltage comparator to the voltage monitoring chip is converted from a low-level voltage to a high-level voltage, and the state signal corresponding to the high-level voltage is a positive jump signal. The voltage monitoring chip generates a reset signal after a preset time period when it detects the positive jump signal of the low-level voltage converted to a high-level voltage.

[0057] It can be seen that in this embodiment, the integrated voltage is compared by the voltage comparator and the voltage monitoring chip until the integrated voltage is greater than the reference voltage, which triggers the voltage monitoring chip to generate a reset signal. This can realize automatic generation of the reset signal according to the clock signal, thereby saving the hardware resources of the embedded system for the dedicated interface for sending the reset signal.

[0058] In some embodiments, the sensor control method further comprises:

[0059] In the case where the single input-output interface stops inputting clock signals to the first branch and the second branch in the sensor circuit, the sensor enters a dormant state due to not receiving the clock signal;

[0060] When the single input / output interface stops inputting clock signals to the first branch and the second branch in the sensor circuit, the attenuated integrated voltage corresponding to each timing moment is output to the voltage comparator based on the integration circuit;

[0061] The attenuated integrated voltage corresponding to each timing moment is compared with the reference voltage by a voltage comparator;

[0062] When the decay integration voltage corresponding to the current moment is less than or equal to the reference voltage, a reverse jump signal is output through the voltage comparator.

[0063] The reverse jump signal refers to the voltage signal after the output of the voltage comparator jumps in the reverse level, and can refer to the low level voltage after the output of the voltage comparator jumps from a high level. The attenuated integral voltage refers to the voltage value of the integral circuit after the attenuation of the existing integral voltage.

[0064] Specifically, when a single input / output interface of the embedded system stops inputting clock signals to the first branch and the second branch in the sensor circuit, such as when the user deactivates the target device or the user operates the target device to enter a sleep state, the embedded system stops sending clock signals to the sensor, and the existing integral voltage of the integral circuit in the second branch will decay without the clock signal supplement. Then, after the second branch does not receive the clock signal, the integral circuit outputs the decayed integral voltage corresponding to each timing moment to the voltage comparator based on the existing integral voltage. The decayed integral voltage corresponding to each timing moment is compared with the reference voltage by the voltage comparator. Specifically, at the initial stage of the integral voltage decay, the decayed integral voltage corresponding to each timing moment output by the integral circuit is still greater than the reference voltage. At this time, the voltage comparator still outputs a high-level voltage to the voltage monitoring chip until the integral voltage corresponding to the current moment is equal to or less than the reference voltage. The output of the voltage comparator to the voltage monitoring chip is converted from a high-level voltage to a low-level voltage, and the state signal corresponding to the low-level voltage is obtained as a reverse jump signal. Based on the reverse jump signal output by the voltage comparator, preparation is made for the voltage monitoring chip to generate a reset signal when the clock signal is input next time, that is, the single input and output interface of the embedded system inputs the clock signal to the second branch again, and the integrated voltage input by the integration circuit of the second branch to the voltage comparator is greater than the reference voltage again. The voltage monitoring chip can detect the positive jump signal output by the voltage comparator and generate a reset signal.

[0065] It can be seen that in this embodiment, the integrated voltage is compared by the voltage comparator and the voltage monitoring chip until the integrated voltage is greater than the reference voltage, which triggers the voltage monitoring chip to generate a reset signal. The reset signal can be generated by the input control of the clock signal, thereby ensuring the effective generation of the reset signal.

[0066] In some embodiments, the second branch includes an isolation resistor and a feedback resistor; before inputting a clock signal to the first branch and the second branch in the sensor circuit respectively through a single input / output interface in step 202, the sensor control method further includes:

[0067] A reference voltage is obtained, and a voltage adjustment is performed on the reference voltage based on an isolation resistor and a feedback resistor to obtain a reference voltage.

[0068] The feedback resistor is used to adjust the reference voltage. The reference voltage refers to the power supply voltage that can be provided by the hardware power supply.

[0069] Specifically, a reference voltage is set in advance at the reverse input terminal of the voltage comparator, and then the resistance values ​​corresponding to the feedback resistor and the isolation resistor are calculated according to the required reference voltage and the reference voltage, and a circuit feedback circuit connected to the voltage comparator and an isolation resistor connected to the integration circuit are set in the second branch according to the feedback resistor. The reference voltage corresponding to the voltage comparator can be obtained through the resistance value of the feedback resistor, the resistance value of the isolation resistor and the reference voltage.

[0070] In some embodiments, the reference voltage set at the reverse input terminal of the voltage comparator can be used as the reference voltage. When the voltage comparator receives the integrated voltage input at the positive input terminal, the integrated voltage is compared with the reference voltage at the reverse input terminal, and the output voltage of the voltage comparator is determined according to the comparison result. It can be seen that in this embodiment, the reference voltage of the voltage comparator is set by the feedback resistor, the isolation resistor and the reference voltage, thereby ensuring the accuracy of the reference voltage.

[0071] In some embodiments, the sensor is an image sensor corresponding to a camera device in a terminal, and a single input and output interface is provided by an embedded system of the terminal; the reset signal is used to reset the device parameters of the camera device when the image sensor is in a startup state, so that the camera device enters a working state.

[0072] Specifically, the input and output interface is the input and output interface of the embedded system in the terminal, and the sensor is the image sensor corresponding to the camera device in the terminal. When the terminal responds to the user's activation operation of the camera device, the embedded system sends a clock signal to the sensor circuit corresponding to the image sensor, and sends the clock signal to the image sensor through the first branch in the sensor circuit. The image sensor enters a startup state when receiving the clock signal; a reset signal is generated according to the clock signal through the second branch, and the reset signal is sent to the image sensor. When the image sensor receives the reset signal, a reset action is performed in the startup state, and the device parameters of the camera device are initialized, so that the camera device is in an initial state and enters a working state where the photo-taking function can be executed.

[0073] In some embodiments, Figure 4 As shown, a schematic diagram of a sensor circuit of an image sensor is provided. A dedicated GPIO (general purpose input output pin) of an embedded system inputs a clock signal to a first branch and a second branch in the sensor circuit to drive the image sensor.

[0074] In the first branch, a clock signal generated by the dedicated GPIO of the embedded system is connected to the clock pin of the image sensor to provide a clock signal to the image sensor.

[0075] In the second branch, the clock signal generated by the dedicated GPIO of the embedded system is connected to the positive input pin (positive input terminal) of the voltage comparator through an isolation resistor and an integration circuit. When the clock signal is generated, the voltage of the positive input pin of the voltage comparator (integrated voltage) is slowly raised. The reference voltage of the negative input pin (reverse input terminal) of the voltage comparator, the isolation resistor and the feedback resistor parameters of the resistor feedback network are adjusted in advance to set the flip voltage (reference voltage) of the voltage comparator 0->1 (0 represents a low level, 1 represents a high level) and 1->0. The output voltage (status signal) of the voltage comparator is sent to the power pin of the voltage monitoring chip, and the output terminal of the voltage monitoring chip is connected to the reset pin of the image sensor to provide a reset signal to the image sensor.

[0076] The working process of the sensor circuit is as follows:

[0077] The embedded system generates a clock through the dedicated GPIO, and inputs the clock signal to the image sensor through the first branch to enter the startup state; the voltage is generated at the positive electrode of the comparator through the isolation resistor and the integration circuit of the second branch. When this voltage is higher than the 0->1 flip voltage set by the circuit, the comparator output will generate a 0->1 jump level signal, which causes the voltage monitoring chip to generate a reset signal of a high pulse or low pulse signal, and outputs the reset signal to the image sensor to perform a reset action. When the embedded system stops sending the clock, the integral voltage at the positive input end of the voltage comparator in the second branch will slowly decrease to obtain an attenuated integral voltage. When the attenuated integral voltage decreases to the reference voltage set at the negative electrode, the voltage comparator output will flip from a high level to a low level reverse jump signal, preparing for the voltage monitoring chip to generate a reset signal when the embedded system inputs a clock signal next time.

[0078] In some embodiments, Figure 5 As shown, a schematic diagram of the sensor circuit logic is provided. In the figure, R2 and R3 are feedback resistors used to construct a resistor feedback network; R4 is an isolation resistor; C1 is an integral capacitor used to construct an integral circuit; R6 and R7 are setting resistors used to set the reference voltage of the reverse input terminal of the voltage comparator, and R6 and R7 are connected in parallel at the reverse input terminal of the voltage comparator. The circuit logic of the sensor circuit executing the sensor control method is as follows:

[0079] R6 and R7 divide the input power supply (3V3 voltage) to generate a reference voltage (about 0.64V) at the -IN pin (reverse input terminal) of the comparator. When a clock signal is input through a single input / output interface of the CLKO1 (clock) network and the voltage of the clock signal is high (such as 0.7V), a voltage higher than the reference voltage (such as 0.64V) is generated at the +IN pin (positive input terminal) of the comparator through the integration of R4 and C1. At this time, the output terminal of the voltage comparator U1 outputs a high voltage (positive jump signal), and the voltage is Figure 5 The resistor feedback network constructed by R2 and R3 in the figure generates positive feedback, which means that part of the voltage output by the voltage comparator is fed back to the positive input terminal of the voltage comparator to maintain the voltage of the +IN (positive input terminal) pin (for example, maintained at +3.3V), thereby maintaining the output voltage of the comparator (for example, maintained at +3.3V); when there is no clock signal (the clock signal is 0V) through the single input and output interface of the CLKO1 network, the voltage of the +IN pin of the voltage comparator depends on the voltage division of R3+R2 and R4 (generally 0.3V), then the voltage comparator U1 will output a low voltage (reverse jump signal), and the resistor feedback network constructed by R2 and R3 in the figure generates positive feedback to maintain the voltage of the +IN pin at 0V; then the single input input of the CLKO1 network Whether there is a clock signal on the output interface determines whether the output of the voltage comparator U1 is high or low; the output of the voltage comparator U1 is connected to the power pin VCC of the voltage monitoring chip U2; when the power supply of the VCC pin drops below the Threshold voltage (threshold voltage), the output pin nRESET pin will output a low level; when the voltage of the VCC pin rises from below the Threshold voltage to above the Threshold voltage, after a delay of 150ms, the pin nRESET outputs a high level, and the minimum low-level pulse of 150ms is the reset signal required by the sensor chip; thereby achieving the goal of not using GPIO (input and output interface), and only using the presence or absence of a clock signal to generate the reset pulse required by the sensor chip, thereby reducing the need for one GPIO.

[0080] It can be seen that in this embodiment, a clock signal is input into the first branch and the second branch in the sensor circuit through a single input-output interface, the sensor in the sensor circuit can receive the clock signal through the first branch to enter the startup state, and receive the reset signal generated by the branch according to the clock signal through the second branch, perform the reset action in the startup state and enter the working state, and can output the clock signal using only a single input-output interface, input the clock signal to the sensor through the sensor circuit, and generate a reset signal according to the clock signal and input it into the sensor, thereby realizing the synchronous input of the clock signal and reset signal of the sensor, without the need to occupy an additional dedicated interface to transmit the reset signal, thereby saving interface hardware resources.

[0081] It should be understood that, although the steps in the flowcharts involved in the above-mentioned embodiments are displayed in sequence according to the indications of the arrows, these steps are not necessarily executed in sequence according to the order indicated by the arrows. Unless there is a clear description in this article, there is no strict order restriction on the execution of these steps, and these steps can be executed in other orders. Moreover, at least a part of the steps in the flowcharts involved in the above-mentioned embodiments may include multiple steps or multiple stages, and these steps or stages are not necessarily executed at the same time, but can be executed at different times, and the execution order of these steps or stages is not necessarily to be carried out in sequence, but can be executed in turn or alternately with other steps or at least a part of the steps or stages in other steps.

[0082] Based on the same inventive concept, the embodiment of the present application also provides a sensor control device. The implementation solution provided by the device to solve the problem is similar to the implementation solution recorded in the above method, so the specific limitations in one or more sensor control device embodiments provided below can refer to the limitations of the sensor control method above, and will not be repeated here.

[0083] like Figure 5 As shown, the embodiment of the present application provides a sensor control device 600, including:

[0084] A signal output module 602, used to input a clock signal to a first branch and a second branch in the sensor circuit through a single input-output interface;

[0085] A first branch module 604, configured to send a clock signal to the sensor based on the first branch, so that the sensor enters a startup state based on the clock signal;

[0086] The second branch module 606 is used to perform an integral voltage conversion on the clock signal based on the second branch to obtain an integral voltage corresponding to each timing moment; when the integral voltage corresponding to the current moment is greater than the reference voltage, generate a reset signal;

[0087] The reset module 608 is used to send a reset signal to the sensor based on the second branch, so that the sensor performs a reset action in the startup state and enters the working state.

[0088] In some embodiments, the second branch includes an isolation resistor and an integration circuit; in terms of performing an integrated voltage conversion on the clock signal based on the second branch to obtain an integrated voltage corresponding to each timing moment, the second branch module 606 is specifically used to:

[0089] Based on the second branch, the clock signal is input into the isolation resistor for signal attenuation to obtain the attenuated signal corresponding to each timing moment; the attenuated signal corresponding to each timing moment is input into the integration circuit for integration calculation to obtain the integrated voltage corresponding to each timing moment.

[0090] In some embodiments, the second branch further includes a voltage comparator connected to the integration circuit and a voltage monitoring chip connected to the voltage comparator; when the integration voltage corresponding to the current moment is greater than the reference voltage, in terms of generating a reset signal, the second branch module 606 is specifically used to:

[0091] The integrated voltages corresponding to each timing moment output by the integration circuit are sequentially input into the voltage comparator; the integrated voltages corresponding to each timing moment are compared with the reference voltage by the voltage comparator; when the integrated voltage corresponding to the current moment is greater than the reference voltage, a positive jump signal is output to the voltage monitoring chip through the voltage comparator, and after a preset time period, a reset signal is generated by the voltage monitoring chip.

[0092] In some embodiments, the sensor control device 600 is specifically used to:

[0093] When a single input-output interface stops inputting clock signals to the first branch and the second branch in the sensor circuit, the sensor enters a sleep state due to not receiving the clock signal; when a single input-output interface stops inputting clock signals to the first branch and the second branch in the sensor circuit, an attenuated integral voltage corresponding to each timing moment is output to a voltage comparator based on an integration circuit; the attenuated integral voltage corresponding to each timing moment is compared with a reference voltage by the voltage comparator; when the attenuated integral voltage corresponding to the current moment is less than or equal to the reference voltage, a reverse jump signal is output by the voltage comparator.

[0094] In some embodiments, the second branch includes an isolation resistor and a feedback resistor; before inputting a clock signal to the first branch and the second branch in the sensor circuit respectively through a single input / output interface, the sensor control device 600 is specifically configured to:

[0095] A reference voltage is obtained, and a voltage adjustment is performed on the reference voltage based on an isolation resistor and a feedback resistor to obtain a reference voltage.

[0096] In some embodiments, the sensor is an image sensor corresponding to a camera device in a terminal, and a single input and output interface is provided by an embedded system of the terminal; the reset signal is used to reset the device parameters of the camera device when the image sensor is in a startup state, so that the camera device enters a working state.

[0097] Each module in the above sensor control device can be implemented in whole or in part by software, hardware or a combination thereof. Each module can be embedded in or independent of a processor in a computer device in the form of hardware, or can be stored in a memory in a computer device in the form of software, so that the processor can call and execute operations corresponding to each module.

[0098] In some embodiments, a computer device is provided. The computer device may be a terminal, and its internal structure diagram may be as follows: Figure 7 As shown. The computer device includes a processor, a memory, an input / output interface, a communication interface, a display unit and an input device. The processor, the memory and the input / output interface are connected through a system bus, and the communication interface, the display unit and the input device are connected to the system bus through the input / output interface. The processor of the computer device is used to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system and a computer program. The internal memory provides an environment for the operation of the operating system and the computer program in the non-volatile storage medium. The input / output interface of the computer device is used to exchange information between the processor and the external device. The communication interface of the computer device is used to communicate with an external terminal in a wired or wireless manner, and the wireless manner can be implemented through WIFI, a mobile cellular network, NFC (near field communication) or other technologies. When the computer program is executed by the processor, the steps in the above-mentioned sensor control method are implemented. The display unit of the computer device is used to form a visually visible picture, which can be a display screen, a projection device or a virtual reality imaging device. The display screen can be a liquid crystal display screen or an electronic ink display screen; the input device of the computer device can be a touch layer covering the display screen, or a key, trackball or touchpad provided on the computer device housing, or an external keyboard, touchpad or mouse, etc.

[0099] Those skilled in the art will understand that Figure 7 The structure shown in the figure is only a block diagram of a part of the structure related to the solution of the present application, and does not constitute a limitation on the computer device to which the solution of the present application is applied. The specific computer device may include more or fewer components than those shown in the figure, or combine certain components, or have a different arrangement of components.

[0100] In some embodiments, a computer device is provided. The computer device includes a memory and a processor. The memory stores a computer program. When the processor executes the computer program, the steps in the above method embodiments are implemented.

[0101] In some embodiments, Figure 8The figure shows an internal structure diagram of a computer-readable storage medium, which stores a computer program. When the computer program is executed by a processor, the steps in the above-mentioned method embodiments are implemented.

[0102] In some embodiments, a computer program product is provided. The computer program product includes a computer program. When the computer program is executed by a processor, the steps in the above method embodiments are implemented.

[0103] It should be noted that the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data used for analysis, stored data, displayed data, etc.) involved in this application are all information and data authorized by the user or fully authorized by all parties, and the collection, use and processing of relevant data must comply with relevant laws, regulations and standards of relevant countries and regions.

[0104] Those skilled in the art can understand that all or part of the processes in the above-mentioned embodiment methods can be completed by instructing the relevant hardware through a computer program, and the computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, any reference to the memory, database or other medium used in the embodiments provided in this application can include at least one of non-volatile and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetoresistive random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory can include random access memory (RAM) or external cache memory, etc. As an illustration and not limitation, RAM can be in various forms, such as static random access memory (SRAM) or dynamic random access memory (DRAM). The database involved in each embodiment provided in this application may include at least one of a relational database and a non-relational database. Non-relational databases may include distributed databases based on blockchains, etc., but are not limited to this. The processor involved in each embodiment provided in this application may be a general-purpose processor, a central processing unit, a graphics processor, a digital signal processor, a programmable logic device, a data processing logic device based on quantum computing, etc., but are not limited to this.

[0105] The technical features of the above embodiments may be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0106] The above-described embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the present application. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the present application shall be subject to the attached claims.

Claims

1. A sensor control method, characterized in that: The method comprises: Inputting a clock signal to the first branch and the second branch in the sensor circuit through a single input-output interface; Based on the first branch, sending the clock signal to the sensor, so that the sensor enters a startup state based on the clock signal; Based on the second branch, the clock signal is converted into an integral voltage to obtain an integral voltage corresponding to each timing moment; When the integrated voltage corresponding to the current moment is greater than the reference voltage, a reset signal is generated; Based on the second branch, the reset signal is sent to the sensor, so that the sensor performs a reset action in the startup state and enters a working state.

2. The method according to claim 1, characterized in that The second branch includes an isolation resistor and an integration circuit; based on the second branch, the clock signal is converted into an integral voltage to obtain an integral voltage corresponding to each timing moment, including: Based on the second branch, the clock signal is input into the isolation resistor for signal attenuation to obtain an attenuated signal corresponding to each timing moment; The attenuation signal corresponding to each timing moment is input into the integration circuit for integration calculation to obtain the integration voltage corresponding to each timing moment.

3. The method according to claim 2, characterized in that The second branch further includes a voltage comparator connected to the integration circuit and a voltage monitoring chip connected to the voltage comparator; when the integration voltage corresponding to the current moment is greater than the reference voltage, a reset signal is generated, including: Inputting the integrated voltages corresponding to each timing moment output by the integration circuit into the voltage comparator in sequence; The voltage comparator compares the integrated voltage corresponding to each timing moment with the reference voltage respectively; When the integrated voltage corresponding to the current moment is greater than the reference voltage, the voltage comparator outputs a positive jump signal to the voltage monitoring chip, and after a preset time period, a reset signal is generated by the voltage monitoring chip.

4. The method according to claim 3, characterized in that The method further comprises: In the case where the single input-output interface stops inputting clock signals to the first branch and the second branch in the sensor circuit, the sensor enters a dormant state due to not receiving the clock signal; When the single input / output interface stops inputting clock signals to the first branch and the second branch in the sensor circuit, outputting the attenuated integrated voltage corresponding to each timing moment to the voltage comparator based on the integration circuit; The attenuated integrated voltage corresponding to each timing moment is compared with the reference voltage by the voltage comparator; When the decay integration voltage corresponding to the current moment is less than or equal to the reference voltage, a reverse jump signal is output through the voltage comparator.

5. The method according to claim 1, characterized in that The second branch includes an isolation resistor and a feedback resistor; before inputting a clock signal to the first branch and the second branch in the sensor circuit respectively through a single input-output interface, the method further includes: A reference voltage is obtained, and a voltage adjustment is performed on the reference voltage based on the isolation resistor and the feedback resistor to obtain the reference voltage.

6. The method according to claim 1, characterized in that The sensor is an image sensor corresponding to the camera device in the terminal, and the single input and output interface is provided by the embedded system of the terminal; the reset signal is used to reset the device parameters of the camera device when the image sensor is in the startup state, so that the camera device enters the working state.

7. A sensor control device, characterized in that: include: A signal output module, used for inputting a clock signal to a first branch and a second branch in the sensor circuit through a single input-output interface; A first branch module, configured to send the clock signal to a sensor based on the first branch, so that the sensor enters a startup state based on the clock signal; A second branch module is used to perform an integral voltage conversion on the clock signal based on the second branch to obtain an integral voltage corresponding to each timing moment; when the integral voltage corresponding to the current moment is greater than a reference voltage, generate a reset signal; The reset module is used to send the reset signal to the sensor based on the second branch, so that the sensor performs a reset action in the startup state and enters a working state.

8. The device according to claim 7, characterized in that The second branch includes an isolation resistor and an integration circuit; in terms of performing an integrated voltage conversion on the clock signal based on the second branch to obtain an integrated voltage corresponding to each timing moment, the second branch module is specifically used for: Based on the second branch, the clock signal is input into the isolation resistor for signal attenuation to obtain an attenuated signal corresponding to each timing moment; The attenuation signal corresponding to each timing moment is input into the integration circuit for integration calculation to obtain the integration voltage corresponding to each timing moment.

9. A computer device, comprising a memory and a processor, wherein the memory stores a computer program, wherein: When the processor executes the computer program, the steps of the method according to any one of claims 1 to 6 are implemented.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 6 are implemented.

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