Light-emitting diode preparation method and light-emitting diode

Abstract

The invention provides a light-emitting diode preparation method and a light-emitting diode. The method comprises the following steps: manufacturing an epitaxial structure on a substrate; manufacturing a layer of first current blocking thin film on the epitaxial structure, wherein the first current blocking thin film is provided with a first through hole; under the shielding of the first current blocking thin film, performing graphical processing on the epitaxial structure, and forming a step structure at a position, corresponding to the first through hole, of the epitaxial structure; performing graphical processing on the first current blocking film, and removing a gap formed at the edge part of the first current blocking film to obtain a second current blocking film; and under the shielding of the second current blocking film, performing graphical processing on the epitaxial structure, forming an isolation groove at a position, corresponding to the gap, of the epitaxial structure, and increasing the width of the step bottom surface of the step structure.

Description

Technical Field

[0001] The present disclosure relates to the field of light-emitting devices, and in particular to a method for preparing a light-emitting diode and a light-emitting diode. Background Art

[0002] Light-emitting diodes can cover a wavelength range from ultraviolet to infrared and are widely used in display, lighting and other fields.

[0003] The light emitting diode provided by the related art generally includes a substrate and an epitaxial structure located on the substrate, and the epitaxial structure is provided with steps.

[0004] However, when the related technology opens a step on the epitaxial structure, the area of ​​the part without the step is small, resulting in that the brightness of the light-emitting diode after etching is affected. Summary of the invention

[0005] The embodiments of the present disclosure provide a method for manufacturing a light emitting diode and a light emitting diode, which are beneficial to reducing the bottom width of the step of the light emitting diode and enhancing the brightness of the light emitting diode. The technical solution is as follows:

[0006] In one aspect, a method for preparing a light emitting diode is provided, the method comprising:

[0007] fabricating an epitaxial structure on a substrate;

[0008] Manufacturing a first current blocking film on the epitaxial structure, wherein the first current blocking film has a first through hole;

[0009] Under the shielding of the first current blocking film, the epitaxial structure is patterned to form a step structure at a position corresponding to the epitaxial structure and the first through hole;

[0010] Performing a patterning process on the first current blocking film to remove a notch formed at an edge of the first current blocking film to obtain a second current blocking film;

[0011] Under the shielding of the second current blocking film, the epitaxial structure is patterned to form an isolation groove at a position corresponding to the epitaxial structure and the notch, and the width of the step bottom surface of the step structure is increased.

[0012] Optionally, after the epitaxial structure is patterned by using the first current blocking film for shielding, the width of the step bottom surface of the step structure is 4-5 μm;

[0013] After the epitaxial structure is patterned by using the second current blocking film for shielding, the width of the step bottom surface of the step structure is 5-6 μm.

[0014] Optionally, forming a first current blocking film on the epitaxial structure includes:

[0015] Using N2O and SiH4 as reactants, growing a silicon dioxide film on the epitaxial structure using PECVD technology at a temperature of 100°C to 500°C;

[0016] forming a first photoresist mask on the silicon dioxide film;

[0017] Under the protection of the first photoresist mask, the silicon dioxide film is corroded to obtain the first current blocking film.

[0018] Optionally, the silicon dioxide film has a thickness of 0.2 to 2 μm, and the first photoresist mask has a thickness of 0.2 to 2 μm.

[0019] Optionally, forming a first photoresist mask on the silicon dioxide film includes:

[0020] Depositing a layer of photoresist on the silicon dioxide film in an environment with a temperature of 100° C. to 110° C.;

[0021] exposing and developing the photoresist to obtain the first photoresist mask;

[0022] The first photoresist mask is baked at a temperature of 100° C. to 120° C.

[0023] Optionally, the silicon dioxide film is corroded under the protection of the first photoresist mask to obtain the first current blocking film, including:

[0024] In an environment with a temperature of 20° C. to 25° C., under the protection of the first photoresist mask, the first current blocking film is corroded using a BOE solution to obtain a second current blocking film.

[0025] Optionally, the epitaxial structure is patterned under the shielding of the first current blocking film, including:

[0026] In an environment of a temperature of -25°C to -15°C and a pressure of 2.9 to 3.1 mt, using Cl2 and BCl3 etching gases to dry-etch the epitaxial structure shielded by the first current blocking film;

[0027] Wherein, the etching power of the dry etching is 220-300W, the Cl2 flow rate is 100-150sccm, and the BCl3 flow rate is 5-15sccm.

[0028] Optionally, the patterning of the epitaxial structure under the shielding of the second current blocking film includes:

[0029] In an environment of a temperature of -5°C to 5°C and a pressure of 3.1 to 3.3 mt, using Cl2 and BCl3 etching gases to dry-etch the epitaxial structure shielded by the second current blocking film;

[0030] Wherein, the etching power of the dry etching is 1100-1300 W, the Cl2 flow rate is 100-140 sccm, and the BCl3 flow rate is 10-30 sccm.

[0031] Optionally, the height of the step structure is 1 to 2.5 μm.

[0032] On the other hand, a light emitting diode is provided, the light emitting diode comprising: a substrate, an epitaxial structure and a current blocking layer;

[0033] The epitaxial structure is located on the substrate, and is provided with a step structure and an isolation groove, wherein the width of the step bottom of the step structure is 5-6 μm; and the current blocking layer is located on the surface of the epitaxial structure.

[0034] The technical solution provided by the embodiments of the present disclosure has the following beneficial effects:

[0035] In the embodiment of the present disclosure, a current blocking film is used as a shield to perform patterning of the epitaxial structure. When etching the epitaxial structure, the current blocking film will also be etched, and due to material differences, the etching rate of the current blocking film is lower than the etching rate of the epitaxial structure, so that the width of the step bottom surface of the etched step structure is smaller than that of the related technology; and, during the etching process, by successively etching the step structure and the isolation groove, when the isolation groove is etched, the side wall slope of the step structure is etched again, and the area occupied by the side wall of the step structure becomes smaller; while the width of the step bottom surface of the step structure is increased (but the area of ​​the step bottom surface must be ensured not to be too small), the area occupied by the side wall is reduced, thereby increasing the light-emitting area and enhancing the brightness of the light-emitting diode. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] In order to more clearly illustrate the technical solutions in the embodiments of the present disclosure, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present disclosure. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0037] Figure 1 A schematic diagram of the structure of a light emitting diode provided in an embodiment of the present disclosure;

[0038] Figure 2 is a flow chart of a method for preparing a light emitting diode provided by an embodiment of the present disclosure;

[0039] Figure 3 is a flow chart of another method for preparing a light emitting diode provided by an embodiment of the present disclosure;

[0040] Figure 4 This is a structural schematic diagram of a light emitting diode manufacturing process provided by an embodiment of the present disclosure;

[0041] Figure 5 This is a structural schematic diagram of a light emitting diode manufacturing process provided by an embodiment of the present disclosure;

[0042] Figure 6 This is a structural schematic diagram of a light emitting diode manufacturing process provided by an embodiment of the present disclosure;

[0043] Figure 7 This is a structural schematic diagram of a light emitting diode manufacturing process provided by an embodiment of the present disclosure;

[0044] Figure 8 This is a structural schematic diagram of a light emitting diode manufacturing process provided by an embodiment of the present disclosure;

[0045] Fig. 9 This is a structural schematic diagram of a light emitting diode manufacturing process provided by an embodiment of the present disclosure;

[0046] Fig.10 This is a structural schematic diagram of a light emitting diode manufacturing process provided by an embodiment of the present disclosure;

[0047] Fig.11 This is a structural schematic diagram of a light emitting diode manufacturing process provided by an embodiment of the present disclosure;

[0048] Fig.12 This is a structural schematic diagram of a light emitting diode manufacturing process provided by an embodiment of the present disclosure;

[0049] Fig.13 It is a structural schematic diagram of a light emitting diode manufacturing process provided by an embodiment of the present disclosure.

[0050] The reference numerals are as follows:

[0051] 100: substrate; 101: first semiconductor layer; 102: active layer; 103: second semiconductor layer; 104: current blocking layer; 105: current spreading layer; 106: first electrode; 107: second electrode; 120: step structure; 130: isolation groove; 2020: silicon dioxide film; 2001: first current blocking film; 2002: second current blocking film; 2011: first through hole; 2012: notch; 3000: photoresist; 3001: first photoresist mask layer; 3002: second photoresist film layer; 1000: epitaxial structure. DETAILED DESCRIPTION

[0052] In order to make the objectives, technical solutions and advantages of the present disclosure more clear, the embodiments of the present disclosure will be further described in detail below with reference to the accompanying drawings.

[0053] Figure 1 A schematic diagram of the structure of a light emitting diode provided by an embodiment of the present disclosure. Figure 1 The light emitting diode includes: a substrate 100 , an epitaxial structure 1000 and a current blocking layer 104 .

[0054] The epitaxial structure 1000 is located on the substrate 100 . The epitaxial structure 1000 is provided with a step structure 120 and an isolation trench 130 . The current blocking layer 104 is located on the surface of the epitaxial structure 1000 .

[0055] In the embodiment of the present disclosure, the step structure 120 is formed by etching twice: the first etching is to etch the step structure alone, and the second etching is to etch the isolation groove.

[0056] In the embodiment of the present disclosure, a current blocking film is used as a shield to perform patterning of the epitaxial structure. When etching the epitaxial structure, the current blocking film will also be etched, and due to material differences, the etching rate of the current blocking film is lower than the etching rate of the epitaxial structure, so that the width of the step bottom surface of the etched step structure is smaller than that of the related technology; and, during the etching process, by successively etching the step structure and the isolation groove, when the isolation groove is etched, the side wall slope of the step structure is etched again, and the area occupied by the side wall of the step structure becomes smaller; while the width of the step bottom surface of the step structure is increased (but the area of ​​the step bottom surface must be ensured not to be too small), the area occupied by the side wall is reduced, thereby increasing the light-emitting area and enhancing the brightness of the light-emitting diode.

[0057] In the related art, the width of the step bottom surface of the step structure is 8 to 10 μm, and the width of the step bottom surface of the step structure is 5 to 6 μm.

[0058] In the related art, the projection of the side wall of the step structure on the plane where the step bottom is located is about 1 μm wider than the projection of the side wall of the step structure on the plane where the step bottom is located in the embodiment of the present disclosure, for example 1 μm, which is also the width reduced by the second etching.

[0059] Optionally, the light emitting diode further includes: a current spreading layer 105 , a first electrode 106 and a second electrode 107 .

[0060] The current spreading layer 105 is located on the current blocking layer 104 and connected to the epitaxial structure 1000 ; the first electrode 106 is located on the step bottom surface of the step structure 120 , and the second electrode 107 is located on the current spreading layer 105 .

[0061] In the embodiment of the present disclosure, the substrate 100 may be any one of a sapphire substrate, a Si substrate, a SiC substrate, etc., and the present disclosure does not limit the material of the substrate.

[0062] Exemplarily, the substrate 100 is a sapphire substrate.

[0063] In the embodiment of the present disclosure, the epitaxial structure 1000 may include a first semiconductor layer 101, an active layer 102, and a second semiconductor layer 103 stacked in sequence, wherein the first semiconductor layer 101, the active layer 102, and the second semiconductor layer 103 form a step structure 120, and the step bottom surface of the step structure 120 is located in the first semiconductor layer 101. The sidewall of the step structure 120 passes through at least the second semiconductor layer 103 and the active layer 102.

[0064] It is worth noting that the above-mentioned epitaxial structure 1000 is only an example. In other embodiments, the epitaxial structure 1000 may further include more film layers, which is not limited in the embodiments of the present disclosure.

[0065] In the embodiment of the present disclosure, the first semiconductor layer 101 may be an N-type semiconductor layer, and the second semiconductor layer 103 may be a P-type semiconductor layer.

[0066] For example, the first semiconductor layer 101 may be an N-type GaN layer, and the second semiconductor layer 103 may be a P-type GaN layer.

[0067] In another example, the first semiconductor layer 101 may be a P-type semiconductor layer, and the second semiconductor layer 103 may be an N-type semiconductor layer.

[0068] In the embodiment of the present disclosure, the active layer 102 may be a multi-quantum well layer.

[0069] In the embodiment of the present disclosure, the current blocking layer 104 is made of a material having a slow reaction rate with the etching gas of the dry etching, wherein the etching gas includes Cl2 and BCl3.

[0070] By way of example, the current blocking layer 104 may be a silicon dioxide layer.

[0071] In the embodiment of the present disclosure, the thickness of the current blocking layer 104 may be 0.01-6 μm.

[0072] The current blocking layer 104 with the above thickness can meet the current blocking requirement on the one hand, and can also meet the shielding requirement when manufacturing the step structure on the other hand, so that the step bottom width of the step structure is smaller.

[0073] Exemplarily, the thickness of the current blocking layer 104 is 3 μm.

[0074] like Figure 1 As shown, in an example, the current blocking layer 104 only covers a partial area of ​​the surface of the epitaxial structure 1000 , and the current spreading layer 105 is connected to the surface of the epitaxial structure 1000 by covering the current blocking layer 104 .

[0075] In other examples, the current blocking layer 104 may also cover the entire surface area of ​​the epitaxial structure 1000 , and a plurality of through holes are opened on the current blocking layer 104 , and the current spreading layer 105 is connected to the surface of the epitaxial structure 1000 through the plurality of through holes.

[0076] In an implementation of the embodiment of the present disclosure, the current spreading layer 105 may be a transparent conductive layer, such as an indium tin oxide (ITO) layer.

[0077] In another implementation of the embodiment of the present disclosure, the current spreading layer 105 may also be other film layer structures, for example, a stack of a transparent conductive layer and a metal layer, which is not limited in the embodiment of the present disclosure.

[0078] In the embodiment of the present disclosure, both the first electrode 105 and the second electrode 106 may include AuGe or AuBe electrodes.

[0079] Optionally, the light emitting diode may further include a passivation layer, wherein the passivation layer covers the side walls of the epitaxial structure 1000 , the current spreading layer 105 , the first electrode 105 and the second electrode 106 .

[0080] In the embodiment of the present disclosure, the passivation layer may be a film layer formed of materials such as a SiO2 layer and an Al2O3 layer.

[0081] For example, the passivation layer is a SiO2 layer.

[0082] like Figure 1 As shown, the depth of the step structure 120 may be 0.01-6 μm.

[0083] Exemplarily, the depth of the step structure 120 is 3 μm.

[0084] In this implementation, the above-mentioned depth can ensure that the step extends to the first semiconductor layer on the one hand, and can prevent the step structure from being too wide due to the step depth being too large on the other hand.

[0085] It is worth noting that the above-mentioned structure of the light-emitting diode may also have more or fewer film layers, and the embodiments of the present disclosure do not limit this.

[0086] Figure 2 A flow chart of a method for preparing a light emitting diode provided in an embodiment of the present disclosure. Figure 2 , this method is used to make Figure 1 The light emitting diode shown, the method steps include:

[0087] S11. Fabricating an epitaxial structure on a substrate.

[0088] S12, manufacturing a first current blocking film on the epitaxial structure, wherein the first current blocking film has a first through hole.

[0089] S13, performing a patterning process on the epitaxial structure under the shielding of the first current blocking film, and forming a step structure at a position corresponding to the epitaxial structure and the first through hole.

[0090] S14, performing a patterning process on the first current blocking film to remove a notch formed at an edge of the first current blocking film, thereby obtaining a second current blocking film.

[0091] S15. Under the shielding of the second current blocking film, the epitaxial structure is patterned to form an isolation groove at a position corresponding to the epitaxial structure and the notch, and the width of the step bottom surface of the step structure is increased.

[0092] In the embodiment of the present disclosure, a current blocking film is used as a shield to perform patterning of the epitaxial structure. When etching the epitaxial structure, the current blocking film will also be etched, and due to material differences, the etching rate of the current blocking film is lower than the etching rate of the epitaxial structure, so that the width of the step bottom surface of the etched step structure is smaller than that of the related technology; and, during the etching process, by successively etching the step structure and the isolation groove, when the isolation groove is etched, the side wall slope of the step structure is etched again, and the area occupied by the side wall of the step structure becomes smaller; while the width of the step bottom surface of the step structure is increased (but the area of ​​the step bottom surface must be ensured not to be too small), the area occupied by the side wall is reduced, thereby increasing the light-emitting area and enhancing the brightness of the light-emitting diode.

[0093] Figure 3 Another light emitting diode manufacturing method provided by the present disclosure is a flow chart. Figure 3 The method steps include:

[0094] S21, sequentially fabricating a first semiconductor layer, an active layer, and a second semiconductor layer on a substrate to form an epitaxial structure.

[0095] In the embodiments of the present disclosure, the substrate may be any one of a sapphire substrate, a Si substrate, a SiC substrate, etc., and the present disclosure does not limit the material of the substrate.

[0096] Exemplarily, the substrate is a sapphire substrate, and the thickness may be 100-300 μm.

[0097] In the embodiment of the present disclosure, the first semiconductor layer may be an N-type semiconductor layer, and the second semiconductor layer may be a P-type semiconductor layer.

[0098] For example, the first semiconductor layer may be an N-type GaN layer, and the second semiconductor layer may be a P-type GaN layer.

[0099] In another example, the first semiconductor layer may be a P-type semiconductor layer, and the second semiconductor layer may be an N-type semiconductor layer.

[0100] In the embodiment of the present disclosure, the active layer may be a multi-quantum well layer.

[0101] Exemplarily, a Metal Organic Chemical Vapor Deposition (MOCVD) device is used to sequentially form an N-type semiconductor layer, a multi-quantum well layer, and a P-type semiconductor layer on the surface of a substrate.

[0102] In the disclosed embodiment, the growth of the semiconductor layer can be realized by using Veeco K465i or C4 or RB MOCVD equipment or AIXTRON metal organic compound chemical vapor deposition equipment. High purity H2 (hydrogen) or high purity N2 (nitrogen) or a mixture of high purity H2 and high purity N2 is used as a carrier gas, high purity NH3 is used as an N source, trimethyl gallium (TMGa) and triethyl gallium (TEGa) are used as gallium sources, trimethyl indium (TMIn) is used as an indium source, silane (SiH4) is used as an N-type dopant, trimethyl aluminum (TMAl) is used as an aluminum source, and bis(cyclopentadienyl) magnesium (CP2Mg) is used as a P-type dopant.

[0103] Figure 4 Schematic diagram of a light emitting diode manufacturing process provided by the embodiment of the present disclosure. Figure 4 , an epitaxial structure 1000 is formed on the surface of the substrate 100 .

[0104] S22, manufacturing a first current blocking film on the epitaxial structure, wherein the first current blocking film has a first through hole.

[0105] In the embodiment of the present disclosure, step S22 may include the following steps:

[0106] Step 1: Using N2O and SiH4 as reactants, a layer of silicon dioxide film is grown on the epitaxial structure using plasma enhanced chemical vapor deposition (PECVD) technology at a temperature of 100°C to 500°C.

[0107] In the embodiment of the present disclosure, the thickness of the silicon dioxide film may be 0.2-2 μm.

[0108] The silicon dioxide film with the above thickness can meet the current blocking requirement on the one hand, and can also meet the shielding requirement when making the step structure on the other hand.

[0109] Exemplarily, the current blocking film has a thickness of 1 μm.

[0110] Exemplarily, the growth temperature of the silicon dioxide thin film may be 300°C.

[0111] Optionally, before step 1, the method may further include: cleaning the epitaxial structure.

[0112] Figure 5 Schematic diagram of a light emitting diode manufacturing process provided by the embodiment of the present disclosure. Figure 5 , a silicon dioxide film 2020 is formed on the surface of the epitaxial structure 1000 .

[0113] Step 2: forming a first photoresist mask on the silicon dioxide film.

[0114] In the embodiment of the present disclosure, the thickness of the first photoresist mask is 0.2-2 μm.

[0115] Exemplarily, the thickness of the first photoresist mask is 1 μm.

[0116] In the embodiment of the present disclosure, step 2 may include the following steps:

[0117] The first step is to deposit a layer of photoresist on the silicon dioxide film (2020) at a temperature of 100°C to 100°C.

[0118] In an example of an embodiment of the present disclosure, the photoresist may be a positive photoresist.

[0119] In other examples, the photoresist may also be a negative photoresist.

[0120] Figure 6Schematic diagram of a light emitting diode manufacturing process provided by the embodiment of the present disclosure. Figure 6 , a photoresist 3000 is formed on the surface of the silicon dioxide film 2020.

[0121] The second step is to expose and develop the photoresist to obtain a first photoresist mask.

[0122] Exemplarily, a photolithography machine is used to map out a step (Mesa) pattern using ultraviolet light under the shielding of a mask plate. The ultraviolet light can be provided by an ultraviolet mercury lamp, and the exposure energy of the ultraviolet mercury lamp is controlled at 50 to 80 mj. After exposure, it is immersed in a developer, and then rinsed and dried after 8 to 15 minutes.

[0123] The third step is to bake the first photoresist mask at a temperature of 100° C. to 120° C.

[0124] Optionally, when baking the photoresist mask layer, the baking time is 5 to 8 minutes.

[0125] Exemplarily, the baking temperature is 110° C. and the baking time is 6 minutes.

[0126] At a fixed temperature, the longer the time, the flatter the angle of the photoresist. Using the above baking temperature and baking time is conducive to enhancing the adhesion and corrosion resistance of the photoresist, providing a basis for the subsequent etching of the current blocking film and epitaxial structure.

[0127] Figure 7 Schematic diagram of a light emitting diode manufacturing process provided by the embodiment of the present disclosure. Figure 7 , the photoresist 3000 is exposed, developed and baked to obtain a first photoresist mask layer 3001.

[0128] Step three: Under the protection of the first photoresist mask, the silicon dioxide film is corroded to obtain a first current blocking film.

[0129] In the embodiment of the present disclosure, step three may include the following steps:

[0130] In an environment with a temperature of 20° C. to 25° C., under the protection of the first photoresist mask, a buffered oxide etch (BOE) solution is used to etch the silicon dioxide film to obtain a first current blocking film.

[0131] For example, after baking, the substrate is placed in a BOE solution for wet etching to etch away the silicon dioxide film not covered by the photoresist mask layer, and the etching time is determined according to the thickness of the deposited silicon dioxide film.

[0132] Figure 8Schematic diagram of a light emitting diode manufacturing process provided by the embodiment of the present disclosure. Figure 8 , the silicon dioxide film 2020 is wet-etched to form a patterned first current blocking film 2001 , wherein the first current blocking film 2001 has a first through hole 2011 .

[0133] Optionally, the method may further include: flushing and drying after corrosion; placing in an oven for baking after drying, with the temperature controlled at 80-100° C. and the baking time controlled at 10-20 min.

[0134] S23, performing a patterning process on the epitaxial structure under the shielding of the first current blocking film, and forming a step structure at a position corresponding to the epitaxial structure and the first through hole.

[0135] The first semiconductor layer, the active layer and the second semiconductor layer form a step structure, the step bottom surface of the step structure is located in the first semiconductor layer, and the side wall of the step structure at least passes through the second semiconductor layer and the active layer.

[0136] In the embodiment of the present disclosure, step S23 may include the following steps:

[0137] In an environment of a temperature of -25°C to -15°C and a pressure of 2.9 to 3.1 mt, the epitaxial structure shielded by the first current blocking film is dry-etched using Cl2 and BCl3 etching gases to obtain the step structure.

[0138] In the disclosed embodiment, the etching power of the dry etching is 220-300 W, the Cl2 flow rate is 100-150 sccm, and the BCl3 flow rate is 5-15 sccm.

[0139] Exemplarily, under an environment of a temperature of -20°C and a pressure of 3 mt, the etching power of the dry etching is 260 W, the Cl2 flow rate is 130 sccm, and the BCl3 flow rate is 10 sccm.

[0140] The above etching parameters can be used to simultaneously etch silicon dioxide and the epitaxial structure, and under the above parameters, the difference between the two is sufficient to form a step structure of the above width.

[0141] In the embodiment of the present disclosure, the height of the step structure may be 1 to 2.5 μm.

[0142] Exemplarily, the height of the step structure is 2 μm.

[0143] In this implementation, the above-mentioned depth can ensure that the step extends to the first semiconductor layer on the one hand, and can prevent the step structure from being too wide due to the step depth being too large on the other hand.

[0144] Fig. 9 Schematic diagram of a light emitting diode manufacturing process provided by the embodiment of the present disclosure. Fig. 9 The epitaxial structure 1000 shielded by the first current blocking film 2001 is processed by dry etching to obtain a stepped structure 120 .

[0145] Fig. 9 Here, a represents the bottom width of the step structure 120 , and h represents the height of the step structure 120 .

[0146] S24, performing a patterning process on the first current blocking film to remove a notch formed at an edge of the first current blocking film, thereby obtaining a second current blocking film.

[0147] The process of step S24 is the same as that of step S22, except that the pattern of the second photoresist mask used is different, and the edge portion of the first current blocking film is etched and removed.

[0148] Fig.10 Schematic diagram of a light emitting diode manufacturing process provided by the embodiment of the present disclosure. Fig.10 Under the shielding of the second photoresist film layer 3002 , the first current blocking film 2001 is patterned to form a patterned second current blocking film 2002 . The second current blocking film 2002 has a notch 2012 in addition to the first through hole 2011 .

[0149] S25. Under the shielding of the second current blocking film, the epitaxial structure is patterned to form an isolation groove at a position corresponding to the epitaxial structure and the notch, and the width of the step bottom surface of the step structure is increased.

[0150] The bottom surface of the isolation groove is located in the first semiconductor layer, and the isolation groove at least passes through the second semiconductor layer and the active layer.

[0151] In the embodiment of the present disclosure, S25 may include the following steps:

[0152] In an environment of a temperature of -5°C to 5°C and a pressure of 3.1 to 3.3 mt, Cl2 and BCl3 etching gases are used to perform dry etching on the epitaxial structure shielded by the second current blocking film.

[0153] In the disclosed embodiment, the etching power of the dry etching is 1100-1300 W, the Cl2 flow rate is 100-140 sccm, and the BCl3 flow rate is 10-30 sccm.

[0154] Exemplarily, under an environment of a temperature of 0° C. and a pressure of 3.2 mt, the etching power of the dry etching is 1200 W, the Cl 2 flow rate is 120 sccm, and the BCl 3 flow rate is 20 sccm.

[0155] After the epitaxial structure is patterned by using the first current blocking film for shielding, the width of the step bottom surface of the step structure is 4-5 μm;

[0156] After the epitaxial structure is patterned by using the second current blocking film for shielding, the width of the step bottom surface of the step structure is 5-6 μm.

[0157] In this implementation, the width of the bottom surface of the step is increased by etching twice, and the width of the side wall of the step structure is narrowed, thereby further increasing the light-emitting area while ensuring that the width of the bottom surface of the step is still smaller than that of the related art.

[0158] Fig.11 Schematic diagram of a light emitting diode manufacturing process provided by the embodiment of the present disclosure. Fig.11 The epitaxial structure 1000 shielded by the second current blocking film 2002 is processed by dry etching to obtain an isolation groove 130 and a step structure 120 with a larger bottom surface.

[0159] S26, performing patterning processing on the second current blocking film to obtain a current blocking layer.

[0160] In the embodiment of the present disclosure, step S26 may include:

[0161] The first step is to remove the second photoresist mask layer and form a third photoresist mask layer on the second current blocking film.

[0162] The thickness and manufacturing method of the third photoresist mask layer may refer to the first photoresist mask layer.

[0163] The second step is to etch the second current blocking film under the shielding of the third photoresist mask layer to obtain a current blocking layer.

[0164] In the second step, wet etching may be used to form the current blocking layer. The wet etching method may refer to step S22.

[0165] Fig.12 Schematic diagram of a light emitting diode manufacturing process provided by the embodiment of the present disclosure. Fig.12 , the second current blocking film 2002 is wet-etched to obtain the current blocking layer 104 .

[0166] After the production is completed, the third photoresist mask is removed.

[0167] In the disclosed embodiment, the first, second and third photoresist mask layers are all removed by using an organic solution.

[0168] S27, manufacturing a current spreading layer, wherein the current spreading layer is located on the current blocking layer and connected to the epitaxial structure.

[0169] In an implementation of the embodiment of the present disclosure, the current spreading layer may be a transparent conductive layer, such as an ITO layer.

[0170] In another implementation of the embodiment of the present disclosure, the current spreading layer may also be other film layer structures, for example, a stack of a transparent conductive layer and a metal layer, which is not limited in the embodiment of the present disclosure.

[0171] Fig.13 Schematic diagram of a light emitting diode manufacturing process provided by the embodiment of the present disclosure. Fig.13 , a current spreading layer 105 is manufactured. The current spreading layer 105 is located on the current blocking layer 104 and connected to the epitaxial structure 1000 .

[0172] S28. Make a first electrode and a second electrode, wherein the first electrode is located on a step bottom surface of the step structure, and the second electrode is located on the current spreading layer.

[0173] The structure of the electrode after fabrication is as follows Figure 1 As shown, no further description is given here.

[0174] In the embodiment of the present disclosure, both the first electrode and the second electrode may include AuGe or AuBe electrodes.

[0175] Optionally, the method may further include: manufacturing a passivation layer, wherein the passivation layer covers the epitaxial structure, the current spreading layer, and the side walls of the first electrode and the second electrode.

[0176] In one example, a SiO2 layer is manufactured by using PECVD technology or ALD technology; the SiO2 layer is patterned to obtain a passivation layer.

[0177] In the embodiment of the present disclosure, the passivation layer may also be a transparent insulating material such as Al2O3, and the present disclosure does not limit the material of the passivation layer.

[0178] Optionally, the light-emitting diode wafer is prepared in the above steps, and the method further comprises: grinding, polishing and cutting the prepared wafer to obtain a light-emitting diode chip.

[0179] The electrical parameters of the LED chips prepared by the method of the embodiment of the present disclosure and the LED chips prepared by the traditional method were measured at 150mA and compared. The comparison results are shown in Table 1 below, where Vf1Avg represents the voltage average and Lop1Avg represents the brightness average.

[0180] Table 1

[0181] Vf1Avg / V Lop1Avg / mW Related technologies 2.982 329.86 Embodiments of the present disclosure 2.974 322.00 Related technologies 2.999 323.43 Embodiments of the present disclosure 2.959 325.74 Related technologies 2.983 324.36 Embodiments of the present disclosure 2.983 321.92 Related technologies 2.993 321.97 Embodiments of the present disclosure 3.002 321.84 Related technologies 2.986 317.91 Embodiments of the present disclosure 2.973 323.10 Related technologies 3.009 321.78 Embodiments of the present disclosure 2.979 326.41 Related technologies 3.011 325.47 Embodiments of the present disclosure 3.003 333.34 Related technologies 2.955 327.32 Embodiments of the present disclosure 2.989 335.00 Related technologies 2.990 324.01 Embodiments of the present disclosure 2.983 326.17

[0182] It can be seen from Table 1 that the average brightness of the light-emitting diode chip prepared by the method of the embodiment of the present disclosure is 326.1 mW, and the average brightness of the light-emitting diode chip prepared by the traditional method is 324.0 mW; the average voltage of the light-emitting diode chip prepared by the method of the embodiment of the present disclosure is 2.983 V, and the average voltage of the light-emitting diode chip prepared by the traditional method is 2.990 V. It can be seen that the method of the embodiment of the present disclosure can significantly improve the brightness of the chip while reducing the operating voltage.

[0183] The above description is only an optional embodiment of the present disclosure and is not intended to limit the present disclosure. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present disclosure shall be included in the protection scope of the present disclosure.

Claims

1. A method for preparing a light emitting diode, characterized in that: The method comprises: Fabricating an epitaxial structure (1000) on a substrate (100); Manufacturing a first current blocking film (2001) on the epitaxial structure (1000), wherein the first current blocking film (2001) has a first through hole (2011); Under the shielding of the first current blocking film (2001), the epitaxial structure (1000) is subjected to a patterning process to form a step structure (120) at a position corresponding to the epitaxial structure (1000) and the first through hole (2011); Performing a patterning process on the first current blocking film (2001), removing the edge portion of the first current blocking film (2001) to form a notch (2012), and obtaining a second current blocking film (2002); Under the shielding of the second current blocking film (2002), the epitaxial structure (1000) is patterned to form an isolation groove (130) at a position corresponding to the epitaxial structure (1000) and the notch (2012), and the width of the step bottom surface of the step structure (120) is increased.

2. The method for preparing a light emitting diode according to claim 1, characterized in that: After the epitaxial structure (1000) is patterned by using the first current blocking film (2001) to block, the width of the step bottom surface of the step structure (120) is 4 to 5 μm; After the epitaxial structure (1000) is patterned by using the second current blocking film (2002) to block, the width of the step bottom surface of the step structure (120) is 5 to 6 μm.

3. The method for preparing a light emitting diode according to claim 1 or 2, characterized in that: A first current blocking film (2001) is fabricated on the epitaxial structure (1000), comprising: Using N2O and SiH4 as reactants, and using PECVD technology at a temperature of 100°C to 500°C, a silicon dioxide film (2020) is grown on the epitaxial structure (1000); Making a first photoresist mask (3001) on the silicon dioxide film (2020); Under the protection of the first photoresist mask (3001), the silicon dioxide film (2020) is etched to obtain the first current blocking film (2001).

4. The method for preparing a light emitting diode according to claim 3, characterized in that: The thickness of the silicon dioxide film (2020) is 0.2 to 2 μm, and the thickness of the first photoresist mask (3001) is 0.2 to 2 μm.

5. The method for preparing a light emitting diode according to claim 3, characterized in that: A first photoresist mask (3001) is formed on the silicon dioxide film (2020), comprising: Depositing a layer of photoresist on the silicon dioxide film (2020) at a temperature of 100° C. to 110° C.; Exposing and developing the photoresist to obtain the first photoresist mask (3001); The first photoresist mask (3001) is baked in an environment with a temperature of 100°C to 120°C.

6. The method for preparing a light emitting diode according to claim 3, characterized in that: Under the protection of the first photoresist mask (3001), the silicon dioxide film (2020) is corroded to obtain the first current blocking film (2001), comprising: In an environment with a temperature of 20° C. to 25° C., the first current blocking film (2001) is etched using a BOE solution under the protection of the first photoresist mask (3001) to obtain a second current blocking film (2002).

7. The method for preparing a light emitting diode according to claim 1 or 2, characterized in that: Under the shielding of the first current blocking film (2001), the epitaxial structure (1000) is subjected to a patterning process, comprising: In an environment of a temperature of -25°C to -15°C and a pressure of 2.9 to 3.1 mt, using Cl2 and BCl3 etching gases to dry-etch the epitaxial structure (1000) shielded by the first current blocking film (2001); Wherein, the etching power of the dry etching is 220-300W, the Cl2 flow rate is 100-150sccm, and the BCl3 flow rate is 5-15sccm.

8. The method for preparing a light emitting diode according to claim 1 or 2, characterized in that: The step of performing a patterning process on the epitaxial structure (1000) under the shielding of the second current blocking film (2002) comprises: In an environment of a temperature of -5°C to 5°C and a pressure of 3.1 to 3.3 mt, using Cl2 and BCl3 etching gases to dry-etch the epitaxial structure (1000) shielded by the second current blocking film (2002); Wherein, the etching power of the dry etching is 1100-1300 W, the Cl2 flow rate is 100-140 sccm, and the BCl3 flow rate is 10-30 sccm.

9. The method for preparing a light emitting diode according to claim 1 or 2, characterized in that: The height of the step structure (120) is 1 to 2.5 μm.

10. A light emitting diode, characterized in that: The light emitting diode comprises: a substrate (100), an epitaxial structure (1000) and a current blocking layer (104); The epitaxial structure (1000) is located on the substrate (100), the epitaxial structure (1000) is provided with a step structure (120) and an isolation groove (130), the width of the step bottom surface of the step structure (120) is 5 to 6 μm; the current blocking layer (104) is located on the surface of the epitaxial structure (1000).

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