Storage device for managing super block and method of operating the same

Abstract

The invention relates to a storage device for managing a super block and a method of operating the storage device. Provided herein is a storage device having improved service life. The memory device may include: a memory device including a plurality of super blocks; and a controller configured to control the memory device in response to each of a plurality of requests from a host, where the controller is further configured to: allocate a first super block for a first write request of a first type, and allocating a second super block different from the first super block in response to a second write request of a second type, controlling the memory device to store write data corresponding to the first write request in the first super block, and after the second super block is deallocated, controlling the memory device to store the write data corresponding to the first write request in the first super block. When a second write request is received from the host before the second super block is reallocated, the memory device is controlled to store write data corresponding to the second write request in the first super block.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to Korean Patent Application No. 10-2023-0135117, filed on October 11, 2023, the disclosure of which is incorporated herein by reference in its entirety. Technical Field

[0003] Various embodiments of the present disclosure relate generally to a semiconductor device, and more particularly, to a storage device for managing a super block and a method of operating the storage device. Background Art

[0004] A storage device is a device that stores data under the control of a host such as a computer or a smart phone. The storage device may include a memory device that stores data and a controller that controls the memory device. The memory device may include a plurality of dies coupled to a plurality of channels, and each die may include a plurality of storage blocks.

[0005] The storage device may manage multiple storage blocks in super blocks. Each super block may be composed of multiple storage blocks, and a write operation may be performed in super blocks. Here, a separate super block may be allocated for various types of write requests from a host. For example, the storage device may allocate a super block corresponding to a sequential write request and / or a super block corresponding to a random write request.

[0006] When a sequential write request and a random write request are received simultaneously in a state where a super block of a corresponding type is allocated, the operation performance of the storage device can be improved. However, when only one of the sequential write request and the random write request is continuously received within a certain period of time, the super block corresponding to the other write request may not be used within the certain period of time. In this case, the availability of over-provisioning space related to the service life of the storage device may be reduced. Summary of the invention

[0007] Various embodiments of the present disclosure are directed to a memory device having an improved service life and a method of operating the memory device.

[0008] An embodiment of the present disclosure may provide a storage device. The storage device may include: a memory device including a plurality of super blocks, each super block including a plurality of storage blocks; and a controller configured to control the memory device in response to each of a plurality of requests from a host, wherein the controller is further configured to: allocate a first super block among the plurality of super blocks for a first write request among the plurality of requests from the host, and allocate a second super block among the plurality of super blocks for a second write request among the plurality of requests from the host, the second super block being different from the first super block, the first write request being a request of a first type, and the second write request being a request of a second type different from the first type; control the memory device to store write data corresponding to the first write request in the first super block; de-allocate at least one of the first super block and the second super block; and after the second super block is de-allocated, when a second write request is received from the host before the second super block is reallocated, control the memory device to store write data corresponding to the second write request in the first super block.

[0009] An embodiment of the present disclosure may provide a storage device. The storage device may include: a memory device including a plurality of super blocks, each super block including a plurality of storage blocks; and a controller configured to control the memory device in response to each of a plurality of requests from a host, wherein the controller is further configured to: allocate a first super block among the plurality of super blocks in response to a first write request among the plurality of requests from the host, the first write request being a request of a first type; allocate a second super block among the plurality of super blocks in response to a second write request among the plurality of requests from the host, the second write request being a request of a second type different from the first type; count the number of times the first write request is received from the host as a first count, and count the number of times the second write request is received from the host as a second count; and deallocate the first super block or the second super block based on the first count and the second count.

[0010] An embodiment of the present disclosure may provide a method for operating a storage device. The method may include: allocating storage areas for different types of write requests among requests from a host; monitoring the number of first-type write requests received from the host as a first count, and the number of second-type write requests received from the host as a second count, the second type being different from the first type; based on the first count and the second count, deallocating one of the storage areas corresponding to the first-type write requests and the second-type write requests, respectively; receiving the first-type write request from the host; determining whether the deallocated storage area corresponds to the first-type write request; and based on the result of the determination, storing the write data corresponding to the received first-type write request in one of the storage areas corresponding to the first-type write request and the second-type write request, respectively.

[0011] Other features, aspects, and advantages of embodiments of the present disclosure will become apparent from the following detailed description, drawings, and claims. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] Figure 1 is a diagram illustrating a storage device according to an embodiment of the present disclosure.

[0013] Figure 2 is a diagram illustrating a super block manager according to an embodiment of the present disclosure.

[0014] Figure 3 is a diagram illustrating a write operation performed on a super block according to an embodiment of the present disclosure.

[0015] Figure 4 is a diagram illustrating a write operation performed on a super block according to an embodiment of the present disclosure.

[0016] Figure 5 is a diagram illustrating a deallocated super block according to an embodiment of the present disclosure.

[0017] Figure 6 is a flowchart illustrating a method of operating a storage device according to an embodiment of the present disclosure.

[0018] Figure 7 is a flow chart illustrating a method of deallocating a super block according to an embodiment of the present disclosure.

[0019] Figure 8 is a flow chart illustrating a method of storing write data in a super block according to an embodiment of the present disclosure.

[0020] Fig. 9 is a diagram illustrating a controller according to an embodiment of the present disclosure. DETAILED DESCRIPTION

[0021] The specific structural or functional descriptions in the embodiments of the present disclosure introduced in this specification are provided only as examples to describe the embodiments conceived according to the present disclosure. The embodiments conceived according to the present disclosure can be practiced in various forms and should not be construed as being limited to the embodiments described in the specification or application.

[0022] Figure 1 is a diagram illustrating a storage device 50 according to an embodiment of the present disclosure.

[0023] Reference Figure 1 , the storage device 50 may include a memory device 100 and a controller 200 that controls the operation of the memory device 100. The storage device 50 may store data under the control of a host 300 such as a mobile phone, a smart phone, an MP3 player, a laptop computer, a desktop computer, a game console, a television (TV), a tablet computer, or an in-vehicle infotainment system.

[0024] The storage device 50 may be manufactured as any one of various types of storage devices according to a host interface as a communication scheme with the host 300. The storage device 50 may be manufactured in one of various types of packaging forms. For example, the storage device 50 may be manufactured in one of various types of packaging forms such as: stacked package (POP), system-in-package (SIP), system-on-chip (SOC), multi-chip package (MCP), chip-on-board (COB), wafer-level manufacturing package (WFP), and wafer-level stacked package (WSP).

[0025] The memory device 100 may store data. The memory device 100 may include a plurality of memory cells storing data.

[0026] The memory device 100 may include a plurality of dies DIE1 to DIEn. Each of the plurality of dies DIE1 to DIEn may include a plurality of memory blocks. Each memory block may include a plurality of memory cells. In an embodiment, the memory device 100 may be a nonvolatile memory. The plurality of dies DIE1 to DIEn may be connected to the controller 200 through different channels or one channel. Figure 3 , Figure 4 and Figure 5 , for ease of description, the number of dies DIE1 to DIEn is shown as four.

[0027] The memory device 100 may receive a command and an address from the controller 200. The memory device 100 may perform an operation indicated by the command on a region selected by the address. For example, the memory device 100 may perform a write operation, a read operation, and an erase operation.

[0028] The controller 200 may control the overall operation of the storage device 50 .

[0029] When power is applied to the memory device 50, the controller 200 may run firmware (FW). When the memory device 100 is a flash memory device, the firmware (FW) may include a host interface layer (HIL) that controls communication with the host 300, a flash translation layer (FTL) that controls communication between the host 300 and the memory device 100, and a flash interface layer (FIL) that controls communication with the memory device 100.

[0030] In an embodiment, the controller 200 may receive data and a logical block address (LBA) from the host 300, and may convert the logical block address (LBA) into a physical block address (PBA) indicating an address of a memory cell included in the memory device 100 and to store data. In this specification, the logical block address (LBA) and "logical address" may be used interchangeably. In this specification, the physical block address (PBA) and "physical address" may be used interchangeably.

[0031] The controller 200 may control the memory device 100 in response to a request received from the host 300 , thereby performing a write operation, a read operation, or an erase operation.

[0032] In an embodiment, the controller 200 may independently generate commands, addresses, and data regardless of whether a request from the host 300 is received, and may transmit them to the memory device 100. For example, the controller 200 may provide the memory device 100 with commands, addresses, and data required to perform read operations and program operations related to the performance of wear leveling, read reclamation, garbage collection, etc.

[0033] In an embodiment, the controller 200 may control the plurality of dies DIE1 to DIEn according to an interleaving scheme to improve operation performance. The interleaving scheme may be a scheme of controlling the plurality of dies DIE1 to DIEn such that operations of at least two of the dies DIE1 to DIEn overlap with each other. Figure 1 Unlike the example shown in FIG. 5 , when a plurality of memory devices are included in the storage device 50 , the controller 200 may control the plurality of memory devices according to an interleaving scheme.

[0034] In an embodiment, the controller 200 may include a processor 210 and a super block manager 260 .

[0035] The processor 210 may control the overall operation of the controller 200 .

[0036] In an embodiment, the processor 210 may execute firmware, code, or one or more instructions including various types of information required for the operation of the controller 200 .

[0037] The super block manager 260 may manage super blocks, each of which includes at least two memory blocks. Here, the memory blocks of each super block may be included in different dies or planes.

[0038] In an embodiment, the super block manager 260 may manage the super block according to the type of write request. For example, the first type of write request may include a sequential write request, and the second type of write request may include a random write request. The sequential write request may include a write request for consecutive data with a sequential address. The random write request may include a write request for non-consecutive data with a random address.

[0039] In an embodiment, when power is applied to the storage device 50, the Super Block Manager 260 may allocate a first Super Block corresponding to a sequential write request and a second Super Block corresponding to a random write request. Here, the first Super Block may include a Super Block for storing sequential write data corresponding to the sequential write request, and the second Super Block may include a Super Block for storing random write data corresponding to the random write request.

[0040] In an embodiment, when a sequential write request is received from the host 300, the processor 210 may control the memory device 100 to store the sequential write data in one of the first super block and the second super block according to whether the first super block has been allocated.

[0041] When a sequential write request is received from the host 300, the processor 210 may control the memory device 100 to store the sequential write data in one of the first super block and the second super block according to whether the first super block has been allocated.

[0042] The host 300 may communicate with the storage device 50 using at least one of various communication standards or interfaces such as: Universal Serial Bus (USB), Serial AT Attachment (SATA), Serial SCSI (SAS), High Speed ​​Inter-Chip (HSIC), Small Computer System Interface (SCSI), Peripheral Component Interconnect (PCI), PCI Express (PCIe), Non-Volatile Memory Express (NVMe), Universal Flash Storage (UFS), Secure Digital (SD), MultiMedia Card (MMC), Embedded MMC (eMMC), Dual In-line Memory Module (DIMM), Registered DIMM (RDIMM), and Load Reduced DIMM (LRDIMM) communication methods.

[0043] Figure 2 is a diagram illustrating the super block manager 260 according to an embodiment of the present disclosure.

[0044] Reference Figure 2, the super block manager 260 may include a write request counter 261 and a super block controller 262 .

[0045] The write request counter 261 may count a sequential write request count COUNT_SEQ and a random write request count COUNT_RAN, wherein the sequential write request count COUNT_SEQ indicates the number of times a sequential write request WRITE_SEQ is received, and the random write request count COUNT_RAN indicates the number of times a random write request WRITE_RAN is received.

[0046] In an example, when a sequential write request WRITE_SEQ is received from the host 300, the write request counter 261 may increase the sequential write request count COUNT_SEQ by a specific value, for example, one (1). In an example, when a random write request WRITE_RAN is received from the host 300, the write request counter 261 may increase the random write request count COUNT_RAN by a specific value, for example, one (1).

[0047] In an embodiment, when one of the sequential write request count COUNT_SEQ and the random write request count COUNT_RAN reaches a reference value, the write request counter 261 may initialize the sequential write request count COUNT_SEQ and the random write request count COUNT_RAN to a specific value, for example, zero (0).

[0048] In an embodiment, the Super Block Controller 262 may allocate the First Super Block and / or the Second Super Block (ie, OPENSUPBLK), or deallocate the First Super Block and / or the Second Super Block (ie, CLOSE SUPBLK).

[0049] For example, if the first super block has not been allocated when receiving the sequential write request WRITE_SEQ, the storage device 50 can allocate the first super block. In addition, if the second super block has not been allocated when receiving the random write request WRITE_RAN, the storage device 50 can allocate the second super block.

[0050] In an embodiment, the super block manager 260 may deallocate the first super block or the second super block based on the sequential write request count COUNT_SEQ and the random write request count COUNT_RAN. For example, the super block manager 260 may determine a super block that is not used within a certain period of time in the first super block and the second super block based on the sequential write request count COUNT_SEQ and the random write request count COUNT_RAN, and may deallocate the determined super block.

[0051] Figure 3is a diagram illustrating a write operation performed on a super block according to an embodiment of the present disclosure.

[0052] Reference Figure 3 , a first super block SUPBLK1 corresponding to a sequential write request WRITE_SEQ and a second super block SUPBLK2 corresponding to a random write request may be allocated. Each of the first super block SUPBLK1 and the second super block SUPBLK2 may include storage blocks contained in different dies. Although in this specification, the storage blocks of the corresponding super block are described as being contained in different dies, the present disclosure is not limited thereto. For example, each of the plurality of dies DIE1 to DIE4 may include a plurality of planes, and the storage blocks of the corresponding super block may be included in different planes.

[0053] The controller 200 may receive a sequential write request WRITE_SEQ and sequential write data DATA and a logical block address (LBA) corresponding to the sequential write request WRITE_SEQ from the host 300 .

[0054] In an embodiment, the controller 200 may determine whether the first super block SUPBLK1 has been allocated. Since the first super block SUPBLK1 has been allocated, the controller 200 may control the memory device 100 to store the sequential write data DATA in the first super block SUPBLK1. For example, the controller 200 may generate a write command CMD indicating a write operation in response to a sequential write request WRITE_SEQ. In addition, the controller 200 may convert a logical block address (LBA) into a physical block address (PBA_SUPBLK1) indicating one of the plurality of memory blocks included in the first super block SUPBLK1. The controller 200 may provide the write command CMD, the sequential write data DATA, and the physical block address (PBA_SUPBLK1) to the memory device 100.

[0055] Although in Figure 3 1 and 2 describe a write operation corresponding to a sequential write request WRITE_SEQ when both the first super block SUPBLK1 and the second super block SUPBLK2 are allocated, but a write operation corresponding to a random write request may also be applicable. For example, when a random write request is received from the host 300, the controller 200 may control the memory device 100 to store random write data corresponding to the random write request in the second super block SUPBLK2.

[0056] Figure 4 is a diagram illustrating a write operation performed on a super block according to an embodiment of the present disclosure.

[0057] Reference Figure 4, the first super block SUPBLK1 corresponding to the sequential write request may be allocated. The second super block SUPBLK2 corresponding to the random write request WRITE_RAN may not have been allocated yet.

[0058] The controller 200 may receive a random write request WRITE_RAN and random write data DATA and a logical block address (LBA) corresponding to the random write request WRITE_RAN from the host 300 .

[0059] In an embodiment, the controller 200 may determine whether the second super block SUPBLK2 has been allocated. Since the second super block SUPBLK2 has not been allocated, the controller 200 may control the memory device 100 to store the random write data DATA in the first super block SUPBLK1. For example, the controller 200 may generate a write command CMD indicating a write operation in response to a random write request WRITE_RAN. In addition, the controller 200 may convert a logical block address (LBA) into a physical block address (PBA_SUPBLK1) indicating one of the plurality of memory blocks included in the first super block SUPBLK1. The controller 200 may provide the memory device 100 with a write command CMD, random write data DATA, and a physical block address (PBA_SUPBLK1).

[0060] In an embodiment, the controller 200 may allocate the second super block SUPBLK2 in response to a random write request WRITE_RAN. For example, the controller 200 may allocate the second super block SUPBLK2 by opening a second super block SUPBLK2 including a plurality of memory blocks included in different dies. When a random write request WRITE_RAN is received after the second super block SUPBLK2 is allocated, the controller 200 may control the memory device 100 to store the random write data DATA in the second super block SUPBLK2.

[0061] Although in Figure 4 , the write operation corresponding to the random write request WRITE_RAN when the second super block SUPBLK2 has not been allocated is described, but the write operation corresponding to the sequential write request when the first super block SUPBLK1 has not been allocated is also applicable. For example, when a sequential write request is received from the host 300 in a state where the first super block SUPBLK1 has not been allocated, the controller 200 can control the memory device 100 to store the sequential write data corresponding to the sequential write request in the second super block SUPBLK2.

[0062] Figure 5 is a diagram illustrating a deallocated super block according to an embodiment of the present disclosure.

[0063] Reference Figure 5 , a first super block SUPBLK1 corresponding to a sequential write request WRITE_SEQ and a second super block SUPBLK2 corresponding to a random write request WRITE_RAN may be allocated.

[0064] In an embodiment, the controller 200 may determine whether the sequential write request count COUNT_SEQ or the random write request count COUNT_RAN has reached a reference value N. For example, after receiving a sequential write request from the host 300, the controller 200 may determine whether the sequential write count COUNT_SEQ has reached a reference value N. When the sequential write request count COUNT_SEQ reaches the reference value N, the controller 200 may determine whether the random write request count COUNT_RAN is zero (0), that is, an initialization value. When it is determined that the random write request count COUNT_RAN is zero (0), the controller 200 may determine that the second super block SUPBLK2 has not been used for a certain period of time. In this case, the controller 200 may shut down the second super block SUPBLK2. That is, when the sequential write request count COUNT_SEQ reaches the reference value N and the random write request count COUNT_RAN is zero (0), the controller 200 may deallocate the second super block SUPBLK2.

[0065] Furthermore, since the sequential write request count COUNT_SEQ has reached the reference value N, the controller 200 may initialize the sequential write request count COUNT_SEQ and the random write request count COUNT_RAN.

[0066] Although in Figure 5 , an embodiment of deallocating the second super block SUPBLK2 is shown, but the embodiment is not limited thereto, and the embodiment can also be applied to the case of deallocating the first super block SUPBLK1. For example, after receiving a random write request from the host 300, the controller 200 can compare the random write request count COUNT_RAN and the sequential write request count COUNT_SEQ with a reference value N and zero (0), respectively. When the random write request count COUNT_RAN reaches the reference value N and the sequential write request count COUNT_SEQ is zero (0), the controller 200 can deallocate the first super block SUPBLK1.

[0067] Figure 6 is a flowchart illustrating a method of operating a storage device according to an embodiment of the present disclosure. Figure 6 The method shown can be performed, for example, by Figure 1 The storage device 50 shown executes.

[0068] Reference Figure 6, in operation S601, the storage device 50 may allocate a first super block corresponding to a first write request of a first type.

[0069] In step S603, the storage device 50 may allocate a second super block corresponding to a second write request of a second type different from the first type. In an embodiment, when the first write request is a sequential write request, the second write request may be a random write request. In another embodiment, when the first write request is a random write request, the second write request may be a sequential write request.

[0070] In operation S605 , the storage device 50 may receive a first write request and a second write request from the host 300 .

[0071] In operation S607 , the storage device 50 may store pieces of write data corresponding to the first write request and the second write request in the first super block and the second super block, respectively.

[0072] In operation S609, the storage device 50 may monitor a first count and a second count. The first count may indicate the number of times the first write request is received from the host 300. The second count may indicate the number of times the second write request is received from the host 300. For example, the storage device 50 may increase the first count in response to receiving the first write request from the host 300. In addition, the storage device 50 may increase the second count in response to receiving the second write request from the host 300. In addition, the storage device 50 may initialize the first count and the second count in response to one of the first count and the second count reaching a reference value.

[0073] In operation S611, the storage device 50 may deallocate one of the first super block and the second super block based on the first count and the second count.

[0074] In operation S613 , the storage device 50 may receive a first write request from the host 300 .

[0075] In operation S615, the storage device 50 may store write data corresponding to the first write request in one of the first super block and the second super block according to whether the first super block has been allocated.

[0076] Figure 7 is a flow chart illustrating a method of deallocating a super block according to an embodiment of the present disclosure. Figure 7 The method shown can be performed, for example, by Figure 1 The storage device 50 shown is executed. Specifically, Figure 7 It is shown Figure 6 A diagram of an implementation of operations S609 and S611 is shown.

[0077] Reference Figure 7 , in operation S701 , the storage device 50 may receive a first write request from the host 300 .

[0078] In operation S703 , the storage device 50 may increase the first count.

[0079] In operation S705 , the storage device 50 may determine whether the first count has reached a reference value N.

[0080] When it is determined in operation S705 that the first count has not reached the reference value N (“No”), the corresponding operation may be terminated.

[0081] When it is determined in operation S705 that the first count has reached the reference value N (“Yes”), the storage device 50 may determine whether the second count is zero (0) in operation S707 .

[0082] When it is determined that the second count is zero (0) (“Yes”) in operation S707 , the storage device 50 may deallocate the second super block in operation S709 .

[0083] In operation S711, the storage device 50 may initialize the first count and the second count. In addition, when it is determined in operation S707 that the second count is not zero (0) ("No"), the storage device 50 may perform operation S711 instead of operation S709.

[0084] Figure 8 is a flow chart illustrating a method of storing write data in a super block according to an embodiment of the present disclosure. Figure 8 The method shown can be performed, for example, by Figure 1 The storage device 50 shown is executed. Specifically, Figure 8 It can be shown Figure 6 A diagram of an implementation of operation S615 is shown.

[0085] Reference Figure 8 , in operation S801, the storage device 50 may determine whether a first super block has been allocated.

[0086] When it is determined in operation S801 that the first super block has been allocated (“Yes”), the storage device 50 may store the write data in the first super block in operation S803 .

[0087] On the other hand, when it is determined in operation S801 that the first super block has not been allocated (“No”), the storage device 50 may store the write data in the second super block in operation S805 .

[0088] In operation S807 , the storage device 50 may reallocate the first super block.

[0089] In operation S809 , the storage device 50 may move the write data corresponding to the first write request and stored in the second super block to the first super block. In an embodiment, the storage device 50 may move the write data during a period in which no request from the host 300 is received.

[0090] Fig. 9 is a diagram illustrating a controller 200 according to an embodiment of the present disclosure.

[0091] Reference Fig. 9 , the controller 200 may include a processor 210, a memory 220, an error correction circuit 230, a host interface 240, a memory interface 250, a super block manager 260, and a communication bus 270. Fig. 9 The processor 210 and the super block manager 260 correspond to Figure 1 The processor 210 and the super block manager 260 are described below, and thus a detailed description thereof will be omitted.

[0092] The memory 220 may be used as a buffer memory, a cache memory, a working memory, or the like.

[0093] In addition, the memory 220 may store firmware, code, or one or more instructions including various types of information required for the operation of the controller 200 .

[0094] The error correction circuit 230 may perform error correction. The error correction circuit 230 may perform error correction code (ECC) encoding based on data to be written to the memory device 100. The encoded data may be transmitted to the memory device 100 through the memory interface 250. The error correction circuit 230 may perform ECC decoding on data received from the memory device 100 through the memory interface 250. In an example, the error correction circuit 230 may be included in the memory interface 250 as a component of the memory interface 250.

[0095] The controller 200 may communicate with an external device (eg, the host 300 , an application processor, etc.) through the host interface 240 .

[0096] The controller 200 may communicate with the memory device 100 through the memory interface 250. The controller 200 may send commands, addresses, control signals, etc. to the memory device 100 through the memory interface 250, and receive data DATA from the memory device 100.

[0097] The processor 210 , the memory 220 , the error correction circuit 230 , the host interface 240 , the memory interface 250 , and the super block manager 260 of the controller 200 may communicate with each other through the communication bus 270 .

[0098] In an embodiment, when a write request is received from the host 300 through the host interface 240, the processor 210 may determine whether a super block corresponding to the write request has been allocated. Depending on whether the super block has been allocated, the processor 210 may generate a command instructing to store the write data in one of the allocated super block and the additional super block.

[0099] In an embodiment, the Super Block Manager 260 may determine a Super Block that has not been used for a certain period of time based on the number of times a write request is received (ie, a write request count), and may deallocate the determined Super Block.

[0100] According to the present disclosure, a memory device having an improved service life and a method of operating the memory device are provided.

[0101] Although the present disclosure has been shown and described with reference to certain embodiments, it will be appreciated by those skilled in the art that various changes in form and detail may be made to the present disclosure without departing from the scope of the present disclosure and its equivalents. Therefore, the scope of the present disclosure should not be limited to the above-mentioned embodiments, but should include its equivalents.

[0102] In the above-mentioned embodiments, all operations may be selectively performed, or some operations may be omitted. In various embodiments, these operations are not necessarily performed in the order described, and may be rearranged. The embodiments disclosed in this specification and the accompanying drawings are merely examples for facilitating understanding of the present disclosure, and the present disclosure is not limited thereto. That is, it is obvious to those skilled in the art that various modifications may be made on the basis of the technical scope of the present disclosure.

[0103] The embodiments of the present disclosure have been described in the drawings and the specification. Although specific terms are used herein, these terms are only used to describe the embodiments of the present disclosure. Therefore, the present disclosure is not limited to the above-mentioned embodiments, and many modifications can be made within the scope of the present disclosure. It is obvious to those skilled in the art that, in addition to the embodiments disclosed herein, various modifications can also be made on the basis of the technical scope of the present disclosure. In addition, the embodiments can be combined to form other embodiments.

Claims

1. A storage device, comprising: A memory device including a plurality of super blocks, each super block including a plurality of storage blocks; as well as a controller that controls the memory device in response to each of a plurality of requests from a host, Wherein, the controller further: allocating a first super block among the plurality of super blocks to a first write request among the plurality of requests from the host, and allocating a second super block among the plurality of super blocks to a second write request among the plurality of requests from the host, the second super block being different from the first super block, the first write request being a first type of request, and the second write request being a second type of request different from the first type, controlling the memory device to store write data corresponding to the first write request in the first super block, deallocating at least one of the first super block and the second super block, and After the second super block is deallocated, upon receiving the second write request from the host before the second super block is reallocated, controlling the memory device to store write data corresponding to the second write request in the first super block.

2. The storage device according to claim 1, wherein: The first write request includes one of a sequential write request and a random write request.

3. The storage device according to claim 1, wherein: The controller further reallocates the second super block in response to the second write request.

4. The storage device according to claim 1, wherein: The controller further controls the memory device to store write data corresponding to the second write request in the second super block when receiving the second write request from the host after reallocating the second super block.

5. The storage device according to claim 1, wherein: The controller further counts the number of times the first write request is received from the host as a first count, and counts the number of times the second write request is received from the host as a second count.

6. The storage device according to claim 5, wherein: The controller further determines at least one super block of the first super block and the second super block that has not been used for a certain period of time based on the first count and the second count, and deallocates the determined super block.

7. A storage device, comprising: A memory device including a plurality of super blocks, each super block including a plurality of storage blocks; as well as a controller that controls the memory device in response to each of a plurality of requests from a host, Wherein, the controller further: In response to a first write request from the host, a first super block from among the plurality of super blocks is allocated, the first write request being a request of a first type, allocating a second super block among the plurality of super blocks in response to a second write request among the plurality of requests from the host, the second write request being a second type of request different from the first type, counting the number of times the first write request is received from the host as a first count, and counting the number of times the second write request is received from the host as a second count, and The first Super Block or the second Super Block is deallocated based on the first count and the second count.

8. The storage device according to claim 7, wherein: The controller further increases the first count upon receiving the first write request from the host, and increases the second count upon receiving the second write request from the host.

9. The storage device according to claim 7, wherein: The controller further initializes the first count and the second count when one of the first count and the second count reaches a reference value.

10. The storage device according to claim 7, wherein: The controller further de-allocates the second super block when the first count reaches the reference value and the second count is zero, and When the second count reaches the reference value and the first count is zero, ie, 0, the first super block is deallocated.

11. The storage device according to claim 7, wherein: The controller further receives the first write request from the host, and controls the memory device to store write data corresponding to the first write request in one of the first super block and the second super block according to whether the first super block has been allocated.

12. The storage device according to claim 11, wherein: The controller further controls the memory device to store write data corresponding to the first write request in the first super block when the first super block has been allocated.

13. The storage device according to claim 11, wherein: The controller further controls the memory device to store write data corresponding to the first write request in the second super block when the first super block is not allocated.

14. A method of operating a storage device, comprising: Allocating storage areas for different types of write requests among requests from a host; monitoring the number of times a first type of write request is received from the host as a first count, and the number of times a second type of write request is received from the host as a second count, the second type being different from the first type; de-allocating one of the storage areas corresponding to the first type of write request and the second type of write request, respectively, based on the first count and the second count; receiving a write request of the first type from the host; determining whether the deallocated storage area corresponds to the first type of write request; as well as Based on the result of the determination, write data corresponding to the received first type write request is stored in one of the storage areas corresponding to the first type write request and the second type write request, respectively.

15. The method according to claim 14, wherein: The monitoring includes: When receiving a write request of the first type, increasing the first count; When receiving a write request of the second type, increasing the second count; and In response to determining that one of the first count and the second count reaches a reference value, the first count and the second count are initialized.

16. The method according to claim 15, wherein: The deallocation includes: in response to determining that the second count reaches the reference value and the first count is zero, deallocating the storage area corresponding to the first type of write request, The determining comprises: determining that the deallocated storage area corresponds to the first type of write request, Storing the write data includes storing the write data in a storage area corresponding to the second type of write request.

17. The method according to claim 16, further comprising: When the write data is stored in the storage area corresponding to the write request of the second type, reallocating the storage area corresponding to the write request of the first type; as well as moving the write data stored in the storage area corresponding to the second type of write request to the reallocated storage area corresponding to the first type of write request, The movement is performed during a period in which no request from the host is received.

18. The method according to claim 15, wherein: The deallocation includes: In response to determining that the first count reaches the reference value and the second count is zero (0), a storage area corresponding to the second type of write request is de-allocated.

19. The method according to claim 18, wherein: The determining comprises: determining that the deallocated storage area does not correspond to the first type of write request, Storing the write data includes storing the write data in a storage area corresponding to the first type of write request.

20. The method of claim 14, further comprising: receiving, from the host prior to deallocation, a write request of the first type and a write request of the second type; as well as A plurality of pieces of write data corresponding to the first type of write request and the second type of write request, respectively, are stored in storage areas corresponding to the first type of write request and the second type of write request, respectively.

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