Packaging device and manufacturing method thereof

Abstract

The embodiment of the invention provides a packaging device and a manufacturing method thereof, and the manufacturing method of the packaging device comprises the steps: providing a packaging device chip which comprises a substrate, a device unit located on the substrate, and a connection bonding pad connected with the device unit; wherein a cavity is formed between the device unit and the substrate, and the cavity is filled with a sacrificial layer; forming a connection structure on the connection bonding pad; the connecting structure is used for electrically connecting an external circuit; and removing the sacrificial layer in the cavity so as to form a cavity structure between the device unit and the substrate.

Description

Technical Field

[0001] The embodiments of the present disclosure relate to the field of semiconductor technology, and more particularly to a packaging device and a method for manufacturing the same. Background Art

[0002] As a new generation of chip packaging technology, chip scale package (CSP) has been widely used due to its advantages such as high density, miniaturization and high performance.

[0003] However, with the continuous development of semiconductor technology, the industry has put forward higher requirements for packaging devices, and the packaging devices obtained using traditional chip-level packaging technology are difficult to meet the growing requirements. Summary of the invention

[0004] In view of this, an embodiment of the present disclosure provides a packaging device and a method for manufacturing the same.

[0005] The technical solution of the present disclosure is achieved as follows:

[0006] In a first aspect, an embodiment of the present disclosure provides a method for manufacturing a packaged device, the method comprising:

[0007] A packaged device chip is provided, the packaged device chip comprising a substrate, a device unit located on the substrate, and a connection pad connected to the device unit; wherein a cavity is formed between the device unit and the substrate, and a sacrificial layer is filled in the cavity;

[0008] forming a connection structure on the connection pad; the connection structure is used to electrically connect to an external circuit;

[0009] The sacrificial layer in the chamber is removed to form a cavity structure between the device unit and the substrate.

[0010] In some embodiments, before forming the connection structure on the connection pad, the manufacturing method further includes:

[0011] A transition layer is formed on the connecting pad; the transition layer is used to assist in forming the connecting structure on the connecting pad.

[0012] In some embodiments, forming a connection structure on the connection pad includes:

[0013] The connection structure is formed on the connection pad by using a copper column electroplating process; or,

[0014] The connection structure is formed on the connection pad by using a gold ball implantation process.

[0015] In some embodiments, forming a connection structure on the connection pad includes:

[0016] The connection structure is formed on the connection pad by using a process of printing solder paste and high temperature reflow; or,

[0017] The connection structure is formed on the connection pad by using a solder ball planting process.

[0018] In some embodiments, before removing the sacrificial layer in the chamber, the manufacturing method further includes:

[0019] The back side of the substrate is thinned.

[0020] In some embodiments, thinning the back side of the substrate includes:

[0021] After forming the transition layer on the connection pad and before forming the connection structure on the connection pad, thinning the back side of the substrate; or,

[0022] After forming the connection structure on the connection pad, the back side of the substrate is thinned.

[0023] In some embodiments, after removing the sacrificial layer in the chamber, the manufacturing method further includes:

[0024] Performing a first frequency modulation on the device unit so that the frequency of the device unit is equal to a target frequency; wherein after the first frequency modulation is performed on the device unit, the connection structure has a first height in a direction perpendicular to the substrate;

[0025] The packaged device chip is cut to obtain a plurality of packaged devices; wherein, in a direction perpendicular to the substrate, the connection structure is higher than the device unit, and the size of the packaged device is equal to the maximum distance from a side of the substrate away from the connection structure to the connection structure.

[0026] In some embodiments, before forming the connection structure on the connection pad, the manufacturing method further includes:

[0027] performing a second frequency modulation on the device unit so as to make the frequency of the device unit close to the target frequency;

[0028] The forming of a connection structure on the connection pad comprises:

[0029] A first connection structure is formed on the connection pad; the first connection structure has a second height in a direction perpendicular to the substrate, and a difference between the second height and the first height is less than a preset threshold.

[0030] In some embodiments, forming a connection structure on the connection pad includes:

[0031] A second connection structure is formed on the connection pad; the second connection structure has a third height in a direction perpendicular to the substrate, and a difference between the third height and the first height is greater than a preset threshold.

[0032] In some embodiments, the device unit is provided with an etching hole, and the sacrificial layer is connected to the outside through the etching hole; and removing the sacrificial layer in the chamber includes:

[0033] The sacrificial layer in the chamber is removed through the etched hole.

[0034] In a second aspect, an embodiment of the present disclosure provides a packaging device, which is manufactured according to the manufacturing method in the above embodiment.

[0035] In some embodiments, the packaging device is applied to module products; or, the packaging device is applied to products that do not require substrate packaging.

[0036] The present disclosure provides a packaging device, the packaging device comprising:

[0037] substrate;

[0038] A device unit, located on the substrate;

[0039] A cavity structure, located between the device unit and the substrate;

[0040] A connecting pad connected to the device unit;

[0041] A connection structure, located on the connection pad; the connection structure is used to electrically connect to an external circuit;

[0042] Wherein, in a direction perpendicular to the substrate, the connection structure is higher than the device unit, and the size of the packaged device is equal to the maximum distance from a side of the substrate away from the connection structure to the connection structure.

[0043] The embodiment of the present disclosure provides a method for manufacturing a packaged device, the method comprising: providing a packaged device chip, the packaged device chip comprising a substrate, a device unit located on the substrate, and a connection pad connected to the device unit; wherein a chamber is formed between the device unit and the substrate, and the chamber is filled with a sacrificial layer; forming a connection structure on the connection pad; the connection structure is used to electrically connect an external circuit; removing the sacrificial layer located in the chamber to form a cavity structure between the device unit and the substrate. In the embodiment of the present disclosure, after completing the front-end process of the FBAR, a connection structure is first formed on the connection pad, and then the sacrificial layer located in the chamber is removed to form a cavity structure, which effectively avoids damage to the cavity structure caused by the introduction of external pressure during the process of forming the connection structure. BRIEF DESCRIPTION OF THE DRAWINGS

[0044] Figure 1 is a schematic diagram of the structure of a packaging device in an example;

[0045] Figure 2 A schematic diagram of the structure of a packaging device provided in an embodiment of the present disclosure;

[0046] Figure 3 A flow chart of a method for manufacturing a packaged device provided in an embodiment of the present disclosure;

[0047] 4A to 4F A step diagram of a method for manufacturing a packaging device provided by an embodiment of the present disclosure;

[0048] FIG. 5A to FIG. 5B A step diagram of a method for manufacturing a first connection structure provided by an embodiment of the present disclosure;

[0049] FIG. 6A to FIG. 6B A step diagram of a method for manufacturing a second connection structure provided by an embodiment of the present disclosure;

[0050] 7A to 7C A step diagram of a method for manufacturing a third connection structure provided by an embodiment of the present disclosure;

[0051] FIG. 8A to FIG. 8C A step diagram of a method for manufacturing a packaged device in an example and a corresponding electron microscope image of the packaged device;

[0052] 9A to 9C 1 is a step diagram of a method for manufacturing a packaged device in an embodiment of the present disclosure and a corresponding electron microscope image of the packaged device. DETAILED DESCRIPTION

[0053] The following will be combined with the embodiments of the present disclosure and the accompanying drawings to clearly and completely describe the technical solutions in the embodiments of the present disclosure. Obviously, the described embodiments are only part of the embodiments of the present disclosure, not all of the embodiments. Based on the embodiments of the present disclosure, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present disclosure.

[0054] In the following description, a large number of specific details are given to provide a more thorough understanding of the present disclosure. However, it is obvious to those skilled in the art that the present disclosure can be implemented without one or more of these details. In other examples, in order to avoid confusion with the present disclosure, some technical features known in the art are not described; that is, all features of actual embodiments are not described here, and well-known functions and structures are not described in detail.

[0055] In the drawings, the sizes of layers, regions, elements and their relative sizes may be exaggerated for clarity. Like reference numerals denote like elements throughout.

[0056] It should be understood that when an element or layer is referred to as "on ...", "adjacent to ...", "connected to" or "coupled to" other elements or layers, it can be directly on, adjacent to, connected to or coupled to other elements or layers, or there can be intervening elements or layers. On the contrary, when an element is referred to as "directly on ...", "directly adjacent to ...", "directly connected to" or "directly coupled to" other elements or layers, there is no intervening element or layer. It should be understood that although the terms first, second, third, etc. can be used to describe various elements, components, regions, layers and / or parts, these elements, components, regions, layers and / or parts should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or part from another element, component, region, layer or part. Therefore, without departing from the teachings of the present disclosure, the first element, component, region, layer or part discussed below can be represented as the second element, component, region, layer or part. And when the second element, component, region, layer or part is discussed, it does not indicate that the present disclosure necessarily has the first element, component, region, layer or part.

[0057] Spatially relative terms such as "under", "beneath", "below", "under", "above", "above", etc., may be used here for convenience of description to describe the relationship between an element or feature shown in the figure and other elements or features. It should be understood that in addition to the orientation shown in the figure, the spatial relationship terms are intended to also include different orientations of the device in use and operation. For example, if the device in the accompanying drawings is turned over, then the elements or features described as "under other elements" or "under it" or "under it" will be oriented as "on" other elements or features. Therefore, the exemplary terms "under" and "under" may include both upper and lower orientations. The device can be oriented otherwise (rotated 90 degrees or other orientations) and the spatial descriptors used herein are interpreted accordingly.

[0058] The purpose of the terms used herein is only to describe specific embodiments and is not intended to be a limitation of the present disclosure. When used herein, the singular forms "one", "an" and "said / the" are also intended to include plural forms, unless the context clearly indicates otherwise. It should also be understood that the terms "consisting of" and / or "comprising", when used in this specification, determine the presence of the features, integers, steps, operations, elements and / or parts, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, parts and / or groups. When used herein, the term "and / or" includes any and all combinations of the relevant listed items.

[0059] In order to thoroughly understand the present disclosure, detailed steps and detailed structures will be presented in the following description to illustrate the technical solution of the present disclosure. The preferred embodiments of the present disclosure are described in detail below, but in addition to these detailed descriptions, the present disclosure may also have other implementations.

[0060] Film Bulk Acoustic Resonator (FBAR) filters are gradually replacing traditional surface acoustic wave filters and ceramic filters due to their excellent properties such as small size, high resonant frequency, high quality factor, large power capacity, and good roll-off effect. They are occupying an increasingly large market share in the field of RF filters and playing a huge role in the 5G wireless communication RF field.

[0061] At present, CSP packaging technology is usually used to package FBAR filters. Figure 1 , Figure 1 A schematic diagram of the structure of a packaging device in an example.

[0062] like Figure 1As shown, the FBAR filter includes a substrate 101, a cavity structure 102, a first electrode 103, a piezoelectric layer 104, and a second electrode 105 sequentially formed on the substrate 101, and a connection pad 106 electrically connected to the first electrode 103 or the second electrode 105. The cavity structure 102, the first electrode 103, the second electrode 105, and the piezoelectric layer 104 located between the first electrode 103 and the second electrode 105 together constitute a resonance unit. Figure 1 In the embodiment, the FBAR filter is soldered on the substrate 108 through the solder ball 107 by using the CSP packaging method. Here, the solder ball 107 is usually a gold ball, and the process of forming the gold ball on the connection pad 106 of the FBAR filter is also called the gold ball planting process. In the process of planting the gold ball, the gold balls usually need to be placed one by one on the connection pad 106 of the FBAR filter. Afterwards, the FBAR filter is packaged with an epoxy molding compound (EMC) material to form a packaged device 100.

[0063] Here, it should be noted that although CSP packaging has certain advantages over traditional packaging methods. However, there are still some disadvantages in packaging FBAR filters using CSP packaging. Specifically, they are: 1. The production cycle of CSP packaging is long; 2. Since substrates and gold balls are required in CSP packaging, the material cost is high; 3. The size of the packaged device 100 is larger than that of the FBAR filter, which is not conducive to the miniaturization of the packaged device 100.

[0064] In view of this, the embodiments of the present disclosure provide a packaging device and a manufacturing method thereof. The packaging device has a shorter production cycle, a simpler process flow, a lower material cost and a smaller size to meet the needs of miniaturization.

[0065] An embodiment of the present disclosure provides a packaging device, which includes: a substrate; a device unit located on the substrate; a cavity structure located between the device unit and the substrate; a connecting pad connected to the device unit; a connecting structure located on the connecting pad; the connecting structure is used to electrically connect to an external circuit; wherein, in a direction perpendicular to the substrate, the connecting structure is higher than the device unit, and the size of the packaging device is equal to the maximum distance from a side of the substrate away from the connecting structure to the connecting structure.

[0066] Before introducing the packaged device provided by the embodiment of the present disclosure, various directions that may be involved in the embodiment of the present disclosure are first defined. The direction perpendicular to the substrate is defined as the Z direction, and the X direction and the Y direction are defined in a plane perpendicular to the Z direction, and the X direction and the Y direction may intersect. In a specific embodiment, the X direction and the Y direction may be perpendicular to each other, so that the X direction, the Y direction, and the Z direction may be perpendicular to each other.

[0067] Figure 2 This is a schematic diagram of the structure of the packaging device provided by the embodiment of the present disclosure. Figure 2 As shown, the packaged device 200 is a packaged device based on an FBAR filter. The packaged device 200 includes a substrate 201, a device unit 202, a cavity structure 203, a connecting pad 204 and a connecting structure 205. Among them, the device unit 202 is formed on the substrate 201, and the device unit 202 includes a first electrode 206, a piezoelectric layer 207 and a second electrode 208 stacked in sequence in the Z direction. The cavity structure 203 is located on the substrate 201 and is located between the device unit 202 and the substrate 201. The cavity structure 203 extends away from the side of the substrate 201 along the Z direction, that is, the cavity structure 203 is an upward convex cavity. The cavity structure 102 and the device unit 202 together constitute a FBAR resonant structure. The connecting pad 204 is electrically connected to the first electrode 206 lead or the second electrode 208 lead of the device unit 202. Here, the substrate 201, the cavity structure 203, the device unit 202 and the connection pad 204 together form a FBAR filter, that is, a FBAR filter die. The connection structure 205 is located on the connection pad 204, and the connection structure 205 is used to realize the electrical connection between the FBAR filter and the external circuit.

[0068] Here, it should be noted that in order to prevent the device unit 202 in the FBAR filter from being crushed when the FBAR filter is electrically connected to an external circuit, the connection structure 205 needs to be higher than the device unit 202 in the Z direction, such as Figure 2 As shown. In addition, according to the vibration principle of the FBAR filter, in order to ensure that the FBAR filter can work properly, it is necessary that there is air on both sides of the device unit 202 in the Z direction. In this way, the connection structure 205 also needs to be higher than the device unit 202 in the Z direction. Figure 2 The size of the packaged device 200 in the Z direction is expressed as the distance between the top of the connecting structure 205 and the bottom of the substrate 201. In other words, the size of the packaged device 200 in the Z direction is equal to the maximum distance from the side of the substrate 201 away from the connecting structure 205 to the connecting structure 205.

[0069] In the disclosed embodiment, the packaging device 200 is actually a wafer-level packaged packaging device 200 composed of an FBAR filter die and a connection structure 205. The packaging device 200 can be effectively applied to module products or other products that do not require substrate packaging. Here, taking a module product as an example, the module product generally includes multiple integrated filters, and both the inductor and the capacitor can be integrated on the module substrate. Therefore, the FBAR filter packaging device can be externally connected to the module substrate by directly connecting the connection structure, without the need for a packaging substrate. In this way, the module product integrating multiple filters is then uniformly packaged. Moreover, for products that do not require substrate packaging, the FBAR filter packaging device can also be externally connected to an external circuit board by directly connecting the connection structure, and there is no need for a packaging substrate. In this way, compared to Figure 1 Compared with the packaged device 100 in the embodiment of the present disclosure, the packaged device 200 in the embodiment of the present disclosure can omit the additional package substrate and epoxy molding compound, thereby effectively simplifying the process flow, reducing the size of the packaged device 200 and reducing the cost.

[0070] Figure 3 A flow chart of a method for manufacturing a packaged device provided in an embodiment of the present disclosure.

[0071] like Figure 3 As shown, an embodiment of the present disclosure provides a method for manufacturing a packaged device, the method for manufacturing a packaged device comprising:

[0072] Step S301: providing a packaged device chip, the packaged device chip comprising a substrate, a device unit located on the substrate, and a connecting pad connected to the device unit; wherein a cavity is formed between the device unit and the substrate, and the cavity is filled with a sacrificial layer.

[0073] Step S302: forming a connection structure on the connection pad; the connection structure is used to electrically connect to an external circuit.

[0074] Step S303: removing the sacrificial layer in the chamber to form a cavity structure between the device unit and the substrate.

[0075] 4A to 4F A step diagram of a method for manufacturing a packaging device provided in an embodiment of the present disclosure.

[0076] in, Figure 4A Corresponding to step S301, Figure 4B Corresponding to step S302, Figure 4D Corresponding to step S303.

[0077] like Figure 4AAs shown, in step S301, a packaged device chip 400 is provided. Here, the packaged device chip 400 may be an FBAR filter chip, which may be manufactured based on a series of front-end processes. The FBAR filter chip includes a substrate 401, a chamber 402, a device unit 403, and a connecting pad 404. The device unit 403 is located on the substrate 401. In some embodiments, the device unit 403 includes a first electrode 405 (also called a lower electrode), a piezoelectric layer 406, and a second electrode 407 (also called an upper electrode) stacked in sequence in the Z direction. In other embodiments, the device unit 403 also includes a frequency modulation layer located on the second electrode 407. The chamber 402 is formed on the substrate 401 and is formed between the substrate 401 and the device unit 403. Here, the chamber 402 may be an upper convex chamber or a lower concave chamber. In this embodiment, the chamber 402 is an upper convex chamber, that is, the chamber 402 extends along a side away from the substrate 401 in the Z direction. The chamber 402 is filled with a sacrificial layer 408 , which is used to provide physical support for the device unit 403 when it is formed.

[0078] In the embodiment of the present disclosure, the constituent material of the substrate 401 may include one of silicon (Si), germanium (Ge) and silicon-on-insulator (SOI).

[0079] In the embodiment of the present disclosure, the constituent materials of the first electrode 405 and the second electrode 407 may be the same, and may specifically include: tungsten (W), copper (Cu), aluminum (Al), molybdenum (Mo), ruthenium (Ru), iridium (Ir), platinum (Pt), etc. The constituent materials of the piezoelectric layer 406 may include: materials with piezoelectric properties, such as lithium niobate (LiNbO3), lithium tantalate (LiTaO3), aluminum nitride (AlN), scandium aluminum nitride (AlScN), lead zirconate titanate (PZT) or zinc oxide (ZnO), etc.

[0080] In the embodiment of the present disclosure, the material of the sacrificial layer 408 includes oxide, such as silicon dioxide.

[0081] In the embodiment of the present disclosure, the material of the connection pad 404 includes but is not limited to aluminum (Al), copper (Cu), and gold (Au).

[0082] In some embodiments, the device unit 403 is provided with an etched hole, and the sacrificial layer 408 is connected to the outside through the etched hole.

[0083] In the disclosed embodiment, the etched hole ( Figure 4AThe etched hole (not shown) can extend from the surface of the device unit 403 to contact the sacrificial layer 408. Specifically, the etched hole can penetrate one or two layers of the first electrode 405, the second electrode 407, and the piezoelectric layer 406 to contact the sacrificial layer 408. In addition, the structures in the device unit 403 (for example, the first electrode 405, the second electrode 407, the piezoelectric layer 406) penetrated by the etched holes located at different positions of the device unit 403 may also be different. In the actual process, the specific layer penetrated depends on the setting position of the etched hole. In the embodiment of the present disclosure, since the sacrificial layer 408 can be connected to the outside through the etched hole, in the subsequent etching process, the etching gas can contact the sacrificial layer 408 through the etched hole, so that the sacrificial layer 408 can be etched away.

[0084] like Figure 4B As shown, after providing the packaged device chip 400, a connection structure 409 may be formed on the connection pad 404. In the Z direction, the connection structure 409 is higher than the device unit 403. Thus, the connection structure 409 may realize the electrical connection between the packaged device chip 400 and the external circuit.

[0085] It should be noted that Figure 4B The connection structure 409 in the figure is only used as an illustration. In the embodiment of the present disclosure, different connection structures 409 can be formed on the connection pad 404 through different processes. Below, each process for forming the connection structure 409 and the connection structure 409 formed by the process are specifically described.

[0086] In the first process of forming the connection structure, the connection structure is formed on the connection pad by using a gold ball implantation process.

[0087] FIG. 5A to FIG. 5B A step diagram of a method for manufacturing a first connection structure provided in an embodiment of the present disclosure.

[0088] like Figure 5A As shown, a packaged device chip 400 is provided. Here, Figure 5A Can correspond to Figure 4A .

[0089] In some embodiments, before forming a connection structure on the connection pad 404 , the method for manufacturing a packaged device further includes: forming a transition layer on the connection pad 404 ; the transition layer is used to assist in forming a connection structure on the connection pad 404 .

[0090] refer to Figure 5A In the embodiment of the present disclosure, before forming the connection structure, a transition layer ( Figure 5A not shown).

[0091] like Figure 5BAs shown, after the transition layer is formed, a connection structure 501 is formed on the connection pad 404 using a gold ball implantation process. Specifically, an ultrasonic welding process is used to melt the gold wire into a gold ball and place it on the connection pad 404 to form a connection structure 501 of gold material. In another embodiment, the gold ball implantation process does not require the formation of a transition layer and can directly form a gold ball on the connection pad 404.

[0092] In the second process of forming the connection structure, the connection structure is formed on the connection pad by using a copper pillar electroplating process.

[0093] FIG. 6A to FIG. 6B A step diagram of a method for manufacturing a second connection structure provided in an embodiment of the present disclosure.

[0094] like Fig. 6A As shown, a packaged device chip 400 is provided. Here, Fig. 6A Can correspond to Figure 4A .

[0095] In some embodiments, before forming a connection structure on the connection pad 404 , the method for manufacturing a packaged device further includes: forming a transition layer on the connection pad 404 ; the transition layer is used to assist in forming a connection structure on the connection pad 404 .

[0096] like Figure 6B As shown, a seed layer ( Figure 6B The seed layer can provide connection energy for the subsequent electroplating process. Afterwards, the copper pillar 601 can be grown on the seed layer by electroplating. At this time, the seed layer and the copper pillar 601 together form a transition layer, which has excellent electrical properties, thermal properties and reliability, and can effectively improve the welding performance of the connection structure 602.

[0097] like Figure 6B As shown, after forming the transition layer, a copper column electroplating process is used to form a connection structure 602 on the connection pad 404. Specifically, after forming the transition layer, tin solder is placed on the copper column 601, and then a connection structure 602 of tin material is formed on the copper column 601 by reflow soldering.

[0098] 7A to 7C A step diagram of a method for manufacturing a third connection structure provided in an embodiment of the present disclosure.

[0099] like Fig. 7A As shown, a packaged device chip 400 is provided. Here, Fig. 7A Can correspond to Figure 4A .

[0100] In some embodiments, before forming a connection structure on the connection pad 404 , the method for manufacturing a packaged device further includes: forming a transition layer on the connection pad 404 ; the transition layer is used to assist in forming a connection structure on the connection pad 404 .

[0101] like Figure 7B As shown, a transition layer 701 is formed on the connection pad 404. Here, the transition layer 701 includes a UBM layer. The UBM layer can be used to prevent the connection pad 404 from being oxidized and to improve the bonding degree between the connection pad 404 and the connection structure formed subsequently.

[0102] In the disclosed embodiment, the material of the UBM layer includes but is not limited to one or more combinations of nickel, gold, and copper. In one embodiment, the UBM layer includes two layers, a layer close to the connection pad 404 is upper nickel or copper, and gold is formed on the nickel or copper to form a UBM layer.

[0103] In some embodiments, the transition layer 701 may further include a soldering flux formed on the UBM layer. The soldering flux can assist soldering to improve soldering performance.

[0104] like Figure 7C As shown, after forming the transition layer 701 on the connection pad 404, a connection structure 702 is formed on the connection pad 404. Here, the connection structure 702 may be a solder ball electrically connected to the connection pad 404, and the connection structure 702 is used to electrically connect to an external circuit.

[0105] In the embodiment of the present disclosure, when the transition layer 701 includes a UBM layer, the connection structure 702 may be formed by the third and fourth processes for forming the connection structure 702 described below.

[0106] In the third process of forming the connection structure, the connection structure 702 is formed on the connection pad 404 by using the process of printing solder paste and high temperature reflow.

[0107] Specifically, solder paste may be printed on the UBM layer, and then melted by reflow soldering to obtain the connection structure 702 located on the transition layer 701 .

[0108] In the fourth process of forming the connection structure, the connection structure 702 is formed on the connection pad 404 by using a solder ball implantation process.

[0109] Specifically, a solder ball is placed on the solder flux on the UBM layer, and then the solder ball is melted by reflow soldering to obtain a connection structure 702 located on the transition layer 701 .

[0110] Here, it should be noted that, in the disclosed embodiment, among the four ways of forming the connection structure, the use of the gold ball implantation process requires forming gold balls one by one on the connection pad 404, while the use of the electroplating copper pillar process, the process of printing solder paste and high-temperature reflow, and the solder ball implantation process can simultaneously form multiple solder balls on the front side of the packaged device chip 400. Therefore, compared with the gold ball implantation process, the latter three ways of forming the connection structure can more effectively reduce the process time and improve work efficiency.

[0111] Continue to refer Figure 4C In some embodiments, before removing the sacrificial layer 408 in the chamber 402 , the method for manufacturing a packaged device further includes: thinning the back side of the substrate 401 .

[0112] In the embodiment of the present disclosure, when thinning the back side of the substrate 401, the packaged device chip 400 may be turned over so that the substrate 401 of the packaged device chip 400 faces upward. Afterwards, a chemical mechanical polishing (CMP) process may be used to thin the back side of the substrate 401. In some embodiments, the substrate 401 may be thinned to less than 250 μm.

[0113] In one embodiment, the back side of the substrate 401 is thinned, including: after forming a transition layer on the connecting pad 404 and before forming a connecting structure 409 on the connecting pad 404, the back side of the substrate 401 is thinned, that is, after forming the transition layer, the substrate is thinned and then the connecting structure 409 is formed.

[0114] In the embodiment of the present disclosure, the order of the process of forming the connection structure 409 and the process of thinning the back side of the substrate 401 can be interchanged. Therefore, in another embodiment, thinning the back side of the substrate 401 includes: after forming the connection structure 409 on the connection pad 404, thinning the back side of the substrate 401, such as Figure 4C shown.

[0115] In some embodiments, before thinning the back side of the substrate 401, a protective layer may be covered on the surface of the packaged device chip 400, and the protective layer is used to prevent the device unit 403 from being damaged when the substrate 401 is thinned after the packaged device chip 400 is turned over. In addition, after thinning the back side of the substrate 401, the protective layer covering the surface of the packaged device chip 400 may be removed. It should be noted that, since the side of the protective layer in contact with the device unit 403 has a certain degree of stickiness, the device unit 403 will be subjected to a certain pulling force in the Z direction and in the direction away from the substrate 401 during the process of lifting the protective layer.

[0116] In one example, after removing the sacrificial layer 408 in the chamber 402, the back side of the substrate 401 is thinned, and after thinning, the protective layer on the surface of the packaged device chip 400 is removed. It can be understood that since the sacrificial layer 408 is removed, part of the structure of the device unit 403 is suspended, and the compressive resistance of the device unit 403 is reduced. At this time, if the protective layer covering the device unit 403 is opened, the device unit 403 may be deformed or damaged under the tensile force of the protective layer, thereby affecting the performance of the FBAR filter.

[0117] In the embodiment of the present disclosure, the back side of the substrate 401 is thinned before the sacrificial layer 408 in the chamber 402 is removed, and the protective layer on the surface of the packaged device chip 400 is removed after the thinning. In the process of removing the protective layer, the sacrificial layer 408 in the chamber 402 below the device unit 403 can provide a certain tensile support for the device unit 403, thereby improving the compressive resistance of the device unit 403. In this way, the influence of the tensile force of the protective layer on the device unit 403 during the process of removing the protective layer can be effectively reduced, thereby effectively improving the performance of the FBAR filter.

[0118] In some embodiments, step S303 includes: removing the sacrificial layer 408 in the chamber 402 by etching a hole.

[0119] like Figure 4D As shown, since the sacrificial layer 408 passes through the etched hole ( Figure 4D The chamber 402 is connected to the outside (not shown), and therefore, the sacrificial layer 408 located in the chamber 402 can be removed by an etching process to form a cavity structure between the device unit 403 and the substrate 401.

[0120] In the embodiment of the present disclosure, the etching process for removing the sacrificial layer 408 includes but is not limited to a dry etching process and a wet etching process.

[0121] Here, it should be noted that, in the embodiment of the present disclosure, the process step of forming the transition layer needs to be located before the process step of removing the sacrificial layer 408. This is because a series of photolithography processes are required in the process of forming the transition layer (for example, the UBM layer). The photolithography process requires a layer of photoresist to be spin-coated on the surface of the packaged device chip 400. If the transition layer is formed after removing the sacrificial layer 408 located in the chamber 402, the photoresist will enter the cavity structure through the etched hole, thereby affecting the performance of the FBAR filter. In the embodiment of the present disclosure, the process step of forming the transition layer is located before the process step of removing the sacrificial layer 408, which can effectively avoid the impact on the performance of the FBAR filter caused by the photoresist entering the cavity structure.

[0122] Furthermore, it should be noted that, in the embodiment of the present disclosure, the process step of removing the sacrificial layer 408 located in the chamber 402 needs to be located after the process step of forming the connection structure 409 on the connection pad 404. This is because in the process of forming the connection structure 409, a series of high-pressure cleaning operations may be involved, so that the device unit 403 is subjected to a certain water washing pressure and steel mesh pressure. It is understandable that after removing the sacrificial layer 408 located in the chamber 402, a cavity structure is formed under the device unit 403, which makes the pressure resistance of the device unit 403 worse. At this time, if the connection structure 409 is formed on the connection pad 404, it may cause the device unit 403 to break and collapse, thereby causing the cavity structure to be damaged.

[0123] FIG. 8A to FIG. 8C It is a step diagram of a manufacturing method of a packaged device in an example and a corresponding electron microscope image of the packaged device.

[0124] Combination Fig. 8A and Figure 8B In one example, after forming the packaged device chip, the sacrificial layer in the chamber 801 is first removed, and then the connection structure 803 is formed on the connection pad 802.

[0125] like Figure 8C As shown, after the connection structure 803 is formed, it is observed using a scanning electron microscope that the device unit is broken (as shown in the dotted box) and the cavity structure is severely damaged.

[0126] In the embodiment of the present disclosure, the process step of forming the connection structure is located before the process step of removing the sacrificial layer, so that when the connection structure is formed, the sacrificial layer located below the device unit can provide stable support for the device unit, so that in the process of forming the connection structure, the device unit will not collapse due to external pressure, thereby effectively improving the performance of the FBAR filter.

[0127] 9A to 9C 1 is a step diagram of a method for manufacturing a packaged device in an embodiment of the present disclosure and a corresponding electron microscope image of the packaged device.

[0128] Combination Fig. 9A and Fig. 9B In the embodiment of the present disclosure, after forming the packaged device chip, a connection structure 902 is first formed on the connection pad 901, and then the sacrificial layer 904 located in the cavity 903 is removed.

[0129] like Fig. 9C As shown, after removing the sacrificial layer 904 in the chamber 903, it is observed using a transmission electron microscope that the device unit is intact (as shown in the dotted box) and the cavity structure is not affected.

[0130] In some embodiments, after step S303, the method for manufacturing a packaged device further includes: performing a first frequency modulation on the device unit so that the frequency of the device unit is equal to the target frequency; wherein, after the first frequency modulation on the device unit, the connection structure has a first height in a direction perpendicular to the substrate.

[0131] like Figure 4E As shown, after removing the sacrificial layer 408 in the chamber 402, the device unit 403 is subjected to the first frequency modulation. Exemplarily, the frequency modulation layer on the second electrode 407 can be bombarded with a laser or an ion beam to thin the frequency modulation layer, so that the frequency of the device unit 403 is equal to the target frequency. Here, it should be noted that in the process of performing the first frequency modulation on the device unit 403, the connection structure 409 is also affected by the laser or the ion beam, so that the height of the connection structure 409 is appropriately reduced. Figure 4E In the embodiment, after the device unit 403 is first frequency modulated, the connection structure 409 has a first height H1 in the Z direction, and in the direction perpendicular to the substrate (ie, the Z direction), the connection structure 409 is higher than the device unit 403 .

[0132] From the above, it can be seen that, during the first frequency modulation of the device unit 403, the connection structure 409 will be affected by the laser or ion beam, so that the height of the connection structure 409 is reduced. And the larger the frequency modulation amplitude of the first frequency modulation, the more the height of the connection structure 409 is reduced. Therefore, when the frequency modulation amplitude is greater than a certain preset range, the height of the connection structure 409 will drop to a level that is difficult to meet the design requirements. Exemplarily, when the frequency modulation amplitude is greater than 30MHz, the height of the connection structure 409 may drop by about 5μm. At this time, the height of the connection structure 409 in the Z direction may not meet the design requirements. Based on this, the embodiments of the present disclosure propose two feasible solutions to solve the above problems. Specifically as follows:

[0133] In the first solution, the embodiment of the present disclosure adds an additional frequency modulation process. Specifically, when the amplitude of the frequency modulation is greater than the preset range, before the connection structure 409 is formed on the connection pad 404, the device unit is frequency modulated in advance, that is, the device unit is subjected to a second frequency modulation, so that the frequency of the device unit 403 is close to the target frequency. Here, the process of performing the second frequency modulation on the device unit 403 can refer to the first frequency modulation. Exemplarily, the frequency modulation amplitude of the second frequency modulation can be 0 to 30MHz. After the second frequency modulation is performed on the device unit 403, the frequency of the device unit 403 changes from the initial frequency (that is, the frequency before the second frequency modulation is performed) to a frequency close to the target frequency. In this way, in the subsequent process of the first frequency modulation, the frequency modulation amplitude of the device unit 403 is reduced, and the height change of the connection structure 409 is also reduced accordingly, so that the height of the connection structure 409 can meet the design requirements.

[0134] Here, it should be noted that, when using the first solution, a first connection structure can be formed on the connecting pad 404; wherein the first connection structure has a second height H2 in a direction perpendicular to the substrate, and the difference between the second height H2 and the first height H1 is less than a preset threshold. Here, the preset threshold may correspond to the height drop value of the connection structure 409 caused by the frequency modulation when the amplitude of the frequency modulation is greater than the preset range. In other words, when the height drop value of the connection structure 409 is less than the preset threshold, the height of the connection structure 409 can meet the design requirements. In one example, the preset threshold may be 5μm. In other embodiments, other preset thresholds may be set according to the design requirements of products of different specifications.

[0135] In the embodiment of the present disclosure, since the first connection structure 409 has not been formed during the second frequency modulation, and the first frequency modulation has little effect on the height of the first connection structure in the Z direction, after the first frequency modulation, the height of the first connection structure in the Z direction changes little. At this time, the difference between the second height H2 and the first height H1 can be less than the preset threshold, and the height of the first connection structure in the Z direction can meet the design requirements.

[0136] In the disclosed embodiment, the initial height of the first connection structure in the Z direction (ie, the second height H2) can be approximately equal to the design value, which can be understood as the first height H1 of the first connection structure in the Z direction after the first frequency modulation.

[0137] In the second solution, the embodiment of the present disclosure adjusts the size of the connection structure 409. Specifically, when the amplitude of the frequency modulation is greater than the preset range, a second connection structure is formed on the connection pad 404; the second connection structure has a third height H3 in a direction perpendicular to the substrate 401, and the difference between the third height H3 and the first height H1 is greater than the preset threshold. In other words, in the second solution, no additional frequency modulation process is added, but only the initial height of the second connection structure in the Z direction (i.e., the third height H3) is increased. Here, the initial height of the second connection structure in the Z direction is greater than the initial height of the first connection structure in the Z direction.

[0138] In the second solution, the manufacturing process of the FBAR filter includes only one frequency modulation process, namely the first frequency modulation. Because when the frequency modulation amplitude of the first frequency modulation is greater than the preset range, the first frequency modulation has a greater impact on the height of the second connecting structure in the Z direction. In this way, after the first frequency modulation, the change in the height of the second connecting structure in the Z direction is greater than the preset threshold. At this time, in order to ensure that the height of the second connecting structure in the Z direction can meet the design requirements, it is necessary to make the second connecting structure have a larger initial height in the Z direction. Here, the initial size of the connecting structure can be adjusted by a process correction method. Exemplarily, the initial height of the second connecting structure is 5μm higher than the design value H1. Here, the second connecting structure can have a larger initial height by increasing the solder (for example, increasing the amount of tin) or increasing the transition layer to ensure that after the first frequency modulation, the height of the second connecting structure in the Z direction can meet the design requirements.

[0139] like Figure 4F As shown, in some embodiments, after the first frequency modulation is performed on the device unit 403, the method for manufacturing the packaged device also includes: cutting the packaged device chip 400 to obtain a plurality of packaged devices 410; wherein, in a direction perpendicular to the substrate, the size of the packaged device 410 is equal to the maximum distance L1 from one side of the substrate 401 away from the connecting structure 409 to the connecting structure 409.

[0140] In the embodiment of the present disclosure, the packaged device chip 400 may be a wafer, and the packaged device 410 obtained after cutting the packaged device chip 400 is actually a semiconductor bare die, and the packaging method of the packaged device 410 is wafer-level packaging. Thus, in the Z direction, the size of the packaged device 410 is equal to the size of the semiconductor bare die. In other words, in the Z direction, the size of the packaged device 410 is equal to the maximum distance L1 from the side of the substrate 401 away from the connection structure 409 (i.e., the bottom surface of the substrate 401) to the connection structure 409.

[0141] In the disclosed embodiment, after the packaged device chip 400 is cut to obtain a plurality of packaged devices 410, the packaged device 410 can also be tape-wound, that is, a sample is tape-wound through chip probing (CP) yield MAP to obtain a single packaged product.

[0142] In summary, the packaged device prepared in the embodiment of the present disclosure adopts wafer-level packaging, which does not require an additional packaging substrate. Therefore, compared with the traditional CSP packaging solution, the embodiment of the present disclosure can effectively simplify the manufacturing process of the packaged device, shorten the production time, and reduce the packaging cost.

[0143] An embodiment of the present disclosure provides a packaging device, which is manufactured according to the manufacturing method in the above embodiment.

[0144] Based on the above, it can be known that the size of the packaged device provided by the embodiment of the present disclosure in the Z direction is equal to the maximum distance from the side of the substrate away from the connection structure to the connection structure. In other words, the size of the packaged device in the Z direction is consistent with the size of the designed semiconductor die in the Z direction, and no other packaging devices are added in the X or Y direction. In this way, compared with the traditional CSP packaged device, the packaged device provided by the embodiment of the present disclosure has a smaller size, which is conducive to the miniaturization of the packaged device.

[0145] In some embodiments, the packaging device is applied to a module product; or, the packaging device is applied to a product that does not require substrate packaging.

[0146] The disclosed embodiment provides a method for manufacturing a packaged device, the method comprising: providing a packaged device chip, the packaged device chip comprising a substrate, a device unit located on the substrate, and a connection pad connected to the device unit; wherein a chamber is formed between the device unit and the substrate, and a sacrificial layer is filled in the chamber; a connection structure is formed on the connection pad; the connection structure is used to electrically connect an external circuit; and the sacrificial layer located in the chamber is removed to form a cavity structure between the device unit and the substrate. In the disclosed embodiment, after the front-end process of the FBAR is completed, a connection structure is first formed on the connection pad, and then the sacrificial layer located in the chamber is removed to form a cavity structure, which effectively avoids damage to the cavity structure caused by the introduction of external pressure during the process of forming the connection structure.

[0147] It should be understood that "one embodiment" or "an embodiment" mentioned throughout the specification means that specific features, structures or characteristics related to the embodiment are included in at least one embodiment of the present disclosure. Therefore, "in one embodiment" or "in an embodiment" appearing throughout the specification does not necessarily refer to the same embodiment. In addition, these specific features, structures or characteristics can be combined in one or more embodiments in any suitable manner. It should be understood that in the various embodiments of the present disclosure, the size of the serial number of the above-mentioned processes does not mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present disclosure. The serial numbers of the embodiments of the present disclosure are for description only and do not represent the advantages and disadvantages of the embodiments.

[0148] The above description is only a preferred embodiment of the present disclosure, and does not limit the patent scope of the present disclosure. All equivalent structural changes made by using the contents of the present disclosure and the drawings under the inventive concept of the present disclosure, or directly / indirectly applied in other related technical fields are included in the patent protection scope of the present disclosure.

Claims

1. A method for manufacturing a packaged device, characterized in that: include: A packaged device chip is provided, the packaged device chip comprising a substrate, a device unit located on the substrate, and a connection pad connected to the device unit; wherein a cavity is formed between the device unit and the substrate, and a sacrificial layer is filled in the cavity; forming a connection structure on the connection pad; the connection structure is used to electrically connect to an external circuit; The sacrificial layer in the chamber is removed to form a cavity structure between the device unit and the substrate.

2. The manufacturing method according to claim 1, characterized in that: Before forming the connection structure on the connection pad, the manufacturing method further includes: A transition layer is formed on the connecting pad; the transition layer is used to assist in forming the connecting structure on the connecting pad.

3. The manufacturing method according to claim 2, characterized in that: The forming of a connection structure on the connection pad comprises: The connection structure is formed on the connection pad by using a copper column electroplating process; or, The connection structure is formed on the connection pad by using a gold ball implantation process.

4. The manufacturing method according to claim 2, characterized in that: The forming of a connection structure on the connection pad comprises: The connection structure is formed on the connection pad by using a process of printing solder paste and high temperature reflow; or, The connection structure is formed on the connection pad by using a solder ball planting process.

5. The manufacturing method according to claim 4, characterized in that: Before removing the sacrificial layer in the chamber, the manufacturing method further includes: The back side of the substrate is thinned.

6. The manufacturing method according to claim 5, characterized in that: The thinning of the back side of the substrate comprises: After forming the transition layer on the connection pad and before forming the connection structure on the connection pad, thinning the back side of the substrate; or, After forming the connection structure on the connection pad, the back side of the substrate is thinned.

7. The manufacturing method according to any one of claims 1 to 6, characterized in that: After removing the sacrificial layer in the chamber, the manufacturing method further includes: Performing a first frequency modulation on the device unit so that the frequency of the device unit is equal to a target frequency; wherein after the first frequency modulation is performed on the device unit, the connection structure has a first height in a direction perpendicular to the substrate; The packaged device chip is cut to obtain a plurality of packaged devices; wherein, in a direction perpendicular to the substrate, the connection structure is higher than the device unit, and the size of the packaged device is equal to the maximum distance from a side of the substrate away from the connection structure to the connection structure.

8. The manufacturing method according to claim 7, characterized in that: Before forming the connection structure on the connection pad, the manufacturing method further includes: performing a second frequency modulation on the device unit so as to make the frequency of the device unit close to the target frequency; The forming of a connection structure on the connection pad comprises: A first connection structure is formed on the connection pad; the first connection structure has a second height in a direction perpendicular to the substrate, and a difference between the second height and the first height is less than a preset threshold.

9. The manufacturing method according to claim 7, characterized in that: The forming of a connection structure on the connection pad comprises: A second connection structure is formed on the connection pad; the second connection structure has a third height in a direction perpendicular to the substrate, and a difference between the third height and the first height is greater than a preset threshold.

10. The manufacturing method according to claim 1, characterized in that: The device unit is provided with an etching hole, and the sacrificial layer is connected to the outside through the etching hole; and removing the sacrificial layer in the chamber includes: The sacrificial layer in the chamber is removed through the etched hole.

11. A packaging device, characterized in that: The packaged device is manufactured according to any one of the manufacturing methods described in claims 1-10.

12. The packaged device according to claim 11, characterized in that: The packaging device is applied to module products; or, the packaging device is applied to products that do not require substrate packaging.

13. A packaged device, characterized in that: include: substrate; A device unit, located on the substrate; A cavity structure, located between the device unit and the substrate; A connecting pad connected to the device unit; A connection structure, located on the connection pad; the connection structure is used to electrically connect to an external circuit; Wherein, in a direction perpendicular to the substrate, the connection structure is higher than the device unit, and the size of the packaged device is equal to the maximum distance from a side of the substrate away from the connection structure to the connection structure.

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