Semiconductor circuit, parallel semiconductor circuit and manufacturing method thereof

Abstract

The invention discloses a semiconductor circuit, a parallel semiconductor circuit and a manufacturing method thereof, the semiconductor circuit comprises a circuit substrate, a circuit wiring layer, a circuit element, a packaging body and a pin, one end of the pin extends outwards from one side of the packaging body, the pin is further provided with a connecting port, the connecting port is used for being connected with pins of different semiconductor circuits, and the circuit wiring layer is arranged on the circuit substrate. The packaging body is further provided with mounting holes capable of allowing the output pins to be inserted therein, the mounting holes correspond to the connecting ports of the pins, superposition of the semiconductor circuits can be achieved by sequentially connecting the semiconductor circuits in a matched mode, electric control miniaturization is achieved, electric control arrangement is more flexible, and cost is lower. The connection method can be flexibly applied to occasions of various current levels, and the working requirement of larger current can be met only by increasing the number of the semiconductor circuits connected in parallel.

Description

Technical Field

[0001] The present invention belongs to the field of semiconductor technology, and in particular relates to a semiconductor circuit, a parallel semiconductor circuit and a manufacturing method thereof. Background Art

[0002] The semiconductor circuit IPM (Intelligent PowrModule) not only integrates the power switch device and the drive circuit, but also has built-in fault detection circuits such as overvoltage, overcurrent and overheating, and can send the detection signal to the CPU or DSP for interrupt processing. It consists of a high-speed, low-power consumption tube core, an optimized gate-level drive circuit and a fast protection circuit. Even if a load accident or improper use occurs, the IPM itself will not be damaged. IPM generally uses IGBT as a power switch element, and has an integrated structure of a current sensor and a drive circuit.

[0003] The existing IPM semiconductor circuit, IC drive control circuit, IPM sampling amplifier circuit, PFC current protection circuit and other low-voltage control circuits and the inverter circuit composed of high-voltage power devices are arranged on the same board. At the same time, the existing IPM semiconductor circuits only integrate a single IPM module, and the integration of multiple IPM semiconductor circuits has not yet been realized. In the face of market miniaturization and low-cost competition, higher requirements are placed on the high integration and high heat dissipation technology of IPM semiconductor circuits. Summary of the invention

[0004] An object of the present invention is to provide a semiconductor circuit, a parallel semiconductor circuit and a method for manufacturing the same, which can solve at least one of the above problems.

[0005] According to one aspect of the present invention, there is provided a semiconductor circuit, comprising a circuit substrate, the circuit substrate comprising a mounting surface; a circuit wiring layer, the circuit wiring layer being arranged on the mounting surface; a circuit element, the circuit element being arranged on the circuit wiring layer; a package body, the package body at least partially covering the circuit substrate; a pin, which is arranged on the circuit wiring layer, and one end of the pin protrudes outward from one side of the package body; wherein the pin is also provided with a connection port, the connection port being used to connect with the pins of different semiconductor circuits, and the package body is also provided with a mounting hole for accommodating the insertion of the output pin, the mounting hole corresponding to the connection port of the pin.

[0006] In some embodiments, a limiting structure is further provided on the inner wall of the mounting hole.

[0007] In some embodiments, the limiting structure includes relatively arranged tilting pieces, one end of which is fixed to the inner wall of the mounting hole.

[0008] In some embodiments, the semiconductor circuit further includes a plurality of bonding wires, wherein the bonding wires are connected between the circuit elements, the circuit wiring layer, and the pins.

[0009] In some embodiments, the circuit elements include chip resistors, chip capacitors, and circuit chips, and the chip resistors, chip capacitors, and circuit chips are mounted on the circuit wiring layer, respectively.

[0010] In some embodiments, an insulating layer is provided between the circuit substrate and the circuit wiring layer.

[0011] In some embodiments, a protective layer is further provided on the surface of the circuit wiring layer.

[0012] In some embodiments, the end of the pin extending outward is serrated.

[0013] In a second aspect, the present application provides a parallel semiconductor circuit, including a control circuit and the semiconductor circuit as described above, wherein the control circuit and the semiconductor circuit are connected, and a plurality of the semiconductor circuits are respectively inserted into another semiconductor circuit through pins and connected to the connection port.

[0014] In a third aspect, the present application provides a method for manufacturing the parallel semiconductor circuit according to the above, comprising the following steps:

[0015] configuring a circuit substrate, and configuring a circuit wiring layer on a surface of the circuit substrate;

[0016] preparing a pin, and opening a connection port at one end of the pin;

[0017] Arrange circuit elements and pins in the circuit wiring layer;

[0018] Electrically connecting the circuit elements and the circuit wiring layer through bonding wires;

[0019] The circuit substrate provided with the circuit wiring layer and the plurality of pins is injection molded through a packaging mold to form a sealing body, the sealing body is provided with a mounting hole corresponding to the connection port, and one end of the pin provided with a connection portion is led out from the side of the sealing body to form the semiconductor circuit;

[0020] A plurality of semiconductor circuits are prepared in a cycle, and the semiconductor circuits are sequentially inserted into the mounting holes of another semiconductor circuit through pins, and are matched and connected with the connecting ports of the pins of another semiconductor circuit to form parallel semiconductor circuits.

[0021] The beneficial effects of the present invention are as follows: by connecting multiple semiconductor circuits in sequence, the superposition of multiple semiconductor circuits can be achieved, the electronic control can be miniaturized, the electronic control layout can be more flexible, and the cost can be lowered; this connection method can be flexibly applied to occasions of various current levels, and the working requirements of larger currents can be achieved by simply increasing the number of parallel semiconductor circuits; since this parallel method can be flexibly replaced and increased or decreased, it can not only adapt to usage scenarios of different power, but also when one of the semiconductor circuits fails, it only needs to be replaced separately without scrapping the entire product, which not only reduces costs but also improves rework efficiency; through this parallel process, only one control circuit is needed to complete the control of multiple parallel semiconductor circuits, which reduces production costs and simplifies procedures and processes. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figure 1 is a schematic structural diagram of a semiconductor circuit embodiment of the present application;

[0023] Figure 2 is a schematic structural diagram of a semiconductor circuit embodiment of the present application;

[0024] Figure 3 is a partial structural schematic diagram of a semiconductor circuit embodiment of the present application;

[0025] Figure 4 This is a circuit diagram of a semiconductor circuit embodiment of the present application.

[0026] Figure 5 It is a flow chart of the parallel semiconductor circuit of the present application. DETAILED DESCRIPTION

[0027] The present invention will be further described in detail below in conjunction with the accompanying drawings.

[0028] See also Figure 1 to Figure 4A semiconductor circuit includes a circuit substrate 200, which is made of a metal material and includes a mounting surface 201 and a relative heat dissipation surface; a circuit wiring layer (not shown in the figure), which is arranged on the mounting surface 201. The circuit wiring layer can be formed by etching copper foil or by printing a paste-like conductive medium. The conductive medium can be a conductive material such as graphene, solder paste, silver glue, etc. Circuit routing is formed on the circuit wiring layer, and a plurality of connection pads for mounting circuit elements 400 and pins 300 are provided for connecting the routing; circuit element 400, which is arranged on the circuit wiring layer; package body 100, which at least partially covers the circuit substrate 200; pin 300, which is arranged on the circuit wiring layer, and one end of pin 300 extends outward from one side of package body 100; wherein pin 300 is also provided with connection port 301, which is used to connect with pin 300 of different semiconductor circuits, and package body 100 is also provided with mounting hole 101 for accommodating insertion of output pin 300, which corresponds to connection port 301 of pin 300; optionally, the end of one end of pin 300 extending outward is serrated, and the shape of connection port 301 corresponds to the end of the pin.

[0029] In some embodiments, the inner wall of the mounting hole 101 is further provided with a limiting structure 102. Through the limiting structure 102, when the pin 300 of another semiconductor circuit extends into the mounting hole 101, after contacting the limiting structure 102, the pin 300 can be clamped in the mounting hole 101 to prevent the pin 300 from moving or sliding out after connection, thereby improving assembly efficiency. Figure 2 and Figure 3 The limiting structure 102 includes relatively arranged lift pieces, wherein one end of the lift piece is fixed on the inner wall of the mounting hole 101 .

[0030] In actual use, two lifters can be provided. When two semiconductor circuits are connected in coordination, the pin 300 of the first semiconductor circuit is inserted along the mounting hole 101 of the other semiconductor circuit until it contacts the lifter and pushes the lifter away. Since the lifter has resilience, the resilience of the lifter will press the pin 300 tightly through the joint action of the relatively arranged lifters. When the end of the pin 300 of the first semiconductor circuit is matched with the pin 300 connection port 301 of the other semiconductor circuit, the lifter can clamp the inserted pin 300 in the mounting hole 101 to prevent the pin 300 from moving or sliding out, thereby realizing the coordinated connection of the two semiconductor circuits, facilitating installation, and improving the reliability of the parallel connection of the semiconductor circuits. The limiting structure 102 can also be a relatively arranged limiting protrusion or a limiting clamping ring arranged on the inner wall.

[0031] In some embodiments, the semiconductor circuit further includes a plurality of bonding wires 500, which are connected between the circuit element 400, the circuit wiring layer, and the pins 300. The bonding wires 500 are metal wires, which can be made of gold, aluminum, copper, etc., and are used to realize electrical connection between components in the circuit.

[0032] In some embodiments, an insulating layer is provided between the circuit substrate and the circuit wiring layer, and the insulating layer is provided to prevent the circuit wiring layer from being energized with the metal substrate, causing an internal circuit short circuit and generating a risk of leakage. A protective layer is also provided on the surface of the circuit wiring layer, and a thin layer of green oil can be applied on the surface of the circuit wiring layer, avoiding the circuit elements 400 and the pins 300 during the application, to prevent tinning where it should not be tinned, increase the withstand voltage between the circuits, and prevent short circuits caused by oxidation or contamination of the circuits, thereby protecting the circuits.

[0033] In some embodiments, the circuit element 400 includes a chip resistor, a chip capacitor, and a circuit chip required to form a functional circuit inside a semiconductor circuit. The chip resistor is connected to the gate of the IGBT chip inside the semiconductor circuit to limit the switching speed of the IGBT by limiting the current. The chip capacitor plays a filtering, coupling, and bootstrapping role in the semiconductor circuit. The chip resistor, the chip capacitor, and the circuit chip are respectively installed on the circuit wiring layer.

[0034] In some embodiments, reference Figure 4 , the semiconductor circuit also includes a PFC (Power Factor Correction) circuit and an inverter circuit. The PFC circuit includes corresponding circuit wiring and circuit elements 400 in the circuit wiring layer, and the inverter circuit includes corresponding circuit wiring and circuit elements 400 in the circuit wiring layer. Specifically, the device chip corresponding to the PFC circuit is mounted on the corresponding component mounting position of the circuit layer by brushing solder paste or dispensing silver glue, and the circuit element 400 corresponding to the PFC circuit is mounted on the corresponding component mounting position of the circuit layer by automatic SMT equipment; then the entire semi-finished product is passed through a reflow furnace to solder all the components to the corresponding mounting positions, and the PFC circuit and the circuit wiring layer are connected by bonding wires 500 to realize the installation of the PFC circuit, thereby integrating the corresponding functions of the PFC circuit. The installation and connection method of the inverter circuit is similar, and will not be repeated here.

[0035] The PFC circuit can be used to improve the power factor of the equipment. The PFC circuit consists of a collector, an emitter, and a gate. The collector is connected to the collector of the parallel semiconductor PFC circuit and connected to the external electric control board through pin 300. The emitter is connected to the emitter of the parallel semiconductor PFC circuit and connected to the external electric control board through pin 300. The gate is connected to the gate of the variable-connection semiconductor PFC circuit and then uniformly connected to the PFCOUT interface of the control circuit.

[0036] The inverter circuit is mainly composed of multiple groups of inverter units of upper and lower bridge arms, specifically, divided into the upper three bridges U, V and W ends and the lower three bridges -U, -V and W ends. Each bridge is composed of a collector, an emitter and a gate. Each pole is connected to the corresponding pole of the parallel semiconductor inverter circuit. The connected collector and emitter are connected to the external electronic control through pin 300, and the gate is uniformly connected to the control interface corresponding to the control circuit.

[0037] Thus, multiple semiconductor circuits are directly inserted into the corresponding mounting holes 101 through the pins 300 to contact the pins 300 of the previous semiconductor circuit to achieve electrical connection, and the input and output circuits corresponding to the control circuit, inverter circuit, and PFC circuit of the first semiconductor circuit are electrically connected to the input and output circuits corresponding to the parallel semiconductor circuit, and multiple circuits are superimposed to form a parallel semiconductor circuit. Through this parallel connection method, only one control circuit is needed to control multiple parallel semiconductor circuits, which reduces production costs and simplifies procedures and processes.

[0038] The present application also provides a parallel semiconductor circuit, including a control circuit and a plurality of semiconductor circuits, the control circuit and the semiconductor circuit are connected, and the plurality of semiconductor circuits are respectively inserted into another semiconductor circuit through pins 300 and connected with the connection port 301. The parallel semiconductor circuit is used to electrically connect the input and output circuit corresponding to the circuit of the first semiconductor circuit with the input and output circuit corresponding to the second semiconductor circuit. The corresponding input and output pins 300 are reserved in the previous semiconductor circuit, and the corresponding mounting holes 101 are reserved on the surface of the package body 100. The plurality of semiconductor circuits are directly inserted into the corresponding holes through the pins 300 to contact the pins 300 of the previous semiconductor circuit to achieve electrical connection.

[0039] Therefore, through this parallel connection method, multiple semiconductor circuits can be superimposed, the electronic control can be miniaturized, the electronic control layout can be more flexible, and the cost can be lowered; this method can be flexibly applied to occasions of various current levels, and the working requirements of larger currents can be achieved by simply increasing the number of parallel semiconductor circuits; since this parallel method can be flexibly replaced and increased or decreased, it can not only adapt to usage scenarios of different power, but also when one of the semiconductor circuits fails, it only needs to be replaced without scrapping the entire product, which not only reduces costs but also improves rework efficiency.

[0040] See also Figure 5 The present application also provides a method for manufacturing the parallel semiconductor circuit according to the above, comprising the following steps:

[0041] A circuit substrate is configured, and a circuit wiring layer is configured on the surface of the circuit substrate; pins are prepared, and a connection port is opened at the first end of the pin; circuit elements and pins are configured on the circuit wiring layer; the circuit elements and the circuit wiring layer are electrically connected through bonding wires; the circuit substrate provided with the circuit wiring layer and a plurality of pins is injection molded through a packaging mold to form a sealing body, the sealing body is provided with a mounting hole corresponding to the connection port, and one end of the pin provided with a connection portion is led out from the side of the sealing body to form the semiconductor circuit;

[0042] A plurality of semiconductor circuits are prepared in a cycle, and the semiconductor circuits are sequentially inserted into the mounting holes of another semiconductor circuit through pins, and are matched and connected with the connecting ports of the pins of another semiconductor circuit to form parallel semiconductor circuits.

[0043] Among them, the circuit substrate can be configured by using a metal substrate as a carrier; a process of forming a semiconductor circuit by arranging a copper foil layer on one side of the metal substrate; a process of forming parallel circuit pads at both ends of the copper foil layer on the metal substrate; a process of forming a metal connector by plating the surface of a metal copper foil of a specific shape; a process of forming a pin by plating the surface of a metal copper material of a specific shape; a process of applying an adhesive material with a certain fluidity at a specific position of the circuit wiring; a process of soldering a chip on the surface of a metal heat sink; a process of placing a circuit element on the adhesive material; a process of curing the adhesive material;

[0044] Then, the solder flux, aluminum chips and other pollutants remaining on the metal aluminum substrate are removed by spraying, ultrasonic and other cleaning methods; the circuit elements and the circuit wiring are electrically connected by bonding wires; and a bonding material with a certain fluidity is applied to a specific position of the circuit board;

[0045] Finally, the metal substrate, circuit board frame and pins are sealed and fixed by plastic packaging so that the specific position of the circuit wiring at a specific potential is not filled with the resin; the necessary electrical parameter and appearance parameter tests are carried out by testing equipment; after the test is passed, the semiconductor circuit of the present invention is manufactured.

[0046] In the present invention, unless otherwise clearly specified and limited, the terms "installed", "connected", "connected", "fixed" and the like should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements, unless otherwise clearly defined. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0047] Certain terms in this application have been used to describe embodiments of the present application. For example, "one embodiment", "embodiment" and / or "some embodiments" mean that a particular feature, structure or characteristic described in conjunction with the embodiment may be included in at least one embodiment of the present application. Therefore, it can be emphasized and should be understood that two or more references to "embodiment" or "one embodiment" or "alternative embodiment" in various parts of this specification do not necessarily refer to the same embodiment. In addition, specific features, structures or characteristics may be appropriately combined in one or more embodiments of the present application.

[0048] Therefore, the embodiments disclosed in this specification are only examples and not limitations. It should be pointed out that a person skilled in the art can make several modifications and improvements without departing from the inventive concept of the present application, and these all fall within the scope of protection of the present application.

Claims

1. A semiconductor circuit, characterized in that: include: A circuit substrate, the circuit substrate comprising a mounting surface; A circuit wiring layer, the circuit wiring layer is arranged on the mounting surface; A circuit element, wherein the circuit element is disposed on the circuit wiring layer; a packaging body, wherein the packaging body at least partially covers the circuit substrate; A pin is provided on the circuit wiring layer, and one end of the pin extends outward from one side of the package body; The pin is also provided with a connection port, which is used to connect with the pins of different semiconductor circuits. The package body is also provided with a mounting hole for accommodating the output pin to be inserted, and the mounting hole corresponds to the connection port of the pin.

2. A semiconductor circuit according to claim 1, characterized in that: The inner wall of the mounting hole is also provided with a limiting structure.

3. A semiconductor circuit according to claim 2, characterized in that: The limiting structure includes relatively arranged lift pieces, one end of which is fixed on the inner wall of the mounting hole.

4. A semiconductor circuit according to claim 1, characterized in that: It also includes a plurality of bonding wires, which are connected between the circuit elements, the circuit wiring layer and the pins.

5. A semiconductor circuit according to claim 4, characterized in that: The circuit elements include chip resistors, chip capacitors and circuit chips, and the chip resistors, chip capacitors and circuit chips are respectively mounted on the circuit wiring layer.

6. A semiconductor circuit according to claim 1, characterized in that: An insulating layer is provided between the circuit substrate and the circuit wiring layer.

7. A semiconductor circuit according to claim 1, characterized in that: A protective layer is also provided on the surface of the circuit wiring layer.

8. A semiconductor circuit according to claim 1, characterized in that: The end of one end of the pin extending outward is in a sawtooth shape.

9. A parallel semiconductor circuit, characterized in that: It comprises a control circuit and a plurality of semiconductor circuits as claimed in any one of claims 1 to 8, wherein the control circuit is connected to the semiconductor circuit, and the plurality of semiconductor circuits are respectively inserted into another semiconductor circuit through pins and connected with the connection ports.

10. A method for manufacturing a parallel semiconductor circuit as claimed in claim 9, characterized in that: The following steps are involved: configuring a circuit substrate, and configuring a circuit wiring layer on a surface of the circuit substrate; preparing a pin, and opening a connection port at one end of the pin; Arrange circuit elements and pins in the circuit wiring layer; Electrically connecting the circuit elements and the circuit wiring layer through bonding wires; The circuit substrate provided with the circuit wiring layer and the plurality of pins is injection molded through a packaging mold to form a sealing body, the sealing body is provided with a mounting hole corresponding to the connection port, and one end of the pin provided with a connection portion is led out from the side of the sealing body to form the semiconductor circuit; A plurality of semiconductor circuits are prepared in a cycle, and the semiconductor circuits are sequentially inserted into the mounting holes of another semiconductor circuit through pins, and are matched and connected with the connecting ports of the pins of another semiconductor circuit to form parallel semiconductor circuits.

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