Wafer for micro-LED characteristic evaluation and micro-LED characteristic evaluation method

Abstract

The present invention is a wafer for evaluating the characteristics of a micro LED, the wafer comprising: a GaAs substrate; one side of the GaAs substrate is provided with a micro LED with the size of less than 100 microns; a pad land portion adjacent to the micro LED; an upper electrode bonding pad on the micro LED and the bonding pad table part; and a lower electrode pad on the GaAs substrate in the vicinity of the micro-LED, in which the micro-LED and the pad land portion are connected via an insulating portion. As a result, provided is a wafer for evaluating characteristics of a micro-LED, which is capable of evaluating conduction characteristics by forming a micro-LED-sized assembly while maintaining an epitaxial wafer state, and which is capable of performing instantaneous characteristic evaluation without breaking a line in an environmental test.

Description

Technical Field

[0001] The present invention relates to a wafer for evaluating micro LED characteristics and a method for evaluating micro LED characteristics. Background Art

[0002] A technology has been disclosed that uses laser lift-off (LLO) to peel an LED from a starting substrate, and then transfers it to a mounting substrate and then to a driving substrate to achieve a micro-LED display (Patent Document 1), but all of them are only for GaN-based LEDs, and no technology related to micro-LEDs using AlGaInP-based LEDs is disclosed.

[0003] When realizing micro-LED components with AlGaInP-based LEDs, the key is to determine whether the quality of the epitaxial wafer is suitable for micro-LEDs. It is particularly critical to master the transient (lifetime) characteristics of LEDs. In the past, discrete LEDs with a size of 150μm□ or more were made by setting electrodes above and below the epitaxial wafer, then cutting it into dies of 150μm□ or more, installing it on a power-on fixture such as TO-18CAN using conductive paste, and bonding metal wires to the top of the grains to make a component that can be powered on, and then powering it on to evaluate the transient (lifetime) characteristics.

[0004] However, in micro-LEDs, the size of the components is less than 100μm□. The bonding electrode (pad) required for wire bonding needs to have a diameter of more than 90μm in the case of wedge bonding, and a diameter of more than 70μm in the case of ball bonding. The general size of micro-LEDs is less than 50μm□, and most of them are 5 to 20μm□, so it is obviously impossible to evaluate them with the same design as the previous discrete ones.

[0005] In addition, although the micro LED components can be installed on the driving substrate for testing, the micro LED transfer is required, and the quality change caused by the transfer is reported. Therefore, it is not suitable for the quality evaluation of the epitaxial layer itself. In addition, since the device formation process and installation process are required, it takes too much time before the evaluation, and the product driving substrate needs to be used for the evaluation, which costs too much evaluation cost.

[0006] In addition, when the micro LED is mounted on the driver substrate for power-on evaluation, the thermal design is significantly different from the case of TO-18CAN installation. When installed, the thermal resistance is small, so the heat dissipation is good, showing behavior that is significantly better than the original quality of the epitaxial layer. Although it is a good thermal design as a product, it is not appropriate in terms of managing the quality of the epitaxial layer. If the test is not performed with the same degree of thermal design as the case of TO-18CAN installation, it is inappropriate as a quality evaluation of the epitaxial layer.

[0007] Therefore, it is necessary to disclose a component and a component structure technology that can be mounted on a TO-18 CAN for testing. However, there is no disclosure of a component and a component structure technology that can be mounted on a TO-18 CAN for transient testing of micro LEDs.

[0008] When the size of the module is small, a method using a technique of arranging a line on the side of the module can be considered (Patent Document 2). This technique is effective in the case of a structure in which the thickness of the top layer is not that thick.

[0009] However, in the AlGaInP-based LED structure based on the application of Laser Lift Off (LLO), a double heterogeneous (DH) part including an active layer is formed on a starting substrate, and a GaP layer as a pedestal is sequentially formed. In this structure, the DH part is located at the bottom and the GaP layer is located at the top.

[0010] When the technology disclosed in Patent Document 2 is applied to this structure, a fairly deep etching is required to penetrate the GaP layer and electrically separate the DH layer. The GaP layer is generally 4 μm or more, and the AlGaInP DH layer is generally 2 μm or more, so the etching depth is 6 μm or more.

[0011] When wiring is installed on the side of such a deeply dug component, power failure is likely to occur on the side because the side of the deeply dug component has large unevenness and is difficult to reliably cover with metal.

[0012] Patent document 3 discloses a technology for wiring in the deep-dig part. This technology forms an insulating film on the side of the deep-dig groove, so that the contact electrode extends to the lower cladding layer for contact. This method requires the following complex steps: digging the groove, covering the side with an insulating film, etching the bottom, and filling it with electrode metal. In addition, this technology is a technology for forming electrodes in the groove, and it is not a technology that can be simply applied to micro LEDs.

[0013] Patent document 4 discloses a technology that partially moves the epitaxial layer to another substrate so that the pad part contacts the component to conduct electricity. In this technology, the component is buried in resin. At this time, the resistance of the resin is greater than the starting substrate of the epitaxy (lower thermal conductivity), and it becomes a thermally floating (separated) state. As a result, the junction temperature rises significantly compared to the ambient temperature. Instantaneous tests such as life characteristics are generally performed by installing the test on a material with a relatively lower thermal resistance than the base material of the light-emitting component, and are usually not installed on a material with poor heat dissipation that has a greater thermal resistance than the base material. If the test is performed using existing technology, the test conditions will become conditions that are significantly different from those in the past.

[0014] As described above, there is no prior art that can evaluate the characteristics of an epitaxial wafer in its state, and no design or technology that can evaluate whether an epitaxial wafer itself is an epitaxial wafer of a size suitable for manufacturing micro LEDs is disclosed.

[0015] Prior art literature

[0016] Patent Literature

[0017] Patent Document 1: Japanese Patent No. 6838247

[0018] Patent Document 2: Japanese Patent Application Publication No. 2012-195437

[0019] Patent Document 3: Japanese Patent Application Publication No. 2013-135234

[0020] Patent Document 4: Japanese Patent Application Publication No. 2003-282478 Summary of the invention

[0021] 1. Technical issues to be resolved

[0022] The present invention is completed to solve the above-mentioned problems, and its purpose is to provide a wafer for evaluating micro LED characteristics and a method for evaluating micro LED characteristics, which can form a component of micro LED size while maintaining the epitaxial wafer state to evaluate the power-on characteristics without processing the epitaxial wafer having AlGaInP-based micro LEDs that are most suitable for the LLO process into a wafer structure for LLO, and can robustly perform transient characteristic evaluation through a component structure that will not break under environmental tests.

[0023] (II) Technical solution

[0024] The present invention is made to achieve the above-mentioned purpose, and provides a wafer for evaluating the characteristics of a micro-LED, characterized in that it has: a GaAs substrate; a micro-LED on the GaAs substrate with a side of less than 100 μm; a pad portion adjacent to the micro-LED; an upper electrode pad on the micro-LED and the pad portion; and a lower electrode pad on the GaAs substrate near the micro-LED, wherein the micro-LED and the pad portion are connected via an insulating portion.

[0025] If such a wafer is used for evaluating micro LED characteristics, the current-carrying characteristics of a micro LED-sized component can be evaluated while maintaining the epitaxial wafer state, and transient characteristics evaluation can be performed robustly without disconnection during environmental testing.

[0026] In this case, the area of ​​the upper electrode pad can be set larger than the area of ​​a circle having a diameter of 60 μm.

[0027] This allows reliable wire bonding.

[0028] In this case, the upper electrode pad may include a metal, and the metal may be any one of Al, Cu, Ag, and Au.

[0029] As a result, the current-carrying characteristics of a micro-LED-sized component can be evaluated more reliably while maintaining the epitaxial wafer state, and transient characteristics evaluation can be performed more robustly without disconnection during environmental testing.

[0030] In this case, the upper electrode pad may include a transparent conductive film, and the transparent conductive film may be made of ITO, InO x , NiO, CuO.

[0031] This makes it possible to evaluate the current-carrying characteristics of a micro-LED-sized component while maintaining the epitaxial wafer state, and to robustly perform transient characteristic evaluation without disconnection during environmental testing.

[0032] In this case, one side of the micro LED can be 50 μm or less.

[0033] This makes it possible to evaluate the current-carrying characteristics of a very small micro-LED-sized component while maintaining the epitaxial wafer state, and to robustly perform transient characteristic evaluation without disconnection during environmental testing.

[0034] In this case, it can be set that: the micro LED has a light-emitting layer and a GaP layer on the light-emitting layer, the light-emitting layer has a cladding layer, an active layer on the cladding layer and another cladding layer on the active layer, and the active layer is composed of (Al y Ga 1－y ) x In 1－x P is formed, where 0.4≤x≤0.6, 0≤y≤0.5.

[0035] This makes it possible to more reliably evaluate the current-carrying characteristics of a very small AlGaInP quaternary micro-LED-sized component while maintaining the epitaxial wafer state, and to robustly perform transient characteristic evaluation without disconnection during environmental testing.

[0036] In this case, the pad portion may include a light emitting layer and a GaP layer on the light emitting layer, and the thickness of the GaP layer may be 5 μm or more.

[0037] Therefore, even if the GaP layer is thick, the current-carrying characteristics of extremely small micro-LED-sized components can be reliably evaluated while maintaining the epitaxial wafer state, and transient characteristics evaluation can be robustly performed without disconnection during environmental testing.

[0038] In this case, it can be assumed that the insulating portion has SiO2, SiN x , SOG, CYTOP (registered trademark), or polyimide.

[0039] As a result, the insulation of the insulating part can be maintained, so that the power-on characteristics of extremely small micro-LED-sized components can be more accurately evaluated while maintaining the epitaxial wafer state, and transient characteristics evaluation can be robustly performed without disconnection during environmental testing.

[0040] The present invention is made to achieve the above-mentioned object, and provides a micro LED characteristic evaluation method, wherein the micro LED characteristic evaluation method is characterized in that the micro LED characteristics are evaluated using the previously described micro LED characteristic evaluation wafer.

[0041] According to such a micro LED characteristic evaluation method, the current-carrying characteristics of a micro LED-sized component can be evaluated while maintaining the epitaxial wafer state, and transient characteristic evaluation can be performed robustly without disconnection during environmental testing.

[0042] (III) Beneficial effects

[0043] As described above, the wafer for evaluating micro LED characteristics of the present invention can evaluate the current-carrying characteristics of a micro LED-sized component while maintaining the epitaxial wafer state, and can robustly perform transient characteristic evaluation without disconnection during environmental testing.

[0044] According to the micro LED characteristic evaluation method of the present invention, the power-on characteristics of a micro LED-sized component can be evaluated while maintaining the epitaxial wafer state, and transient characteristic evaluation can be performed robustly without disconnection during environmental testing. BRIEF DESCRIPTION OF THE DRAWINGS

[0045] Figure 1 is a cross-sectional view showing an example of a resist pattern substrate.

[0046] Figure 2 is a cross-sectional view showing an example of a SiO2 pattern substrate.

[0047] Figure 3A is a diagram showing an example of a dry etching substrate. Figure 3B Cross-sectional view along line A-A'.

[0048] Figure 3B is a top view showing an example of a dry etching substrate.

[0049] Figure 4 is a cross-sectional view showing an example of a wet-etched substrate.

[0050] Figure 5 is a cross-sectional view showing an example of a cover substrate.

[0051] Fig. 6A is a diagram showing an example of an opening substrate. Figure 6B Cross-sectional view along line A-A'.

[0052] Figure 6B is a plan view showing an example of an open substrate.

[0053] Fig. 7A is a diagram showing an example of a wafer for evaluating micro LED characteristics of the present invention, Figure 7B Cross-sectional view along line A-A'.

[0054] Figure 7B 1 is a plan view showing an example of a wafer for evaluating micro LED characteristics according to the present invention.

[0055] Figure 8 It is a cross-sectional view showing a comparative example.

[0056] Fig. 9 The figures show the experimental results of the occurrence rate (defective rate) of disconnected components when the die were placed in an environment of 85° C. in the examples and comparative examples.

[0057] Fig.10 The figures show the experimental results of the occurrence rate (defective rate) of disconnected components when the die were placed in a -40°C environment in the examples and comparative examples. DETAILED DESCRIPTION

[0058] Hereinafter, the present invention will be described in detail, but the present invention is not limited thereto.

[0059] As described above, a wafer for evaluating micro LED characteristics and a method for evaluating micro LED characteristics are sought, which can form a component of micro LED size while maintaining the state of the epitaxial wafer to evaluate the power-on characteristics without processing the epitaxial wafer having AlGaInP-based micro LEDs most suitable for the LLO process into a wafer structure for LLO, and can robustly perform transient characteristic evaluation through a component structure that will not break under environmental tests.

[0060] The inventors of the present application have repeatedly and intensively studied the above-mentioned problems, and as a result, have found that, through a wafer for evaluating the characteristics of micro-LEDs, it is possible to evaluate the power-on characteristics of components of micro-LED size while maintaining the state of the epitaxial wafer, and it is possible to robustly perform transient characteristic evaluation without disconnection under environmental tests, thereby completing the present invention. The wafer for evaluating the characteristics of micro-LEDs is characterized in that it comprises: a GaAs substrate; a micro-LED having a side of less than 100 μm on the GaAs substrate; a pad portion adjacent to the micro-LED; an upper electrode pad on the micro-LED and the pad portion; and a lower electrode pad on the GaAs substrate near the micro-LED, wherein the micro-LED and the pad portion are connected via an insulating portion.

[0061] Hereinafter, a wafer for evaluating micro LED characteristics and a method for evaluating micro LED characteristics according to an embodiment of the present invention will be described.

[0062] (Wafer for evaluating micro LED characteristics)

[0063] like Fig. 7A , 7B As shown, the wafer 1 for evaluating the characteristics of a micro LED of the present invention comprises: a GaAs substrate 10; a micro LED 14 having a side of less than 100 μm on the GaAs substrate 10; a pad portion 13 adjacent to the micro LED 14; an upper electrode pad 12 on the micro LED 14 and the pad portion 13; and a lower electrode pad 11 on the GaAs substrate 10 near the micro LED 14, wherein the micro LED 14 and the pad portion 13 are connected via an insulating portion 15.

[0064] The epitaxial wafer (EPW) has a light emitting component structure as an epitaxial functional layer. The epitaxial wafer (EPW) is formed by stacking a first conductive type GaAs buffer layer on a first conductive type GaAs substrate (starting substrate) 10, and then sequentially growing a first conductive type GaAs layer with a thickness of, for example, 0.1 μm. x In 1－x P (0.4 ≤ x ≤ 0.6) first etching stop layer, for example, 0.1 μm thick GaAs of the first conductivity type second etching stop layer, for example, 1.0 μm thick (Al y Ga 1－y ) x In 1－x P (0.4 ≤ x ≤ 0.6, 0.6 ≤ y ≤ 1.0) first cladding layer, undoped (Al y Ga 1－y )xIn 1－x P (0.4≤x≤0.6, 0≤y≤0.5) active layer, for example, 1.0 μm thick second conductivity type (Al y Ga1－y )xIn 1－x P (0.4≤x≤0.6, 0.6≤y≤1.0) second cladding layer, for example, 0.1 μm thick second conductivity type Ga x In 1－x The GaP layer (window layer) 22 is a second conductivity type GaP (0.5≤x≤1.0) intermediate layer, for example, a 6.0 μm thick GaP layer.

[0065] Here, the first cladding layer to the second cladding layer are referred to as a double heterogeneous (DH) structure.

[0066] The double heterostructure (DH) structure portion is the light emitting layer 21 .

[0067] The film thickness is only an example, and the film thickness is only a parameter that changes according to the operating specifications of the component, and is not limited to the film thickness described here. Although the first cladding layer and the second cladding layer are both exemplified as 1.0 μm, in micro-LEDs, the rated current density is lower than that of larger discrete LEDs, and the function as a cladding layer is not impaired even if the film thickness is thinner than this.

[0068] Since the electrode is formed in contact with the first coating layer as described below, the first coating layer preferably has a thickness of 0.6 μm or more in consideration of metal diffusion when forming an ohmic contact. Any thickness can be selected as long as it is 0.6 μm or more. However, if it becomes too thick, it will become the main cause of rising costs, and the luminous efficiency during constant current driving will decrease, or it will be easy to cause a decrease in productivity due to increased warping of the wafer. Therefore, it is preferably set to 10 μm or less.

[0069] When the second conductivity type is p-type, the effective mass of the hole is large, so even if the second cladding layer is, for example, about 0.2 μm thick, it will function in the same manner as 1.0 μm. Therefore, any thickness can be selected as long as it is 0.2 μm or more. However, if it becomes too thick, it will become the main cause of rising costs, and the luminous efficiency during constant current driving will decrease, or it will be easy to cause a decrease in productivity due to increased warping of the wafer. Therefore, it is preferably set to 10 μm or less.

[0070] In addition, each layer is not a single composition layer, and conceptually includes a plurality of composition layers within the composition range shown in the example. In addition, the level of carrier concentration is not uniform in each layer, and conceptually includes a plurality of levels in each layer.

[0071] The active layer can be composed of a single composition, and even a superlattice structure composed of multiple layers of barrier layers and active layers stacked alternately has similar functions, and both can be selected. Regardless of which structure is selected, the effects of the present technology are the same.

[0072] The thickness of the GaP layer 22 is preferably 5 μm or more, and can be set to 6 μm, for example. However, it is not limited to the thickness of 6 μm, and any thickness can be selected as long as it is thinner than the short side length of the component isolation portion described below. The size of the micro LED 14 is 100 μm or less, and the lower limit is not particularly limited, and can be set to 1 μm, for example. The thickness of the GaP layer 22 will not exceed 100 μm.

[0073] It is preferable that the area of ​​the upper electrode pad 12 is larger than the area of ​​a circle having a diameter of 60 μm. The upper limit is not particularly limited, and can be, for example, 1000 μm. This allows reliable wire bonding.

[0074] It is preferable that the upper electrode pad 12 contains a metal, and the metal is any one of Al, Cu, Ag, and Au. This allows the current-carrying characteristics to be reliably evaluated.

[0075] It is preferable that the upper electrode pad 12 includes a transparent conductive film, and the transparent conductive film is ITO, InO x Thus, the current-carrying characteristics can be accurately evaluated.

[0076] It is preferable that one side of the micro LED 14 is 50 μm or less. This allows evaluation of the current-carrying characteristics of extremely small components.

[0077] Preferably, the micro LED 14 has a light-emitting layer 21 and a GaP layer 22 on the light-emitting layer 21, the light-emitting layer 21 has a cladding layer, an active layer on the cladding layer and another cladding layer on the active layer, the active layer is composed of (Al y Ga 1－y )xIn 1－x P (0.4≤x≤0.6, 0≤y≤0.5) is formed. This makes it possible to reliably evaluate the conduction characteristics of the AlGaInP system.

[0078] It is preferable that the pad portion 13 includes the light emitting layer 21 and the GaP layer 22 on the light emitting layer 21, and the thickness of the GaP layer 22 is 5 μm or more. This allows reliable evaluation of the current-carrying characteristics even when the GaP layer is thick.

[0079] It is preferable that the insulating portion 15 has SiO2, SiN x , SOG, CYTOP (registered trademark), or polyimide. This allows the insulation of the insulating portion to be maintained, and the current-carrying characteristics to be reliably evaluated.

[0080] Next, the manufacturing process of the wafer for evaluating micro LED characteristics is described.

[0081] Figure 1is a cross-sectional view showing an example of a resist pattern substrate.

[0082] First, if Figure 1 As shown, a SiO2 film 31 with a thickness of more than 100 nm, for example 400 nm, is formed on the epitaxial wafer, and a resist pattern 41 is formed in a manner that divides the pattern into a predetermined portion for forming a component of the micro LED 14 and a predetermined portion for forming an upper electrode pad of the pad platform 13 .

[0083] The size and pattern of the component formation planned portion can be freely set, and can be set to a size of 25 μm□, for example.

[0084] The upper electrode pad formation planned portion can be set to a size of 95 μm□, for example.

[0085] For example, the component formation planned portion and the upper electrode pad formation planned portion can be arranged with a space of 1 μm therebetween.

[0086] Figure 2 is a cross-sectional view showing an example of a SiO2 pattern substrate.

[0087] Then, if Figure 2 As shown, the SiO 2 film 31 is patterned by wet etching using a hydrofluoric acid solution, and the resist is peeled off to obtain a hard mask pattern of the SiO 2 film 31 .

[0088] The wet etching process is not fixed and should be arbitrarily changed according to the thickness of the hard mask of the SiO 2 film 31. For example, a pattern can be formed by using a 50% BHF solution and immersing for 1 minute.

[0089] As long as the resist stripping can be achieved, any solution can be selected as the resist stripping solution. For example, stripping can be performed using acetone.

[0090] Figure 3A is a diagram showing an example of a dry etching substrate. Figure 3B Cross-sectional view along line A-A'. Figure 3B is a top view showing an example of a dry etching substrate.

[0091] Then, if Figure 3A , 3B As shown, an inductively coupled plasma (ICP) dry etching process is performed using a chlorine-containing gas to obtain a pattern of a component forming portion of the micro LED 14 and a top electrode pad forming portion of the pad stage 13 .

[0092] The ICP dry etching conditions may be, for example, 200 W antenna power and 100 W bias power, but are not limited to these conditions.

[0093] In ICP dry etching, for example, Cl 2 and Ar can be used as chlorine-containing gases, but it is not limited to this mixed gas. BCl 3 , SiCl 4 , HCl, etc. can also be used as chlorine source gas, and N 2 or He can also be used instead of Ar.

[0094] Figure 4 is a cross-sectional view showing an example of a wet-etched substrate.

[0095] Then, if Figure 4 As shown, the hard mask of the SiO 2 film 31 is removed by wet etching using a hydrofluoric acid solution.

[0096] The wet etching process is not fixed and should be arbitrarily changed according to the thickness of the hard mask of the SiO 2 film 31. For example, the hard mask can be removed by using a 50% BHF solution and immersing for 1 minute.

[0097] Figure 5 is a cross-sectional view showing an example of a cover substrate.

[0098] Then, if Figure 5 As shown, for example, tetraethyl orthosilicate (TEOS)-based SiO 2 is used to cover the surface and end surface including the gap of the component forming portion of the micro LED 14 and the upper electrode pad forming portion of the pad platform 13 .

[0099] The cover film 23 is not limited to SiO2, and any material can be selected as long as it can protect the end face and has insulation properties, and has a higher thermal conductivity than the GaAs of the starting substrate. The surface coverage of the TEOS system is high, and a Si-containing insulating film, such as SiN x wait.

[0100] In addition to TEOS-based chemical vapor deposition (CVD) films, it can also be formed by spinning or dipping. In this case, SiN x , SOG, CYTOP (registered trademark), polyimide, etc.

[0101] Fig. 6A is a diagram showing an example of an opening substrate. Figure 6B Cross-sectional view along line A-A'. Figure 6B is a plan view showing an example of an open substrate.

[0102] Next, as shown in FIG. 6 , an opening 23 a is formed in the cover film 23 by photolithography and wet etching as an upper electrode contact planned portion.

[0103] Fig. 7A is a diagram showing an example of a wafer for evaluating micro LED characteristics of the present invention, Figure 7BCross-sectional view along line A-A'. Figure 7B 1 is a plan view showing an example of a wafer for evaluating micro LED characteristics according to the present invention.

[0104] Then, if Fig. 7A , 7B As shown, a lower electrode pad 11 and an upper electrode pad 12 are formed, and an ohmic contact is formed by performing a heat treatment.

[0105] In addition, although the upper electrode pad 12 is provided with a metal to connect the predetermined portion of the component forming part of the micro LED 14 and the predetermined portion of the upper electrode pad forming part of the pad platform 13, the connection portion is not limited to metal. The pad electrode portion and the contact electrode of the micro LED 14 may be provided with metal, and the two may be electrically connected using a transparent conductive film. As the transparent conductive film, InO x 、NiO、CuO x wait.

[0106] Furthermore, the first conductivity type can be designed as n-type and the second conductivity type can be designed as p-type, and a metal containing Au and Si can be used as an electrode in contact with the n-type layer and a metal containing Au and Be can be used as an electrode in contact with the p-type layer.

[0107] Furthermore, the n-type electrode is not limited to the metal of Au and Si, and a metal containing Au and Ge may be used. Furthermore, the p-type electrode is not limited to the metal of Au and Be, and a metal containing Au and Zn may be used.

[0108] After forming the electrodes, a rapid thermal annealing (RTA) process is performed at 400°C for 5 minutes to achieve ohmic contact. After achieving ohmic contact, wire bonding is performed to make a form that can be used for environmental testing / transient characteristic testing. The above structure can be used to test the epitaxial wafer's environmental relevance / transient characteristic.

[0109] (Micro LED characteristics evaluation method)

[0110] The micro LED characteristic evaluation method of the present invention is a method for evaluating the characteristics of the micro LED 14 using the previously described micro LED characteristic evaluation wafer 1. Thus, the power-on characteristics of the micro LED 14 can be evaluated while maintaining the epitaxial wafer state, and transient characteristic evaluation can be robustly performed without disconnection during environmental testing.

[0111] Example

[0112] Hereinafter, the present invention will be specifically described with reference to Examples, but these Examples do not limit the present invention.

[0113] (Example)

[0114] An epitaxial wafer having a light-emitting component structure as an epitaxial functional layer is prepared. The epitaxial wafer is formed by stacking an n-type GaAs buffer layer on an n-type GaAs starting substrate and sequentially growing a 0.1 μm thick n-type GaAs layer. x In 1－x P (0.4 ≤ x ≤ 0.6) first etching stop layer, 0.1 μm thick n-type GaAs second etching stop layer, 1.0 μm thick n-type (Al y Ga 1－y )xIn 1－x P (0.4 ≤ x ≤ 0.6, 0.6 ≤ y ≤ 1.0) first cladding layer, undoped (Al y Ga 1－y )xIn 1－x P (0.4 ≤ x ≤ 0.6, 0 ≤ y ≤ 0.5) active layer, 1.0 μm thick p-type (Al y Ga 1－y )xIn 1－x P (0.4 ≤ x ≤ 0.6, 0.6 ≤ y ≤ 1.0) second cladding layer, 0.1 μm thick p-type GaxIn 1－x It is composed of a P (0.5≤x≤1.0) intermediate layer and a 6μm thick p-type GaP window layer.

[0115] A 400 nm SiO2 film is formed on the epitaxial wafer, and a resist pattern is formed in such a manner as to divide the pattern into a predetermined portion for forming a micro LED component and a predetermined portion for forming an upper electrode pad. Figure 1 ). The size of the component formation planned portion was set to 25 μm□. The size of the upper electrode pad formation planned portion was set to 95 μm□. The component isolation formation planned portion and the upper electrode pad formation planned portion were arranged with a space of 1 μm therebetween.

[0116] The SiO2 film was patterned by using about 50% BHF solution and soaking for 1 minute ( Figure 2 ), the resist is stripped off using acetone to obtain a SiO2 hard mask pattern.

[0117] Then, Cl2 and Ar were used to perform ICP dry etching to obtain the pattern of the component isolation part and the pad part ( Figure 3A , B). The ICP dry etching conditions were implemented with 200W antenna power and 100W bias power.

[0118] Then, the SiO2 hard mask was removed by using about 50% BHF solution and soaking for 1 minute ( Figure 4 ).

[0119] Then, TEOS-based SiO2 is used to cover the surface and end faces of the component part and the pad part including the gap ( Figure 5 ).

[0120] Then, the upper electrode is opened to a predetermined portion by photolithography and wet etching. Fig. 6A , B), forming the lower electrode and the upper electrode, and forming the ohmic contact by heat treatment ( Fig. 7A , B).

[0121] Here, a metal containing Au and Si is used for the electrode in contact with the n-type layer, and a metal containing Au and Be is used for the electrode in contact with the p-type layer.

[0122] After forming the electrodes, RTA treatment was performed at 400°C for 5 minutes to achieve ohmic contact. After the ohmic contact was achieved, wire bonding was performed.

[0123] (Comparative Example)

[0124] Figure 8 It is a cross-sectional view showing a comparative example.

[0125] The formation and processing steps of the epitaxial wafer are the same as those in the embodiment, but Figure 8 As shown, the pad forming portion is completely etched away, leaving only the component portion, and a structure is formed in which an insulating film is arranged on the side of the component portion and a circuit is arranged thereon.

[0126] (Comparison between Example and Comparative Example)

[0127] Fig. 9 The figures show the experimental results of the occurrence rate (defective rate) of disconnected components when the die were placed in an environment of 85° C. in the examples and comparative examples.

[0128] In the comparative example, when the die were placed in an 85°C environment, which is the standard environment for life tests, and tested for power supply, 20% to more than half of the die were short-circuited (broken). This breakage is temporary, and when the temperature returns to room temperature, the short circuit is resolved and the power supply is restored.

[0129] like Figure 8 As shown in the figure, since the upper electrode pad of the comparative example is located on the GaAs substrate, the thermal expansion coefficient of the metal used to form the circuit, the insulating material, the material used to form the light-emitting portion, and the unevenness of the metal circuit portion and the unevenness of the insulating material caused by the cross-sectional shape of the component may cause disconnection or reconnection. In order to eliminate this situation, a relatively thick (more than 10 μm) metal layer must be formed, but it is not easy to form a thicker metal layer in the photo process. In addition, it is necessary to increase the process time and use excessive materials, which is not ideal.

[0130] On the other hand, when the embodiment is applied, the upper electrode pad is located on the pad platform including the DH layer, and the metal wiring portion is short and almost straight, so no disconnection will occur even in an environment of 85°C, and the defect rate is greatly reduced compared to the comparative example.

[0131] Fig.10 The figures show the experimental results of the occurrence rate (defective rate) of disconnected components when the die were placed in a -40°C environment in the examples and comparative examples.

[0132] In the comparative example, when the die were placed in a -40°C environment, which is the standard environment for life tests, and tested for power supply, about 10% to 20% of the die had short circuits (broken wires). This wire breakage is temporary, and when the temperature returns to room temperature, the short circuit is resolved and the power supply is restored.

[0133] Due to the thermal expansion coefficient of the metal used to form the circuit, the insulating material, the material used to form the light-emitting part, and the unevenness of the metal circuit part and the unevenness of the insulating material caused by the cross-sectional shape of the component, disconnection or reconnection occurs. In order to eliminate this situation, a very thick (more than 10μm) metal layer must be formed, but it is not easy to form a thicker metal layer in the yellow light process. In addition, it is necessary to increase the process time and use excessive materials, so this choice is not ideal.

[0134] On the other hand, when the example was applied, wire breakage did not occur even in a -40°C environment, and the defect rate was significantly reduced compared to the comparative example.

[0135] As described above, according to the embodiments of the present invention, the current characteristics of a micro LED-sized component can be evaluated while maintaining the epitaxial wafer state, and transient characteristics evaluation can be robustly performed without disconnection during environmental testing.

[0136] This specification includes the following protocols.

[0137] [1]: A wafer for evaluating micro LED characteristics, characterized by having:

[0138] GaAs substrate; a micro LED on the GaAs substrate having a side of less than 100 μm; a pad portion adjacent to the micro LED; an upper electrode pad on the micro LED and the pad portion; and a lower electrode pad on the GaAs substrate near the micro LED,

[0139] The micro LED is connected to the pad portion via an insulating portion.

[0140] [2]: The wafer for evaluating micro-LED characteristics according to [1] above, characterized in that the area of ​​the upper electrode pad is larger than the area of ​​a circle with a diameter of 60 μm.

[0141] [3]: The wafer for evaluating micro-LED characteristics according to [1] or [2] above, characterized in that the upper electrode pad contains a metal, and the metal is any one of Al, Cu, Ag, and Au.

[0142] [4]: The wafer for evaluating micro-LED characteristics according to any one of [1] to [3] above, wherein the upper electrode pad comprises a transparent conductive film, and the transparent conductive film is ITO, InO x , NiO, CuO.

[0143] [5]: The wafer for evaluating micro-LED characteristics according to any one of [1] to [4] above, wherein a side of the micro-LED is less than 50 μm.

[0144] [6]: A wafer for evaluating micro-LED characteristics according to any one of [1] to [5] above, characterized in that the micro-LED comprises a light-emitting layer and a GaP layer on the light-emitting layer, the light-emitting layer comprises a cladding layer, an active layer on the cladding layer, and another cladding layer on the active layer, the active layer comprises (Al y Ga 1－y )xIn 1－x P(0.4≤x≤0.6, 0≤y≤0.5) is formed.

[0145] [7]: A wafer for evaluating micro-LED characteristics according to any one of [1] to [6] above, characterized in that the pad portion has a light-emitting layer and a GaP layer on the light-emitting layer, and the thickness of the GaP layer is greater than 5 μm.

[0146] [8]: A wafer for evaluating micro LED characteristics as described in any one of [1] to [7] above, characterized in that the insulating portion comprises SiO2, SiN x , SOG, CYTOP (registered trademark), or polyimide.

[0147] [9]: A method for evaluating micro LED characteristics, characterized in that the method uses the micro LED characteristic evaluation wafer described in any one of [1] to [8] to evaluate the characteristics of the micro LED.

[0148] The present invention is not limited to the above-mentioned embodiments. The above-mentioned embodiments are merely examples, and any technical solution having substantially the same configuration and exhibiting the same function and effect as the technical concept described in the claims of the present invention is included in the technical scope of the present invention.

Claims

1. A wafer for evaluating micro LED characteristics, characterized in that: It has: GaAs substrate; a micro LED on the GaAs substrate having a side of less than 100 μm; a pad portion adjacent to the micro LED; an upper electrode pad on the micro LED and the pad portion; and a lower electrode pad on the GaAs substrate near the micro LED, The micro LED is connected to the pad portion via an insulating portion.

2. The wafer for evaluating micro LED characteristics according to claim 1, wherein: The upper electrode pad has an area greater than an area of ​​a circle having a diameter of 60 μm.

3. The wafer for evaluating micro LED characteristics according to claim 1 or 2, characterized in that: The upper electrode pad includes a metal, and the metal is any one of Al, Cu, Ag, and Au.

4. The wafer for evaluating micro LED characteristics according to claim 1 or 2, characterized in that: The upper electrode pad includes a transparent conductive film, and the transparent conductive film is ITO, InO x , NiO, CuO.

5. The wafer for evaluating micro LED characteristics according to claim 1 or 2, characterized in that: A side of the micro LED is less than 50 μm.

6. The wafer for evaluating micro LED characteristics according to claim 1 or 2, characterized in that: The micro LED comprises a light-emitting layer and a GaP layer on the light-emitting layer, wherein the light-emitting layer comprises a cladding layer, an active layer on the cladding layer and another cladding layer on the active layer, wherein the active layer is composed of (Al y Ga 1－y ) x In 1－x P is formed, where 0.4≤x≤0.6, 0≤y≤0.

5.

7. The wafer for evaluating micro LED characteristics according to claim 1 or 2, characterized in that: The pad portion includes a light emitting layer and a GaP layer on the light emitting layer, and the thickness of the GaP layer is greater than 5 μm.

8. The wafer for evaluating micro LED characteristics according to claim 1 or 2, characterized in that: The insulating portion has SiO2, SiN x , SOG, CYTOP (registered trademark), or polyimide.

9. A method for evaluating characteristics of micro LEDs, characterized in that: The micro-LED characteristics are evaluated using the micro-LED characteristics evaluation wafer according to claim 1 or 2.

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