Diode structure

Abstract

This invention provides a diode structure, comprising: a substrate; multiple filling trenches disposed on the substrate, extending along the length or width direction of the substrate and spaced apart along the length or width direction of the substrate; an epitaxial filling layer disposed within each filling trench; a first metal layer connected to at least one epitaxial filling layer within the multiple filling trenches to form a first ohmic contact; and a second metal layer disposed on the substrate and forming a Schottky contact with the substrate. This application solves the problem of low high-voltage withstand capability in existing SiC diodes.

Description

Technical Field

[0001] This invention relates to the field of semiconductor technology, and more specifically, to a diode structure. Background Technology

[0002] Power diodes are components in circuit systems and are widely used in high-frequency inverters, digital products, generators, televisions, and other products. Power diodes are expanding in two important directions: (1) towards tens of millions or even tens of thousands of amperes, which can be applied to high-temperature arc wind tunnels, resistance welding machines, and other applications; (2) towards shorter reverse recovery times, exhibiting a trend towards ultra-fast, ultra-soft, and ultra-durable characteristics, enabling them to play different roles not only in rectification applications but also in various switching circuits. In order to meet the application requirements of low power consumption, high frequency, high temperature, and miniaturization, their withstand voltage, on-resistance, turn-on voltage drop, reverse recovery characteristics, and high-temperature characteristics are becoming increasingly demanding.

[0003] Commonly used rectifier diodes include ordinary rectifier diodes, Schottky diodes, and PIN diodes. Each has its own characteristics: Schottky rectifier diodes have a lower on-state voltage drop, a larger leakage current, and a near-zero reverse recovery time. PIN fast recovery rectifier diodes, on the other hand, have a faster reverse recovery time, but their on-state voltage drop is very high.

[0004] Currently, with the development of microelectronic devices towards low power consumption, high voltage resistance, and high reliability, the requirements for semiconductor materials are also gradually increasing. Microelectronic devices are increasingly used in special environments such as high temperature, high radiation, high frequency, and high power. To meet the application requirements of microelectronic devices in areas such as high temperature resistance and radiation resistance, it is necessary to develop new semiconductor materials to maximize the performance of microelectronic devices. Traditional silicon and gallium arsenide devices limit the improvement of device and system performance. Third-generation semiconductor materials, represented by silicon carbide (SiC) and gallium nitride (GaN), have become ideal semiconductor materials for fabricating high-temperature, high-power, and radiation-resistant electronic devices due to their wide bandgap and high critical breakdown electric field. Currently, SiC-based devices under research include high-temperature and power SiC devices, microwave and high-frequency SiC devices, SiC optoelectronic devices, and radiation-resistant devices. The critical breakdown field strength of SiC is 10 times that of Si, the bandgap and thermal conductivity of SiC are both 3 times that of Si, and the intrinsic carrier concentration is only one-tenth that of silicon. These superior physical properties give SiC semiconductor power devices significant advantages in environments with high frequency, high temperature, high power, and high radiation. SiC can form different crystal structures under different environments; the three most commonly used crystal structures are 3C-SiC, 4H-SiC, and 6H-SiC. 4H-SiC, with its high bandgap, high hole mobility, and low intrinsic carrier concentration, has become the mainstream material for manufacturing semiconductor devices.

[0005] Currently, there is no structural optimization for SiC diodes to take into account the material properties of SiC. As a result, the performance advantage of Si diodes is not obvious in some parameters compared with Si diodes. In terms of manufacturing process, SiC diodes follow the traditional process of Si diodes. Due to the influence of SiC material properties, the manufacturing process is complicated and the high voltage withstand capability of the devices is low. Summary of the Invention

[0006] The main objective of this invention is to provide a diode structure to solve the problem of low high voltage withstand capability of SiC diodes in the prior art.

[0007] To achieve the above objectives, according to one aspect of the present invention, a diode structure is provided, comprising: a substrate; a filling groove disposed on the substrate, the filling groove extending along the length or width direction of the substrate, the filling groove being a plurality of filling grooves spaced apart along the length or width direction of the substrate; an epitaxial filling layer disposed in each filling groove; a first metal layer connected to at least one epitaxial filling layer in the plurality of filling grooves to form a first ohmic contact; and a second metal layer disposed on the substrate and forming a Schottky contact with the substrate.

[0008] Furthermore, the filling groove includes: a first filling groove, which gradually increases in size along the direction from the bottom surface to the top surface of the substrate; and a second filling groove, which is disposed to the side of the first filling groove, and the depth of the second filling groove is less than the depth of the first filling groove.

[0009] Further, the epitaxial filler layer includes: a first epitaxial layer disposed in a first filler groove, at least a portion of a second metal layer being adhered to the first epitaxial layer; and a second epitaxial layer disposed in a second filler groove, wherein the first metal layer and the second epitaxial layer are connected to form a first ohmic contact.

[0010] Furthermore, the doping concentration of the second epitaxial layer is greater than that of the first epitaxial layer; and / or, the width of the first metal layer is the same as the width of the second epitaxial layer.

[0011] Furthermore, the first filling groove includes: a first groove segment and a second groove segment that are interconnected, the second groove segment being connected to one end of the first groove segment near the top surface of the substrate, the width of the second groove segment being greater than the width of the first groove segment, and the depth of the second groove segment being less than the depth of the first groove segment; wherein, the depth of the second filling groove is greater than the depth of the second groove segment and less than the depth of the first groove segment.

[0012] Furthermore, the epitaxial filling layer includes a first epitaxial layer, which includes: a first epitaxial segment disposed within a first trench segment; and a second epitaxial segment disposed within a second trench segment, wherein the doping concentration of the second epitaxial segment is less than that of the first epitaxial segment, and at least a portion of the second metal layer is connected to the second epitaxial segment.

[0013] Furthermore, there are two first filling slots, and a second filling slot is located between the two first filling slots, with the two first filling slots symmetrically arranged with respect to the center line of the second filling slot.

[0014] Furthermore, the first metal layer protrudes from the top surface of the base layer; the second metal layer has an avoidance groove, and the first metal layer is embedded in the avoidance groove.

[0015] Furthermore, the diode structure also includes a third metal layer disposed on the side of the substrate away from the filling groove, the third metal layer being connected to the substrate to form a second ohmic contact.

[0016] Furthermore, the substrate includes: an N-type substrate; an N-type epitaxial layer disposed on the N-type substrate; multiple filling trenches disposed on the N-type epitaxial layer; and a second metal layer connected to the N-type epitaxial layer to form a Schottky contact.

[0017] According to the technical solution of this invention, the diode structure includes a substrate, filling trenches, a first metal layer, and a second metal layer. The filling trenches are disposed on the substrate and extend along the length or width direction of the substrate. There are multiple filling trenches, spaced apart along the length or width direction of the substrate. An epitaxial filling layer is disposed within each filling trench. The first metal layer is connected to at least one epitaxial filling layer within the multiple filling trenches to form a first ohmic contact. The second metal layer is disposed on the substrate and forms a Schottky contact with the substrate. The combination of multiple filling trenches spaced apart along the length or width direction of the substrate and the epitaxial filling layer significantly optimizes the current distribution inside the device, avoids hot spots and electric field abrupt changes caused by current concentration, and improves the device's withstand voltage and reliability. The first metal layer directly forms a first ohmic contact with the epitaxial filling layer, reducing resistance loss in traditional contact methods, thereby reducing the device's on-resistance and improving efficiency. The second metal layer forms a Schottky contact with the substrate, which enhances the height of the Schottky barrier, optimizes reverse recovery characteristics, reduces reverse leakage current, and improves the diode's performance. The combination of the filling groove and the epitaxial filling layer increases the charge storage area of ​​the device, thereby improving the diode's resistance to sudden surge currents, and enhancing the device's high voltage withstand capability and reliability. Attached Figure Description

[0018] The accompanying drawings, which form part of this application, are used to provide a further understanding of the invention. The illustrative embodiments of the invention and their descriptions are used to explain the invention and do not constitute an undue limitation of the invention. In the drawings:

[0019] Figure 1 A schematic diagram of an embodiment of the diode structure according to the present invention is shown;

[0020] Figure 2 A schematic diagram of the filling groove of the diode structure according to the present invention is shown;

[0021] Figure 3 A schematic diagram of the epitaxial filling layer in the diode structure according to the present invention is shown;

[0022] Figure 4 A schematic diagram of the forming of the first metal layer in the diode structure according to the present invention is shown;

[0023] Figure 5 A schematic diagram of the forming of the second metal layer in the diode structure according to the present invention is shown.

[0024] The above figures include the following reference numerals:

[0025] 100, Substrate layer; 200, Filling trench; 300, Epitaxial filler layer; 400, First metal layer; 500, Second metal layer; 210, First filling trench; 220, Second filling trench; 310, First epitaxial layer; 320, Second epitaxial layer; 211, First trench segment; 212, Second trench segment; 311, First epitaxial segment; 312, Second epitaxial segment; 510, Clearance groove; 600, Third metal layer; 110, N-type substrate; 120, N-type epitaxy; 130, Top surface; 140, Bottom surface. Detailed Implementation

[0026] It should be noted that, unless otherwise specified, the embodiments and features described in this application can be combined with each other. The present invention will now be described in detail with reference to the accompanying drawings and embodiments.

[0027] Please refer to Figures 1 to 5 This application provides a diode structure, including: a substrate 100; filling grooves 200 disposed on the substrate 100, the filling grooves 200 extending along the length or width direction of the substrate 100, and there are multiple filling grooves 200, which are spaced apart along the length or width direction of the substrate 100; an epitaxial filling layer 300 disposed in each filling groove 200; a first metal layer 400 connected to at least one epitaxial filling layer 300 in the multiple filling grooves 200 to form a first ohmic contact; and a second metal layer 500 disposed on the substrate 100 and forming a Schottky contact with the substrate 100.

[0028] The diode structure provided in this application includes a substrate 100, filling trenches 200, a first metal layer 400, and a second metal layer 500. The filling trenches 200 are disposed on the substrate 100 and extend along the length or width direction of the substrate 100. Multiple filling trenches 200 are spaced apart along the length or width direction of the substrate 100. An epitaxial filling layer 300 is disposed within each filling trench 200. The first metal layer 400 is connected to at least one epitaxial filling layer 300 within the multiple filling trenches 200 to form a first ohmic contact. The second metal layer 500 is disposed on the substrate 100 and forms a Schottky contact with the substrate 100. The combination of multiple filling trenches 200 spaced apart along the length or width direction of the substrate 100 with the epitaxial filling layer 300 can significantly optimize the current distribution inside the device, avoid hot spots and electric field abrupt changes caused by current concentration, and improve the device's withstand voltage and reliability. The first metal layer 400 directly forms a first ohmic contact with the epitaxial fill layer 300, reducing resistive losses in traditional contact methods, thereby lowering the on-resistance of the device and improving efficiency. The second metal layer 500 forms a Schottky contact with the substrate layer 100, which can enhance the height of the Schottky barrier, optimize reverse recovery characteristics, reduce reverse leakage current, and improve diode performance. The combination of the fill trench 200 and the epitaxial fill layer 300 increases the charge storage area of ​​the device, improving the diode's resistance to sudden surge currents, and enhancing the device's high voltage withstand capability and reliability.

[0029] In this application, the depth direction is the direction from the bottom surface 140 to the top surface 130, and the width direction is perpendicular to the depth direction.

[0030] Specifically, such as Figure 2 As shown, the filler groove 200 includes: a first filler groove 210, which gradually increases in size along the direction from the bottom surface 140 to the top surface 130 of the substrate 100; and a second filler groove 220, which is disposed to the side of the first filler groove 210 and has a depth less than that of the first filler groove 210. The gradually increasing size of the first filler groove 210 effectively optimizes the electric field distribution, especially in the reverse bias state of the device. It can prevent the electric field from concentrating at the edge of the device, increase the thickness of the PN junction, thereby reducing the breakdown probability and improving the breakdown voltage of the device.

[0031] Because the depth of the second filler trench 220 is less than that of the first filler trench 210, it can form a shallower charge trap region, which helps to reduce the leakage current of the device under reverse bias. In high-frequency and high-power applications, low leakage current can significantly reduce energy loss and improve system efficiency.

[0032] like Figure 3As shown, in this application, the epitaxial fill layer 300 includes: a first epitaxial layer 310 disposed within a first filler groove 210, with at least a portion of a second metal layer 500 bonded to the first epitaxial layer 310; and a second epitaxial layer 320 disposed within a second filler groove 220, with the first metal layer 400 connected to the second epitaxial layer 320 to form a first ohmic contact. The bonding of the second metal layer 500 to the first epitaxial layer 310, and the connection between the first metal layer 400 and the second epitaxial layer 320, form a highly efficient first ohmic contact and a Schottky contact. The ohmic contact reduces the contact resistance of the device and improves current transmission efficiency; the Schottky contact helps to reduce the forward voltage drop and improve switching speed.

[0033] By setting epitaxial layers in different filling slots, the distribution of P-type and N-type doped regions can be precisely controlled, the Schottky barrier can be optimized, leakage current under reverse bias can be significantly reduced, and the reverse blocking performance of the device can be improved.

[0034] The doping concentration of the second epitaxial layer 320 is greater than that of the first epitaxial layer 310; and / or, the width of the first metal layer 400 is the same as the width of the second epitaxial layer 320. When the width of the first metal layer 400 is the same as the width of the second epitaxial layer 320, this ensures that the contact area between the metal and the semiconductor material is maximized, thereby improving the efficiency of the ohmic contact. This means that when the device is in the conducting state, the current can pass more smoothly, reducing contact resistance, lowering the forward voltage drop, and improving the overall efficiency of the device. The high doping concentration of the second epitaxial layer 320 helps to optimize the electric field distribution inside the device. Under high electric field strength, the high doping concentration region can effectively disperse the charge and avoid electric field concentration, which helps to improve the breakdown voltage and withstand voltage capability of the device. The high doping concentration of the second epitaxial layer 320 can significantly increase the conductivity of the device, thereby improving its current carrying capacity. The first epitaxial layer 310 and the second epitaxial layer 320 are formed by P-type epitaxy.

[0035] The difference in doping concentration between the second epitaxial layer 320 and the first epitaxial layer 310 helps to form a more effective potential barrier, reducing leakage current, especially under reverse bias conditions. This improves the efficiency and reliability of the device in switching applications. The highly doped second epitaxial layer 320 provides additional charge storage space, helping to disperse current under surge current conditions and avoid localized overheating, thereby enhancing the device's surge immunity and improving its reliability in unstable operating environments.

[0036] Further, the first filling trench 210 includes: a first trench segment 211 and a second trench segment 212 that are interconnected. The second trench segment 212 is connected to one end of the first trench segment 211 near the top surface of the substrate 100. The width of the second trench segment 212 is greater than the width of the first trench segment 211, and the depth of the second trench segment 212 is less than the depth of the first trench segment 211. The second filling trench 220 has a depth greater than the depth of the second trench segment 212 and less than the depth of the first trench segment 211. The structural design of the second trench segment 212 allows for a wider range of charge distribution, which helps reduce charge concentration during device operation, thereby reducing the local electric field strength. The depth difference between the first trench segment 211 and the second trench segment 212 makes the charge distribution more uniform in different areas, optimizes the overall electric field distribution, and improves the device's charge storage capacity and breakdown voltage. The depth difference between the second filling trench 220 and the first filling trench 210 helps optimize the contact between the metal and the semiconductor, reducing contact resistance. The deeper first slot 211 ensures a good electrical connection, while the second filling slot 220 and the wider second slot 212 provide additional contact paths, making the current distribution more uniform and reducing the overall contact resistance.

[0037] The increased width of the second slot 212 means a larger contact area with the metal layer, which facilitates rapid heat dissipation. The increased depth of the second filler slot 220 provides additional heat conduction paths while maintaining electrical performance, improving overall heat dissipation efficiency and ensuring the device maintains a stable operating temperature under high-power operation.

[0038] Further, the epitaxial fill layer 300 includes a first epitaxial layer 310, which includes a first epitaxial segment 311 disposed within a first trench segment 211; and a second epitaxial segment 312 disposed within a second trench segment 212. The doping concentration of the second epitaxial segment 312 is lower than that of the first epitaxial segment 311. At least a portion of the second metal layer 500 is connected to the second epitaxial segment 312. The high doping concentration of the first epitaxial segment 311 helps to form a more effective carrier blocking layer, while the low doping concentration of the second epitaxial segment 312 helps to reduce the voltage drop during forward conduction. This concentration gradient design can optimize the electric field distribution inside the device, improve the breakdown voltage, and reduce the forward conduction resistance. The first epitaxial segment 311 with a high doping concentration can carry a larger current density, while the low doping design of the second epitaxial segment 312 helps to reduce local overheating and disperse current when subjected to high current, thereby improving the overall current carrying capacity of the device and enhancing its performance in high-power applications.

[0039] The low doping concentration of the second epitaxial segment 312 helps reduce energy storage during the reverse recovery process, thereby shortening the reverse recovery time and reducing reverse recovery losses. This is particularly important for high-frequency switching applications, improving the overall system efficiency. The connection between the second metal layer 500 and the second epitaxial segment 312 forms a more reliable ohmic contact, reducing contact resistance and improving current transmission efficiency. Especially under high temperature or high power conditions, this design ensures stable electrical performance.

[0040] Compared to traditional processes, this design avoids complex doping control and metal deposition steps, simplifies the manufacturing process, reduces production costs, and also improves production yield and device consistency.

[0041] Specifically, there are two first filler slots 210, and a second filler slot 220 is located between the two first filler slots 210. The two first filler slots 210 are symmetrically arranged with respect to the centerline of the second filler slot 220. The symmetrical distribution of the first filler slots 210 helps optimize the electric field distribution inside the device, avoiding the concentration of the electric field at the device edges, thereby reducing the local electric field strength and improving the breakdown voltage of the device. The arrangement of the second filler slot 220 further promotes the uniform distribution of the electric field, especially when the device is subjected to reverse bias, which helps to maintain the stability of device performance. The shallower depth of the second filler slot 220 and its symmetrical distribution with respect to the centerline of the first filler slot 210 help to form an effective charge control region, reducing leakage current under reverse bias. This design is beneficial for improving the performance of the device in high-voltage, low-power applications and extending the device's lifespan.

[0042] The combination of the first filling groove 210 and the second filling groove 220 increases the contact area between the metal and the semiconductor material, which helps to improve thermal conductivity and enhance the heat dissipation performance of the device. Under high current or high frequency operating conditions, this design can more effectively dissipate heat, prevent the device from overheating, and improve its operational stability and reliability.

[0043] The first metal layer 400 protrudes from the top surface of the base layer 100; the second metal layer 500 has a clearance groove 510, and the first metal layer 400 is embedded in the clearance groove 510. The embedding of the first metal layer 400 into the clearance groove 510 forms a more optimized current path, which helps the current to be evenly distributed inside the device, reduces hot spots where current is concentrated, lowers the thermal resistance of the device under high current, and improves the power handling capability and thermal stability of the device.

[0044] The combination of the protruding design of the first metal layer 400 and the embedded clearance groove 510 ensures the stability and reliability of the metal contact during device packaging and use. The protruding metal layer increases the contact area with the semiconductor material, while the embedded design prevents displacement or damage to the contact points due to stress during packaging, thus improving the mechanical stability of the metal contact. The embedded structure design, by fixing the first metal layer 400 with the clearance groove 510, enhances the mechanical strength of the device, reduces the risk of cracking at the metal layer-semiconductor interface under thermal cycling or mechanical shock, and extends the device's lifespan.

[0045] The diode structure also includes a third metal layer 600 disposed on the side of the substrate 100 away from the filling trench 200. The third metal layer 600 is connected to the substrate 100 to form a second ohmic contact. The third metal layer 600 forming the second ohmic contact can effectively disperse and increase the current flow path, thereby significantly improving the current carrying capacity of the device, which is important for applications requiring high current handling.

[0046] The substrate 100 includes: an N-type substrate 110; an N-type epitaxial layer 120 disposed on the N-type substrate 110; multiple filler trenches 200 disposed on the N-type epitaxial layer 120; and a second metal layer 500 connected to the N-type epitaxial layer 120 to form a Schottky contact. The multiple filler trenches 200 on the N-type epitaxial layer 120 effectively disperse charge and optimize the electric field distribution. Especially under reverse bias conditions, this design avoids localized electric field concentration, reduces charge trapping, and thus significantly improves the device's breakdown voltage and high-voltage withstand performance. The presence of the filler trenches 200 and their combination with the N-type epitaxial layer 120 helps form an effective carrier blocking layer, reducing reverse leakage current. The direct contact between the second metal layer 500 and the N-type epitaxial layer 120 forms a low-resistance, high-stability Schottky contact. This contact method can significantly reduce the device's forward voltage drop and improve switching speed, making it particularly suitable for high-frequency and high-power applications. The filling groove 200 is directly formed on the N-type epitaxial layer 120, avoiding complex traditional processes such as ion implantation, simplifying the manufacturing process, reducing production costs, and improving production yield.

[0047] The presence of the filling groove 200 and its combination with the N-type epitaxial layer 120 helps to form an effective carrier blocking layer and reduce reverse leakage current.

[0048] The diode structure in this application, based on the traditional SiC JBS structure, employs a trench + multiple epitaxial layer scheme to improve the device's high voltage withstand capability. The combination of epitaxial regions with different doping concentrations significantly reduces the device's leakage current; the trench epitaxial layer scheme eliminates the need for ion implantation, simplifying the process and reducing manufacturing costs; ohmic contacts and Schottky contacts enhance the device's surge capability and reduce forward voltage drop while ensuring withstand voltage performance.

[0049] In the specific manufacturing process, an N-type SiC substrate is used, and N-type epitaxy is performed. A first trench segment 211, a second filling trench 220, and a second trench segment 212 are formed on the surface through dry etching. The depth of the first trench segment 211 is greater than that of the second filling trench 220, and the depth of the second filling trench 220 is greater than that of the second trench segment 212. The width of the first trench segment 211 is smaller than that of the second filling trench 220, which is also smaller than that of the second trench segment 212. For SiC epitaxy fabrication, a P-type epitaxial layer is used to fill the trenches. The doping concentration of the second epitaxial layer 320 is greater than that of the first epitaxial segment 311, which is greater than that of the second epitaxial segment 312. A higher doping concentration in the second epitaxial layer 320 can improve the device's surge resistance, while a lower doping concentration in the second epitaxial segment 312 compared to the first epitaxial segment 311 can improve the Schottky barrier properties. The barrier reduces leakage current, and the first epitaxial segment 311 can improve the device breakdown voltage when reverse biased; a first metal layer 400 (which can be nickel) is prepared, which covers the second epitaxial layer 320 and is thermally annealed (temperature greater than 900°C) to form an ohmic contact; a second metal layer 500 (which can be aluminum or TI) is prepared at high temperature (temperature greater than 400°C), and thermal annealing is performed simultaneously during the preparation of the second metal layer 500, forming a Schottky contact between the second metal layer 500 and the SiC surface; a third metal layer 600 on the back side is prepared (using conventional processes, such as a TI / NI / Ag three-layer structure) to form an ohmic contact.

[0050] The diode structure described in this application, employing trench and multiple epitaxial layers, avoids the traditional Al ion implantation step, simplifying the overall process complexity. The novel SiC device structure, combined with epitaxial regions of varying doping concentrations, optimizes the electric field distribution, reduces leakage current, and improves high-voltage withstand capability. Optimized metal contact design, such as the combination of a first metal layer 400 and a second metal layer 500, increases the contact area, facilitating rapid heat dissipation, improving the device's heat dissipation performance, and enhancing operational stability and reliability under high power and high-temperature environments. By avoiding processes such as ion implantation that may introduce defects, the failure rate during manufacturing is reduced, improving diode production yield. Through trench design and epitaxial layers with varying doping concentrations, this process optimizes current distribution, reduces localized overheating and electric field concentration, lowers the forward voltage drop, and improves the device's surge current capability.

[0051] As can be seen from the above description, the embodiments of the present invention achieve the following technical effects:

[0052] The diode structure provided in this application includes a substrate 100, filling trenches 200, a first metal layer 400, and a second metal layer 500. The filling trenches 200 are disposed on the substrate 100 and extend along the length or width direction of the substrate 100. Multiple filling trenches 200 are spaced apart along the length or width direction of the substrate 100. An epitaxial filling layer 300 is disposed within each filling trench 200. The first metal layer 400 is connected to at least one epitaxial filling layer 300 within the multiple filling trenches 200 to form a first ohmic contact. The second metal layer 500 is disposed on the substrate 100 and forms a Schottky contact with the substrate 100. The combination of multiple filling trenches 200 spaced apart along the length or width direction of the substrate 100 with the epitaxial filling layer 300 can significantly optimize the current distribution inside the device, avoid hot spots and electric field abrupt changes caused by current concentration, and improve the device's withstand voltage and reliability. The first metal layer 400 directly forms a first ohmic contact with the epitaxial fill layer 300, reducing resistive losses in traditional contact methods, thereby lowering the on-resistance of the device and improving efficiency. The second metal layer 500 forms a Schottky contact with the substrate layer 100, which can enhance the height of the Schottky barrier, optimize reverse recovery characteristics, reduce reverse leakage current, and improve diode performance. The combination of the fill trench 200 and the epitaxial fill layer 300 increases the charge storage area of ​​the device, improving the diode's resistance to sudden surge currents, and enhancing the device's high voltage withstand capability and reliability.

[0053] It should be noted that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the exemplary embodiments according to this application. As used herein, the singular form is intended to include the plural form as well, unless the context clearly indicates otherwise. Furthermore, it should be understood that when the terms "comprising" and / or "including" are used in this specification, they indicate the presence of features, steps, operations, devices, components, and / or combinations thereof.

[0054] Unless otherwise specifically stated, the relative arrangement, numerical expressions, and values ​​of the components and steps described in these embodiments do not limit the scope of this application. It should also be understood that, for ease of description, the dimensions of the various parts shown in the drawings are not drawn to actual scale. Techniques, methods, and devices known to those skilled in the art may not be discussed in detail, but where appropriate, such techniques, methods, and devices should be considered part of the specification. In all examples shown and discussed herein, any specific values ​​should be interpreted as merely exemplary and not as limitations. Therefore, other examples of exemplary embodiments may have different values. It should be noted that similar reference numerals and letters in the following drawings denote similar items; therefore, once an item is defined in one drawing, it need not be further discussed in subsequent drawings.

[0055] For ease of description, spatial relative terms such as "above," "on top of," "on the upper surface of," "above," etc., are used herein to describe the spatial positional relationship of a device or feature as shown in the figures to other devices or features. It should be understood that spatial relative terms are intended to encompass different orientations in use or operation beyond the orientation of the device as described in the figures. For example, if the device in the figures were inverted, a device described as "above" or "on top of" other devices or structures would subsequently be positioned as "below" or "under" other devices or structures. Thus, the exemplary term "above" can include both "above" and "below." The device may also be positioned in other different ways (rotated 90 degrees or in other orientations), and the spatial relative descriptions used herein will be interpreted accordingly.

[0056] It should be noted that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the exemplary embodiments according to this application. As used herein, the singular form is intended to include the plural form as well, unless the context clearly indicates otherwise. Furthermore, it should be understood that when the terms "comprising" and / or "including" are used in this specification, they indicate the presence of features, steps, operations, devices, components, and / or combinations thereof.

[0057] It should be noted that the terms "first," "second," etc., used in the specification, claims, and accompanying drawings of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of this application described herein can be implemented in sequences other than those illustrated or described herein.

[0058] The above description is merely a preferred embodiment of the present invention and is not intended to limit the invention. Various modifications and variations can be made to the present invention by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A diode structure, characterized in that, include: Basal layer (100); A filling groove (200) is disposed on the substrate (100). The filling groove (200) extends along the length or width direction of the substrate (100). There are multiple filling grooves (200), which are spaced apart along the length or width direction of the substrate (100). An extended filling layer (300) is disposed in each filling groove (200). A first metal layer (400) is connected to at least one of the epitaxial filler layers (300) within the plurality of filler grooves (200) to form a first ohmic contact; A second metal layer (500) is disposed on the substrate layer (100) and forms a Schottky contact with the substrate layer (100); The first metal layer (400) protrudes from the top surface of the base layer (100); The second metal layer (500) is provided with a clearance groove (510), and the first metal layer (400) is embedded in the clearance groove (510); The filling groove (200) includes: The opening of the first filling groove (210) gradually increases along the direction from the bottom surface to the top surface of the base layer (100). The second filling groove (220) is disposed on the side of the first filling groove (210), and the depth of the second filling groove (220) is less than the depth of the first filling groove (210); The first filling slot (210) includes: A first groove segment (211) and a second groove segment (212) are interconnected. The second groove segment (212) is connected to one end of the first groove segment (211) near the top surface of the base layer (100). The width of the second groove segment (212) is greater than the width of the first groove segment (211), and the depth of the second groove segment (212) is less than the depth of the first groove segment (211). The depth of the second filling groove (220) is greater than the depth of the second groove segment (212) and less than the depth of the first groove segment (211); The epitaxial filler layer (300) includes a first epitaxial layer (310), which comprises: The first extension segment (311) is disposed within the first groove segment (211); The second epitaxial segment (312) is disposed within the second trench segment (212), the doping concentration of the second epitaxial segment (312) is less than the doping concentration of the first epitaxial segment (311), and at least a portion of the second metal layer (500) is connected to the second epitaxial segment (312).

2. The diode structure according to claim 1, characterized in that, The epitaxial filler layer (300) includes: The first epitaxial layer (310) is disposed in the first filling groove (210), and at least a portion of the second metal layer (500) is attached to the first epitaxial layer (310); The second epitaxial layer (320) is disposed in the second filling groove (220), and the first metal layer (400) is connected to the second epitaxial layer (320) to form the first ohmic contact.

3. The diode structure according to claim 2, characterized in that, The doping concentration of the second epitaxial layer (320) is greater than the doping concentration of the first epitaxial layer (310); and / or, The width of the first metal layer (400) is the same as the width of the second epitaxial layer (320).

4. The diode structure according to claim 1, characterized in that, There are two first filling slots (210), and the second filling slot (220) is located between the two first filling slots (210). The two first filling slots (210) are symmetrically arranged with respect to the center line of the second filling slot (220).

5. The diode structure according to claim 1, characterized in that, The diode structure also includes: A third metal layer (600) is disposed on the side of the base layer (100) away from the filling groove (200), and the third metal layer (600) is connected to the base layer (100) to form a second ohmic contact.

6. The diode structure according to claim 1, characterized in that, The base layer (100) includes: N-type substrate (110); An N-type epitaxial layer (120) is disposed on the N-type substrate (110), and a plurality of filling trenches (200) are respectively disposed on the N-type epitaxial layer (120). The second metal layer (500) is connected to the N-type epitaxial layer (120) to form the Schottky contact.

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