A Large Model-Assisted Circuit Design Method Embedding Transistor Electrical Characteristics

Abstract

The present invention discloses a large model-assisted circuit design method for embedding transistor electrical characteristics, which relates to the field of electronic design automation technology and solves the technical problem that it is still difficult to achieve a high degree of automation in current electronic design. The method includes obtaining the design objective of the circuit, using a large model to generate an initial solution for the design objective, and generating an objective function for optimizing the circuit based on the initial solution of the design objective; mapping the electrical characteristics of the transistors in the circuit to the design parameters of the circuit, generating a corresponding netlist, and simulating the design of the circuit according to the netlist to obtain a simulation result; combining the objective function with the simulation result to optimize the initial solution and obtain an optimal circuit design. The present invention can achieve a high degree of automation in electronic design.

Description

Technical Field

[0001] The present invention relates to the field of electronic design automation technology, and in particular to a large model-assisted circuit design method that embeds transistor electrical characteristics. Background Art

[0002] In recent years, Electronic Design Automation (EDA) technology has made remarkable progress in the field of integrated circuit (IC) design, especially in the design of analog integrated circuits (analog ICs). Analog IC design involves the accurate modeling of the electrical characteristics, non-linear behavior, and physical implementation of circuits, which is a key link to ensure product performance, reliability, and power consumption optimization. With the continuous increase in the complexity of electronic products, analog IC design faces huge challenges in design optimization, multi-objective balance, and efficient simulation, which has promoted the growing demand for design automation technology.

[0003] Currently, analog IC design automation mainly relies on traditional optimization algorithms and deep learning techniques. These methods have improved design efficiency and accuracy to a certain extent, but there are still many limitations. For example, traditional optimization algorithms have high computational costs and are difficult to converge quickly when dealing with high-dimensional and multi-objective design spaces; although deep learning methods can learn complex electrical characteristics through a large amount of data, they are still insufficient in accurate modeling and real-time optimization. In addition, parameter adjustment and simulation verification in the analog IC design process usually require a large amount of manual intervention, making it difficult to achieve true high automation, which limits the further improvement of design efficiency and design quality.

[0004] In the process of implementing the present invention, the inventors found that there are at least the following problems in the prior art:

[0005] Currently, it is difficult to achieve high automation in electronic design. Summary of the Invention

[0006] The purpose of the present invention is to provide a large model-assisted circuit design method that embeds transistor electrical characteristics to solve the technical problem that it is difficult to achieve high automation in electronic design in the prior art. The many technical effects that can be produced by the preferred technical solutions provided by the present invention are described in detail below.

[0007] To achieve the above object, the present invention provides the following technical solutions:

[0008] A large model-assisted circuit design method for embedding transistor electrical characteristics provided by the present invention includes the following steps: obtaining the design objective of the circuit, using the large model to generate an initial solution of the design objective, and generating an objective function for optimizing the circuit according to the initial solution of the design objective; mapping the electrical characteristics of the transistors in the circuit into the design parameters of the circuit, generating a corresponding netlist, and simulating the design of the circuit according to the netlist to obtain a simulation result; combining the objective function with the simulation result to optimize the initial solution and obtain the optimal circuit design.

[0009] Optionally, the step of using the large model to generate an initial solution of the design objective includes: retrieving domain knowledge related to the professional field of optimizing circuit design in the knowledge base according to the design objective; decomposing the design objective into multiple subtasks, and embedding the domain knowledge as a constraint condition into the optimization process of the multiple subtasks to generate an initial solution of the design objective.

[0010] Optionally, in the optimization process of the multiple subtasks, by combining the large-signal parameters and small-signal parameters of the circuit, the electrical behavior of the transistor is comprehensively described, and the circuit characteristics are decoupled from the process limitations of the circuit.

[0011] Optionally, the initial solution of the design objective includes: the initial size setting of the transistor, the bias circuit parameters, and the configuration of the basic topology.

[0012] Optionally, the step of generating an objective function for optimizing the circuit according to the initial solution of the optimization objective includes: analyzing the performance indicators and design constraints of the circuit to determine the optimization objective; wherein, the performance indicators include the gain, bandwidth, noise figure, and linearity in the circuit; the design constraints include the power consumption limit, area limit, and manufacturing process limit of the circuit; according to the optimization objective, using the large model to generate the objective function.

[0013] Optionally, the step of mapping the electrical characteristics of the transistors in the circuit into the design parameters of the circuit and generating a corresponding netlist includes: parsing out the electrical characteristics of the transistor, including transconductance, transition frequency, overdrive voltage, and drain-source voltage; associating the transconductance, transition frequency, overdrive voltage, and drain-source voltage of the transistor with the design parameters; generating a corresponding netlist from the associated content.

[0014] Optionally, the method further includes: using the channel length and channel width of the transistor as design parameters.

[0015] Optionally, the transconductance of the transistor The association formula with the design parameters is:

[0016] ;

[0017] Among them, is the carrier mobility of the transistor, is the oxide capacitance of the transistor, is the channel width of the transistor, is the channel length of the transistor, is the drain-source current of the transistor;

[0018] The transition frequency of the transistor The correlation formula with the design parameters is:

[0019] ;

[0020] Among them, is the initial transconductance of the transistor;

[0021] The overdrive voltage of the transistor The correlation formula with the design parameters is:

[0022] ;

[0023] Among them, is the initial transition frequency of the transistor;

[0024] The drain-source voltage of the transistor The correlation formula with the design parameters is:

[0025] .

[0026] Optionally, combining the objective function with the simulation results to optimize the initial solution to obtain an optimal circuit design includes: constructing a comprehensive optimization model using the objective function and the simulation results; using an optimization algorithm to iteratively optimize the comprehensive optimization model to obtain a circuit design model; generating an optimal circuit design through the circuit design model.

[0027] Optionally, the optimization algorithm includes a genetic algorithm, a particle swarm optimization algorithm, and a simulated annealing algorithm.

[0028] Implementing one of the above technical solutions of the present invention has the following advantages or beneficial effects:

[0029] The large model-assisted circuit design method for embedding transistor electrical characteristics provided by the present invention uses a large model as the core controller in analog integrated circuit design. First, an initial solution is generated according to the design goal, and then the initial solution is optimized by embedding the electrical characteristics of the transistor and simulating the circuit, realizing the full process automation from the extraction of the design goal, knowledge retrieval, generation of the objective function, to the mapping of electrical characteristics, generation of the simulation model, and final optimization. The whole process requires no manual intervention, achieving a high degree of automation in electronic design; it not only significantly improves the efficiency of analog integrated circuit design, but also ensures the accuracy and reliability of the design results, promoting the development of analog integrated circuit design technology. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following will briefly introduce the drawings required for the description of the embodiments. Obviously, the following drawings are only some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can be obtained according to these drawings. In the drawings:

[0031] Figure 1 is a flowchart of the large model-assisted circuit design method for embedding transistor electrical characteristics according to the embodiment of the present invention;

[0032] Figure 2 is a flowchart of step S1 of the large model-assisted circuit design method for embedding transistor electrical characteristics according to the embodiment of the present invention;

[0033] Figure 3 is a flowchart of step S2 of the large model-assisted circuit design method for embedding transistor electrical characteristics according to the embodiment of the present invention;

[0034] Figure 4 is the final optimized circuit diagram according to the embodiment of the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0035] In order to make the purpose, technical solutions and advantages of the present invention clearer, the various exemplary embodiments to be described below will refer to the corresponding drawings, which form a part of the exemplary embodiments and describe various exemplary embodiments that may be adopted to implement the present invention. Unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present disclosure. It should be understood that they are only examples of processes, methods, devices, etc. consistent with some aspects of the present invention as detailed in the appended claims. Other embodiments may also be used, or structural and functional modifications may be made to the embodiments listed herein without departing from the scope and essence of the present invention.

[0036] In the description of the present invention, it should be understood that the terms "center", "longitudinal", "lateral", etc. indicate the orientation or positional relationship based on the orientation shown in the drawings. These are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the elements referred to must have a specific orientation, be constructed and operated in a specific orientation. The terms "first", "second", etc. are only used for descriptive purposes and cannot be understood as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. The meaning of the term "plurality" is two or more. The terms "connected" and "connected to" should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, an integral connection, a mechanical connection, an electrical connection, a communication connection, a direct connection, an indirect connection through an intermediate medium. It can be the communication inside two elements or the interaction relationship between two elements. The term "and / or" includes any and all combinations of one or more of the related listed items. For those of ordinary skill in the art, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0037] In order to illustrate the technical solutions described in the present invention, the following will be described through specific embodiments, and only the parts related to the embodiments of the present invention are shown.

[0038] Embodiment 1:

[0039] As Figure 1 shown, the present invention provides a large model-assisted circuit design method for embedding transistor electrical characteristics, including the following steps: S1. Obtain the design target of the circuit, use the large model to generate an initial solution of the design target, and generate an objective function for optimizing the circuit according to the initial solution of the design target; S2. Map the electrical characteristics of the transistors in the circuit into design parameters of the circuit, generate a corresponding netlist, and simulate the design of the circuit according to the netlist to obtain a simulation result; S3. Combine the objective function with the simulation result to optimize the initial solution and obtain the optimal circuit design.

[0040] The large model-assisted circuit design method for embedding transistor electrical characteristics provided in this embodiment is applicable to the field of electronic design automation, especially applicable to the automated design of analog integrated circuits. Using the large model as the core controller in the design of analog integrated circuits, an initial solution is first generated according to the design target, and then the initial solution is optimized by embedding the electrical characteristics of the transistors and simulating the circuit, realizing the full process automation from the extraction of the design target, knowledge retrieval, generation of the objective function, to the mapping of electrical characteristics, generation of the simulation model, and final optimization. The whole process requires no manual intervention, achieving a high degree of automation in electronic design; not only significantly improving the efficiency of analog integrated circuit design, but also ensuring the accuracy and reliability of the design results, and promoting the development of analog integrated circuit design technology.

[0041] Next, in combination with Figures 1 to 4, to introduce in detail the specific implementation steps of the large model-assisted circuit design method for embedding transistor electrical characteristics provided by this embodiment:

[0042] First, perform step S1: Obtain the design objectives of the circuit, use the large model to generate an initial solution for the design objectives, and generate an objective function for optimizing the circuit based on the initial solution of the design objectives. In this embodiment, a large model (Large Language Model, abbreviated as LLM, full name is large language model) is used as the core controller, and the circuit specifications are input into the large model, and the large model will automatically extract the design objectives according to the circuit specifications. It should be noted that the circuit specifications refer to the performance parameters and characteristic regulations of circuit components in the circuit, including size, parameters, and types, etc.; the circuit specifications are important indicators for circuit design and assembly.

[0043] Specifically, as Figure 2 shown, using the large model to generate an initial solution for the design objectives includes: S11. Retrieve domain knowledge related to the professional field of optimizing circuit design in the knowledge base according to the design objectives; after obtaining the design objectives, relevant circuit design professional knowledge related to the design objectives will be retrieved in the knowledge base of the large language model. Based on the retrieved domain knowledge, it is possible to assist the large model in generating high-quality initial solutions that meet the design requirements. S12. Decompose the design objectives into multiple subtasks, and embed the domain knowledge as constraints into the optimization process of multiple subtasks to generate an initial solution for the design objectives. Use the large model to decompose the design objectives into multiple subtasks. For example, the subtasks can be transistor size optimization tasks, matching circuit adjustment tasks, bias point optimization tasks, temperature compensation design tasks, etc.; and use relevant domain knowledge as the optimization conditions for multiple subtasks, which can ensure that the optimization process of each subtask meets the professional standards and design requirements of analog integrated circuit design. Among them, the initial solution of the design objectives includes the initial size setting of the transistor, bias circuit parameters, and the configuration of the basic topology structure, etc.

[0044] It should be noted that in the optimization process of multiple subtasks, by combining the large-signal parameters and small-signal parameters of the circuit, the electrical behavior of the transistor is comprehensively described, and the circuit characteristics are decoupled from the process limitations of the circuit. The large-signal parameters are used to analyze the behavior of the circuit under a large-amplitude input signal, usually involving the non-linear characteristics of non-linear elements (such as transistors); the small-signal parameters are used to analyze the behavior of the circuit under a small input signal. Assuming that the signal amplitude is small enough, the non-linear elements can be approximated as linear, usually involving the linear characteristics of non-linear elements; combining the large-parameter signal and the small-parameter signal can comprehensively understand the performance of the circuit under different signal conditions, which is beneficial to the decoupling of the circuit characteristics and the circuit process limitations. The small-signal parameters include transconductance and corner frequency etc., and the large-signal parameters include drain-source voltage and overdrive voltage etc. Through this characterization method, the performance of the transistor under different working conditions can be more accurately reflected, ensuring that the optimization results can meet the actual application requirements of the circuit while taking into account process constraints.

[0045] Furthermore, generate the objective function of the optimized circuit according to the initial solution of the optimization goal, including: analyzing the performance indicators and design constraints of the circuit to determine the optimization goal; among them, the performance indicators include gain, bandwidth, noise figure, and linearity in the circuit; the design constraints include power consumption limit, area limit, and manufacturing process limit of the circuit; according to the optimization goal, use the large model to generate the objective function. Based on the performance indicators and design constraints, the large language model can generate a specific and accurate objective function. In order to make the generated objective function accessible to subsequent models, the objective function can be converted into an interface that can be called by subsequent steps, enabling the model to receive feedback at the complex physical world level and eliminating the dependence on the mathematical ability of the large model during the optimization process.

[0046] Then, execute step S2, map the electrical characteristics of the transistors in the circuit to the design parameters of the circuit, generate the corresponding netlist, and simulate the design of the circuit according to the netlist to obtain the simulation results. Circuit simulation based on electrical characteristics can more accurately reflect the performance of transistors under different working conditions, ensuring that the optimization results can meet the actual application requirements of the circuit while taking into account process constraints.

[0047] Specifically, as Figure 3 shown, mapping the electrical characteristics of the transistors in the circuit to the design parameters of the circuit and generating the corresponding netlist includes: S21, parsing out the electrical characteristics of the transistors, including transconductance, transition frequency, overdrive voltage, and drain-source voltage; S22, associating the transconductance, transition frequency, overdrive voltage, and drain-source voltage of the transistors with the design parameters; S23, generating the corresponding netlist from the associated content. During this process, the channel length L and channel width W of the transistors are used as design parameters. The netlist is used to describe the connection relationships and component information of each component in the circuit, usually including the following information: the type of components in the circuit (such as transistors, resistors, capacitors, etc.), the specific parameter values describing the components (such as the resistance value of a certain resistor is 1Ω), the connection relationships between components (the connection relationships of the drain, gate, source, and body terminals of transistor M1), etc.

[0048] In step S22, the relationships between each electrical characteristic and the design parameters are as follows: the transconductance of the transistor The association formula with the design parameters is:

[0049] ;

[0050] where is the carrier mobility of the transistor, is the oxide capacitance of the transistor, is the channel width of the transistor, is the channel length of the transistor, is the drain-source current of the transistor; this formula indicates that the transconductance is proportional to By adjusting the channel width and the channel length , the transconductance of the transistor can be precisely controlled, thereby optimizing the gain and other performance metrics of the circuit.

[0051] The transition frequency of the transistor is related to the design parameters by the formula:

[0052] ;

[0053] where is the initial transconductance of the transistor; this formula shows that the transition frequency is proportional to By shortening the channel length , the transition frequency of the transistor can be significantly increased, improving the bandwidth and high-frequency performance of the circuit.

[0054] The overdrive voltage of the transistor is related to the design parameters by the formula:

[0055] ;

[0056] where is the initial transition frequency of the transistor; this formula demonstrates the relationship between and By reasonably designing the channel length L and the channel width W, the overdrive voltage of the transistor can be optimized to ensure the stability and linearity of the circuit under different operating conditions.

[0057] The drain-source voltage of the transistor is related to the design parameters by the formula:

[0058] ;

[0059] It shows that is proportional to By adjusting the channel length and the channel width , the drain-source voltage of the transistor can be controlled to meet the power consumption and performance requirements of the circuit.

[0060] Based on the above formulas, the electrical characteristics of the transistor can be mapped to specific design parameters and It can more accurately reflect the performance of transistors under different working conditions, ensure that the optimization results can meet the actual application requirements of the circuit, and take into account process constraints. When generating the circuit netlist, according to the design parameters and , it can ensure the accurate manifestation of electrical characteristics in the simulation tool. The specific parameter configurations of each transistor are detailedly recorded in the netlist, providing basic data for subsequent simulation and optimization.

[0061] As an alternative implementation, a simulation interface compatible with the simulation tool (such as SPICE) can be constructed through the large model to be opened to subsequent simulation tools to achieve accurate simulation of electrical characteristics. The simulation interface can effectively transfer the design parameters to the simulation tool and feedback the simulation results to the optimization module, ensuring that the feedback in the optimization process can effectively reflect the actual performance of the design parameters.

[0062] Finally, execute step S3, combine the objective function with the simulation results, optimize the initial solution, and obtain the optimal circuit design. By combining the objective function and the simulation results to optimize the initial solution, the model can learn a large number of complex electrical characteristics and improve the accuracy of the circuit design; only by inputting the circuit specifications, a circuit design diagram as shown in Figure 4 can be obtained, and the whole process requires no manual intervention, realizing high-precision automation of circuit design.

[0063] Specifically, combining the objective function with the simulation results to optimize the circuit and obtain the optimal circuit design includes: S31, constructing a comprehensive optimization model using the objective function and the simulation results; S32, iteratively optimizing the comprehensive optimization model using an optimization algorithm to obtain a circuit design model; S3, generating the optimal circuit design through the circuit design model. As shown in Figure 4 , for the circuit diagram obtained by using the method of this embodiment, only by inputting the required circuit specifications, a high-precision circuit design can be obtained, realizing high automation of circuit design and greatly improving the design efficiency. Optionally, when iteratively optimizing the comprehensive optimization model, the optimization algorithm includes genetic algorithm, particle swarm optimization algorithm, and simulated annealing algorithm. Use the optimization algorithm to iteratively optimize the comprehensive optimization model to meet the specifications required in the design goal.

[0064] After obtaining the final circuit design scheme, the circuit design scheme can also be evaluated through the large model; such as checking the convergence of the curve or the distribution of the Pareto front to evaluate the final design scheme. If it is detected that the final design scheme does not converge, the large model adjusts the hyperparameters (such as learning rate, number of iterations, etc.) in the optimization process and re-executes the optimization steps to ensure the convergence and reliability of the optimization results.

[0065] The embodiments are only special cases and do not indicate that the present invention is such an implementation.

[0066] The above are only the preferred embodiments of the present invention. Those skilled in the art will know that without departing from the spirit and scope of the present invention, various changes or equivalent replacements can be made to these features and embodiments. Additionally, under the teaching of the present invention, these features and embodiments can be modified to adapt to specific situations and materials without departing from the spirit and scope of the present invention. Therefore, the present invention is not limited by the specific embodiments disclosed herein, and all embodiments falling within the scope of the claims of this application belong to the protection scope of the present invention.

Claims

1. A large model-assisted circuit design method embedded with transistor electrical characteristics, characterized in that: The following steps are involved: Obtaining a design goal of a circuit, generating a preliminary solution of the design goal using a large model, and generating an objective function for optimizing the circuit based on the preliminary solution of the design goal; Mapping electrical characteristics of transistors in the circuit into design parameters of the circuit, generating a corresponding netlist, and simulating the design of the circuit according to the netlist to obtain simulation results; Combining the objective function with the simulation result, optimizing the initial solution, and obtaining an optimal circuit design; The method of generating a preliminary solution of the design target by using a large model includes: Retrieving domain knowledge related to the optimization circuit design profession in the knowledge base according to the design goal; Decomposing the design goal into multiple subtasks, and embedding the domain knowledge as a constraint condition into the optimization process of the multiple subtasks to generate a preliminary solution to the design goal; In the optimization process of the plurality of subtasks, the electrical behavior of the transistor is fully described by combining large signal parameters and small signal parameters of the circuit, and the circuit characteristics are decoupled from the process limitations of the circuit; Mapping the electrical characteristics of the transistors in the circuit into design parameters of the circuit to generate a corresponding netlist includes: Analyzing the electrical characteristics of the transistor, including transconductance, corner frequency, overdrive voltage, and drain-source voltage; correlating a transconductance, a corner frequency, an overdrive voltage, and a drain-source voltage of the transistor with the design parameters; Generate a corresponding netlist from the associated content; The method further includes: taking the channel length and channel width of the transistor as design parameters.

2. A large model-assisted circuit design method for embedding transistor electrical characteristics according to claim 1, characterized in that: The initial solution of the design goal includes: initial size setting of the transistor, bias circuit parameters and configuration of the basic topology structure.

3. The large model-assisted circuit design method for embedding transistor electrical characteristics according to claim 1, characterized in that: Generating an objective function for optimizing the circuit according to the initial solution of the optimization target includes: Analyze the performance indicators and design constraints of the circuit to determine the optimization target; wherein the performance indicators include the gain, bandwidth, noise figure and linearity in the circuit; the design constraints include the power consumption limit, area limit and manufacturing process limit of the circuit; According to the optimization goal, the objective function is generated using the large model.

4. The large model-assisted circuit design method for embedding transistor electrical characteristics according to claim 1, characterized in that: The transconductance of the transistor The associated formula with the design parameters is: ； in, is the carrier mobility of the transistor, is the oxide layer capacitance of the transistor, is the channel width of the transistor, is the channel length of the transistor, is the drain-source current of the transistor; The transistor's corner frequency The associated formula with the design parameters is: ； in, is the initial transconductance of the transistor; The overdrive voltage of the transistor The associated formula with the design parameters is: ； in, is the initial turning frequency of the transistor; The drain-source voltage of the transistor The associated formula with the design parameters is: 。 5. The large model-assisted circuit design method for embedding transistor electrical characteristics according to claim 1, characterized in that: The step of combining the objective function with the simulation result to optimize the initial solution and obtain an optimal circuit design includes: Constructing a comprehensive optimization model using the objective function and the simulation results; Iteratively optimizing the comprehensive optimization model using an optimization algorithm to obtain a circuit design model; An optimal circuit design is generated through the circuit design model.

6. A large model-assisted circuit design method for embedding transistor electrical characteristics according to claim 5, characterized in that: The optimization algorithms include genetic algorithm, particle swarm optimization algorithm and simulated annealing algorithm.

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