Schottky diode and manufacturing method thereof
By designing the recess on the protection ring of the Schottky diode and increasing the contact area between the protection ring and the metal layer, the problem of high current density during reverse surge is solved, the reverse surge tolerance is enhanced and the stability of the forward voltage drop is maintained.
Patent Information
- Application Number
- CN202510160299.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-02-13
- Publication Date
- 2025-05-13
AI Technical Summary
During the reverse surge of existing Schottky diodes, the small area of the P-type protection ring causes the PN junction to withstand extremely high current density, and the reverse surge failure, and expanding the protection ring area will reduce the Schottky junction area and increase the forward voltage drop.
The recesses are designed on the protection ring to increase the contact area between the protection ring and the metal layer, disperse the reverse surge current density, enhance the reverse surge tolerance, and maintain the effective area of the Schottky junction.
Effectively disperses and reduces the reverse surge current density, enhances the reverse surge tolerance of Schottky diodes, while avoiding the increase in forward voltage drop.
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Figure CN119997579A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of semiconductor technology, and in particular to a Schottky diode and a method for manufacturing the same. Background Art
[0002] Currently, planar Schottky diodes on the market generally use a parallel design of a Schottky junction and a PN junction formed at a P-type diffusion guard ring. The core function of this P-type guard ring is to optimize and improve the distribution characteristics of the edge electric field, thereby improving the overall performance of the device.
[0003] However, since the area of the P-type guard ring is relatively small, when encountering a reverse surge, the PN junction there will be subjected to an extremely high current density, resulting in reverse surge failure. In other words, the reverse surge withstand capability is directly limited by the PN junction area formed by the P-type guard ring. In order to enhance the reverse surge withstand capability, the area of the P-type guard ring needs to be enlarged in theory, but this will inevitably reduce the area of the Schottky junction, thereby increasing the forward voltage drop. Summary of the invention
[0004] In order to at least overcome the above-mentioned deficiencies in the prior art, the object of the present application is to provide a Schottky diode and a method for manufacturing the same, wherein the Schottky diode comprises:
[0005] substrate;
[0006] an epitaxial layer located on one side of the substrate;
[0007] A barrier layer located at a side of the epitaxial layer away from the substrate and a guard ring surrounding the barrier layer, the guard ring comprising a first region and a second region, the first region being arranged around the second region, and the second region of the guard ring having at least one recessed portion recessed toward the substrate at a side away from the substrate;
[0008] an oxide layer located on a side of the epitaxial layer away from the substrate; an orthographic projection of the first region of the guard ring on the substrate is located within an orthographic projection of the oxide layer on the substrate; the oxide layer comprises a first opening, and an orthographic projection of the second region of the guard ring and the barrier layer on the substrate is located within an orthographic projection of the first opening on the substrate;
[0009] a first metal layer located on the barrier layer, the second region of the guard ring, and the oxide layer on a side away from the substrate; at least a portion of the first metal layer is in contact with the barrier layer, and another at least a portion of the first metal layer extends to the recessed portion and is in contact with the second region of the guard ring;
[0010] A second metal layer is located on a side of the substrate away from the epitaxial layer.
[0011] In a possible implementation manner, the substrate and the epitaxial layer are N-type semiconductor layers, and the guard ring is a P-type guard ring.
[0012] In a possible implementation, in a direction parallel to the substrate surface, a width of the first region of the guard ring is 5-40 um;
[0013] In a direction perpendicular to the surface of the substrate, the first region of the guard ring has a depth of 1-10 um.
[0014] In a possible implementation, in a direction parallel to the surface of the substrate, a width of the second region of the guard ring is 5-40 um;
[0015] In a direction perpendicular to the surface of the substrate, the second region of the guard ring has a depth of 1-10 um.
[0016] In a possible implementation, the metal in the Schottky barrier layer includes nickel, chromium, or nickel platinum.
[0017] The present application also provides a method for manufacturing a Schottky diode, comprising:
[0018] providing a substrate;
[0019] forming an epitaxial layer on a surface of the substrate;
[0020] forming a first oxide layer on a surface of the epitaxial layer away from the substrate;
[0021] Etching the first oxide layer to form a first annular window; implanting boron ions through the first window to form a guard ring located on a side of the epitaxial layer away from the substrate, and forming a second oxide layer covering the first window on a side of the guard ring away from the substrate;
[0022] The second oxide layer is etched to form a second annular window; the portion of the orthographic projection of the guard ring on the substrate exposed to the orthographic projection of the second window on the substrate is the second region of the guard ring, and the rest of the guard ring is the first region of the guard ring, and the first region is arranged around the second region; the second region of the guard ring is partially corroded through the second window to form at least one recessed portion;
[0023] Etching the first oxide layer to form a third window; the third window exposes the central area of the guard ring; performing barrier metal sputtering through the third window to form a barrier layer;
[0024] A first metal layer is formed on the barrier layer, the second region of the guard ring, and the first oxide layer and the second oxide layer close to the barrier layer, and a second metal layer is formed on a side of the substrate away from the epitaxial layer; wherein at least a portion of the first metal layer is in contact with the barrier layer, and another at least a portion of the first metal layer extends into the recess and in contact with the second region of the guard ring.
[0025] In a possible implementation manner, the step of forming a first oxide layer on a surface of the epitaxial layer away from the substrate includes:
[0026] Using atmospheric pressure chemical vapor deposition to deposit Silicon dioxide.
[0027] In a possible implementation, the steps of etching the first oxide layer to form a first annular window; implanting boron ions through the first window to form a guard ring located on a side of the epitaxial layer away from the substrate, and forming a second oxide layer covering the first window on a side of the guard ring away from the substrate include:
[0028] Uniformly coating a photoresist layer on a side of the epitaxial layer away from the substrate;
[0029] Performing photolithography on the photoresist layer through a mask having the first window pattern, and engraving the first window pattern on the photoresist layer;
[0030] Etching the first oxide layer using a buffered oxide etching solution to transfer the first window pattern to the first oxide layer;
[0031] Using a photoresist solvent to remove the residual photoresist on the first oxide layer;
[0032] Boron ions are implanted into the first window, and the protection ring is formed at the first window through high-temperature annealing and low-temperature oxidation treatment in a diffusion furnace, and the second oxide layer is generated on the side of the protection ring away from the substrate.
[0033] In a possible implementation, the second oxide layer is etched to form a second annular window; a portion of the orthographic projection of the guard ring on the substrate exposed to the orthographic projection of the second window on the substrate is the second region of the guard ring, and the rest of the guard ring is the first region of the guard ring, and the first region is arranged around the second region; and the step of partially corroding the second region of the guard ring through the second window to form at least one recessed portion includes:
[0034] Uniformly coating a photoresist layer on a side of the epitaxial layer away from the substrate;
[0035] Performing photolithography on the photoresist layer through a mask having the second window pattern, and engraving the second window pattern on the photoresist layer;
[0036] Etching the second oxide layer using an etching solvent to transfer the second window pattern to the second oxide layer;
[0037] Partially etching the second region of the guard ring in the second window using a mixed solution of nitric acid, hydrogen fluoride and water to form at least one recessed portion;
[0038] Use photoresist solvent to remove the remaining photoresist.
[0039] In a possible implementation, the step of etching the first oxide layer to form a third window; wherein the third window exposes a central area of the guard ring; and performing barrier metal sputtering through the third window to form a barrier layer includes:
[0040] Uniformly coating a photoresist layer on a side of the first oxide layer away from the epitaxial layer;
[0041] Performing photolithography on the photoresist layer through a mask having the third window, and engraving the third window pattern on the photoresist layer;
[0042] Using an etching solvent to etch the first oxide layer, and transferring the third window pattern to the first oxide layer;
[0043] Using a photoresist solvent to remove the photoresist remaining in the first oxide layer;
[0044] Depositing metal into the third window using a sputtering process to form the barrier layer;
[0045] The metal includes nickel, chromium or nickel platinum.
[0046] Based on any of the above aspects, the Schottky diode and the manufacturing method thereof provided in the embodiments of the present application, by setting a recessed portion on the guard ring, significantly increases the contact area between the guard ring and the metal layer compared to the traditional planar inner ring. This not only effectively disperses and reduces the reverse surge current density, thereby enhancing the reverse surge withstand capability, but also this improvement does not sacrifice the effective area of the Schottky junction, that is, there is no need to worry about the problem of increased Schottky forward voltage drop due to design adjustments. BRIEF DESCRIPTION OF THE DRAWINGS
[0047] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required in the embodiments will be briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present application and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without creative work.
[0048] Figure 1 One of the structural schematic diagrams of the Schottky diode provided in this embodiment;
[0049] Figure 2 A schematic diagram of a process for manufacturing a Schottky diode provided in this embodiment;
[0050] Figure 3 The second structural diagram of the Schottky diode provided in this embodiment;
[0051] Figure 4 The third structural diagram of the Schottky diode provided in this embodiment;
[0052] Figure 5 The fourth structural diagram of the Schottky diode provided in this embodiment;
[0053] Figure 6 The fifth structural diagram of the Schottky diode provided in this embodiment;
[0054] Figure 7 The sixth structural diagram of the Schottky diode provided in this embodiment;
[0055] Figure 8 The seventh structural diagram of the Schottky diode provided in this embodiment;
[0056] Fig. 9 The eighth structural diagram of the Schottky diode provided in this embodiment;
[0057] Fig.10 A schematic diagram of sub-steps of step S13 provided in this embodiment;
[0058] Fig.11 A schematic diagram of sub-steps of step S14 provided in this embodiment;
[0059] Fig.12 A schematic diagram of sub-steps of step S15 provided in this embodiment;
[0060] Fig.13 A schematic diagram of sub-steps of step S16 provided in this embodiment.
[0061] Icon: Schottky diode-10; substrate-100; epitaxial layer-200; oxide layer-300; first oxide layer-310; second oxide layer-320; guard ring-400; first region-401; second region-402; recess-500; barrier layer-600; first window-410; second window-510; third window-610; first metal layer-710; second metal layer-720. DETAILED DESCRIPTION
[0062] In order to make the purpose, technical solution and advantages of the embodiments of the present application clearer, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, rather than all the embodiments. The components of the embodiments of the present application described and shown in the drawings here can be arranged and designed in various different configurations.
[0063] Therefore, the following detailed description of the embodiments of the present application provided in the accompanying drawings is not intended to limit the scope of the present application for which protection is sought, but merely represents selected embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in the field without creative work are within the scope of protection of the present application.
[0064] It should be noted that similar reference numerals and letters denote similar items in the following drawings, and therefore, once an item is defined in one drawing, further definition and explanation thereof is not required in subsequent drawings.
[0065] In the description of this application, it should be noted that the terms "upper", "lower", etc. indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, or the orientation or positional relationship in which the product of the application is usually placed when in use, which is only for the convenience of describing this application and simplifying the description, and does not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on this application. In addition, the terms "first", "second", etc. are only used to distinguish the description, and cannot be understood as indicating or implying relative importance.
[0066] In addition, the terms "horizontal", "vertical", "overhanging" and the like do not mean that the components are required to be absolutely horizontal or overhanging, but can be slightly tilted. For example, "horizontal" only means that its direction is more horizontal than "vertical", and does not mean that the structure must be completely horizontal, but can be slightly tilted.
[0067] In the description of this application, it should also be noted that, unless otherwise clearly specified and limited, the terms "set", "install", "connect", and "connect" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, or it can be the internal communication of two elements. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to specific circumstances.
[0068] It should be noted that, in the absence of conflict, different features in the embodiments of the present application may be combined with each other.
[0069] The inventor has found that the current planar Schottky diodes on the market generally use a parallel design of a Schottky junction and a PN junction formed at a P-type diffusion guard ring, and the P-type guard ring is used to improve the distribution characteristics of the edge electric field. However, since the area of the P-type guard ring is relatively small, when encountering a reverse surge, the PN junction there will be subjected to an extremely high current density, resulting in reverse surge failure. In order to enhance the reverse surge tolerance, it is theoretically necessary to expand the area of the P-type guard ring, but this will reduce the area of the Schottky junction, thereby causing an increase in the forward voltage drop.
[0070] In view of this, this embodiment provides a solution that can reduce the risk of the above-mentioned problem. The solution provided by this embodiment is described in detail below.
[0071] The present application provides a Schottky diode 10 and a method for manufacturing the same. Figure 1The Schottky diode 10 comprises: a substrate 100; an epitaxial layer 200 located on one side of the substrate 100; a barrier layer 600 located on a side of the epitaxial layer 200 away from the substrate 100 and a guard ring 400 surrounding the barrier layer 600, wherein the guard ring 400 comprises a first region 401 and a second region 402, wherein the first region 401 is arranged around the second region 402, and the second region 402 of the guard ring 400 on a side away from the substrate 100 has at least one recessed portion 500 recessed toward the substrate 100; an oxide layer 300 located on a side of the epitaxial layer 200 away from the substrate 100; the first region 401 of the guard ring 400 is disposed on the substrate 100. The orthographic projection of the oxide layer 300 on the substrate 100 is located within the orthographic projection of the oxide layer 300 on the substrate 100; the oxide layer 300 includes a first opening, and the orthographic projections of the second region 402 of the guard ring 400 and the barrier layer 600 on the substrate 100 are located within the orthographic projection of the first opening on the substrate 100; a first metal layer 710 located on the barrier layer 600, the second region 402 of the guard ring 400, and the oxide layer 300 on a side away from the substrate 100; at least a portion of the first metal layer 710 contacts the barrier layer 600, and another at least a portion of the first metal layer 710 extends to the recess 500 and contacts the second region 402 of the guard ring 400. A second metal layer 720 located on a side of the substrate 100 away from the epitaxial layer 200.
[0072] In this embodiment, a recessed portion 500 is designed on the guard ring 400, and this design brings significant improvements compared to the traditional planar inner ring. Specifically, the provision of the recessed portion 500 increases the contact area between the guard ring 400 and the metal layer, and the reverse surge current is more effectively dispersed, thereby reducing the current density and significantly enhancing the reverse surge withstand capability of the Schottky diode 10. At the same time, this design does not sacrifice the effective area of the Schottky junction, ensuring that the Schottky diode 10 can maintain stable performance when working in the forward direction, and avoiding the problem of increased Schottky forward voltage drop due to the reduction of the Schottky junction area. Therefore, this embodiment solves the contradiction between the reverse surge capability and the forward voltage drop of the Schottky diode 10 on the market, and improves the overall performance of the Schottky diode 10.
[0073] In a possible implementation, the substrate 100 and the epitaxial layer 200 are N-type semiconductor layers, and the guard ring 400 is a P-type guard ring.
[0074] In this embodiment, the substrate 100 and the epitaxial layer 200 are both set as N-type semiconductor layers, and the guard ring 400 introduced to improve the voltage resistance and antistatic performance of the device is a P-type guard ring.
[0075] In a possible implementation, in a direction parallel to the surface of the substrate 100 , the width of the first region 401 of the guard ring 400 is 5-40 um; in a direction perpendicular to the surface of the substrate 100 , the depth of the first region 401 of the guard ring 400 is 1-10 um.
[0076] In a possible implementation, in a direction parallel to the surface of the substrate 100 , the width of the second region 402 of the guard ring 400 is 5-40 um; in a direction perpendicular to the surface of the substrate 100 , the depth of the second region 402 of the guard ring 400 is 1-10 um.
[0077] In this embodiment, the recessed portion 500 does not extend beyond the second region 402 on the protection ring 400 , that is, the width of the recessed portion 500 is 5-40 um and the depth is 1-10 um.
[0078] In a possible implementation, the metal in the Schottky barrier layer 600 includes nickel, chromium, or nickel platinum.
[0079] Since the working principle of the Schottky diode 10 is based on the potential barrier formed by the contact between metal and semiconductor, by selecting a suitable metal as the material of the barrier layer 600, the height and shape of the barrier can be optimized, thereby improving the performance of the device.
[0080] In this embodiment, the barrier layer 600 uses nickel, chromium or nickel platinum, which can meet the performance requirements and durability requirements of the Schottky diode 10. For example, nickel can form a good Schottky contact with the semiconductor material, and has the advantages of good rectification characteristics and small leakage current. In addition, in addition to the metal provided in this embodiment, other metals or alloys that meet the requirements can also be used as the barrier layer 600 material, which will not be repeated here.
[0081] The present application also provides a method for manufacturing a Schottky diode 10, please refer to Figure 2 , comprising the following steps.
[0082] Step S11, providing a substrate 100.
[0083] For example, N-type silicon with high resistivity is used as the substrate 100 to ensure good electrical performance and isolation effect.
[0084] Step S12 , forming an epitaxial layer 200 on the surface of the substrate 100 .
[0085] Specifically, a high-quality epitaxial layer 200 may be formed on the surface of the substrate 100 by epitaxial growth techniques, such as chemical vapor deposition, molecular beam epitaxy, and the like.
[0086] For example, an N-type silicon epitaxial layer 200 is grown on an N-type silicon substrate 100 , and the doping concentration is slightly higher than that of the substrate 100 , so as to improve the conductivity of the device.
[0087] Step S13, please refer to Figure 3 A first oxide layer 310 is formed on a surface of the epitaxial layer 200 away from the substrate 100 .
[0088] Specifically, a first oxide layer 310 may be formed on the surface of the epitaxial layer 200 by thermal oxidation, chemical oxidation, physical vapor deposition, etc. The first oxide layer 310 may serve as a masking layer and a protective layer for subsequent processes.
[0089] Step S14, please refer to Figure 4 , etching the first oxide layer 310 to form a first annular window 410; please refer to Figure 5 , boron ions are implanted through the first window 410 to form a protection ring 400 located on a side of the epitaxial layer 200 away from the substrate 100 , and a second oxide layer 320 covering the first window 410 is formed on a side of the protection ring 400 away from the substrate 100 .
[0090] Specifically, a photoresist can be used as a mask to wet-etch the first oxide layer 310 to form a first annular window 410. Subsequently, boron ion implantation is performed, and the implantation energy and dose are adjusted according to the required depth and concentration of the guard ring 400. At the same time, a second oxide layer 320 is formed on the surface of the guard ring 400.
[0091] In this step, the guard ring 400 can be provided to improve the withstand voltage and antistatic performance of the Schottky diode 10 by optimizing the electric field distribution. In addition, the design of the guard ring 400 in this embodiment does not affect the forward conduction characteristics of the Schottky diode 10, ensuring low forward voltage drop and high efficiency conversion.
[0092] Step S15, please refer to Figure 6 , the second oxide layer 320 is etched to form a second annular window 510; the portion of the orthographic projection of the guard ring 400 on the substrate 100 exposed to the orthographic projection of the second window 510 on the substrate 100 is the second region 402 of the guard ring 400, and the rest of the guard ring 400 is the first region 401 of the guard ring 400, and the first region 401 is arranged around the second region 402; please refer to Figure 7 The second region 402 of the protection ring 400 is partially etched through the second window 510 to form at least one recess 500 .
[0093] In this step, a recessed portion 500 is provided on the guard ring 400. Compared with the conventional planar inner ring, the contact area between the guard ring 400 and the metal layer is significantly increased. This not only effectively disperses and reduces the reverse surge current density, thereby enhancing the reverse surge withstand capability, but also this improvement does not sacrifice the effective area of the Schottky junction, i.e., there is no need to worry about the increase in Schottky forward voltage drop due to design adjustments.
[0094] Step S16, please refer to Figure 8 , etching the first oxide layer 310 to form a third window 610; please refer to Fig. 9 , the third window 610 exposes the central area of the guard ring 400 ; barrier metal sputtering is performed through the third window 610 to form a barrier layer 600 .
[0095] In this step, a third window 610 is formed on the first oxide layer 310 by using photolithography and etching techniques, and then a barrier metal is deposited in the third window 610 by a sputtering process to form a barrier layer 600 of the Schottky diode 10 .
[0096] For example, nickel is used as the barrier metal, and a nickel thin film is deposited in the third window 610 as the barrier layer 600 by electron beam evaporation or magnetron sputtering process.
[0097] Step S17, please refer to Figure 1 A first metal layer 710 is formed on the barrier layer 600, the second region 402 of the guard ring 400, and the first oxide layer 310 and the second oxide layer 320 close to the barrier layer 600, and a second metal layer 720 is formed on the side of the substrate 100 away from the epitaxial layer 200; wherein at least a portion of the first metal layer 710 is in contact with the barrier layer 600, and another at least a portion of the first metal layer 710 extends into the recess 500 and is in contact with the second region 402 of the guard ring 400.
[0098] For example, aluminum or aluminum alloy is used as the metallization material, and an aluminum film is deposited by evaporation or sputtering process as the anode first metal layer 710. At the same time, a cathode second metal layer 720 is made by a similar process on the back of the substrate 100. Then, annealing treatment is performed to improve the contact characteristics between the metal and the semiconductor. Finally, the Schottky diode 10 in this embodiment is manufactured through process steps such as scribing and testing.
[0099] In one possible implementation, see Fig.10 , step S13 includes the following steps.
[0100] Step S131, depositing on the substrate 100 by atmospheric pressure chemical vapor deposition Silicon dioxide.
[0101] For example, when using step S131 to implement step S13, first, place the substrate 100 in the deposition chamber and ensure that the required cleanliness and vacuum are achieved in the deposition chamber. At the same time, prepare the precursor gas and carrier gas of silicon dioxide. Under normal pressure or near normal pressure, the precursor gas and carrier gas are introduced into the deposition chamber at a certain flow ratio. The precursor gas undergoes a chemical reaction at high temperature to generate silicon dioxide and deposit it on the surface of the substrate 100. By precisely controlling parameters such as reaction temperature, gas flow rate, deposition time, etc., deposition on the substrate 100 can be achieved. Thickness of silicon dioxide film.
[0102] In this embodiment, the atmospheric pressure chemical vapor deposition technology is used to accurately control the thickness, uniformity and composition of the silicon dioxide film; and the silicon dioxide film obtained by chemical vapor deposition has good adhesion to the substrate 100; in addition, the silicon dioxide film has excellent insulation, thermal stability and chemical stability, which can protect the substrate 100 from the influence of the external environment and improve the overall performance of the device.
[0103] In one possible implementation, see Fig.11 , step S14 includes the following steps.
[0104] In step S141 , a photoresist layer is uniformly coated on a side of the epitaxial layer 200 away from the substrate 100 .
[0105] Specifically, first ensure that the surface of the epitaxial layer 200 is clean and free of impurities, and then use a spin coater to evenly coat the photoresist on the surface of the epitaxial layer 200. The thickness of the photoresist will be adjusted according to the required pattern accuracy and subsequent process requirements.
[0106] Step S142, photolithography is performed on the photoresist layer through a mask having the first window 410 pattern, and the first window 410 pattern is engraved on the photoresist layer.
[0107] Specifically, a mask with a predetermined first window 410 pattern is placed above the photoresist layer, and then ultraviolet light or light of a specific wavelength is used to expose the photoresist. During the exposure process, the transparent area on the mask allows light to penetrate and irradiate the photoresist, while the opaque area on the mask blocks the light. After exposure, the photoresist portion irradiated by the light undergoes chemical changes and becomes soluble in a specific developer. For example, since the guard ring 400 pattern is an annular structure, the annular area on the mask is transparent, and the rest is opaque. After exposure, the photoresist in the annular area becomes soluble.
[0108] Step S143, please refer to Figure 4, use a buffered oxide etching solution to etch the first oxide layer 310 and transfer the first window 410 pattern to the first oxide layer 310 .
[0109] Specifically, the first window 410 pattern formed on the photoresist layer is used as a mask layer, and a buffered oxide etching solution is used to selectively etch the first oxide layer 310 below. The portion of the first oxide layer 310 not covered by the photoresist will be etched away, while the portion covered by the photoresist is retained, thereby forming a pattern on the first oxide layer 310 corresponding to the pattern of the first window 410 on the photoresist layer.
[0110] Step S144: removing the residual photoresist on the first oxide layer 310 using a photoresist solvent.
[0111] For example, residual photoresist can be removed by agitation and ultrasonic cleaning.
[0112] Step S145, please refer to Figure 5 , boron ions are implanted into the first window 410 , and the protection ring 400 is formed at the first window 410 through high-temperature annealing and low-temperature oxidation treatment in a diffusion furnace, and the second oxide layer 320 is generated on the side of the protection ring 400 away from the substrate 100 .
[0113] Specifically, an ion implanter is used to implant boron ions at the first window 410, and the implanted boron ions form a doped region in the first oxide layer 310. Subsequently, the wafer is placed in a diffusion furnace for high-temperature annealing to promote the diffusion and activation of the boron ions, and an oxidation treatment is performed at a low temperature to repair the surface of the first oxide layer 310 that may be damaged by ion implantation. Finally, a guard ring 400 with specific electrical properties is formed at the first window 410. At the same time, during the high-temperature annealing treatment, a second oxide layer 320 is formed on the surface of the guard ring 400. The thickness of the second oxide layer 320 is less than that of the first oxide layer 310.
[0114] In one possible implementation, see Fig.12 , step S15 includes the following steps.
[0115] In step S151 , a photoresist layer is uniformly coated on a side of the epitaxial layer 200 away from the substrate 100 .
[0116] Step S152, photolithography is performed on the photoresist layer through a mask with the second window 510 pattern, and the second window 510 pattern is engraved on the photoresist layer.
[0117] Step S153, please refer to Figure 6 , using an etching solvent to etch the second oxide layer 320 , and transferring the second window 510 pattern to the second oxide layer 320 .
[0118] Step S154, please refer to Figure 7 A mixed solution of nitric acid, hydrogen fluoride and water is used to partially etch the second region 402 of the protection ring 400 in the second window 510 to form at least one recessed portion 500 .
[0119] In this step, by using a mixed solution of nitric acid, hydrogen fluoride and water, a partial corrosion treatment is performed on the second area 402 of the protection ring 400 in the second window 510, and at least one recessed portion 500 can be formed in the area. Nitric acid, as an oxidant, accelerates the progress of the corrosion reaction; hydrogen fluoride, as the main etchant, chemically reacts with the material of the protection ring 400 to generate soluble products, thereby achieving material removal; and the addition of water adjusts the pH and reaction rate of the solution to ensure that the corrosion process is carried out within a controllable range. During the operation, the composition, concentration, temperature and corrosion time of the mixed solution need to be accurately controlled to protect other areas that are not corroded and avoid unnecessary damage to the overall structure. Through this partial corrosion treatment, a recessed portion 500 with a specific shape and size can be formed in the second area 402 of the protection ring 400. Compared with the traditional in-plane ring, the contact area between the protection ring 400 and the metal layer is significantly increased, and the reverse surge current density is effectively dispersed and reduced, so that the reverse surge withstand capacity is enhanced.
[0120] Step S155, using a photoresist solvent to remove the remaining photoresist.
[0121] In one possible implementation, see Fig.13 , step S16 includes the following steps.
[0122] Step S151 : uniformly coating a photoresist layer on a side of the first oxide layer 310 away from the epitaxial layer 200 .
[0123] Step S152 , photolithography is performed on the photoresist layer through a mask with the third window 610 , and a pattern of the third window 610 is engraved on the photoresist layer.
[0124] Step S153, please refer to Figure 8 , using an etching solvent to etch the first oxide layer 310 , and transferring the pattern of the third window 610 to the first oxide layer 310 .
[0125] Step S154: removing the residual photoresist on the first oxide layer 310 using a photoresist solvent.
[0126] Step S155, please refer to Fig. 9 , a sputtering process is used to deposit metal into the third window 610 to form the barrier layer 600 .
[0127] Specifically, the wafer is placed in a sputtering device, and a sputtering process is used to bombard metal atoms or molecules on the metal target material and deposit them in the third window 610 on the wafer surface. During the sputtering process, metal atoms or molecules are accelerated under the action of an electric field or a magnetic field and collide with the wafer surface to form a uniform metal film, namely, a barrier layer 600.
[0128] In this step, the metal includes nickel, chromium or nickel platinum.
[0129] In summary, the Schottky diode 10 and the manufacturing method thereof provided in the embodiment of the present application, by setting a recessed portion 500 on the guard ring 400, significantly increases the contact area between the guard ring 400 and the metal layer compared to the traditional planar inner ring, which not only effectively disperses and reduces the reverse surge current density, thereby enhancing the reverse surge withstand capability, but also this improvement does not sacrifice the effective area of the Schottky junction, that is, there is no need to worry about the problem of increased Schottky forward voltage drop due to design adjustments.
[0130] It should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "comprise a ..." do not exclude the existence of other identical elements in the process, method, article or device including the elements.
[0131] The above description is only the preferred embodiment of the present application and is not intended to limit the present application. For those skilled in the art, the present application may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included in the protection scope of the present application.
Claims
1. A Schottky diode, characterized in that: The Schottky diode comprises: substrate; an epitaxial layer located on one side of the substrate; A barrier layer located at a side of the epitaxial layer away from the substrate and a guard ring surrounding the barrier layer, the guard ring comprising a first region and a second region, the first region being arranged around the second region, and the second region of the guard ring having at least one recessed portion recessed toward the substrate at a side away from the substrate; an oxide layer located on a side of the epitaxial layer away from the substrate; an orthographic projection of the first region of the guard ring on the substrate is located within an orthographic projection of the oxide layer on the substrate; the oxide layer comprises a first opening, and an orthographic projection of the second region of the guard ring and the barrier layer on the substrate is located within an orthographic projection of the first opening on the substrate; a first metal layer located on the barrier layer, the second region of the guard ring, and the oxide layer on a side away from the substrate; at least a portion of the first metal layer is in contact with the barrier layer, and another at least a portion of the first metal layer extends to the recessed portion and is in contact with the second region of the guard ring; A second metal layer is located on a side of the substrate away from the epitaxial layer.
2. The Schottky diode according to claim 1, characterized in that: The substrate and the epitaxial layer are N-type semiconductor layers, and the guard ring is a P-type guard ring.
3. The Schottky diode according to claim 1, characterized in that: In a direction parallel to the surface of the substrate, the width of the first region of the guard ring is 5-40 um; In a direction perpendicular to the surface of the substrate, the first region of the guard ring has a depth of 1-10 um.
4. The Schottky diode according to claim 2, characterized in that: In a direction parallel to the substrate surface, the width of the second region of the guard ring is 5-40 um; In a direction perpendicular to the surface of the substrate, the second region of the guard ring has a depth of 1-10 um.
5. The Schottky diode according to claim 1, characterized in that: The metal in the Schottky barrier layer includes nickel, chromium or nickel platinum.
6. A method for manufacturing a Schottky diode, characterized in that: The method comprises: providing a substrate; forming an epitaxial layer on a surface of the substrate; forming a first oxide layer on a surface of the epitaxial layer away from the substrate; Etching the first oxide layer to form a first annular window; implanting boron ions through the first window to form a guard ring located on a side of the epitaxial layer away from the substrate, and forming a second oxide layer covering the first window on a side of the guard ring away from the substrate; The second oxide layer is etched to form a second annular window; the portion of the orthographic projection of the guard ring on the substrate exposed to the orthographic projection of the second window on the substrate is the second region of the guard ring, and the rest of the guard ring is the first region of the guard ring, and the first region is arranged around the second region; the second region of the guard ring is partially corroded through the second window to form at least one recessed portion; Etching the first oxide layer to form a third window; the third window exposes the central area of the guard ring; performing barrier metal sputtering through the third window to form a barrier layer; A first metal layer is formed on the barrier layer, the second region of the guard ring, and the first oxide layer and the second oxide layer close to the barrier layer, and a second metal layer is formed on a side of the substrate away from the epitaxial layer; wherein at least a portion of the first metal layer is in contact with the barrier layer, and another at least a portion of the first metal layer extends into the recess and in contact with the second region of the guard ring.
7. The method for manufacturing a Schottky diode according to claim 6, characterized in that: The step of forming a first oxide layer on a surface of the epitaxial layer away from the substrate comprises: Using atmospheric pressure chemical vapor deposition to deposit Silicon dioxide.
8. The method for manufacturing a Schottky diode according to claim 6, characterized in that: The steps of etching the first oxide layer to form a first annular window; implanting boron ions through the first window to form a guard ring located on a side of the epitaxial layer away from the substrate, and forming a second oxide layer covering the first window on a side of the guard ring away from the substrate include: Uniformly coating a photoresist layer on a side of the epitaxial layer away from the substrate; Performing photolithography on the photoresist layer through a mask having the first window pattern, and engraving the first window pattern on the photoresist layer; Etching the first oxide layer using a buffered oxide etching solution to transfer the first window pattern to the first oxide layer; Using a photoresist solvent to remove the residual photoresist on the first oxide layer; Boron ions are implanted into the first window, and the protection ring is formed at the first window through high-temperature annealing and low-temperature oxidation treatment in a diffusion furnace, and the second oxide layer is generated on the side of the protection ring away from the substrate.
9. The method for manufacturing a Schottky diode according to claim 6, characterized in that: The second oxide layer is etched to form a second annular window; the portion of the orthographic projection of the protection ring on the substrate exposed to the orthographic projection of the second window on the substrate is the second region of the protection ring, and the rest of the protection ring is the first region of the protection ring, and the first region is arranged around the second region; The step of partially etching the second region of the guard ring through the second window to form at least one recessed portion comprises: Uniformly coating a photoresist layer on a side of the epitaxial layer away from the substrate; Performing photolithography on the photoresist layer through a mask having the second window pattern, and engraving the second window pattern on the photoresist layer; Using an etching solvent to etch the second oxide layer, and transferring the second window pattern to the second oxide layer; Partially etching the second region of the guard ring in the second window using a mixed solution of nitric acid, hydrogen fluoride and water to form at least one recessed portion; Use photoresist solvent to remove the remaining photoresist.
10. The method for manufacturing a Schottky diode according to claim 6, characterized in that: The etching of the first oxide layer forms a third window; The third window exposes the central area of the protection ring; The step of performing barrier metal sputtering through the third window to form a barrier layer comprises: Uniformly coating a photoresist layer on a side of the first oxide layer away from the epitaxial layer; Performing photolithography on the photoresist layer through a mask having the third window, and engraving the third window pattern on the photoresist layer; Using an etching solvent to etch the first oxide layer, and transferring the third window pattern to the first oxide layer; Using a photoresist solvent to remove the photoresist remaining in the first oxide layer; Depositing metal into the third window using a sputtering process to form the barrier layer; The metal includes nickel, chromium or nickel platinum.