Row black insertion circuit, display panel, and row black insertion circuit driving method

Abstract

The present application relates to a row black insertion circuit, a display panel, and a method for driving the row black insertion circuit. The row black insertion circuit includes a pixel driving subcircuit and an electrochromic material driving subcircuit; the electrochromic material is disposed between a backlight layer and the pixels. The row black insertion circuit drives the electrochromic material to a low-transmittance mode before a target pixel in a target row is refreshed, performing row black insertion on the target row. The target pixel in the target row is then driven to refresh according to data on a data line. After the target pixel in the target row is refreshed, the target pixel in the target row returns to a high-transmittance mode. This improves pixel response speed and avoids smearing while maintaining the original effective refresh rate, enhancing visual quality.

Description

Technical Field

[0001] The present application relates to the technical field of display panels, and in particular to a row black insertion circuit, a display panel, and a method for driving the row black insertion circuit. Background Art

[0002] As market demand changes, people's demand for higher refresh rates of liquid crystal displays (LCDs) is becoming increasingly apparent. However, due to the basic physical properties of liquid crystal materials, it takes time for liquid crystal molecules to adjust their deflection angles under a fixed voltage, which limits the high refresh rate to a certain extent. When the refresh rate gradually increases, the horizontal blanking (H-Blanking) and data input time are shortened, and the liquid crystal molecules do not respond completely, resulting in phenomena such as ghosting and image retention, affecting the visual effect.

[0003] To improve image smearing, a "black insertion" technology is currently being used to insert black frames between frames. This technology inserts a transition frame between two images that require a larger deflection of the liquid crystal molecules, forcing the liquid crystal molecules to deflect to an intermediate angle earlier, thus improving the sluggish response to a certain extent. However, based on the existing architecture, black insertion is a full-screen black insertion, which adds black images to the number of frames originally displayed, reducing the effective refresh rate. For example, if M black frames are inserted into N frames per second, only (NM) frames of data are actually displayed in the second. In addition, since the grayscale zero data of the "black frame" is also provided by the integrated circuit (IC), the IC load is increased. Summary of the Invention

[0004] The present application provides a row black insertion circuit, a display panel, and a row black insertion circuit driving method to solve the technical problem that full-screen black insertion reduces the effective refresh rate.

[0005] In a first aspect, the present application provides a row black insertion circuit, the row black insertion circuit comprising: a pixel driving subcircuit and an electrochromic material driving subcircuit;

[0006] The pixel driving subcircuit is used to drive the target pixel in the target row to refresh according to the data of the data line under the action of the first row scanning signal of the first gate driving unit;

[0007] The electrochromic material driving subcircuit is used to drive the electrochromic material of the target row to enter a low transmittance mode N rows before the target pixel of the target row is refreshed, and to restore the high transmittance mode M rows after the target pixel of the target row is refreshed, under the action of the second row scanning signal of the second gate driving unit; wherein, the electrochromic material is arranged between the backlight layer and the pixel.

[0008] Optionally, the pixel driving sub-circuit includes: a first gate driving unit, a driving unit and an enabling unit;

[0009] The first gate driving unit is connected to the gate driving terminal of the driving unit; the output terminal of the driving unit is connected to the input terminal of the enabling unit; the output terminal of the enabling unit is connected to the electrochromic material driving sub-circuit;

[0010] The first gate driving unit is used to output the first row scanning signal to the driving unit; the driving unit drives the target pixel in the target row to refresh under the action of the first row scanning signal; the enabling unit is used to control the electrochromic material driving sub-circuit to enable under the action of the enable signal.

[0011] Optionally, the driving unit includes: a first thin film transistor and a storage capacitor;

[0012] The gate of the first thin film transistor is connected to the first gate driving unit, the source of the first thin film transistor is connected to the data line, the drain of the first thin film transistor is connected to the first end of the storage capacitor and the first input end of the enabling unit; the second end of the storage capacitor is connected to the ground voltage.

[0013] Optionally, the enabling unit includes a second thin film transistor;

[0014] The gate of the second thin film transistor is connected to an enable signal, and the electrochromic material driving sub-circuit is enabled under the action of the enable signal; the source of the second thin film transistor serves as the first input end of the enabling unit and is connected to the drain of the first thin film transistor; the drain of the second thin film transistor serves as the first output end of the enabling unit and is connected to the electrochromic material driving sub-circuit.

[0015] Optionally, the enabling unit further includes a third thin film transistor;

[0016] The gate of the third thin film transistor is connected to the drain of the second thin film transistor, the source of the third thin film transistor is connected to a reference voltage, and the drain of the third thin film transistor is connected to the electrochromic material driving sub-circuit.

[0017] Optionally, the electrochromic material driving subcircuit includes: a second gate driving unit, an electrochromic unit, and an AND gate unit;

[0018] The second gate driving unit is connected to the first input terminal of the electrochromic unit, the second input terminal of the electrochromic unit is connected to the output terminal of the AND gate unit; the AND gate unit is connected to the output terminal of the enabling unit;

[0019] The second gate driving unit is used to output the second row scanning signal to the electrochromic unit; under the combined action of the second row scanning signal and the signal input from the output end of the AND gate unit, the electrochromic unit drives the electrochromic material of the target row to enter the low transmittance mode or restore the high transmittance mode.

[0020] Optionally, the electrochromic unit includes: a fourth thin film transistor, a fifth thin film transistor, a first capacitor and a row color changing module; the row color changing module is made of electrochromic material;

[0021] The gate of the fourth thin film transistor is connected to the second gate driving unit and the first end of the first capacitor, the source of the fourth thin film transistor is connected to the first power supply, and the drain of the fourth thin film transistor is connected to the drain of the fifth thin film transistor and the first end of the row color changing module; the source of the fifth thin film transistor is connected to the ground voltage, and the gate of the fifth thin film transistor is connected to the output end of the AND gate unit; the second end of the first capacitor is connected to the gate shutdown voltage; and the second end of the row color changing module is connected to the ground voltage.

[0022] Optionally, the AND gate unit includes: an AND gate module, a first resistor, a second resistor, a third resistor and a sixth thin film transistor;

[0023] The first input end of the AND gate module is connected to the first end of the first resistor, the second input end of the AND gate module is connected to the first end of the second resistor and the source of the sixth thin film transistor, and the output end of the AND gate module is connected to the gate of the fifth thin film transistor;

[0024] The second end of the first resistor is connected to the gate-on voltage; the second end of the second resistor is connected to the gate-off voltage;

[0025] The gate of the sixth thin film transistor is connected to the first end of the third resistor and the output end of the pixel driving subcircuit, and the drain of the sixth thin film transistor is connected to the second end of the third resistor and the first row scanning signal of the next row pixel driving subcircuit.

[0026] In a second aspect, the present application provides a display panel, comprising the row black insertion circuit described in any one of the first aspects.

[0027] In a third aspect, the present application provides a row black insertion circuit driving method, which is applied to the row black insertion circuit according to any one of the first aspects, the method comprising:

[0028] Under the action of the first row scanning signal of the first gate driving unit, the pixel driving sub-circuit drives the target pixel in the target row to refresh according to the data of the data line;

[0029] Under the action of the second row scanning signal of the second gate driving unit, the electrochromic material driving sub-circuit drives the electrochromic material of the target row to enter the low transmittance mode N rows before the target pixel of the target row is refreshed, and restores the high transmittance mode M rows after the target pixel of the target row is refreshed; wherein, the electrochromic material is arranged between the backlight layer and the pixel.

[0030] The technical solution provided by the embodiments of the present application has the following advantages over the prior art: The row black insertion circuit provided by the embodiments of the present application includes: a pixel driving subcircuit and an electrochromic material driving subcircuit; the pixel driving subcircuit is configured to, in response to a first row scan signal from a first gate driving unit, drive a target pixel in a target row to refresh according to data on a data line; the electrochromic material driving subcircuit is configured to, in response to a second row scan signal from a second gate driving unit, drive the electrochromic material in the target row to enter a low transmittance mode N rows before the target pixel in the target row is refreshed, and to restore the electrochromic material in the target row to a high transmittance mode M rows after the target pixel in the target row is refreshed; wherein the electrochromic material is disposed between the backlight layer and the pixel. The row black insertion circuit drives the electrochromic material in the low transmittance mode before the target pixel in the target row is refreshed, performs row black insertion on the target row, then drives the target pixel in the target row to refresh according to data on the data line, and restores the electrochromic material in the target row to a high transmittance mode M rows after the target pixel in the target row is refreshed. This improves pixel response speed and avoids smearing while maintaining the original effective refresh rate, thereby enhancing visual quality. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present application and, together with the description, serve to explain the principles of the present application.

[0032] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, for ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0033] One or more embodiments are exemplarily illustrated by pictures in the corresponding drawings. These exemplifications do not constitute limitations on the embodiments. Elements with the same reference numerals in the drawings are represented as similar elements. Unless otherwise stated, the figures in the drawings do not constitute proportional limitations.

[0034] Figure 1 A schematic structural diagram of a row black insertion circuit provided in one embodiment of the present application;

[0035] Figure 2A circuit diagram of a row black insertion circuit provided in one embodiment of the present application;

[0036] Figure 3 A schematic diagram of a line-by-line scanning method with black line insertion provided in one embodiment of the present application;

[0037] Figure 4 A schematic diagram of a first-stage row black insertion circuit provided by one embodiment of the present application;

[0038] Figure 5 A timing diagram of scanning signals of a row black insertion circuit in the first stage provided by one embodiment of the present application;

[0039] Figure 6 A schematic diagram of a second-stage row black insertion circuit provided by one embodiment of the present application;

[0040] Figure 7 A timing diagram of scanning signals of a row black insertion circuit in the second stage provided by one embodiment of the present application;

[0041] Figure 8 A schematic diagram of a third-stage row black insertion circuit provided by one embodiment of the present application;

[0042] Figure 9 A timing diagram of scanning signals of a row black insertion circuit in the third stage provided by an embodiment of the present application;

[0043] Figure 10 A schematic diagram of a second-stage row black insertion circuit when the data voltage is higher than the reference voltage provided by one embodiment of the present application;

[0044] Figure 11 A schematic diagram of a row black insertion circuit in the third stage when the data voltage is higher than the reference voltage provided by one embodiment of the present application;

[0045] Figure 12 A schematic diagram of a second-stage row black insertion circuit when the data voltage is lower than the reference voltage provided by one embodiment of the present application;

[0046] Figure 13 A schematic diagram of a row black insertion circuit in the third stage when the data voltage is lower than the reference voltage provided by one embodiment of the present application.

[0047] The reference numerals are as follows:

[0048] 101-pixel driving subcircuit; 102-electrochromic material driving subcircuit;

[0049] 201 - first gate driving unit; 202 - driving unit; 203 - enabling unit; 204 - second gate driving unit; 205 - electrochromic unit; 206 - AND gate unit;

[0050] T1-first thin film transistor; Cst-storage capacitor; Q1-second thin film transistor; Q2-third thin film transistor; Q3-fourth thin film transistor; Q4-fifth thin film transistor; Q5-sixth thin film transistor; C1-first capacitor; A-AND gate module. DETAILED DESCRIPTION

[0051] To make the purpose, technical solutions, and advantages of the embodiments of this application more clear, the technical solutions in the embodiments of this application will be clearly and completely described below in conjunction with the drawings in the embodiments of this application. Obviously, the described embodiments are part of the embodiments of this application, not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.

[0052] The disclosure below provides many different embodiments or examples for implementing different structures of the present application. In order to simplify the disclosure of the present application, the components and settings of specific examples are described below. Of course, these are merely examples and are not intended to limit the present application. In addition, the present application may repeat reference numbers and / or letters in different examples. Such repetition is for the purpose of simplicity and clarity and does not in itself indicate the relationship between the various embodiments and / or settings discussed.

[0053] In order to solve the technical problem in the prior art that full-surface black insertion reduces the effective refresh rate, the present application provides a row black insertion circuit, a display panel, and a row black insertion circuit driving method, which can drive the electrochromic material to a low-transmittance mode before the target pixel of the target row is refreshed, perform row black insertion on the target row, and then drive the target pixel of the target row to refresh according to the data line data. After the target pixel of the target row is refreshed, the M rows are restored to a high-transmittance mode, thereby maintaining the original effective refresh rate while improving the pixel response speed and avoiding the ghosting phenomenon, thereby improving the visual effect.

[0054] Example 1

[0055] The first embodiment of the present application provides a row black insertion circuit, such as Figure 1 The row black insertion circuit includes: a pixel driving sub-circuit 101 and an electrochromic material driving sub-circuit 102.

[0056] The pixel driving sub-circuit 101 is used to drive the target pixel in the target row to refresh according to the data of the data line under the action of the first row scanning signal of the first gate driving unit;

[0057] The electrochromic material driving subcircuit 102 is configured to, under the action of a second row scan signal from a second gate driving unit, drive the electrochromic material of a target row into a low transmittance mode N rows before a target pixel of the target row is refreshed, and to restore the electrochromic material to a high transmittance mode M rows after a target pixel of the target row is refreshed. The electrochromic material is disposed between a backlight layer and a pixel. N can be set to one, meaning the electrochromic material is driven into the low transmittance mode one row before a target pixel of the target row is refreshed. N can also be set to a number greater than one, without limitation. Similarly, M can be set to one, meaning the electrochromic material is driven into the high transmittance mode one row after a target pixel of the target row is refreshed. In subsequent specific embodiments, M is illustrated as one, which does not limit the specific value of M. In practice, M can also be set to a number greater than one. It should be noted that the values of M and N can be the same (for example, N and M are both set to 1. In this case, the target pixel of the target row drives the electrochromic material to the low transmittance mode one row before the target pixel is refreshed, and the electrochromic material is driven to restore the high transmittance mode one row after the target pixel of the target row is refreshed), or they can be different (for example, N is set to 2 and M is set to 1. In this case, the target pixel of the target row drives the electrochromic material to the low transmittance mode two rows before the target pixel is refreshed, and the electrochromic material is driven to restore the high transmittance mode one row after the target pixel of the target row is refreshed).

[0058] The row black insertion circuit can drive the electrochromic material to a low-transmittance mode before the target pixels of the target row are refreshed, performs row black insertion on the target row, and then drives the target pixels of the target row to be refreshed according to the data of the data line. After the target pixels of the target row are refreshed, the M rows are restored to a high-transmittance mode, thereby improving the pixel response speed and avoiding the ghosting phenomenon while maintaining the original effective refresh rate, thereby improving the visual effect.

[0059] In a specific embodiment, the row black insertion circuit is as follows: Figure 2As shown, the pixel driving subcircuit 101 includes a first gate driving unit 201, a driving unit 202, and an enabling unit 203. The electrochromic material driving subcircuit 102 includes a second gate driving unit 204, an electrochromic unit 205, and an AND gate unit 206. GOA (Gate Driven on Array) represents the integrated gate driver on the array substrate. GOA1 represents the first gate driving unit 201, which is normally used to generate the row scan signal required by the pixel driving subcircuit. The row scan signal generated by it is represented by scan. GOA2 represents the second gate driving unit 204, which is used to generate the row scan signal required by the electrochromic material driving subcircuit 102. The row scan signal generated by it is represented by gate. Vdata represents the data voltage of the data line. VDD represents the driving voltage of the electrochromic material, for example, VDD output by the first power supply. VSS represents the ground voltage. VGH represents the gate-on voltage. VGL represents the gate-off voltage. The row color-changing modules are made of electrochromic materials, which may include polythiophene and its derivatives, viologens, tetrathiafulvalene, metallophthalocyanine compounds, and the like, without limitation. Each electrochromic material driving subcircuit can drive the row color-changing modules for a target row, or simultaneously drive the row color-changing modules for rows preceding the target row to the target row, or vice versa, without limitation.

[0060] like Figure 3 It is a schematic diagram of progressive scanning with black rows inserted, in which a black row is added before the target pixel of the target row is refreshed. That is, the electrochromic material corresponding to the previous row or rows where the liquid crystal is about to be inverted is adjusted to a low transmittance mode in the scanning direction, and the high transmittance mode is restored after the target pixel of the target row is refreshed by one row. While improving the pixel response speed and avoiding the ghosting phenomenon, the original effective refresh rate is maintained, thereby improving the visual effect.

[0061] It should be noted that, in each embodiment of the present application, the gate and scan signals are illustrated by high-potential pulse signals with a normal low potential. Each electrochromic driving sub-circuit drives the electrochromic material corresponding to a pixel row. The electrochromic materials all have low transmittance when powered on and high transmittance when powered off. The electrochromic material changes to low transmittance one pixel row ahead of the other, and changes to high transmittance one pixel row after the pixel row is refreshed. In actual applications, the gate and scan signals can also be low-potential pulse signals with a normal high potential. Each electrochromic driving circuit drives the electrochromic materials corresponding to multiple pixel rows. The electrochromic materials all have high transmittance when powered on and low transmittance when powered off. The electrochromic material changes to low transmittance multiple pixel rows ahead of the other, and changes to high transmittance multiple pixel rows after the pixel row is refreshed, or performs synchronous refresh. The examples in the embodiments of the present application are only for illustration of the principles and are not intended to be the only reference for actual applications.

[0062] Next, combine Figure 2 The various components of the row black insertion circuit are described in detail.

[0063] In one embodiment, the pixel driving sub-circuit 101 includes: a first gate driving unit 201 , a driving unit 202 and an enabling unit 203 .

[0064] The connection relationship is as follows: the first gate driving unit 201 is connected to the gate driving terminal of the driving unit 202 , the output terminal of the driving unit 202 is connected to the input terminal of the enabling unit 203 , and the output terminal of the enabling unit 203 is connected to the electrochromic material driving sub-circuit 102 .

[0065] The first gate drive unit 201 is configured to output a first row scan signal Scan(n) to the drive unit 202. Drive unit 202, under the action of the first row scan signal Scan(n), drives the target pixels in the target row to refresh. The enable unit 203 is configured to enable the electrochromic material drive sub-circuit 102 under the action of the enable signal EN. The electrochromic material drive sub-circuit 102 can be enabled when EN is at a low voltage. If row black insertion is not required, EN can be changed to a high voltage. If row black insertion is required, EN remains at a low voltage.

[0066] It should be noted that the first row scanning signal and the second row scanning signal do not represent the specific row number of the scanning signal, but are only used to distinguish the gate (n) signal from the scan (n) signal, and n can be any row in the scanning line.

[0067] Specifically, the driving unit 202 includes a first thin film transistor T1 and a storage capacitor Cst. The enabling unit 203 includes a second thin film transistor Q1.

[0068] The connection relationship is as follows:

[0069] The gate of the first thin-film transistor T1 is connected to the first gate driving unit 201. The source of the first thin-film transistor T1 is connected to the data line. The drain of the first thin-film transistor T1 is connected to the first end of the storage capacitor Cst and the first input end of the enable unit 203. The second end of the storage capacitor Cst is connected to the ground voltage VSS. The gate of the second thin-film transistor Q1 is connected to the enable signal. Under the action of the enable signal, the electrochromic material driving sub-circuit 102 is enabled. The source of the second thin-film transistor Q1 serves as the first input end of the enable unit 203 and is connected to the drain of the first thin-film transistor T1. The drain of the second thin-film transistor Q1 serves as the first output end of the enable unit 203 and is connected to the electrochromic material driving sub-circuit 102.

[0070] In this embodiment, the gate of the second thin-film transistor Q1 is connected to the enable signal EN. When EN is at a low potential, the second thin-film transistor Q1 is turned on. The drain of Q1 is connected to the electrochromic material driving sub-circuit 102. When the first thin-film transistor T1 is turned on, a signal is input to the gate of the sixth thin-film transistor Q5 to turn on Q5. Therefore, when Scan (n+1) is at a high potential, the AND gate module A outputs a high potential, pulling the row color-changing module down to enter the high transmittance mode. When Scan (n+1) is at a low potential, the AND gate module A outputs a low potential, thereby putting the row color-changing module into the low transmittance mode when Gate (n) is at a high potential.

[0071] In one embodiment, the enabling unit 203 further includes a third thin-film transistor Q2 . In this case, the connection relationship is as follows: the gate of the third thin-film transistor Q2 is connected to the drain of the second thin-film transistor Q1 , the source of the third thin-film transistor Q2 is connected to the reference voltage VSET , and the drain of the third thin-film transistor Q2 is connected to the electrochromic material driving sub-circuit 102 .

[0072] In this embodiment, the third thin-film transistor Q2 is connected to a reference voltage VSET. VSET is the target grayscale voltage corresponding to the target grayscale. The third thin-film transistor Q2 can be used to insert black into grayscale rows below the target grayscale, further lowering the grayscale value and achieving high contrast. This will be explained in detail in the following embodiments.

[0073] In one embodiment, the electrochromic material driving sub-circuit 102 includes: a second gate driving unit 204 , an electrochromic unit 205 , and an AND gate unit 206 .

[0074] The second gate drive unit 204 is connected to the first input terminal of the electrochromic unit 205. The second input terminal of the electrochromic unit 205 is connected to the output terminal of the AND gate unit 206. The AND gate unit 206 is connected to the output terminal of the enable unit 203. The second gate drive unit 204 is used to output a second row scan signal Gate(n) to the electrochromic unit 205. Under the combined action of the second row scan signal and the signal input to the output terminal of the AND gate unit 206, the electrochromic unit 205 drives the electrochromic material in the target row to enter a low transmittance mode or restore to a high transmittance mode.

[0075] Specifically, the electrochromic unit 205 includes a fourth thin-film transistor Q3, a fifth thin-film transistor Q4, a first capacitor C1, and a row color-changing module. The row color-changing module is made of electrochromic material. The AND gate unit 206 includes an AND gate module (or simply, AND gate) A, a first resistor R1, a second resistor R2, a third resistor R3, and a sixth thin-film transistor Q5.

[0076] The connection relationship is as follows:

[0077] The gate of the fourth thin-film transistor Q3 is connected to the second gate driving unit and the first terminal of the first capacitor C1. The source of the fourth thin-film transistor Q3 is connected to the first power supply VDD. The drain of the fourth thin-film transistor Q3 is connected to the drain of the fifth thin-film transistor Q4 and the first terminal of the row color-changing module. The source of the fifth thin-film transistor Q4 is connected to the ground voltage VSS, and the gate of the fifth thin-film transistor Q4 is connected to the output terminal of the AND gate unit 206. The second terminal of the first capacitor C1 is connected to the gate-off voltage VGL, and the second terminal of the row color-changing module is connected to the ground voltage VSS. The first input end of the AND gate module A is connected to the first end of the first resistor R1, the second input end of the AND gate module A is connected to the first end of the second resistor R2 and the source of the sixth thin-film transistor Q5, and the output end of the AND gate module A is connected to the gate of the fifth thin-film transistor Q4; the second end of the first resistor R1 is connected to the gate-on voltage VGH; the second end of the second resistor R2 is connected to the gate-off voltage VGL; the gate of the sixth thin-film transistor Q5 is connected to the first end of the third resistor R3 and the output end of the pixel driving sub-circuit 101, and the drain of the sixth thin-film transistor Q5 is connected to the second end of the third resistor R3 and the first row scan signal Scan(n+1) of the next row of pixel driving sub-circuit.

[0078] In this embodiment, the working principles of each stage of the row black insertion circuit are described in detail below, assuming that T1 is an NMOS thin film transistor (TFT), Q1 and Q2 are PMOS thin film transistors, and Q3, Q4 and Q5 are NMOS thin film transistors.

[0079] In the first stage, Figure 4 This is the schematic diagram of the first stage black insertion circuit. Figure 5 This is the scan signal timing diagram for the first stage of the row black insertion circuit. At this stage, Scan(n) and Scan(n+1) are low, the first input of AND gate A is high, and the second input is low. AND gate A outputs a low level, turning off Q4. Gate(n) is high, turning on Q3. VDD drives the electrochromic material of the row color-changing module into low-transmittance mode and charges C1 to ensure that the potential is maintained during the H-Blanking period.

[0080] In the second stage, Figure 6 This is the schematic diagram of the second stage black insertion circuit. Figure 7This is the scan signal timing diagram for the second stage of the row black insertion circuit. At this point, Scan(n) is high and Scan(n+1) is low. T1 is on, the data voltage Vdata enters Cst, and the liquid crystal molecules begin to deflect. The first input of AND gate A is high, while the second input is low. AND gate A outputs a low level, turning off Q4. Gate(n) is high, Q3 is on, and VDD drives the electrochromic material of the row color-changing module into low-transmittance mode. It also charges C1 to ensure that the potential is maintained during the H-Blanking period.

[0081] In the third stage, Figure 8 This is the schematic diagram of the third stage black insertion circuit. Figure 9 This is the scan signal timing diagram for the row black insertion circuit in the third stage. Scan (n) is at a low voltage, T1 is off, Cst holds the data voltage, the liquid crystal molecules are deflected to the desired position, Gate (n) is at a low voltage, and Q3 is off. Scan (n+1) is at a high voltage, and the first and second inputs of AND gate A are both high. This causes AND gate A to output a high voltage, turning Q4 on. VSS drives the electrochromic material in the row color-changing module to quickly power down, turning it transparent.

[0082] Through the above three stages, the electrochromic material is driven to the low transmittance mode before the target pixels of the target row are refreshed, the target row is blacked out, and then the target pixels of the target row are driven to be refreshed according to the data of the data line. The high transmittance mode is restored after the target pixels of the target row are refreshed for one row, thereby improving the pixel response speed and avoiding the ghosting phenomenon while maintaining the original effective refresh rate and improving the visual effect.

[0083] To adjust the electrochromic material response time based on the material and LCD response time, simply adjust the STV2 (STV2 refers to the frame start signal of GOA2) advance of GOA2. To adjust the electrochromic material's response width for each row of pixels, simply adjust the number of consecutive Gate (n) pulses, i.e., the number of STV2 pulses. To adjust the electrochromic material's recovery lag time, adjust the circuit entities connected to Q1's gate. To disable the black insertion function at low refresh rates, simply disable STV2.

[0084] Next, the specific function of the enable unit 203 is described in detail. The enable unit can turn the black insertion function on and off through Q1, simply by adjusting the enable signal EN. Furthermore, the reference voltage VSET input to the source of Q2 can be used to set the electrochromic material to be opaque at a specific target grayscale, while at the same time, the electrochromic material is transparent above this target grayscale, thereby providing a higher contrast ratio. The details are as follows:

[0085] EN is at a low potential, Q1 is turned on, and VSET is set to the target grayscale voltage corresponding to the target grayscale.

[0086] When the Vdata voltage is higher than the reference voltage VSET, the circuit diagram of the row black insertion in the second stage is as follows Figure 10 , Q2's Vgs = Vdata - VSET is greater than 0, Q2 is cut off, Q5 is equivalent to a diode, Q5 is cut off when Scan (n + 1) is at a low potential, AND gate A outputs a low potential, Q4 gate side has a low potential, Q4 is turned off, Gate (n) is at a high potential, Q3 is turned on, and VDD drives the electrochromic material of the row color-changing module into a low transmittance state.

[0087] When the Vdata voltage is higher than the reference voltage VSET, the black insertion circuit diagram in the third stage is as follows: Figure 11 , Q2's Vgs = Vdata - VSET is greater than 0, Q2 is cut off, Q5 is equivalent to a diode, Q5 is turned on when Scan (n + 1) is at a high potential, AND gate A outputs a high potential, Q4's gate side is at a high potential, Q4 is turned on, and VSS drives the electrochromic material of the row color-changing module to be at a high transmittance.

[0088] When the Vdata voltage is lower than the reference voltage VSET, the circuit diagram of the row black insertion in the second stage is as follows Figure 12 , Q2's Vgs = Vdata - VSET is less than 0, Q2 is turned on. Scan (n + 1) is low, the first input of AND gate A is high, and regardless of whether Q5 is turned on or off, the second input of AND gate is low. That is, AND gate A outputs a low potential, Q4 is cut off, Gate (n) is high, Q3 is turned on, and VDD drives the electrochromic material of the row color-changing module into a low transmittance state.

[0089] When the Vdata voltage is lower than the reference voltage VSET, the black insertion circuit diagram in the third stage is as follows Figure 13 Since Vdata is generally less than VGH, Vgs = VSET-Scan (n+1) of Q5 is less than 0, Q5 is cut off, the first input terminal of AND gate A inputs a high potential, the second input terminal inputs a low potential, AND gate A outputs a low potential, Q4 is cut off, at this time, although Gate (n) switches to a low potential and Q3 is cut off, the electrochromic material of the row color-changing module still maintains a low transmittance at this stage due to its own parasitic capacitance effect.

[0090] In this embodiment, by setting the target grayscale voltage corresponding to the target grayscale for VSET, when the pixel grayscale is lower than the target grayscale, the electrochromic material shields the backlight through low transmittance, further lowering the grayscale value, achieving high contrast, and improving the display effect.

[0091] In the above-mentioned embodiments of the present application, since black insertion is performed row by row, the original effective refresh rate is maintained while improving the pixel response speed and avoiding the ghosting phenomenon, thereby improving the visual effect. Moreover, since the black insertion is performed row by row by controlling the transmittance of the electrochromic material, no additional load is added to the integrated circuit IC.

[0092] Example 2

[0093] Based on the same technical concept, a second embodiment of the present application provides a display panel, which includes the row black insertion circuit described in any one of the first embodiments.

[0094] A display panel using a row black insertion circuit drives the electrochromic material to operate in a low-transmittance mode before the target pixels of the target row are refreshed, performs row black insertion on the target row, and then drives the target pixels of the target row to be refreshed according to the data of the data line. After the target pixels of the target row are refreshed, the M rows are restored to a high-transmittance mode. This improves the pixel response speed and avoids the ghosting phenomenon while maintaining the original effective refresh rate, thereby improving the visual effect.

[0095] Example 3

[0096] A third embodiment of the present application provides a row black insertion circuit driving method, which is applied to the row black insertion circuit described in any one of the first embodiments. The row black insertion circuit driving method includes:

[0097] Under the action of the first row scanning signal of the first gate driving unit, the pixel driving sub-circuit drives the target pixel in the target row to refresh according to the data of the data line;

[0098] Under the action of the second row scanning signal of the second gate driving unit, the electrochromic material driving sub-circuit drives the electrochromic material of the target row to enter the low transmittance mode N rows before the target pixel of the target row is refreshed, and restores the high transmittance mode M rows after the target pixel of the target row is refreshed; wherein, the electrochromic material is arranged between the backlight layer and the pixel.

[0099] This row black insertion circuit driving method can drive the electrochromic material to a low-transmittance mode before the target pixels of the target row are refreshed, perform row black insertion on the target row, and then drive the target pixels of the target row to be refreshed according to the data line data. After the target pixels of the target row are refreshed, the M rows are restored to a high-transmittance mode, thereby improving the pixel response speed and avoiding the ghosting phenomenon while maintaining the original effective refresh rate, thereby improving the visual effect.

[0100] It should be understood that the terms used herein are for the purpose of describing specific example embodiments only and are not intended to be limiting. Unless the context clearly indicates otherwise, the singular forms "one", "an" and "said" as used herein may also be meant to include plural forms. The terms "comprise", "include", "contain" and "have" are inclusive and therefore specify the presence of stated features, steps, operations, elements and / or parts, but do not exclude the presence or addition of one or more other features, steps, operations, elements, parts, and / or combinations thereof. The method steps, processes, and operations described herein are not to be construed as necessarily requiring them to be performed in the specific order described or illustrated, unless the order of execution is clearly indicated. It should also be understood that additional or alternative steps may be used.

[0101] It should be understood that the specific embodiments described herein are intended only to illustrate the present application and are not intended to limit the present application. In the description, suffixes such as "module," "component," or "unit" used to represent elements are used solely to facilitate the description of the present application and have no specific meaning. Therefore, "module," "component," or "unit" may be used interchangeably.

[0102] The foregoing is merely a list of specific embodiments of the present application, intended to enable those skilled in the art to understand or implement the present application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present application. Therefore, the present application is not limited to the embodiments shown herein, but is intended to conform to the broadest scope consistent with the principles and novel features of the present application.

Claims

1. A black insertion circuit, characterized in that: The row black insertion circuit includes: a pixel driving subcircuit and an electrochromic material driving subcircuit; The pixel driving subcircuit is used to drive the target pixel in the target row to refresh according to the data of the data line under the action of the first row scanning signal of the first gate driving unit; The electrochromic material driving subcircuit is used to drive the electrochromic material of the target row to enter a low transmittance mode N rows before the target pixel of the target row is refreshed, and to restore the high transmittance mode M rows after the target pixel of the target row is refreshed, under the action of the second row scanning signal of the second gate driving unit; wherein, the electrochromic material is arranged between the backlight layer and the pixel.

2. The black insertion circuit according to claim 1, wherein: The pixel driving sub-circuit includes: a first gate driving unit, a driving unit and an enabling unit; The first gate driving unit is connected to the gate driving terminal of the driving unit; the output terminal of the driving unit is connected to the input terminal of the enabling unit; the output terminal of the enabling unit is connected to the electrochromic material driving sub-circuit; The first gate driving unit is used to output the first row scanning signal to the driving unit; the driving unit drives the target pixel in the target row to refresh under the action of the first row scanning signal; the enabling unit is used to control the electrochromic material driving sub-circuit to enable under the action of the enable signal.

3. The black insertion circuit according to claim 2, wherein: The driving unit includes: a first thin film transistor and a storage capacitor; The gate of the first thin film transistor is connected to the first gate driving unit, the source of the first thin film transistor is connected to the data line, the drain of the first thin film transistor is connected to the first end of the storage capacitor and the first input end of the enabling unit; the second end of the storage capacitor is connected to the ground voltage.

4. The black insertion circuit according to claim 3, wherein: The enabling unit includes a second thin film transistor; The gate of the second thin film transistor is connected to an enable signal, and the electrochromic material driving sub-circuit is enabled under the action of the enable signal; the source of the second thin film transistor serves as the first input end of the enabling unit and is connected to the drain of the first thin film transistor; the drain of the second thin film transistor serves as the first output end of the enabling unit and is connected to the electrochromic material driving sub-circuit.

5. The black insertion circuit according to claim 4, characterized in that: The enabling unit further includes a third thin film transistor; The gate of the third thin film transistor is connected to the drain of the second thin film transistor, the source of the third thin film transistor is connected to a reference voltage, and the drain of the third thin film transistor is connected to the electrochromic material driving sub-circuit.

6. The black insertion circuit according to claim 2, wherein: The electrochromic material driving subcircuit includes: a second gate driving unit, an electrochromic unit and an AND gate unit; The second gate driving unit is connected to the first input terminal of the electrochromic unit, the second input terminal of the electrochromic unit is connected to the output terminal of the AND gate unit; the AND gate unit is connected to the output terminal of the enabling unit; The second gate driving unit is used to output the second row scanning signal to the electrochromic unit; under the combined action of the second row scanning signal and the signal input from the output end of the AND gate unit, the electrochromic unit drives the electrochromic material of the target row to enter the low transmittance mode or restore the high transmittance mode.

7. The black insertion circuit according to claim 6, wherein: The electrochromic unit includes: a fourth thin film transistor, a fifth thin film transistor, a first capacitor and a row color changing module; the row color changing module is made of electrochromic material; The gate of the fourth thin film transistor is connected to the second gate driving unit and the first end of the first capacitor, the source of the fourth thin film transistor is connected to the first power supply, and the drain of the fourth thin film transistor is connected to the drain of the fifth thin film transistor and the first end of the row color changing module; the source of the fifth thin film transistor is connected to the ground voltage, and the gate of the fifth thin film transistor is connected to the output end of the AND gate unit; the second end of the first capacitor is connected to the gate shutdown voltage; and the second end of the row color changing module is connected to the ground voltage.

8. The black insertion circuit according to claim 7, wherein: include: The AND gate unit includes: an AND gate module, a first resistor, a second resistor, a third resistor and a sixth thin film transistor; The first input end of the AND gate module is connected to the first end of the first resistor, the second input end of the AND gate module is connected to the first end of the second resistor and the source of the sixth thin film transistor, and the output end of the AND gate module is connected to the gate of the fifth thin film transistor; The second end of the first resistor is connected to the gate-on voltage; the second end of the second resistor is connected to the gate-off voltage; The gate of the sixth thin film transistor is connected to the first end of the third resistor and the output end of the pixel driving subcircuit, and the drain of the sixth thin film transistor is connected to the second end of the third resistor and the first row scanning signal of the next row pixel driving subcircuit.

9. A display panel, characterized in that: The display panel comprises the row black insertion circuit according to any one of claims 1 to 8.

10. A method for driving a row black insertion circuit, characterized in that: Applied to the row black insertion circuit according to any one of claims 1 to 8, the method comprising: Under the action of the first row scanning signal of the first gate driving unit, the pixel driving sub-circuit drives the target pixel in the target row to refresh according to the data of the data line; Under the action of the second row scanning signal of the second gate driving unit, the electrochromic material driving sub-circuit drives the electrochromic material of the target row to enter the low transmittance mode N rows before the target pixel of the target row is refreshed, and restores the high transmittance mode M rows after the target pixel of the target row is refreshed; wherein, the electrochromic material is arranged between the backlight layer and the pixel.

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