A High-Efficiency Energy-Saving Inverter Control Method Based on Distributed Data Processing Architecture

Abstract

This invention discloses a high-efficiency energy-saving inverter control method based on a distributed data processing architecture, relating to the field of electronic technology. The method includes synchronously acquiring system operating parameters of the inverter within a preset sampling period and storing these parameters in a dual buffer; calculating the real-time load rate of the communication processing unit (CSU) within a set time period, triggering a task allocation flag to be set, dividing data processing tasks according to the task allocation flag status, acquiring the system operating parameters in the second buffer for distributed parallel data processing; using the results of the distributed parallel data processing to generate optimized control instructions, which are sent to the power control module via a DMA channel for optimized inverter control. This invention can improve the overall response speed while reducing the load on a single processor, achieving dual optimization of control efficiency and energy consumption while ensuring inverter control accuracy, and has significant practical value and promising prospects for application.

Description

Technical Field

[0001] This invention relates to the field of electronic technology, and in particular to a high-efficiency energy-saving inverter control method based on a distributed data processing architecture. Background Technology

[0002] With the rapid expansion of renewable energy grid connection and the in-depth application of power electronics technology, high-efficiency and energy-saving inverters have become a key component of distributed generation systems and energy storage devices. Traditional inverter control often relies on a single processor to sequentially execute multiple computational tasks. As sampling frequency, power density, and reliability requirements continue to increase, the single-processor architecture is gradually revealing its bottlenecks in terms of real-time performance, parallelism, and resource utilization. Furthermore, the increasing complexity of operating conditions, such as grid frequency fluctuations, load disturbances, and device temperature drift, places higher demands on inverter control systems for algorithm throughput and lower latency. Industry experts have proposed various improvement methods, such as heterogeneous collaboration between multi-core DSPs and FPGAs, task priority scheduling, and DMA-based data transfer acceleration. However, these methods often focus on hardware expansion or algorithm optimization of computing units, neglecting the overall architectural design of the control system for data acquisition and processing. More importantly, the lack of a mature distributed data management scheme means that even at high sampling rates (e.g., 50μs), the synchronous acquisition and real-time distribution of all system parameters still faces challenges such as memory conflicts, task contention, and uneven load distribution.

[0003] While existing technologies meet the core control requirements of inverters, they often come at the cost of reduced energy consumption or increased hardware costs. For example, some solutions improve processing power by increasing the MCU's main frequency or adding an auxiliary DSP, but due to inefficient task scheduling and data transmission mechanisms, the system is still prone to data frame loss, decreased real-time performance, and even lagging protection mechanisms under high loads. Summary of the Invention

[0004] In view of the problems existing in a current high-efficiency energy-saving inverter control method based on a distributed data processing architecture, this invention is proposed. Therefore, the problem to be solved by this invention is how to provide a high-efficiency energy-saving inverter control method based on a distributed data processing architecture.

[0005] To solve the above-mentioned technical problems, the present invention provides the following technical solution:

[0006] In a first aspect, the present invention provides a high-efficiency energy-saving inverter control method based on a distributed data processing architecture, which includes synchronously collecting system operating parameters of the inverter within a preset sampling period and storing the system operating parameters in a dual buffer; the dual buffer includes a first buffer and a second buffer, the first buffer being used for data writing and the second buffer being used for data reading.

[0007] The real-time load rate of the Communication Processing Unit (CSU) is calculated within a set time period, triggering the task allocation flag to be set. Data processing tasks are divided according to the status of the task allocation flag, and system operating parameters in the second buffer are obtained for distributed parallel data processing.

[0008] The results of distributed parallel data processing are used to generate optimized control commands, which are then sent to the power control module via the DMA channel for optimized control of the inverter.

[0009] As a preferred embodiment of the high-efficiency energy-saving inverter control method based on a distributed data processing architecture described in this invention, the system operating parameters include AC side voltage, AC side current, IGBT junction temperature, and grid frequency.

[0010] As a preferred embodiment of the high-efficiency energy-saving inverter control method based on a distributed data processing architecture described in this invention, the real-time load rate of the computing and communication processing unit (CSU) within a set time period includes:

[0011] At the end of each time window, the processing time t for each type of task is calculated. i The weighted cumulative processing time is calculated using the following formula:

[0012]

[0013] In the formula, The weighted cumulative processing time is N, where N is the total number of task categories, and t is the total processing time. i w represents the cumulative processing time of task i within the window. i Let be the priority weight of the i-th type of task, and

[0014] The instantaneous load factor is calculated using the following formula:

[0015]

[0016] In the formula, L i Let T be the instantaneous load rate of the i-th type of task. w The length of the time window;

[0017] Introducing an exponential smoothing parameter α∈(0,1), the real-time load rate calculated in the current window is combined with the previous smoothing result to obtain the smoothed real-time load rate, as shown in the formula:

[0018] L exp (k)=αL i (k)+(1-α)L exp (k-1)

[0019] In the formula, k represents the k-th calculation, and L i(k) represents the real-time load factor calculated k times, L exp (k) represents the smoothed real-time load rate calculated in the kth iteration;

[0020] The smoothed real-time load rate is compared with a preset load threshold to determine whether to perform distributed task allocation.

[0021] As a preferred embodiment of the high-efficiency energy-saving inverter control method based on a distributed data processing architecture described in this invention, the step of dividing data processing tasks according to the task allocation flag status includes:

[0022] When the smoothed real-time load rate is less than the preset load threshold, the task allocation flag F1 is set to 1, and the system enters a low-load state to perform distributed task allocation; otherwise, F1 is kept at 0, and the system maintains the current priority.

[0023] Under low load conditions, the data processing tasks are divided into first-level tasks and second-level tasks. The first-level tasks include PWM waveform generation and grid-connected synchronous control, which are executed by the main control unit (MCU) first. The second-level tasks include harmonic analysis and temperature warning, which are executed by the parallel communication processing unit (CSU).

[0024] As a preferred embodiment of the high-efficiency energy-saving inverter control method based on a distributed data processing architecture described in this invention, the step of obtaining system operating parameters in the second buffer for distributed parallel data processing includes:

[0025] When the task allocation flag F1=1, the main control unit MCU executes the first-level task and reads the AC side voltage and AC side current in the double buffer.

[0026] The power factor, harmonic distortion rate, IGBT junction temperature, and AC side voltage deviation are obtained and then linearly normalized.

[0027] The PWM carrier frequency is adjusted by defining four feedforward gain coefficients k1, k2, k3, and k4 to obtain the reference PWM carrier frequency f. c0 The adjusted PWM carrier frequency is calculated using the following formula:

[0028] f c,ff (h)=f c0 (1+k1N PF -k2N THD -k3N T +k4N V )

[0029] In the formula, f c,ff (k) represents the adjusted PWM carrier frequency at sampling time h, k1, k2, k3, and k4 are the feedforward gain coefficients, and N PFN is the normalized power factor. THD N represents the normalized harmonic distortion rate. T N is the normalized IGBT junction temperature. V This is the normalized AC side voltage deviation;

[0030] The Communication Processing Unit (CSU) performs the second-level task, performs harmonic analysis on the AC side current, obtains the harmonic distortion rate, and transmits the obtained harmonic distortion rate to the main control unit (MCU).

[0031] IGBT junction temperature T j By matching the measured junction temperature with the preset temperature curve, the temperature warning level is determined by judging the interval between the measured junction temperature and the three-level temperature threshold.

[0032] When F1=0, the main control unit (MCU) and the communication processing unit (CSU) each execute tasks according to their default priorities.

[0033] As a preferred embodiment of the high-efficiency energy-saving inverter control method based on a distributed data processing architecture described in this invention, wherein determining the temperature warning level includes:

[0034] When the IGBT junction temperature T j ≤ First temperature threshold T L1 If so, the current temperature is normal.

[0035] When the first temperature threshold T L1 <IGBT junction temperature T j ≤Second temperature threshold T L2 If this occurs, the current temperature warning level will be set to Level 1 warning status;

[0036] When the second temperature threshold T L2 <IGBT junction temperature T j ≤Third temperature threshold T L3 If this occurs, the current temperature warning level will be raised to Level II.

[0037] When the third temperature threshold T L3 <IGBT junction temperature T j If the temperature is high, the current temperature warning level will be set to Level 3.

[0038] As a preferred embodiment of the high-efficiency energy-saving inverter control method based on a distributed data processing architecture described in this invention, the step of generating optimized control instructions using distributed parallel data processing results includes:

[0039] The dead-time compensation time is adjusted by adjusting the total harmonic distortion (THD). Every PWM cycle or fixed time window, an FFT is performed on the AC side current to calculate the current total harmonic distortion (THD). The measured THD is subtracted from the target THD to obtain the error. The dead-time compensation time is adjusted by selecting a preset compensation increment based on the magnitude of the error.

[0040] The inverter's output power is adjusted according to the temperature warning level: when the temperature warning level is Level 1, the inverter's output power is reduced to 90% of the rated value; when the temperature warning level is Level 2, the inverter's output power is reduced to 70% of the rated value; when the temperature warning level is Level 3, the inverter protection is triggered and the inverter is shut down.

[0041] The adjusted PWM carrier frequency, dead-time compensation time, and inverter power output power are encapsulated into control commands and sent to the power control module via the DMA channel for optimized inverter control.

[0042] In a second aspect, the present invention provides a computer device, including a memory and a processor, wherein the memory stores a computer program, and the processor executes the computer program to implement the steps of a high-efficiency energy-saving inverter control method based on a distributed data processing architecture.

[0043] Thirdly, the present invention provides a computer-readable storage medium having a computer program stored thereon, wherein: when the computer program is executed by a processor, it implements the steps of a high-efficiency energy-saving inverter control method based on a distributed data processing architecture.

[0044] The beneficial effects of this invention are as follows: By introducing a real-time load rate monitoring mechanism for the Communication Processing Unit (CSU), the system can dynamically prioritize tasks based on resource usage, ensuring the timely execution of critical control tasks and rationally allocating auxiliary analysis tasks when processing resources are sufficient. Based on the distributed parallel data processing architecture of the main control unit and the communication processing unit, this not only shortens the data processing cycle and improves the overall response speed but also reduces the load on a single processor. While ensuring inverter control accuracy, it achieves dual optimization of control efficiency and energy consumption, demonstrating significant practical value and promising prospects for widespread application. Attached Figure Description

[0045] To more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0046] Figure 1This is a flowchart of a high-efficiency energy-saving inverter control method based on a distributed data processing architecture. Detailed Implementation

[0047] To make the above-mentioned objects, features, and advantages of the present invention more readily understood, specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of the present invention, and not all of them. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the protection scope of the present invention.

[0048] Many specific details are set forth in the following description in order to provide a full understanding of the invention. However, the invention may also be practiced in other ways different from those described herein, and those skilled in the art can make similar extensions without departing from the spirit of the invention. Therefore, the invention is not limited to the specific embodiments disclosed below.

[0049] Secondly, the term "an embodiment" or "embodiment" as used herein refers to a specific feature, structure, or characteristic that may be included in at least one implementation of the present invention. The phrase "in one embodiment" appearing in different places throughout this specification does not necessarily refer to the same embodiment, nor is it a single embodiment or an embodiment selectively excluded from other embodiments.

[0050] Reference Figure 1 This is the first embodiment of the present invention, which provides a high-efficiency energy-saving inverter control method based on a distributed data processing architecture, including:

[0051] S1: Synchronously collect the system operating parameters of the inverter within a preset sampling period, and store the system operating parameters in a dual buffer; the dual buffer includes a first buffer and a second buffer, the first buffer is used for data writing, and the second buffer is used for data reading;

[0052] Specifically, the inverter includes a main control unit (MCU), a communication processing unit (CSU), a data acquisition module, and a distributed task allocation module. The main control unit (MCU) includes a first processor and a power control module. The communication processing unit (CSU) includes a second processor. The data acquisition module is used to collect the inverter's system operating parameters and input them into the dual buffer in the communication processing unit (CSU), while also connecting the main control unit (MCU) and the communication processing unit (CSU). The distributed task allocation module is used to monitor the real-time workload of the communication processing unit (CSU) and perform distributed task allocation.

[0053] Within a preset sampling period (50μs), the AC side voltage V is synchronously acquired through the data acquisition module. ac AC side current I acIGBT junction temperature T j and grid frequency f g The four data streams are written to dual buffers. The first buffer (write buffer) is used to continuously receive newly acquired data; the second buffer (read buffer) is used for subsequent processing units to read, ensuring that data processing and acquisition do not interfere with each other.

[0054] S2: Calculate the real-time load rate of the communication processing unit (CSU) within a set time, trigger the task allocation flag to be set, divide the data processing tasks according to the status of the task allocation flag, and obtain the system operating parameters in the second buffer for distributed parallel data processing.

[0055] Specifically, let the current time window length be T. w (For example, 100ms) The Communication Processing Unit (CSU) needs to process N types of tasks of type i within this time window, and the cumulative processing time for each type of task within the window is t. i The corresponding priority weight is w i ,and

[0056] In each T w When the window ends, calculate the processing time t for each type of task. i The weighted cumulative processing time is calculated using the following formula:

[0057]

[0058] In the formula, The weighted cumulative processing time is N, where N is the total number of task categories, and t is the total processing time. i w represents the cumulative processing time of task i within the window. i Let be the priority weight of the i-th type of task, and

[0059] Introducing the exponential smoothing parameter α∈(0,1), the instantaneous load factor is calculated using the following formula:

[0060]

[0061] In the formula, L i Let T be the instantaneous load rate of the i-th type of task. w The length of the time window;

[0062] The smoothed real-time load rate is obtained by combining the current window's calculated real-time load rate with the previous smoothing result, using the following formula:

[0063] L exp (k)=αL i (k)+(1-α)L exp (k-1)

[0064] In the formula, k represents the k-th calculation, and initially we can let L exp (0)=L i (0), T w Where N is the time window length (e.g., 100ms), N is the total number of task categories (level 1, level 2, or more subcategories), and t is the time window length. i w represents the cumulative processing time of task i within the window. i Let L be the priority weight for the i-th task, α be the exponential smoothing coefficient (recommended value 0.6–0.8), and L be the priority weight for the i-th task. i (k) represents the real-time load factor calculated k times, L exp (k) represents the smoothed real-time load rate calculated in the kth iteration, which is used for subsequent task allocation decisions;

[0065] The smoothed real-time load rate is compared with a preset load threshold to determine whether to perform distributed task allocation.

[0066] When the smoothed real-time load rate is less than the preset load threshold, the task allocation flag F1 is set to 1, and the system enters a low-load state to perform distributed task allocation. The data processing tasks are divided into: Level 1 tasks (executed by the main control unit MCU with priority): PWM waveform generation and grid-connected synchronous control; Level 2 tasks (executed by the parallel communication processing unit CSU): harmonic analysis and temperature warning; otherwise, F1 is kept at 0, and the system maintains the current priority.

[0067] When F1 = 1 (low load): The main control unit (MCU) executes the first-level task, reading the AC side voltage V from the dual buffer. ac With AC side current I ac Obtain the power factor (PF), harmonic distortion (THD), and IGBT junction temperature (T). j The AC side voltage deviation ΔV is linearly normalized.

[0068] Adjustments are made, and four feedforward gain coefficients k1, k2, k3, and k4 are defined to obtain the reference PWM carrier frequency f. c0 The adjusted PWM carrier frequency is calculated using the following formula:

[0069] f c,ff (h)=f c0 (1+k1N PF -k2N THD -k3N T +k4N V )

[0070] In the formula, f c,ff (k) represents the adjusted PWM carrier frequency at sampling time h, k1, k2, k3, and k4 are the feedforward gain coefficients, and N PFN is the normalized power factor. THD N represents the normalized harmonic distortion rate. T N is the normalized IGBT junction temperature. V This represents the normalized AC side voltage deviation.

[0071] The Communication Processing Unit (CSU) performs the second-level task, processing the AC side current I. ac Harmonic analysis is performed to obtain the harmonic distortion rate (THD), and the obtained harmonic distortion rate is transmitted to the main control unit (MCU).

[0072] IGBT junction temperature T j By matching the measured junction temperature with the preset temperature curve, the temperature warning level is determined by judging the interval between the measured junction temperature and the three-level temperature threshold.

[0073] Based on the SafeOperatingArea (SOA) data provided by the IGBT chip manufacturer and the results of accelerated life tests, temperature thresholds are obtained to classify different warning levels:

[0074] When the IGBT junction temperature T j ≤ First temperature threshold T L1 If so, the current temperature is normal.

[0075] When the first temperature threshold T L1 <IGBT junction temperature T j ≤Second temperature threshold T L2 If this occurs, the current temperature warning level will be set to Level 1 warning status;

[0076] When the second temperature threshold T L2 <IGBT junction temperature T j ≤Third temperature threshold T L3 If this occurs, the current temperature warning level will be raised to Level II.

[0077] When the third temperature threshold T L3 <IGBT junction temperature T j If this occurs, the current temperature warning level will be set to Level 3.

[0078] When F1 = 0 (high load), the main control unit (MCU) and the communication processing unit (CSU) continue to execute the first and second level tasks respectively according to the default priority to avoid overload.

[0079] S3: Use the results of distributed parallel data processing to generate optimized control instructions, and send them to the power control module through the DMA channel for optimized control of the inverter.

[0080] Specifically, the dead-zone compensation time t is adjusted by the harmonic distortion rate (THD). dEvery PWM cycle or fixed time window, perform FFT on the AC side current to calculate the current total harmonic distortion (THD); subtract the measured THD from the target THD to obtain the error; adjust the dead zone compensation time by selecting a preset compensation increment based on the error magnitude.

[0081] The inverter's output power is adjusted according to the temperature warning level: when the temperature warning level is Level 1, the inverter's output power is reduced to 90% of the rated value; when the temperature warning level is Level 2, the inverter's output power is reduced to 70% of the rated value; when the temperature warning level is Level 3, the inverter protection is triggered and the inverter is shut down.

[0082] The adjusted PWM carrier frequency, dead-time compensation time, and inverter power output power are encapsulated into control commands and sent to the power control module via the DMA channel for optimized inverter control.

[0083] This embodiment also provides a computer device applicable to a high-efficiency energy-saving inverter control method based on a distributed data processing architecture, comprising: a memory and a processor; the memory is used to store computer-executable instructions, and the processor is used to execute the computer-executable instructions to implement all or part of the steps of the method described in the above embodiments of the present invention.

[0084] This embodiment also provides a storage medium on which a computer program is stored. When the computer program is executed by a processor, it performs the method in any optional implementation of the above embodiments. The storage medium can be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as Static Random Access Memory (SRAM), Electrically Erasable Programmable Read-Only Memory (EEPROM), Erasable Programmable Read-Only Memory (EPROM), Programmable Red-Only Memory (PROM), Read-Only Memory (ROM), magnetic storage, flash memory, magnetic disk, or optical disk.

[0085] The storage medium proposed in this embodiment and the data storage method proposed in the above embodiments belong to the same inventive concept. Technical details not described in detail in this embodiment can be found in the above embodiments, and this embodiment has the same beneficial effects as the above embodiments.

[0086] In summary, this invention, by introducing a real-time load rate monitoring mechanism for the Communication Processing Unit (CSU), enables the system to dynamically prioritize tasks based on resource usage, ensuring the timely execution of critical control tasks and rationally allocating auxiliary analysis tasks when processing resources are sufficient. Based on a distributed parallel data processing architecture of the main control unit and the communication processing unit, this not only shortens the data processing cycle and improves the overall response speed but also reduces the load on a single processor. While ensuring inverter control accuracy, it achieves dual optimization of control efficiency and energy consumption, demonstrating significant practical value and promising prospects for wider application. It should be noted that the above embodiments are merely illustrative of the technical solutions of this invention and not intended to limit it. Although the invention has been described in detail with reference to preferred embodiments, those skilled in the art should understand that modifications or equivalent substitutions can be made to the technical solutions of this invention without departing from the spirit and scope of the invention, and all such modifications and substitutions should be covered within the scope of the claims of this invention.

Claims

1. An efficient and energy saving inverter control method based on a distributed data processing architecture, characterized by: The application relates to a high-efficiency energy-saving inverter control method based on a distributed data processing architecture. Synchronously collecting system operation parameters of an inverter in a preset sampling period, and storing the system operation parameters into a double buffer area; the double buffer area comprises a first buffer area and a second buffer area, the first buffer area is used for data writing, and the second buffer area is used for data reading; Calculating a real-time load rate of a communication processing unit (CSU) within a set time, triggering a task allocation flag to be set, performing data processing task division according to a task allocation flag state, and obtaining system operation parameters in the second buffer area to perform distributed parallel data processing; The data processing task division according to the task allocation flag state comprises the following steps: When the smoothed real-time load rate < preset load threshold, set the task allocation flag , enter low load state, and perform distributed task allocation; otherwise , the system maintains the current priority; In a low load state, the data processing task is divided into a first-level task and a second-level task, the first-level task comprises PWM waveform generation and grid synchronization control, and the first-level task is preferentially executed by a master control unit (MCU); the second-level task comprises harmonic analysis and temperature early warning, and the second-level task is executed by a parallel communication processing unit (CSU); Using a distributed parallel data processing result to generate an optimized control instruction, and sending the optimized control instruction to a power control module through a DMA channel to perform optimized control on the inverter; The use of the distributed parallel data processing result to generate the optimized control instruction comprises the following steps: Adjusting a dead zone compensation time through a total harmonic distortion (THD) rate, performing FFT on an alternating current side current every PWM period or in a fixed time window, calculating a current total harmonic distortion (THD) rate, subtracting a measured THD from a target THD to obtain an error, and selecting a preset compensation increment to adjust the dead zone compensation time according to the error size; Adjusting an output power of the inverter through a temperature early warning level: when the temperature early warning level is a first-level early warning, the output power of the inverter is reduced to 90% of a rated value; when the temperature early warning level is a second-level early warning, the output power of the inverter is reduced to 70% of the rated value; and when the temperature early warning level is a third-level early warning, inverter protection is triggered and the inverter is stopped. The obtained adjusted PWM carrier frequency, dead zone compensation time and inverter power output power are packaged into a control instruction, and the control instruction is sent to the power control module through the DMA channel to perform optimized control on the inverter.

2. The method of claim 1, wherein: The system operation parameters comprise an alternating current side voltage, an alternating current side current, an IGBT junction temperature and a power grid frequency.

3. The method of claim 2, wherein: The calculation of the real-time load rate of the communication processing unit (CSU) within the set time comprises the following steps: At the end of each time window, the processing time of each type of task is counted The weighted cumulative processing time is calculated according to the formula: wherein, is the weighted cumulative processing time, is the total number of task categories, is the cumulative processing time of the jth category task within the window, is the cumulative processing time of the jth category task, and is the priority weight of the jth An instantaneous load rate is calculated according to the following formula: In the formula, is the first instantaneous load rate of the task of the first class, is the length of the time window; Introducing the exponential smoothing parameter The real-time load rate calculated this time is combined with the last smoothing result to obtain the smoothed real-time load rate, and the formula is: wherein represents the first calculation, is the instantaneous load ratio of the first calculation; the smoothed real-time load ratio of the first calculation; The smoothed real-time load rate is compared with a preset load threshold value to determine whether distributed task allocation is performed.

4. The method of claim 1, wherein: The distributed parallel data processing of the system operation parameters in the second buffer area comprises the following steps: When the task assignment flag is true, the main control unit MCU executes the first level task, reading the AC side voltage and AC side current in the double buffer. Power factors, harmonic distortion rates, IGBT junction temperatures and alternating current side voltage deviations are obtained and linearly normalized; Adjusting the PWM carrier frequency, defining four feedforward gain coefficients , , and , obtaining a reference PWM carrier frequency , calculating the adjusted PWM carrier frequency, the formula being: wherein, is the sampling time is the adjusted PWM carrier frequency, , , and is the feed-forward gain coefficient, is the normalized power factor, is the normalized total harmonic distortion, is the normalized IGBT junction temperature, is the normalized AC side voltage deviation; The communication processing unit (CSU) executes the second-level task, performs harmonic analysis on the alternating current side current, obtains a harmonic distortion rate, and transmits the obtained harmonic distortion rate to the master control unit (MCU); IGBT junction temperature By matching the measured junction temperature with the preset temperature curve, the temperature warning level is determined by judging the interval between the measured junction temperature and the three-level temperature threshold. When the master control unit MCU and the communication processing unit CSU each perform their tasks with the default priority.

5. The method of claim 4, wherein: The determination of the temperature early warning level comprises the following steps: When the IGBT junction temperature ≤ the first temperature threshold , the current temperature is normal; When the first temperature threshold IGBT junction temperature ≤ the second temperature threshold , the current temperature warning level is a first warning state; When the second temperature threshold IGBT junction temperature ≤ third temperature threshold , the current temperature warning level is a second warning state. When the third temperature threshold IGBT junction temperature When the current temperature is equal to or greater than the third temperature threshold, the current temperature warning level is set to the third warning state. 6.A computer device, comprising a memory and a processor, wherein the memory stores a computer program, and the computer device is characterized in that: The processor executes the computer program to realize the steps of the high-efficiency energy-saving inverter control method based on the distributed data processing architecture according to any one of claims 1-5.

7. A computer readable storage medium having stored thereon a computer program, characterized in that: The computer program is executed by a processor to implement the steps of the high-efficiency energy-saving inverter control method based on the distributed data processing architecture according to any one of claims 1-5.

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