Substrate, manufacturing method thereof and chip
By introducing an interconnect mechanism with an embedded support plate into the packaging substrate, and utilizing a combination of metal and dielectric structures, the problems of impedance matching and space utilization in high-speed signal interconnection of the packaging substrate are solved, achieving simple impedance adjustment and efficient signal transmission.
Patent Information
- Application Number
- CN202510809233.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-06-17
- Publication Date
- 2025-10-28
AI Technical Summary
In the prior art, when high-speed signal interconnection is achieved in a limited space on the packaging substrate, the difference in characteristic impedance between the core layer drilling and the stacked layer leads to large return loss, and the impedance control is complicated, occupies a large wiring space, and is difficult to adjust under high wiring density.
An interconnection mechanism with an embedded support plate, including a first metal structure, a second metal structure, and a dielectric structure, serves as a signal transmission and return path. By adjusting the spacing between the metal structures and the dielectric constant of the dielectric structure, impedance matching and adjustment of the signal path are achieved.
While saving substrate wiring space, it simplifies the impedance adjustment of signal paths, avoids dependence on ground vias and anti-pads, and improves the efficiency and adjustability of signal transmission.
Smart Images
Figure CN120854451A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of integrated circuit packaging technology, and in particular to a substrate, its manufacturing method, and a chip. Background Technology
[0002] With the continuous improvement of the performance of chips such as CPUs (central processing units) and GPUs (graphics processing units), signal transmission rates are also getting faster and faster. As a result, the design of packaging substrates faces enormous challenges, as they need to achieve high-speed signal interconnection within a limited space.
[0003] In related technologies, packaging substrates mostly use a core layer as support, with stacked layers formed on both sides of the core layer for signal transmission. Signals on one side of the core layer need to be transmitted to the other side through holes drilled in the core layer. Because the physical characteristics of the core layer holes differ significantly from those of the stacked layers, the characteristic impedances of the core layer holes and the stacked layers also differ considerably, resulting in significant return loss for through-layer signals. To reduce return loss, the core layer holes need to be specially designed to match their characteristic impedance as closely as possible to the characteristic impedance of the stacked layers.
[0004] Specifically, the characteristic impedance of a signal line is not only related to the characteristics of the line itself, but also inseparable from the signal return path. To ensure that the characteristic impedance of the core layer via is as consistent as possible with that of the stacked layers, related technologies typically place multiple ground vias in or near the signal core layer via to provide a return path for signals passing through the core layer. Based on this, the characteristic impedance of the core layer via is generally adjusted by the spacing between the signal core layer via and the ground via GND, as well as the radius of the anti-pad. Furthermore, for differential signals, the characteristic impedance of the core layer via can also be adjusted by regulating the spacing between the two core layer vias corresponding to the differential signal. For example, ... Figure 1 As shown, the characteristic impedance of the core layer boreholes corresponding to the positive terminal P and the inverting terminal N of the differential signal can be adjusted by the spacing L1 between the core layer borehole N and the grounding via GND, the radius R of the anti-pad, and the spacing L2 between the core layer boreholes N and P.
[0005] However, on the one hand, since there are many factors affecting the impedance of the core layer drilling, the impedance control is complicated and requires a long time and a lot of resources for simulation. On the other hand, since there are many grounding vias and the spacing of the core layer vias is large, they will occupy a large amount of routing space. On substrates with high wiring density, it is difficult to leave enough space for the core layer drilling to control the impedance. Summary of the Invention
[0006] In view of this, embodiments of the present invention provide a substrate and its manufacturing method, as well as a chip, which can save substrate wiring space while making impedance adjustment of the signal path simpler.
[0007] In a first aspect, embodiments of the present invention provide a substrate, comprising: a support plate; and an interconnection mechanism embedded in and penetrating the support plate; the interconnection mechanism comprising a first metal structure, a second metal structure, and a first dielectric structure; the first metal structure being tubular, the second metal structure being disposed within the first metal structure, and the first dielectric structure being filled between the first metal structure and the second metal structure; one of the first metal structure and the second metal structure serving as a signal transmission structure for transmitting signals passing through the support plate, and the other of the first metal structure and the second metal structure serving as a reference structure for providing a return path for signals passing through the support plate.
[0008] In one embodiment, the substrate further includes: a first interconnect layer and a second interconnect layer respectively disposed on both sides of the support plate, the first interconnect layer and the second interconnect layer being coupled through the interconnect mechanism; the first interconnect layer includes a first signal layer and a first reference layer; the second interconnect layer includes a second signal layer and a second reference layer; the signal transmission structure is used to couple the first signal layer and the second signal layer; the reference structure is used to couple the first reference layer and the second reference layer.
[0009] In one embodiment, the first interconnect layer includes a plurality of alternately stacked first metal layers and a plurality of first dielectric layers, the first dielectric layer including a first conductive via for coupling different first metal layers; the plurality of first metal layers include at least one first signal layer and at least one first reference layer. The second interconnect layer includes a plurality of alternately stacked second metal layers and a plurality of second dielectric layers, the second dielectric layer including a second conductive via for coupling different second metal layers; the plurality of second metal layers include at least one second signal layer and at least one second reference layer.
[0010] In one embodiment, both the first reference layer and the second reference layer are ground layers, or both the first reference layer and the second reference layer are power layers.
[0011] In one embodiment, the spacing between the first metal structure and the second metal structure, as well as the dielectric constant of the first dielectric structure, makes the characteristic impedance of the signal transmission structure match the characteristic impedance of the first signal layer.
[0012] In one embodiment, the plurality of first dielectric layers include at least one first connecting dielectric layer, and the first conductive via in each first connecting dielectric layer includes a first connecting via. The first connecting vias in each first connecting dielectric layer are electrically connected to each other and are all aligned with the second metal structure to form a first via tunnel. The second metal structure is coupled to one of the first metal layers through the first via tunnel. And / or, the plurality of second dielectric layers include at least one second connecting dielectric layer, and the second conductive via in each second connecting dielectric layer includes a second connecting via. The second connecting vias in each second connecting dielectric layer are electrically connected to each other and are all aligned with the second metal structure to form a second via tunnel. The second metal structure is coupled to one of the second metal layers through the second via tunnel.
[0013] In one embodiment, the number of first connecting vias in each first connecting medium layer is one or more, and the number of first connecting vias in each first connecting medium layer may be equal or unequal; and / or, the number of second connecting vias in each second connecting medium layer is one or more, and the number of second connecting vias in each second connecting medium layer may be equal or unequal.
[0014] In one embodiment, in each of the first metal layers, the first metal layer coupled to the first metal structure is closer to the support plate than the first metal layer coupled to the second metal structure; in each of the second metal layers, the second metal layer coupled to the first metal structure is closer to the support plate than the second metal layer coupled to the second metal structure.
[0015] In one embodiment, the second metal structure is columnar.
[0016] In one embodiment, the second metal structure is tubular, and the second metal structure is filled with a second dielectric structure.
[0017] Secondly, embodiments of the present invention also provide a chip, comprising: a packaging substrate, wherein the packaging substrate is any type of substrate provided in the embodiments of the present invention; and a die disposed on the packaging substrate and coupled to the packaging substrate.
[0018] Thirdly, embodiments of the present invention also provide a substrate manufacturing method, comprising: providing a support plate; forming an interconnection mechanism in the support plate, the interconnection mechanism being embedded in and penetrating the support plate, including a first metal structure, a second metal structure, and a first dielectric structure; the first metal structure being tubular, the second metal structure being disposed within the first metal structure, and the first dielectric structure being filled between the first metal structure and the second metal structure; wherein, one of the first metal structure and the second metal structure serves as a signal transmission structure for transmitting signals passing through the support plate, and the other of the first metal structure and the second metal structure serves as a reference structure for providing a return path for signals passing through the support plate.
[0019] In one embodiment, forming the interconnection mechanism in the support plate includes: forming a first through hole in the support plate; electroplating metal on the hole wall of the first through hole and on the upper and lower surfaces of the support plate to form a first electroplated structure; filling the electroplated first through hole with a first dielectric material to form a first dielectric structure; setting a second through hole in the first dielectric structure; electroplating metal on the hole wall of the second through hole and on the upper and lower surfaces of the support plate to form a second electroplated structure, wherein the second electroplated structure and the first electroplated structure are combined to form an electroplated composite structure; etching the electroplated composite structure to obtain a first metal structure and a second metal structure, wherein the first metal structure and the second metal structure are spaced apart from each other, and the first dielectric structure is filled between them.
[0020] In one embodiment, after electroplating metal on the hole wall of the second perforation and the upper and lower surfaces of the support plate to form a second electroplated structure, and before etching the electroplated composite structure, the method further includes: filling the electroplated second perforation with a second dielectric material to obtain a second dielectric structure, wherein the second dielectric structure is embedded in the electroplated composite structure; the etching of the electroplated composite structure includes: etching the electroplated composite structure in which the second dielectric structure is embedded.
[0021] In one embodiment, after forming the interconnect mechanism in the support plate, the method further includes: forming a first interconnect layer on one side of the support plate where the interconnect mechanism is formed, and forming a second interconnect layer on the other side of the support plate where the interconnect mechanism is formed, wherein the first interconnect layer and the second interconnect layer are coupled through the interconnect mechanism; wherein the first interconnect layer includes a first signal layer and a first reference layer; the second interconnect layer includes a second signal layer and a second reference layer; the signal transmission structure is used to couple the first signal layer and the second signal layer; and the reference structure is used to couple the first reference layer and the second reference layer.
[0022] In one embodiment, the first interconnect layer includes a plurality of alternately stacked first metal layers and a plurality of first dielectric layers, the first dielectric layer including a first conductive via for coupling different first metal layers; the plurality of first metal layers including at least one first signal layer and at least one first reference layer; the second interconnect layer includes a plurality of alternately stacked second metal layers and a plurality of second dielectric layers, the second dielectric layer including a second conductive via for coupling different second metal layers; the plurality of second metal layers including at least one second signal layer and at least one second reference layer.
[0023] In one embodiment, before forming the interconnect mechanism in the support plate, the method further includes: determining the spacing between the first metal structure and the second metal structure in the interconnect mechanism and the dielectric constant of the first dielectric structure based on the expected characteristic impedance of the first signal layer, so that the characteristic impedance of the signal transmission structure matches the expected characteristic impedance of the first signal layer.
[0024] In one embodiment, the plurality of first dielectric layers include at least one first connecting dielectric layer, and the first conductive via in each first connecting dielectric layer includes a first connecting via. The first connecting vias in each first connecting dielectric layer are electrically connected to each other and are all aligned with the second metal structure to form a first via tunnel. The second metal structure is coupled to one of the first metal layers through the first via tunnel. And / or, the plurality of second dielectric layers include at least one second connecting dielectric layer, and the second conductive via in each second connecting dielectric layer includes a second connecting via. The second connecting vias in each second connecting dielectric layer are electrically connected to each other and are all aligned with the second metal structure to form a second via tunnel. The second metal structure is coupled to one of the second metal layers through the second via tunnel.
[0025] In one embodiment, the number of first connecting vias in each first connecting medium layer is one or more, and the number of first connecting vias in each first connecting medium layer may be equal or unequal; and / or, the number of second connecting vias in each second connecting medium layer is one or more, and the number of second connecting vias in each second connecting medium layer may be equal or unequal.
[0026] In one embodiment, forming a first interconnect layer on one side of a support plate having the interconnect mechanism and forming a second interconnect layer on the other side of the support plate having the interconnect mechanism includes: providing a first initial dielectric layer on one side of the support plate having the interconnect mechanism and a second initial dielectric layer on the other side; providing a first initial through-hole on the first initial dielectric layer and a second initial through-hole on the second initial dielectric layer; electroplating metal in the first initial through-hole and on the first initial dielectric layer to form a third electroplated structure, electroplating metal in the second initial through-hole and on the second initial dielectric layer to form a fourth electroplated structure; etching the third electroplated structure to form a first conductive via and a first metal layer, and etching the fourth electroplated structure to form a second conductive via and a second metal layer.
[0027] In one embodiment, among each of the first metal layers, the first metal layer coupled to the first metal structure is closer to the support plate than the first metal layer coupled to the second metal structure.
[0028] In one embodiment, forming the interconnecting mechanism in the support plate includes: forming a third through hole in the support plate; and fixing the pre-fabricated interconnecting mechanism into the third through hole.
[0029] The substrate, its manufacturing method, and the chip provided in the embodiments of the present invention, through the signal transmission structure and reference structure formed by the first metal structure and the second metal structure, allow the interconnect mechanism of the substrate to provide a compact signal transmission path and signal return path without the need for a separate grounding via, thus effectively saving substrate wiring space. Furthermore, when it is necessary to adjust the impedance of the signal path passing through the support plate, only the parameters of the interconnect mechanism need to be adjusted, without considering other factors such as grounding vias and anti-pads, making impedance adjustment of the signal path passing through the support plate simpler. Therefore, the substrate provided in the embodiments of the present invention can save substrate wiring space while simplifying impedance adjustment of the signal path. Attached Figure Description
[0030] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0031] Figure 1 This is a schematic diagram of a structure for perforation in the core layer of a substrate in the prior art; Figure 2A schematic diagram of a substrate provided for an embodiment of the present invention; Figure 3 This is a side view of the interconnection mechanism of the substrate in an embodiment of the present invention; Figure 4 for Figure 3 A corresponding top view; Figure 5 This is another side view of the interconnection mechanism of the substrate in an embodiment of the present invention; Figure 6 for Figure 5 A corresponding top view; Figure 7 Another schematic diagram of the substrate provided for an embodiment of the present invention; Figure 8 This is a schematic diagram showing the connection relationship between the interconnect mechanism and the first metal layer and the second metal layer; Figure 9 A schematic diagram of another structure of a substrate provided for an embodiment of the present invention; Figure 10 A schematic diagram of a chip structure provided for an embodiment of the present invention; Figure 11 A flowchart of a substrate manufacturing method provided for an embodiment of the present invention; Figure 12 This is a flowchart illustrating a method for manufacturing the interconnect mechanism of a substrate according to an embodiment of the present invention. Figure 13 for Figure 12 Corresponding process flow diagram; Figure 14 This is a flowchart illustrating a method for manufacturing the first interconnect layer and the second interconnect layer of a substrate according to an embodiment of the present invention. Figure 15 for Figure 14 The corresponding process flow diagram. Detailed Implementation
[0032] The embodiments of the present invention will now be described in detail with reference to the accompanying drawings.
[0033] It should be understood that the described embodiments are merely some, not all, of the embodiments of the present invention. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without inventive effort are within the scope of protection of the present invention.
[0034] This invention provides a substrate that can save substrate wiring space while making impedance adjustment of signal paths simpler.
[0035] like Figure 2As shown, an embodiment of the present invention provides a substrate including a support plate 1 and an interconnect mechanism 2, wherein the interconnect mechanism 2 is embedded in and penetrates the support plate 1. The interconnect mechanism 2 may include a first metal structure 21, a second metal structure 22, and a first dielectric structure 23; the first metal structure 21 is tubular, the second metal structure 22 is disposed in the first metal structure 21, and the first dielectric structure 23 fills the space between the first metal structure 21 and the second metal structure 22; one of the first metal structure 21 and the second metal structure 22 serves as a signal transmission structure for transmitting signals passing through the support plate 1, and the other of the first metal structure 21 and the second metal structure 22 serves as a reference structure for providing a return path for signals passing through the support plate 1.
[0036] The substrate provided in the embodiments of the present invention, through the signal transmission structure and reference structure formed by the first metal structure 21 and the second metal structure 22, allows the interconnect mechanism 2 of the substrate to provide a compact signal transmission path and signal return path without the need for a separate grounding via, thus effectively saving substrate wiring space. Furthermore, when it is necessary to adjust the impedance of the signal path passing through the support plate 1, only the parameters of the interconnect mechanism 2 need to be adjusted, without considering other factors such as grounding vias and anti-pads, making impedance adjustment of the signal path passing through the support plate 1 simpler. Therefore, the substrate provided in the embodiments of the present invention can save substrate wiring space while simplifying impedance adjustment of the signal path.
[0037] Specifically, in embodiments of the present invention, the support plate 1 may include various plates with high strength and capable of providing support, such as plates formed of various resin materials. The interconnecting mechanism 2 may be embedded in and penetrate the support plate 1 along its thickness direction, thereby connecting two opposing surfaces of the support plate 1. Signals located on one side of the support plate 1 can pass through the support plate 1 via the interconnecting mechanism 2 to reach the other side of the support plate 1.
[0038] In one embodiment of the present invention, the interconnecting mechanism 2 may extend in a columnar shape between two opposing surfaces of the support plate 1. The cross-sectional shape of the interconnecting mechanism 2 is not limited, and may, for example, be circular. In one embodiment, the interconnecting mechanism 2 may specifically include a first metal structure 21, a second metal structure 22, and a first dielectric structure 23. The first metal structure 21 may be tubular, and the second metal structure 22 may be located within the first metal structure 21. The first metal structure 21 and the second metal structure 22 may extend parallel to each other between the two opposing surfaces of the support plate 1. The first dielectric structure 23 may fill the space between the first metal structure 21 and the second metal structure 22.
[0039] Optionally, the specific shape of the second metal structure 22 can include various forms. For example, in one example, the second metal structure 22 can be columnar, such as a cylinder or a prism, and a side view of the interconnecting mechanism 2 can be as follows: Figure 3 As shown, the corresponding top view can be as follows: Figure 4 As shown. In another example, the second metal structure 22 can also be tubular, and the second metal structure 22 can be filled with the second dielectric structure 24. A side view of the interconnecting mechanism 2 can then be as shown. Figure 5 As shown, the corresponding top view can be as follows: Figure 6 As shown.
[0040] Furthermore, such as Figure 7 As shown, in one embodiment of the present invention, the substrate may include not only a support plate 1 and an interconnect mechanism 2, but also a first interconnect layer 31 and a second interconnect layer 32 respectively disposed on both sides of the support plate 1, wherein the first interconnect layer 31 and the second interconnect layer 32 are coupled through the interconnect mechanism 2. The first interconnect layer 31 may include a first signal layer 410 and a first reference layer 411; the second interconnect layer 32 may include a second signal layer 420 and a second reference layer 421; a signal transmission structure is used to couple the first signal layer 410 and the second signal layer 420; and a reference structure is used to couple the first reference layer 411 and the second reference layer 421. The signal transmission structure may be one of a first metal structure 21 and a second metal structure 22, and the reference structure may be the other of the first metal structure 21 and the second metal structure 22.
[0041] Specifically, in one embodiment, the first interconnect layer 31 may include a plurality of alternately stacked first metal layers 41 and a plurality of first dielectric layers 51. The first dielectric layer 51 may include a first conductive via 61 for coupling different first metal layers 41. The plurality of first metal layers 41 may include at least one first signal layer 410 and at least one first reference layer 411. The second interconnect layer 32 may include a plurality of alternately stacked second metal layers 42 and a plurality of second dielectric layers 52. The second dielectric layer 52 may include a second conductive via 62 for coupling different second metal layers 42. The plurality of second metal layers 42 may include at least one second signal layer 420 and at least one second reference layer 421.
[0042] In embodiments of the present invention, the signal transmission structure can couple the first signal layer 410 and the second signal layer 420 on both sides of the support plate 1, and the reference structure can couple the first reference layer 411 and the second reference layer 421 on both sides of the support plate 1. Here, the first reference layer 411 and the second reference layer 421 can belong to the same network. For example, the first reference layer 411 and the second reference layer 421 can both be ground layers, or the first reference layer 411 and the second reference layer 421 can both be power layers.
[0043] In this way, when a signal is transmitted in the signal layer (including the first signal layer 410 or the second signal layer 420), there is always a reference layer (including the first reference layer 411 or the second reference layer 421) accompanying the signal layer to provide a return path. When the signal passes through the support plate 1 through the signal transmission structure in the interconnection mechanism 2, the reference structure in the interconnection mechanism 2 can continue to provide a return path and connect the reference layers on both sides of the support plate 1, thereby ensuring that the return path of the signal is not interrupted when passing through the support plate 1, which is convenient for maintaining the consistency of characteristic impedance in the signal path.
[0044] Specifically, in one embodiment of the present invention, the characteristic impedance of the signal transmission structure can be matched with the characteristic impedance of the first signal layer 410 by controlling the spacing between the first metal structure 21 and the second metal structure 22 and the dielectric constant of the first dielectric structure 23. A smaller spacing between the first metal structure 21 and the second metal structure 22 results in a smaller characteristic impedance of the signal transmission structure under the same conditions; conversely, a larger spacing results in a larger characteristic impedance under the same conditions. The dielectric constant of the first dielectric structure 23 is related to the specific dielectric material; by selecting different dielectric materials, the characteristic impedance of the signal transmission structure can also be changed. The spacing between the first metal structure 21 and the second metal structure 22 and the specific dielectric material of the first dielectric structure 23 can be determined through simulation.
[0045] Optionally, in embodiments of the present invention, since the signal transmission structure can be one of the first metal structure 21 and the second metal structure 22, and the reference structure can be the other of the first metal structure 21 and the second metal structure 22, the connected signal layer or reference layer will be different when the first metal structure 21 plays the different roles of signal transmission structure or reference structure. Similarly, the connected signal layer or reference layer will be different when the second metal structure 21 plays the different roles of signal transmission structure or reference structure.
[0046] Specifically, such as Figure 7 As shown, in one example, the signal transmission structure is a first metal structure 21 and the reference structure is a second metal structure 22. The first metal structure 21 can be coupled to the first signal layer 410 and the second signal layer 420 respectively. The second metal structure 22 can be coupled to the first reference layer 411 through the first signal layer 410 and to the second reference layer 421 through the second signal layer 420.
[0047] like Figure 8As shown, in another example, the signal transmission structure is a second metal structure 21 and the reference structure is a first metal structure 22. The first metal structure 21 can be coupled to the first reference layer 411 and the second reference layer 421 respectively. The second metal structure 22 can be coupled to the first signal layer 410 through the first reference layer 411 and to the second signal layer 420 through the second reference layer 421.
[0048] Regardless of whether the signal transmission structure is the first metal structure 21 or the second metal structure 22, in each of the first metal layers 41, the first metal layer coupled to the first metal structure 21 is closer to the support plate 1 than the first metal layer coupled to the second metal structure 22.
[0049] Similarly, in each of the second metal layers 42, the second metal layer coupled to the first metal structure 21 is closer to the support plate 1 than the second metal layer coupled to the second metal structure 22.
[0050] Furthermore, such as Figure 9 As shown, in one embodiment, the plurality of first dielectric layers 51 may include at least one first connecting dielectric layer 510. Each first connecting dielectric layer 510 has a first conductive via 61, including a first connecting via 610. The first connecting vias 610 in each first connecting dielectric layer 510 are electrically connected to each other and are all aligned with the second metal structure 22 to form a first via tunnel 601. The second metal structure 22 is coupled to a first metal layer 41 through the first via tunnel 601. In one embodiment, the number of first connecting vias 610 in each first connecting dielectric layer 510 may be one or more, and the number of first connecting vias 610 in each first connecting dielectric layer 510 may be equal or unequal. For example, in one example, the number of first connecting vias 610 in first connecting dielectric layer 510A is three, and the number of first connecting vias 610 in first connecting dielectric layer 510B may be one, two, or three, etc. When the number of first connecting vias 610 is multiple, the inductance in the circuit can be reduced more effectively, thereby further reducing the impedance of the signal path.
[0051] Similarly, the plurality of second dielectric layers 52 may include at least one second connecting dielectric layer 520. Each second connecting dielectric layer 520 includes a second connecting via 62, which are electrically connected to each other and aligned with the second metal structure 22 to form a second via tunnel 602. The second metal structure 22 is coupled to a second metal layer 42 through the second via tunnel 602. In one embodiment, the number of second connecting vias 620 in each second connecting dielectric layer 520 may be one or more, and the number of second connecting vias 620 in each second connecting dielectric layer 520 may be equal or unequal.
[0052] Secondly, embodiments of the present invention also provide a chip that can save wiring space on the packaging substrate while making impedance adjustment of the signal path simpler.
[0053] like Figure 10 As shown, the chip 300 provided in the embodiments of the present invention may include: The packaging substrate 100 is any of the substrates provided in the foregoing embodiments; The die 200 is disposed on the packaging substrate 100 and coupled to the packaging substrate 100.
[0054] The chip provided in the embodiments of the present invention may include any of the substrates provided in the foregoing embodiments, and thus can also achieve the corresponding beneficial technical effects, as has been described above, and will not be repeated here.
[0055] Thirdly, embodiments of the present invention also provide a substrate manufacturing method that can save substrate wiring space while making impedance adjustment of signal paths simpler.
[0056] like Figure 11 As shown, the substrate manufacturing method provided in the embodiments of the present invention may include: S71, provides a support plate; S72, an interconnection mechanism is formed in the support plate, the interconnection mechanism is embedded in and passes through the support plate, and includes a first metal structure, a second metal structure, and a first dielectric structure; the first metal structure is tubular, the second metal structure is disposed in the first metal structure, and the first dielectric structure fills the space between the first metal structure and the second metal structure; wherein, one of the first metal structure and the second metal structure serves as a signal transmission structure for transmitting signals passing through the support plate, and the other of the first metal structure and the second metal structure serves as a reference structure for providing a return path for signals passing through the support plate.
[0057] The substrate manufacturing method provided in the embodiments of the present invention, through the signal transmission structure and reference structure formed by the first metal structure 21 and the second metal structure 22, allows the interconnect mechanism 2 of the substrate to provide a compact signal transmission path and signal return path without the need for a separate grounding via, thus effectively saving substrate wiring space. Furthermore, when it is necessary to adjust the impedance of the signal path passing through the support plate 1, only the parameters of the interconnect mechanism 2 need to be adjusted, without considering other factors such as grounding vias and anti-pads, making impedance adjustment of the signal path passing through the support plate 1 simpler. Therefore, the substrate provided in the embodiments of the present invention can save substrate wiring space while simplifying impedance adjustment of the signal path.
[0058] Specifically, in step S72, the steps for forming the interconnection mechanism in the support plate can be as follows: Figure 12 As shown, the process flow diagrams corresponding to these steps can be found as follows: Figure 13 As shown. Combined with Figure 12 and Figure 13 In one embodiment of the present invention, step S72, forming an interconnection mechanism in the support plate, may include: S721, provides a support plate; S722, A first perforation is formed on the support plate; The support plate can include various sheet materials with high strength that can provide a certain degree of support, such as sheets made of various resin materials. One or more first perforations can be formed on the support plate by mechanical drilling. The first perforation penetrates the support plate and connects two opposite surfaces of the support plate.
[0059] S723. Electroplating metal onto the hole wall of the first perforation and the upper and lower surfaces of the support plate to form a first electroplating structure; In this step, metal (e.g., copper) can be electroplated onto the walls of the first perforation and the surfaces on both sides of the support plate. The plating thickness of the first electroplated structure can be controlled by adjusting the plating time and plating rate. Optionally, the first and second electroplated structures can be formed simultaneously or sequentially.
[0060] S724. Fill the first perforation after electroplating with a first dielectric material to form a first dielectric structure; Optionally, the first dielectric material may include various insulating materials, such as one or more organic polymers.
[0061] S725, A second perforation is provided in the first dielectric structure; In this step, a second perforation can be formed in the first medium structure by mechanical drilling. The diameter of the second perforation is smaller than that of the first perforation. The first and second perforations are not connected to each other.
[0062] S726. Electroplating metal on the hole wall of the second perforation and the upper and lower surfaces of the support plate to form a second electroplating structure, and combining the second electroplating structure with the first electroplating structure to form an electroplating composite structure. S727. The electroplated composite structure is etched to obtain a first metal structure and a second metal structure, wherein the first metal structure and the second metal structure are spaced apart from each other and the space between them is filled with a first dielectric structure.
[0063] In one embodiment, a first metal structure may extend from a first through-hole and continue to extend on the surface of a support plate to form a pad structure, thereby facilitating electrical interconnection between the first metal structure and other structures. Similarly, a second metal structure may also extend from a second through-hole and continue to extend on the surface of a support plate to form a pad structure, thereby facilitating electrical interconnection between the second metal structure and other structures.
[0064] Optionally, in one example, before etching the electroplated composite structure, thinning and grinding operations can be performed on the electroplated composite structure to ensure the consistency of the subsequent etching process. By etching the electroplated composite structure, the metal plated in the first through-hole and the metal plated in the second through-hole can be changed from a state of being connected to a state of being physically and electrically separated, thereby forming a first metal structure and a second metal structure.
[0065] It should be noted that, in some embodiments of the present invention, metal patterns, such as interconnecting lines, may also be provided on the upper and lower surfaces of the support plate 1. These metal patterns can be formed together with the first metal structure and the second metal structure. In order to better highlight the manufacturing process of the interconnecting mechanism, the aforementioned metal patterns are not... Figure 13 As shown in the image.
[0066] Optionally, in embodiments of the present invention, the first metal structure may be tubular, and the second metal structure may be located within the first metal structure. The shape of the second metal structure may be various. For example, in one example, the second metal structure may be columnar, filling the second perforation.
[0067] Optionally, in one embodiment of the present invention, the second metal structure may also be tubular. For this purpose, after electroplating metal on the hole wall of the second perforation and the upper and lower surfaces of the support plate to form the second electroplated structure, and before etching the electroplated composite structure, the substrate manufacturing method provided in the embodiment of the present invention may further include: filling the second perforation after electroplating with a second dielectric material to obtain a second dielectric structure, wherein the second dielectric structure is embedded in the electroplated composite structure; based on this, etching the electroplated composite structure may specifically include: etching the electroplated composite structure in which the second dielectric structure is embedded.
[0068] In this embodiment, the interconnecting mechanism is fabricated in the support plate. However, the embodiments of the present invention are not limited to this. In other embodiments of the present invention, the interconnecting mechanism can be prefabricated and then assembled into the support plate. For example, in one embodiment of the present invention, forming the interconnecting mechanism in the support plate may include: forming a third through hole in the support plate; and fixing the prefabricated interconnecting mechanism into the third through hole.
[0069] Furthermore, after forming the interconnect mechanism in the support plate, the substrate manufacturing method provided by the embodiments of the present invention may further include: forming a first interconnect layer on one side of the support plate in which the interconnect mechanism is formed, and forming a second interconnect layer on the other side of the support plate in which the interconnect mechanism is formed, wherein the first interconnect layer and the second interconnect layer are coupled through the interconnect mechanism.
[0070] The first interconnect layer includes a first signal layer and a first reference layer; the second interconnect layer includes a second signal layer and a second reference layer; the signal transmission structure is used to couple the first signal layer and the second signal layer; the reference structure is used to couple the first reference layer and the second reference layer.
[0071] In one embodiment, the first interconnect layer includes a plurality of alternately stacked first metal layers and a plurality of first dielectric layers, the first dielectric layer including a first conductive via for coupling different first metal layers; the plurality of first metal layers including at least one first signal layer and at least one first reference layer; the second interconnect layer includes a plurality of alternately stacked second metal layers and a plurality of second dielectric layers, the second dielectric layer including a second conductive via for coupling different second metal layers; the plurality of second metal layers including at least one second signal layer and at least one second reference layer.
[0072] In embodiments of the present invention, the signal transmission structure can couple the first signal layer and the second signal layer on both sides of the support plate, and the reference structure can couple the first reference layer and the second reference layer on both sides of the support plate. Here, the first reference layer and the second reference layer can belong to the same network. For example, the first reference layer and the second reference layer can both be ground layers, or the first reference layer and the second reference layer can both be power layers.
[0073] In this way, when a signal is transmitted in a signal layer (including the first signal layer or the second signal layer), there is always a reference layer (including the first reference layer or the second reference layer) accompanying the signal layer to provide a return path. When the signal passes through the support plate via the signal transmission structure in the interconnect mechanism, the reference structure in the interconnect mechanism can continue to provide a return path and connect the reference layers on both sides of the support plate, thereby ensuring that the return path of the signal is not interrupted when passing through the support plate, which is convenient for maintaining the consistency of characteristic impedance in the signal path.
[0074] Optionally, in embodiments of the present invention, since the signal transmission structure can be one of the first metal structure 21 and the second metal structure 22, and the reference structure can be the other of the first metal structure 21 and the second metal structure 22, the connected signal layer or reference layer will be different when the first metal structure 21 plays the different roles of signal transmission structure or reference structure. Similarly, the connected signal layer or reference layer will be different when the second metal structure 21 plays the different roles of signal transmission structure or reference structure.
[0075] Specifically, such as Figure 7 As shown, in one example, the signal transmission structure is a first metal structure 21 and the reference structure is a second metal structure 22. The first metal structure 21 can be coupled to the first signal layer 410 and the second signal layer 420 respectively, and the second metal structure 22 can be coupled to the first reference layer 411 and the second reference layer 421 respectively.
[0076] like Figure 8 As shown, in another example, the signal transmission structure is a second metal structure 21 and the reference structure is a first metal structure 22. The first metal structure 21 can be coupled to the first reference layer 411 and the second reference layer 421 respectively, and the second metal structure 22 can be coupled to the first signal layer 410 and the second signal layer 420 respectively.
[0077] In one embodiment of the present invention, regardless of whether the signal transmission structure is a first metal structure 21 or a second metal structure 22, in each first metal layer 41, the first metal layer 413 coupled to the first metal structure 21 is closer to the support plate 1 than the first metal layer 414 coupled to the second metal structure 22.
[0078] Based on this, in one embodiment of the present invention, before forming the interconnect mechanism in the support plate, the substrate manufacturing method provided by the embodiment of the present invention may further include: Based on the expected characteristic impedance of the first signal layer, the spacing between the first metal structure and the second metal structure in the interconnect mechanism and the dielectric constant of the first dielectric structure are determined so that the characteristic impedance of the signal transmission structure matches the expected characteristic impedance of the first signal layer.
[0079] The smaller the distance between the first and second metal structures, the smaller the characteristic impedance of the signal transmission structure under the same conditions; conversely, the larger the distance between the first and second metal structures, the larger the characteristic impedance of the signal transmission structure under the same conditions. The dielectric constant of the first dielectric structure is related to the specific dielectric material; by selecting different dielectric materials, the characteristic impedance of the signal transmission structure can also be changed.
[0080] In embodiments of the present invention, the method for forming the first interconnect layer is largely the same as the method for forming the second interconnect layer. A support plate can be used as the core, with alternating stacking and patterning of metal layers and dielectric layers on both sides of the support plate. For example, in one embodiment of the present invention, the metal layers and dielectric layers can be formed symmetrically on both sides of the support plate in order of proximity to the support plate. For instance, the first dielectric layer closest to the support plate in the first interconnect layer and the second dielectric layer closest to the support plate in the second interconnect layer can be formed first. Then, a first metal layer is formed on the already formed first dielectric layer, and a second metal layer is formed on the already formed second dielectric layer, and so on.
[0081] For example, in one embodiment of the present invention, the formation process of the first interconnect layer and the second interconnect layer can be as follows: Figure 14 The corresponding process flow diagram can be as follows: Figure 15 As shown. Combined with Figures 14-15 In one embodiment, forming a first interconnect layer on one side of the support plate where the interconnect mechanism is formed, and forming a second interconnect layer on the other side of the support plate where the interconnect mechanism is formed, may include: S731. A support plate is provided, wherein an interconnection mechanism is formed in the support plate; S732. A first initial dielectric layer is provided on one side of the support plate on which the interconnection mechanism is formed, and a second initial dielectric layer is provided on the other side. Optionally, the first initial dielectric layer and the second initial dielectric layer can be set simultaneously or sequentially.
[0082] S733. A first initial perforation is provided on the first initial dielectric layer, and a second initial perforation is provided on the second initial dielectric layer; Optionally, the first initial perforation and the second initial perforation can be set simultaneously or sequentially.
[0083] S734. Electroplating metal in the first initial perforation and on the first initial dielectric layer to form a third electroplating structure, and electroplating metal in the second initial perforation and on the second initial dielectric layer to form a fourth electroplating structure. Optionally, the third and fourth electroplating structures can be set simultaneously or sequentially.
[0084] S735. Etch the third electroplated structure to form a first conductive via and a first metal layer. Etch the fourth electroplated structure to form a second conductive via and a second metal layer.
[0085] Optionally, the third and fourth electroplated structures can be etched simultaneously or sequentially.
[0086] Furthermore, dielectric layers and metal layers can be stacked on the first metal layer to form multiple alternating stacked first metal layers and multiple first dielectric layers, and dielectric layers and metal layers can be stacked on the second metal layer to form multiple alternating stacked second metal layers and multiple second dielectric layers. Further details are omitted here.
[0087] It should be noted that, in some embodiments of the present invention, the first metal layer and the second metal layer may include various metal patterns, such as interconnects. To better highlight the connection between the interconnect mechanism and the first and second metal layers, other metal patterns are not included. Figure 14 As shown in the image.
[0088] like Figure 9 As shown, in one embodiment of the present invention, a plurality of first dielectric layers 51 may include at least one first connecting dielectric layer 510. Each first connecting dielectric layer 510 has a first conductive via 61, including a first connecting via 610. The first connecting vias 610 in each first connecting dielectric layer 510 are electrically connected to each other and are all aligned with the second metal structure 22, forming a first via tunnel 601. The second metal structure 22 is coupled to a first metal layer 41 through the first via tunnel 601. In one embodiment, the number of first connecting vias 610 in each first connecting dielectric layer 510 may be one or more, and the number of first connecting vias 610 in each first connecting dielectric layer 510 may be equal or unequal. For example, in one example, the number of first connecting vias 610 in first connecting dielectric layer 510A is 3, and the number of first connecting vias 610 in first connecting dielectric layer 510B may be 1, 2, or 3, etc.
[0089] Similarly, the plurality of second dielectric layers 52 may include at least one second connecting dielectric layer 520. Each second connecting dielectric layer 520 includes a second connecting via 62, which are electrically connected to each other and aligned with the second metal structure 22 to form a second via tunnel 602. The second metal structure 22 is coupled to a second metal layer 42 through the second via tunnel 602. In one embodiment, the number of second connecting vias 620 in each second connecting dielectric layer 520 may be one or more, and the number of second connecting vias 620 in each second connecting dielectric layer 520 may be equal or unequal.
[0090] It should be noted that, in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.
[0091] The various embodiments in this specification are described in a related manner. The same or similar parts between the various embodiments can be referred to each other. Each embodiment focuses on describing the differences from other embodiments.
[0092] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in the present invention should be included within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.
Claims
1. A substrate, characterized in that, include: Support plate; Interconnection mechanism, embedded and extending through the support plate; The interconnection mechanism includes a first metal structure, a second metal structure, and a first dielectric structure; The first metal structure is tubular, the second metal structure is disposed in the first metal structure, and the first dielectric structure is filled between the first metal structure and the second metal structure. One of the first metal structure and the second metal structure serves as a signal transmission structure for transmitting signals passing through the support plate, and the other of the first metal structure and the second metal structure serves as a reference structure for providing a return path for signals passing through the support plate.
2. The substrate according to claim 1, characterized in that, Also includes: A first interconnect layer and a second interconnect layer are respectively disposed on both sides of the support plate, and the first interconnect layer and the second interconnect layer are coupled through the interconnection mechanism; The first interconnect layer includes a first signal layer and a first reference layer; The second interconnect layer includes a second signal layer and a second reference layer; The signal transmission structure is used to couple the first signal layer and the second signal layer; The reference structure is used to couple the first reference layer and the second reference layer.
3. The substrate according to claim 2, characterized in that, The first interconnect layer includes a plurality of alternately stacked first metal layers and a plurality of first dielectric layers, the first dielectric layer including a first conductive via for coupling different first metal layers; the plurality of first metal layers include at least one first signal layer and at least one first reference layer; The second interconnect layer includes a plurality of alternately stacked second metal layers and a plurality of second dielectric layers, the second dielectric layer including a second conductive via for coupling different second metal layers; the plurality of second metal layers include at least one second signal layer and at least one second reference layer.
4. The substrate according to claim 3, characterized in that, Both the first reference layer and the second reference layer are ground layers, or both the first reference layer and the second reference layer are power layers.
5. The substrate according to claim 3, characterized in that, The spacing between the first metal structure and the second metal structure, as well as the dielectric constant of the first dielectric structure, ensure that the characteristic impedance of the signal transmission structure matches the characteristic impedance of the first signal layer.
6. The substrate according to claim 3, characterized in that, The plurality of first dielectric layers include at least one first connecting dielectric layer, and the first conductive via in each first connecting dielectric layer includes a first connecting via. The first connecting vias in each first connecting dielectric layer are electrically connected to each other and are all aligned with the second metal structure to form a first via tunnel. The second metal structure is coupled to one of the first metal layers through the first via tunnel. And / or, The plurality of second dielectric layers include at least one second connecting dielectric layer, and the second conductive via in each second connecting dielectric layer includes a second connecting via. The second connecting vias in each second connecting dielectric layer are electrically connected to each other and are all aligned with the second metal structure to form a second via tunnel. The second metal structure is coupled to one of the second metal layers through the second via tunnel.
7. The substrate according to claim 6, characterized in that, The number of first connecting vias in each of the first connecting medium layers is one or more, and the number of first connecting vias in each of the first connecting medium layers may be equal or unequal; And / or, The number of second connecting vias in each of the second connecting medium layers may be one or more, and the number of second connecting vias in each of the second connecting medium layers may be equal or unequal.
8. The substrate according to claim 3, characterized in that, In each of the first metal layers, the first metal layer coupled to the first metal structure is closer to the support plate than the first metal layer coupled to the second metal structure; In each of the second metal layers, the second metal layer coupled to the first metal structure is closer to the support plate than the second metal layer coupled to the second metal structure.
9. The substrate according to claim 1, characterized in that, The second metal structure is columnar.
10. The substrate according to claim 1, characterized in that, The second metal structure is tubular, and the second metal structure is filled with a second dielectric structure.
11. A chip, characterized in that, include: A packaging substrate, wherein the packaging substrate is the substrate according to any one of claims 1-9; The die is disposed on the packaging substrate and coupled to the packaging substrate.
12. A method for manufacturing a substrate, characterized in that, include: Provide support plates; An interconnection mechanism is formed in the support plate, the interconnection mechanism being embedded in and penetrating the support plate, and includes a first metal structure, a second metal structure, and a first dielectric structure; the first metal structure is tubular, the second metal structure is disposed within the first metal structure, and the first dielectric structure fills the space between the first metal structure and the second metal structure; wherein, one of the first metal structure and the second metal structure serves as a signal transmission structure for transmitting signals passing through the support plate, and the other of the first metal structure and the second metal structure serves as a reference structure for providing a return path for signals passing through the support plate.
13. The substrate manufacturing method according to claim 12, characterized in that, The interconnection mechanism formed in the support plate includes: A first perforation is formed in the support plate; Metal is electroplated on the hole wall of the first perforation and on the upper and lower surfaces of the support plate to form a first electroplated structure; The first perforation after electroplating is filled with a first dielectric material to form a first dielectric structure; A second perforation is provided in the first medium structure; Metal is electroplated on the hole wall of the second perforation and on the upper and lower surfaces of the support plate to form a second electroplating structure. The second electroplating structure is combined with the first electroplating structure to form an electroplating composite structure. The electroplated composite structure is etched to obtain the first metal structure and the second metal structure, wherein the first metal structure and the second metal structure are spaced apart from each other, and the first dielectric structure is filled between them.
14. The substrate manufacturing method according to claim 13, characterized in that, After electroplating metal onto the hole wall of the second perforation and the upper and lower surfaces of the support plate to form a second electroplated structure, and before etching the electroplated composite structure, the method further includes: A second dielectric material is filled into the second perforation after electroplating to obtain a second dielectric structure, and the second dielectric structure is embedded in the electroplated composite structure; The etching of the electroplated composite structure includes: The electroplated composite structure in which the second dielectric structure is embedded is etched.
15. The substrate manufacturing method according to claim 12, characterized in that, After the interconnection mechanism is formed in the support plate, the method further includes: A first interconnect layer is formed on one side of the support plate on which the interconnect mechanism is formed, and a second interconnect layer is formed on the other side of the support plate on which the interconnect mechanism is formed, wherein the first interconnect layer and the second interconnect layer are coupled through the interconnect mechanism; The first interconnect layer includes a first signal layer and a first reference layer; the second interconnect layer includes a second signal layer and a second reference layer; the signal transmission structure is used to couple the first signal layer and the second signal layer; the reference structure is used to couple the first reference layer and the second reference layer.
16. The substrate manufacturing method according to claim 15, characterized in that, The first interconnect layer includes a plurality of alternately stacked first metal layers and a plurality of first dielectric layers, the first dielectric layer including a first conductive via for coupling different first metal layers; the plurality of first metal layers include at least one first signal layer and at least one first reference layer; The second interconnect layer includes a plurality of alternately stacked second metal layers and a plurality of second dielectric layers, the second dielectric layer including a second conductive via for coupling different second metal layers; the plurality of second metal layers include at least one second signal layer and at least one second reference layer.
17. The substrate manufacturing method according to claim 16, characterized in that, Before forming the interconnection mechanism in the support plate, the method further includes: Based on the expected characteristic impedance of the first signal layer, the spacing between the first metal structure and the second metal structure in the interconnect mechanism and the dielectric constant of the first dielectric structure are determined so that the characteristic impedance of the signal transmission structure matches the expected characteristic impedance of the first signal layer.
18. The substrate manufacturing method according to claim 16, characterized in that, The plurality of first dielectric layers include at least one first connecting dielectric layer, and the first conductive via in each first connecting dielectric layer includes a first connecting via. The first connecting vias in each first connecting dielectric layer are electrically connected to each other and are all aligned with the second metal structure to form a first via tunnel. The second metal structure is coupled to one of the first metal layers through the first via tunnel. And / or, The plurality of second dielectric layers include at least one second connecting dielectric layer, and the second conductive via in each second connecting dielectric layer includes a second connecting via. The second connecting vias in each second connecting dielectric layer are electrically connected to each other and are all aligned with the second metal structure to form a second via tunnel. The second metal structure is coupled to one of the second metal layers through the second via tunnel.
19. The substrate manufacturing method according to claim 18, characterized in that, The number of first connecting vias in each of the first connecting medium layers is one or more, and the number of first connecting vias in each of the first connecting medium layers may be equal or unequal; And / or, The number of second connecting vias in each of the second connecting medium layers may be one or more, and the number of second connecting vias in each of the second connecting medium layers may be equal or unequal.
20. The substrate manufacturing method according to claim 16, characterized in that, Forming a first interconnect layer on one side of the support plate where the interconnect mechanism is formed, and forming a second interconnect layer on the other side of the support plate where the interconnect mechanism is formed, includes: A first initial dielectric layer is provided on one side of the support plate on which the interconnection mechanism is formed, and a second initial dielectric layer is provided on the other side; A first initial perforation is formed on the first initial dielectric layer, and a second initial perforation is formed on the second initial dielectric layer; Metal is electroplated in the first initial perforation and on the first initial dielectric layer to form a third electroplated structure; metal is electroplated in the second initial perforation and on the second initial dielectric layer to form a fourth electroplated structure. The third electroplated structure is etched to form the first conductive via and the first metal layer, and the fourth electroplated structure is etched to form the second conductive via and the second metal layer.
21. The substrate manufacturing method according to claim 16, characterized in that, In each of the first metal layers, the first metal layer coupled to the first metal structure is closer to the support plate than the first metal layer coupled to the second metal structure.
22. The substrate manufacturing method according to claim 12, characterized in that, The interconnection mechanism formed in the support plate includes: A third perforation is formed on the support plate; The pre-fabricated interconnect mechanism is fixed into the third perforation.