Negative voltage regulation circuit of switching converter and switching converter

Abstract

The invention discloses a negative voltage regulation circuit of a switching converter and the switching converter, when the switching converter enters an intermittent working mode, a detection circuit detects whether the voltage of a switching node is reduced to a first threshold value, and when the voltage of the switching node is reduced to the first threshold value, the negative voltage regulation circuit is switched on; if yes, the voltage of the switching node is maintained at an expected value by adjusting the switching state of the main power switching tube through the adjusting circuit. According to the control scheme, the value of the voltage of the switch node can be controlled in the voltage oscillation process of the switch node, the parasitic effect can be avoided, and the reliability of a chip is ensured.

Description

Technical Field

[0001] This invention relates to the field of switching converter technology, and more specifically, to a negative voltage regulation circuit for a switching converter and a switching converter. Background Technology

[0002] Switching converters, such as Buck and Boost converters, consist of a power stage circuit and a control chip. The control chip controls the state of the switching transistors in the power stage circuit to convert input power into output power to supply the load. When the load on the switching converter is light or unloaded, the control chip operates in discontinuous cycle mode (DCM mode). In DCM mode, all power switches in the power stage circuit are turned off. After the inductor current finishes its freewheeling phase, the voltage at the switching node where the main power switch connects to the inductor enters a resonant state. This causes the drain voltage of the main power switch to oscillate to a negative voltage. During the device manufacturing process of the switching converter, this oscillating negative voltage at the drain of the power switch may cause the PN junction between the device substrate and the drain to conduct, thus forming a parasitic NPN structure with other N-wells around the layout. This affects the normal operation of the chip and, in severe cases, can directly damage the chip.

[0003] Therefore, it is necessary to provide improved technical solutions to overcome the above-mentioned technical problems existing in the prior art. Summary of the Invention

[0004] In view of this, the purpose of the present invention is to provide a negative voltage regulation circuit and a switching converter to solve the technical problem of large chip area and high cost caused by voltage oscillation at the drain of the power switch tube during operation of the existing switching converter.

[0005] According to this application, a negative voltage regulation circuit for a switching converter includes a power stage circuit. The switching converter converts input power into output power by controlling the switching state of a power switch in the power stage circuit. The negative voltage regulation circuit includes a detection circuit and a regulation circuit. The detection circuit detects whether the voltage of a switching node drops to a first threshold. The connection point between the main power switch and the inductor in the power stage circuit is the switching node. When the voltage of the switching node drops to the first threshold, the regulation circuit regulates the voltage of the switching node by controlling the switching state of the main power switch, such that the voltage of the switching node is greater than or equal to a first reference voltage value. The first threshold is a voltage value of zero voltage or close to zero voltage, and the first reference voltage value is set to any value between zero and -200mV.

[0006] Preferably, when the voltage of the switching node drops to a first threshold, the main power switch is controlled to be turned on for a preset time period.

[0007] Preferably, the adjustment circuit receives the voltage of the switching node and the first reference voltage, and adjusts the conduction state of the power switch transistor according to the calculation result of the voltage of the switching node and the first reference voltage: when the voltage of the switching node is less than the first reference voltage, the main power switch transistor is in a fully conducting state; when the voltage of the switching node is greater than the first reference voltage, the main power switch transistor is in a half-conducting state.

[0008] Preferably, the adjustment circuit includes an operational amplifier and a first switching transistor. The input terminal of the operational amplifier receives the voltage of the switching node and the first reference voltage. The control terminal of the first switching transistor is connected to the output terminal of the operational amplifier, the first power terminal is connected to the control terminal of the main power switching transistor, and the second power terminal is connected to the reference ground.

[0009] Preferably, the detection circuit includes a first comparator, which receives the voltage of the switching node and a zero reference voltage. When the voltage of the switching node drops to a first threshold, the first comparator outputs a high-level first comparison signal, which is output as the detection result.

[0010] Preferably, the detection circuit detects the rate of change of the voltage of the switching node. When the rate of change of the voltage of the switching node reaches a preset value, it indicates that the voltage of the switching node has dropped to a first threshold, and a detection signal is output.

[0011] Preferably, the negative voltage regulation circuit includes a second comparator and a logic circuit. The second comparator receives the voltage of the switching node and a second reference voltage. When the voltage of the switching node rises to the second reference voltage, the second comparator outputs a high-level second comparison signal. The value of the second reference voltage is set to any value between a first reference voltage and a first threshold. The logic circuit receives the first comparison signal and the second comparison signal and generates an enable signal accordingly. The enable signal enables and controls the operating state of the regulation circuit.

[0012] Preferably, the negative pressure regulating circuit includes a timing circuit. The timing circuit receives the first comparison signal, starts timing when it is in a high-level state, stops timing after a preset time is reached, and generates an enable signal accordingly. The enable signal enables and controls the working state of the regulating circuit.

[0013] Preferably, the adjustment circuit performs adjustment when the enable signal is in a high-level active state.

[0014] Preferably, the adjustment signal and the control terminal of the power switch are connected to a control switch. When the enable signal is in a high-level active state, the control switch is turned on, and the adjustment circuit adjusts the voltage at the control terminal of the main power switch.

[0015] Secondly, according to the present application, a switching converter includes a power stage circuit. The switching converter converts input power into output power by controlling the switching state of a power switch transistor in the power stage circuit. The converter is characterized by including a switch driving circuit and the aforementioned negative voltage regulation circuit. The switch driving circuit generates a switch driving signal based on the output feedback signal of the switching converter to drive the switching action of the main power switch transistor in the power stage circuit. The negative voltage regulation circuit detects whether the voltage of the switching node drops to a first threshold. When the voltage of the switching node drops to the first threshold, the negative voltage regulation circuit enables control of the switching state of the main power switch transistor based on an enable signal.

[0016] Preferably, the negative pressure regulating circuit generates a pulse signal with a preset pulse width and transmits it to the switch driving circuit to control the main power switch to be turned on for a preset time period.

[0017] Preferably, during the high-level active period of the enable signal, the negative voltage regulation circuit controls the main power switch to regulate the voltage of the switching node, and when the enable signal jumps to a low-level inactive state, the switch driver circuit controls the main power switch.

[0018] Preferably, when the voltage of the switching node drops to a first threshold, the enable signal jumps to a high-level active state, and after a preset time, jumps to a low-level inactive state.

[0019] Preferably, when the voltage of the switching node drops to a first threshold, the enable signal jumps to a high-level active state, and when the voltage of the switching node rises to a second reference signal voltage, the enable signal jumps to a low-level inactive state, wherein the value of the second reference voltage is set to any value between the first reference voltage and the first threshold.

[0020] The negative voltage regulation scheme of the switching converter of this invention, when the switching converter enters the intermittent operating mode, detects whether the voltage of the switching node has dropped to a first threshold through a detection circuit. When the voltage of the switching node crosses zero, the switching state of the main power switch is adjusted by the regulation circuit to maintain the voltage of the switching node at the desired value. Through the control scheme of this application, the switching node voltage can be controlled by negative voltage regulation during node voltage oscillation, avoiding parasitic effects. This scheme ensures that the reliability of the chip and the operating efficiency of the switching converter are not affected. Attached Figure Description

[0021] Figure 1 This is a first circuit block diagram of a switch converter according to the present invention;

[0022] Figure 2 This is a second circuit block diagram of a switch converter according to the present invention;

[0023] Figure 3 This is a first circuit block diagram of the negative pressure regulating circuit according to the present invention;

[0024] Figure 4 This is a second circuit block diagram of the negative pressure regulating circuit according to the present invention;

[0025] Figure 5 This is a comparison diagram of the working waveforms according to the present invention. Detailed Implementation

[0026] The preferred embodiments of the present invention are described in detail below with reference to the accompanying drawings, but the present invention is not limited to these embodiments. The present invention covers any substitutions, modifications, equivalent methods, and solutions made within the spirit and scope of the present invention.

[0027] To provide the public with a thorough understanding of the present invention, specific details are described in detail in the following preferred embodiments of the invention, but those skilled in the art can fully understand the invention without these details.

[0028] The invention is described in more detail below by way of example with reference to the accompanying drawings. It should be noted that the drawings are in a simplified form and use non-precise proportions, and are only used to facilitate and clarify the illustration of the embodiments of the invention.

[0029] refer to Figure 1 A first circuit block diagram of a switch converter according to the present invention, and Figure 2 This is a second circuit block diagram of a switching converter according to the present invention. The switching converter in this embodiment is described using a buck converter as an example. The switching converter includes a power stage circuit, and the switching converter converts input power into output power by controlling the switching state of the power switching transistors in the power stage circuit. The switching converter can also be other DC-DC switching converters. The switching converter includes a switch drive circuit and a negative voltage regulation circuit. The switch drive circuit generates a switch drive signal GATE based on the output feedback signal VFB of the switching converter to drive the switching action of the main power switching transistor NMOS1 in the power stage circuit. The switch drive circuit can be a drive circuit structure found in the prior art.

[0030] refer to Figure 1 and Figure 2The negative voltage regulation circuit includes a detection circuit and a regulation circuit. The detection circuit detects whether the voltage at the switching node has dropped to a first threshold. The connection point between the main power switch and the inductor in the power stage circuit is the switching node. Figure 2 At point A, when the detection circuit detects that the voltage of the switching node has dropped to a first threshold, the adjustment circuit controls the switching state of the main power switch NMOS1. The adjustment circuit generates an adjustment signal V2, and its output is connected to the control terminal of the main power switch. In this embodiment, when the voltage of the switching node drops to the first threshold, the main power switch is controlled to conduct for a preset time period. After the main power switch is turned on, the voltage of the switching node gradually rises. Then, the adjustment circuit adjusts the voltage of the switching node by detecting its voltage status, so that the voltage of the switching node... The voltage is greater than or equal to a first reference voltage value, where the first threshold is a voltage value of zero or near zero, such as a voltage value between -10mV and 10mV. The first reference voltage value is set to any value between zero and -200mV. Preferably, the first reference voltage value can be further narrowed, such as setting it to any value between zero and -120mV, such as -100mV. Here, the preset time period can be any value between 10ns and 50ns, as long as it is a reasonable time value. The main purpose is to turn on the main power switching transistor, which can quickly increase the voltage of the switching node. In this way, the efficiency of the switching power supply can be maintained, and the parasitic effects on the layout caused by negative voltage can be avoided. Preferably, the reference... Figure 2 The negative pressure regulation circuit includes a pulse circuit, which obtains a pulse signal of a preset width to control the main power switch to be turned on for a preset time period. The pulse circuit receives the detection result of the detection circuit. When the detection result indicates that the voltage of the switch node drops to a first threshold, the pulse circuit generates a pulse signal V1 and transmits it to the switch drive circuit to control the main power switch to be turned on.

[0031] refer to Figure 3The present invention provides a first circuit block diagram of a negative voltage regulation circuit according to the present invention. The detection circuit includes a first comparator CMP1, which receives the voltage VA of the switching node and a zero reference voltage Vref_0. When the voltage of the switching node drops to a first threshold, the first comparator outputs a high-level first comparison signal Vcom1, which is output as the detection result. The regulation circuit includes an operational amplifier OPA1 and a first switching transistor NMOS2. The input terminal of the operational amplifier receives the voltage VA of the switching node and the first reference voltage Vref1. The control terminal of the first switching transistor is connected to the output terminal of the operational amplifier, the first power terminal is connected to the control terminal of the main power switching transistor, and the second power terminal is connected to reference ground. Here, when the voltage of the switching node is less than the first reference voltage Vref1, the first switching transistor NMOS2 is turned off, and the main power switching transistor is in a fully conducting state. When the voltage of the switching node is greater than the first reference voltage, the first switching transistor NMOS2 is turned off, and the main power switching transistor is in a half-conducting state. With the above-mentioned adjustment circuit, the voltage of the switching node will not be lower than the first reference voltage Vref1. According to the scheme of this application, the first reference voltage Vref1 is set to a small negative voltage, such as -100mV, which is much smaller than the normal conduction voltage of the PN junction. This can avoid the generation of parasitic effects and avoid the use of expensive deep trench isolation technology.

[0032] Preferably, the detection of the zero-crossing point of the switching node voltage can also be achieved through other methods, such as the detection circuit detecting the rate of change of the switching node voltage. When the rate of change of the switching node voltage reaches a preset value, it indicates that the voltage of the switching node has dropped to a first threshold, and a detection signal is generated and output. The detection signal is the detection result output by the detection circuit.

[0033] Continue to refer to Figure 3The negative voltage regulation circuit described in this application further includes a second comparator CMP2 and a logic circuit. The second comparator receives the voltage of the switching node and a second reference voltage Vref2. When the voltage of the switching node rises to the second reference voltage Vref2, the second comparator outputs a high-level second comparison signal Vcom2. The value of the second reference voltage is set to any value between a first reference voltage and a first threshold voltage, that is, the absolute value of the second reference voltage is greater than the absolute value of the first reference voltage. Then, the logic circuit receives the first comparison signal Vcom1 and the second comparison signal Vcom2, and generates an enable signal EN accordingly. The enable signal enables and controls the operating state of the regulation circuit. Here, the logic circuit can be an RS flip-flop, whose set terminal receives the first comparison signal, its reset terminal receives the second comparison signal, and its output terminal outputs the enable signal. Specifically, in this embodiment, when the enable signal is in a high-level active state, the regulation circuit performs regulation.

[0034] Figure 5 Based on the waveform comparison diagram of the present invention, combined with Figure 2 and Figure 3 When the switching converter enters discontinuous operation mode, the current of inductor IL1 decreases, and the voltage at node SW also decreases. When the first detection circuit detects that it is below the first threshold, such as at time t1, it triggers the pulse circuit to generate a small pulse signal. The main power switch turns on, the current of inductor IL1 increases, and the voltage at node SW also increases. At this time, the enable signal EN also jumps to a high level, and the regulation circuit begins to operate. When the pulse time is reached, such as at time t2, the voltage at node SW gradually recovers to above the first reference voltage, the pull-down transistor NMOS2 turns on, and the turn-on voltage of the main power switch NMOS1 gradually decreases, ensuring that the node voltage does not fall below the first reference voltage. At time t3, the voltage at node SW reaches the second reference voltage, and the enable signal jumps to a low level. At this time, the regulation circuit stops regulating, and the system switches to the switch drive circuit loop for control. This method effectively controls the voltage at the switching node, ensuring it does not fall below the preset reference voltage.

[0035] refer to Figure 4 The present invention provides a second circuit block diagram of a negative pressure regulating circuit. The detection circuit and regulating circuit in this embodiment are similar to those in the previous embodiment. The difference is that the negative pressure regulating circuit includes a timing circuit. The timing circuit receives the first comparison signal Vcom1, starts timing when it is in a high-level state, stops timing after a preset time is reached, and generates an enable signal EN accordingly. The enable signal enables and controls the working state of the regulating circuit.

[0036] In this embodiment, the adjustment signal and the control terminal of the power switch are connected to a control switch S1. When the enable signal is in a high-level active state, the control switch is turned on, and the adjustment circuit adjusts the voltage at the control terminal of the main power switch. Those skilled in the art will understand that... Figure 3 The enable signal can be used in conjunction with the circuit structure in this embodiment. Figure 4 The enable signal in the circuit can also directly enable the operation of the regulating circuit.

[0037] This application discloses a switching converter, including a power stage circuit. The switching converter converts input power into output power by controlling the switching state of a power switch in the power stage circuit. It includes a switch driving circuit and the aforementioned negative voltage regulation circuit. The switch driving circuit generates a switch driving signal based on the output feedback signal of the switching converter to drive the switching action of the main power switch in the power stage circuit. The negative voltage regulation circuit detects whether the voltage of the switching node drops to a first threshold. When the voltage of the switching node drops to the first threshold, the negative voltage regulation circuit enables the control of the switching state of the main power switch based on an enable signal. The switching converter of this application can control the voltage of the switching node to not fall below a first reference voltage, thus the voltage of the switching node is controllable and much lower than the normal conduction voltage of the PN junction, avoiding parasitic effects, saving cost, and reducing area.

[0038] It should be noted that the specific implementations and corresponding illustrations provided are merely one way of describing the implementation method of the present invention, and are not intended to limit the specific structure of the implementation scheme of the present invention. Various changes or modifications can be made to these implementation schemes without departing from the principles and essence of the present invention, but all such changes and modifications fall within the protection scope of the present invention.

[0039] Although the embodiments are described and illustrated separately above, some common technologies are involved. Those skilled in the art can replace and integrate them between the embodiments. If there is any content not explicitly described in one embodiment, then another embodiment that is described can be referred to.

[0040] The embodiments described above do not constitute a limitation on the scope of protection of this technical solution. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the above embodiments should be included within the scope of protection of this technical solution.

Claims

1. A negative voltage regulation circuit of a switching converter, the switching converter including a power stage circuit, the switching converter converting an input power to an output power by controlling a switching state of a power switch in the power stage circuit, characterized by, The negative voltage regulation circuit comprises a detection circuit and a regulation circuit, The detection circuit detects whether the voltage of the switching node drops to a first threshold value, and the connection point of the main power switch tube and the inductor in the power stage circuit is the switching node, When the voltage of the switching node drops to the first threshold value, the regulation circuit adjusts the voltage of the switching node by controlling the switching state of the main power switch tube, so that the voltage of the switching node is greater than or equal to the first reference voltage value, Wherein, the first threshold value is zero voltage or voltage close to zero voltage, and the first reference voltage value is set to any value between zero and -200mv.

2. The negative voltage regulation circuit of claim 1, wherein, When the voltage of the switching node drops to the first threshold value, the main power switch tube is turned on for a preset time period.

3. The negative voltage regulation circuit of claim 2, wherein, The regulation circuit receives the voltage of the switching node and the first reference voltage, According to the operation result of the voltage of the switching node and the first reference voltage, the on-off state of the power switch tube is adjusted: When the voltage of the switching node is less than the first reference voltage, the main power switch tube is in full conduction state, When the voltage of the switching node is greater than the first reference voltage, the main power switch tube is in half conduction state.

4. The negative voltage regulation circuit of claim 3, wherein, The regulation circuit comprises an operational amplifier and a first switch tube, The input end of the operational amplifier receives the voltage of the switching node and the first reference voltage, The control end of the first switch tube is connected with the output end of the operational amplifier, the first power end is connected with the control end of the main power switch tube, and the second power end is connected with the reference ground.

5. The negative voltage regulation circuit of claim 2, wherein, The detection circuit comprises a first comparator, The first comparator receives the voltage of the switching node and the first threshold value, and when the voltage of the switching node drops to the first threshold value, the first comparator outputs a high level first comparison signal, which is output as a detection result.

6. The negative voltage regulation circuit of claim 2, wherein, The detection circuit detects the change rate of the voltage of the switching node, and when the change rate of the voltage of the switching node reaches a preset value, it is characterized that the voltage of the switching node drops to the first threshold value, and a detection signal is generated and output.

7. The negative voltage regulation circuit of claim 2, wherein, The negative voltage regulation circuit comprises a second comparator and a logic circuit, The second comparator receives the voltage of the switching node and a second reference voltage, and when the voltage of the switching node rises to the second reference voltage, the second comparator outputs a high level second comparison signal, and the value of the second reference voltage is set to any value between the first reference voltage and the first threshold value, The logic circuit receives the first comparison signal and the second comparison signal, and generates an enable signal according to the same, which enables the working state of the regulation circuit.

8. The negative voltage regulation circuit of claim 2, wherein, The negative voltage regulation circuit comprises a timing circuit, The timing circuit receives the first comparison signal, starts timing when it is in a high level state, stops timing after a preset time, and generates an enable signal according to the same, which enables the working state of the regulation circuit.

9. The negative voltage regulation circuit according to claim 7 or 8, characterized in that, When the enable signal is in a high level active state, the regulation circuit works.

10. The negative voltage regulation circuit of claim 7 or 8, wherein, The control signal and the control end of the power switch tube are connected with a control switch tube, When the enable signal is in the high active state, the control switch is turned on, and the regulating circuit regulates the voltage at the control terminal of the main power switch.

11. A switching converter comprising a power stage circuit, the switching converter converting an input power to an output power by controlling a switching state of a power switch in the power stage circuit, characterized in that, The negative voltage regulating circuit according to any one of claims 1-10, The switch driving circuit generates a switch driving signal according to the output feedback signal of the switch converter to drive the switch action of the main power switch in the power stage circuit. The negative voltage regulating circuit detects whether the voltage at the switch node drops to the first threshold value, and when the voltage at the switch node drops to the first threshold value, the negative voltage regulating circuit starts to enable the control of the switch state of the main power switch according to the enable signal.

12. The switching converter of claim 11, wherein, The negative voltage regulating circuit generates a pulse signal with a preset pulse width and transmits the pulse signal to the switch driving circuit to control the conduction of the main power switch for a preset time period.

13. The switching converter of claim 11, wherein, During the time period when the enable signal is in the high active state, the negative voltage regulating circuit controls the main power switch to regulate the voltage at the switch node, and when the enable signal jumps to the low inactive state, the switch driving circuit controls the main power switch.

14. The switching converter of claim 13, wherein, When the voltage at the switch node drops to the first threshold value, the enable signal jumps to the high active state, and after a preset time, jumps to the low inactive state.

15. The switching converter of claim 13, wherein, When the voltage at the switch node drops to the first threshold value, the enable signal jumps to the high active state, and when the voltage at the switch node rises to the second reference signal voltage, the enable signal jumps to the low inactive state, wherein the value of the second reference voltage is set to any value between the first reference voltage and the first threshold value.

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