A method, system, device and medium for testing an access control cabinet in place

Abstract

The application relates to the technical field of elevators, in particular to an on-site access control cabinet test method, system, equipment and medium. The application simulates the main control board layout through a jig board, establishes a connection with a card reader, an electric lock and a door magnetic interface of the access control cabinet by using a probe array, first carries out low-voltage conductivity test, impedance test and voltage reference calibration to obtain preliminary results; after the pre-check passes, the control cabinet is connected with an actual elevator main board to carry out function verification and system joint debugging to obtain second-stage test results; then the system analyzes the test data, identifies abnormal interface positions and fault types, and accurately broadcasts fault information and terminal identification through a voice system; the layered test mechanism avoids the risk of main board damage, the multi-channel concurrent test improves the efficiency, the voice guidance realizes rapid positioning, the safety hidden danger in the traditional test is effectively solved, and the accuracy and the standardization level of the test are improved.

Description

Technical Field

[0001] This application relates to the technical field of elevators, and in particular to a method, system, equipment and medium for testing local access control cabinets. Background Technology

[0002] With the rapid development of intelligent buildings and elevator systems, access control cabinets, as core equipment for elevator safety management, are playing an increasingly important role in modern buildings. Access control cabinets require complex electrical connections and communication with multiple devices such as the elevator main control system, card readers, and electric locks. The reliability of their functions directly affects elevator operational safety and user experience. Therefore, comprehensive and accurate testing and verification of access control cabinets is particularly important.

[0003] Currently, the automated testing equipment for access control cabinets on the market usually uses a fixed test voltage to directly connect to the motherboard for functional verification, or uses standardized test fixtures for single-point testing. These solutions mainly focus on the verification of a single function.

[0004] However, directly applying test voltage may damage the motherboard due to voltage mismatch, and single-point testing cannot achieve concurrent verification of multiple interfaces, reducing testing efficiency; at the same time, the lack of a verification mechanism for the correctness of interface positions and markings makes it easy to miss wiring errors, and this situation needs further improvement. Summary of the Invention

[0005] To address the problems of potential motherboard damage and low testing efficiency caused by voltage mismatch in existing access control cabinet testing, this application provides a local access control cabinet testing method, system, equipment, and medium, employing the following technical solution:

[0006] Firstly, this application provides a method for testing a local access control cabinet, comprising the following steps:

[0007] Electrical connections are established with each interface of the access control cabinet under test through a multi-channel probe array on a simulated fixture board. The interfaces include a card reader interface, an electric lock drive interface, and a door magnetic sensor interface. A preset low-voltage test signal is applied to each interface and electrical response data is collected. Line continuity test, impedance test, and port voltage reference calibration are performed to obtain the first stage test results.

[0008] Based on the test results of the first stage, the access control cabinet that passed the test will be connected to the actual elevator control motherboard to verify the access control function and conduct elevator system joint debugging test to obtain the test results of the second stage.

[0009] The test results of the second phase are analyzed and anomalies are detected to obtain the location of the abnormal interface and the type of fault.

[0010] When a fault is detected, voice feedback is triggered based on the location of the abnormal interface and the fault type, broadcasting the fault information and the corresponding terminal identifier.

[0011] By adopting the above technical solution, this application first simulates the interface layout of the main control board using a fixture board. An electrical connection is established between the probe array and the card reader interface, electric lock drive interface, and door magnetic sensor interface of the access control cabinet. A low-voltage test signal is applied to perform circuit continuity testing, impedance testing, and port voltage reference calibration to obtain the first-stage test results. Then, only if the pre-inspection is passed, the control cabinet is connected to the actual elevator control main board for access control function verification and system integration testing to obtain the second-stage test results. Next, the test results are analyzed to identify the location of abnormal interfaces and the type of fault. Finally, a voice feedback system accurately broadcasts fault information and corresponding terminal markings. The layered testing mechanism effectively avoids the risk of main board damage, the multi-channel concurrent testing significantly improves detection efficiency, and the voice guidance technology enables rapid fault location. This not only solves the safety hazards in traditional testing schemes but also greatly improves the accuracy and standardization of testing.

[0012] Optionally, a preset low-voltage test signal is applied to each interface and electrical response data is collected, specifically including the following steps:

[0013] Apply standard voltage and current test signals to the card reader interface to test the electrical connection integrity and load capacity of the interface;

[0014] Apply a rated power test signal to the electric lock drive interface to verify the output characteristics and current carrying capacity of the drive circuit.

[0015] Apply a simulated switch status signal to the door magnetic sensor interface to test the signal recognition and level conversion functions of the sensor interface;

[0016] The voltage, current and impedance response data of each interface are collected synchronously.

[0017] By adopting the above technical solution, this application verifies the integrity of its electrical connection and actual load capacity by applying standard voltage and current test signals to the card reader interface; it comprehensively tests the output characteristics and current carrying capacity of the drive circuit by applying test signals that meet the rated power requirements to the electric lock drive interface; it verifies the signal recognition accuracy and level conversion function of the sensor interface by applying signals simulating the switch state to the door magnetic sensor interface; and it simultaneously collects voltage, current and impedance response data of each interface using high-speed sampling technology. Through targeted test signal design, it achieves accurate verification of the electrical characteristics of various interfaces, avoids omissions and misjudgments that may be caused by uniform test signals, and significantly improves the comprehensiveness and accuracy of the test.

[0018] Optionally, the testing method further includes the following steps:

[0019] The electrical parameters of each interface in the current test are compared and analyzed with the benchmark data of the same model in history, and the parameter deviation value is calculated.

[0020] Based on the distribution trend of the parameter deviation values, determine whether the electrical characteristics of the current product are within the normal range and predict the direction of parameter drift;

[0021] Based on the predicted drift direction of the parameters, the amplitude and frequency range of the next round of test signals are automatically adjusted to obtain the adjusted test parameters;

[0022] When the interface electrical parameters are detected to be close to the predicted abnormal boundary, the test time is automatically extended and the data sampling accuracy is improved based on the adjusted test parameters.

[0023] By adopting the above technical solution, this application first compares the electrical parameters of each interface obtained from the current test with the benchmark data of the same model of product in history, and understands the changes in product characteristics by calculating the parameter deviation value; then, it analyzes the distribution trend of these deviation values ​​to determine whether the current product is within the normal range and predict the possible drift direction of the parameters; then, based on the predicted drift trend, the system automatically optimizes the amplitude and frequency range of the next round of test signals to generate more targeted test parameters; when the interface parameters are found to be close to the predicted abnormal boundary, the test system automatically extends the test time and improves the data sampling accuracy to ensure that minute parameter changes can be captured; by dynamically adjusting the test strategy, not only are potential quality hazards discovered in advance, but also the test resources are optimized, which greatly improves the accuracy and timeliness of anomaly detection.

[0024] Optionally, access control function verification and elevator system integration testing shall be performed, including the following steps:

[0025] Establish a communication connection between the access control cabinet and the elevator main control system, and verify the compatibility of the communication protocol;

[0026] Test the basic permission verification process and the transmission function of floor selection instructions;

[0027] Verify the establishment of basic interlocking between the access control cabinet and the elevator safety system.

[0028] By adopting the above technical solution, this application first establishes a communication link between the access control cabinet and the elevator main control system, and ensures the accuracy of data interaction between the two parties through protocol consistency testing; then, it simulates actual use scenarios to verify the complete access control process from card swiping to floor selection, ensuring that instructions can be accurately transmitted to the elevator system; finally, it focuses on testing the interlocking mechanism between the access control cabinet and the elevator safety system to verify the linkage response in emergency situations; thus, it achieves full-link functional verification of the access control and elevator systems, improving the collaborative operation effect and safety reliability of the system.

[0029] Optionally, the test results of the second phase are analyzed and anomaly detection is performed to obtain the location of the abnormal interface and the fault type, specifically including the following steps:

[0030] The timing of the access control verification is compared with the timing of the elevator response. When the timing deviation exceeds a preset threshold, it is identified as an access control verification failure.

[0031] Analyze the timing deviation and stability of the interlock response, and determine the safety interlock failure when the response delay or fluctuation exceeds the safe range;

[0032] Verify the consistency of elevator dispatch response under different floor permission settings, and identify floor permission control anomalies when a mismatch between permissions and dispatch occurs.

[0033] The identified fault types are associated with their corresponding interface locations to generate diagnostic results that include the location of the abnormal interface and the fault type.

[0034] By adopting the above technical solution, this application first compares the timing relationship between permission verification and elevator response. When a timing deviation exceeds the preset range, the system marks it as a permission verification failure. Second, it focuses on monitoring the timing characteristics of safety interlock signals. By analyzing response delay and signal stability, it identifies potential safety interlock failures. Then, the system tests elevator dispatch response under different floor permission configurations. When a discrepancy is found between the permission settings and the actual dispatch behavior, it determines that the floor permission control is abnormal. Finally, it establishes a mapping relationship between all identified fault information and specific interface locations to form a complete fault diagnosis report. This achieves tracing from fault symptoms to the root cause of the fault, improving the accuracy and efficiency of fault diagnosis.

[0035] Optionally, the testing method further includes the following steps:

[0036] Once a fault is identified, the system automatically switches to fault reproduction mode and repeats the corresponding test process to verify the consistency of the fault.

[0037] Record key parameter data during the fault reproduction process, including access control timing, interlock response time, and floor dispatch response data;

[0038] Statistical analysis was performed on the permission verification timing, interlock response time, and floor scheduling response data to calculate the fault recurrence frequency and parameter deviation stability.

[0039] The fault recurrence frequency and parameter deviation stability are correlated and compared with the abnormal features detected in the initial test to finally confirm the fault type and severity.

[0040] By adopting the above technical solution, this application firstly, after detecting an anomaly, the system automatically enters a fault reproduction mode, verifying the stability of the fault by repeatedly executing relevant test procedures; during each reproduction process, key parameter data such as permission verification timing, interlock response time, and floor scheduling response are recorded; then, in-depth statistical analysis is performed on these collected data, and the reliability of the fault is evaluated by calculating the frequency of fault occurrence and the stability of parameter deviations; finally, the fault characteristics obtained from the reproduction test are compared and analyzed with the initial detection results to comprehensively assess the type and severity of the fault; through multiple reproduction verifications and data analysis, misjudgments and omissions are reduced, providing more reliable fault diagnosis results.

[0041] Optionally, voice feedback is triggered based on the location of the abnormal interface and the fault type to broadcast fault information and the corresponding terminal identifier, specifically including the following steps:

[0042] The corresponding terminal number and physical location description are obtained by querying a preset terminal identifier mapping table based on the location of the abnormal interface.

[0043] Based on the fault type, extract the corresponding fault description and suggested handling method from the fault information database;

[0044] According to the preset voice broadcast format, the terminal identification, fault type and handling suggestions are combined into complete voice information content;

[0045] The voice information is broadcast through the voice synthesis module, and a visual marker indicating the location of the fault is simultaneously displayed on the screen.

[0046] By adopting the above technical solution, this application first automatically queries a pre-established terminal identification mapping table based on the detected abnormal interface location to obtain the precise terminal number and actual physical location information; then, it extracts the fault description and professional handling suggestions corresponding to the current fault type from the fault information database; next, it integrates the terminal identification, fault description, and handling suggestions into a complete voice prompt content according to an easy-to-understand voice broadcast format; finally, it broadcasts the fault information through voice synthesis technology, while simultaneously marking the fault location in a prominent manner on the display screen; through the coordinated prompts of voice and display, a three-dimensional transmission of fault information is achieved, which not only reduces the visual burden on maintenance personnel but also improves the efficiency of fault location and handling.

[0047] Secondly, this application provides a local access control cabinet testing system, comprising:

[0048] The first-stage test module is used to establish electrical connections with each interface of the access control cabinet under test through a multi-channel probe array on a simulated fixture board. The interfaces include a card reader interface, an electric lock drive interface, and a door magnetic sensor interface. A preset low-voltage test signal is applied to each interface and electrical response data is collected. Line continuity test, impedance test, and port voltage reference calibration are performed to obtain the first-stage test results.

[0049] The second-stage testing module is used to establish a connection between the access control cabinet that has passed the test and the actual elevator control motherboard based on the test results of the first stage, to verify the access control function and conduct joint debugging tests on the elevator system, and to obtain the test results of the second stage.

[0050] The fault analysis module is used to analyze the test results of the second stage and detect anomalies to obtain the location of the abnormal interface and the fault type.

[0051] The voice feedback module, when a fault is detected, triggers voice feedback based on the location of the abnormal interface and the fault type, broadcasting the fault information and the corresponding terminal identifier.

[0052] Thirdly, this application provides an electronic device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement the steps of the above-described local access control cabinet testing method.

[0053] Fourthly, this application provides a computer-readable storage medium having a computer program stored thereon, wherein the computer program, when executed by a processor, implements the steps of the above-described local access control cabinet testing method.

[0054] In summary, this application includes at least one of the following beneficial technical effects:

[0055] This application uses a fixture board to simulate the layout of the main control board and establishes connections with the card reader, electric lock, and door magnetic interface of the access control cabinet using a probe array. First, low-voltage continuity testing, impedance testing, and voltage reference calibration are performed to obtain preliminary results. After passing the pre-inspection, the control cabinet is connected to the actual elevator main board for functional verification and system integration testing, yielding the second-stage test results. Subsequently, the system analyzes the test data, identifies the location of abnormal interfaces and fault types, and accurately broadcasts fault information and terminal markings through a voice system. The layered testing mechanism avoids the risk of main board damage, multi-channel concurrent testing improves efficiency, and voice guidance enables rapid location, effectively solving the safety hazards in traditional testing and improving the accuracy and standardization of the tests.

[0056] This application compares the current tested interface electrical parameters with historical benchmark data of the same model to calculate parameter deviation values ​​to understand changes in product characteristics; by analyzing the distribution trend of deviation values, it determines the product status and predicts the direction of parameter drift; the system automatically optimizes the amplitude and frequency range of the next round of test signals based on the prediction results; when interface parameters approach the abnormal boundary, it automatically extends the test time and improves the sampling accuracy to ensure the capture of minute changes; by dynamically adjusting the test strategy, it can not only detect potential quality problems in advance, but also optimize the allocation of test resources, significantly improving the accuracy and timeliness of anomaly detection;

[0057] This application first automatically queries a pre-established terminal identification mapping table based on the detected abnormal interface location to obtain the precise terminal number and actual physical location information; then, it extracts the fault description and professional handling suggestions corresponding to the current fault type from the fault information database; next, it integrates the terminal identification, fault description, and handling suggestions into a complete voice prompt in an easy-to-understand voice broadcast format; finally, it broadcasts the fault information through voice synthesis technology, while simultaneously marking the fault location in a prominent manner on the display screen; through the coordinated prompts of voice and display, a three-dimensional transmission of fault information is achieved, which not only reduces the visual burden on maintenance personnel but also improves the efficiency of fault location and handling. Attached Figure Description

[0058] Figure 1 This is a flowchart illustrating a local access control cabinet testing method according to an embodiment of this application;

[0059] Figure 2 This is a flowchart illustrating step S110 in a local access control cabinet testing method according to an embodiment of this application.

[0060] Figure 3 This is a flowchart illustrating the adjustment of test signals in a local access control cabinet testing method according to an embodiment of this application.

[0061] Figure 4 This is a flowchart illustrating step S120 in a local access control cabinet testing method according to an embodiment of this application.

[0062] Figure 5 This is a flowchart illustrating step S130 of a local access control cabinet testing method according to an embodiment of this application.

[0063] Figure 6 This is a schematic diagram of the fault retest process in a local access control cabinet testing method according to an embodiment of this application;

[0064] Figure 7 This is a flowchart illustrating step S140 of a local access control cabinet testing method according to an embodiment of this application.

[0065] Figure 8 This is a schematic diagram of a local access control cabinet testing system according to an embodiment of this application;

[0066] Figure 9 This is an internal structural diagram of an electronic device according to an embodiment of this application. Detailed Implementation

[0067] The terminology used in the following embodiments of this application is for the purpose of describing particular embodiments only and is not intended to be limiting of this application. As used in the specification and appended claims of this application, the singular expressions “a,” “an,” “the,” “the,” “the,” and “this” are intended to include the plural expressions as well, unless the context clearly indicates otherwise. It should also be understood that the term “and / or” as used in this application refers to any or all possible combinations including one or more of the listed items.

[0068] Hereinafter, the terms "first" and "second" are used for descriptive purposes only and should not be construed as implying or suggesting relative importance or implicitly indicating the number of indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature, and in the description of the embodiments of this application, unless otherwise stated, "multiple" means two or more.

[0069] The embodiments of this application will now be described in further detail with reference to the accompanying drawings.

[0070] Firstly, this application provides a testing method for a local access control cabinet, referring to... Figure 1 This includes the following steps:

[0071] S110. Establish electrical connections with each interface of the access control cabinet under test through the multi-channel probe array on the simulation fixture board, apply a preset low-voltage test signal to each interface and collect electrical response data, perform line continuity test, impedance test and port voltage reference calibration, and obtain the first stage test results.

[0072] The interfaces include a card reader interface, an electric lock drive interface, and a door magnetic sensor interface.

[0073] In this embodiment, the simulated fixture board is a test tool used to simulate the interface layout of the elevator control main board. It is equipped with a probe array that corresponds one-to-one with the access control cabinet interface. The probe array contains multiple probes for establishing reliable electrical connections. The low-voltage test signal refers to an AC / DC signal with a test voltage within the safe voltage range. The card reader interface is used to connect an IC card reader and an identity recognition device. The electric lock drive interface is used to control the on / off state of the electromagnetic lock and electric bolt lock. The door magnetic sensor interface is used to collect door opening / closing status signals.

[0074] Specifically, the testers first fix the simulated fixture board to the control board of the access control cabinet, and then establish electrical connections with various interfaces of the control cabinet through the probe array on the fixture board. Following a preset test sequence, the system sequentially applies low-voltage test signals to the card reader interface, electric lock drive interface, and door magnetic sensor interface, collecting the voltage and current response waveforms of each interface. By analyzing the amplitude and phase relationship of the voltage and current, the continuity and impedance characteristics of the circuit are determined; simultaneously, the reference voltage values ​​of each interface are recorded for subsequent voltage calibration. During the test, the system compares the collected data with a preset reference range and generates a test report for the first stage.

[0075] S120. Based on the results of the first phase of testing, the access control cabinet that passed the test will be connected to the actual elevator control motherboard to verify the access control function and conduct joint debugging tests on the elevator system, thereby obtaining the results of the second phase of testing.

[0076] In this embodiment, access control function verification refers to testing the basic functions of the control cabinet, such as card swiping verification, electric lock control, and door status detection; system integration testing mainly verifies the collaborative working capability of the access control system and the elevator control system, including access control, security interlock, and floor control functions.

[0077] Specifically, after the access control cabinet passes the first phase of pre-inspection testing, the testers connect it to the actual elevator control mainboard. The system first performs individual function tests to verify the normal operation of card reading, electric lock action, and door magnetic signal acquisition. Then, it performs linkage tests to check the linkage logic between authorization verification and elevator scheduling, as well as the interlocking relationship between door lock status and operation control. The testing process uses pre-set test cases, covering both normal operation and abnormal conditions. The system records the response data for each test, forming the second phase of test results.

[0078] S130. Analyze the test results of the second stage and detect anomalies to obtain the location of the abnormal interface and the fault type.

[0079] In this embodiment, the abnormal interface location refers to the specific terminal location where the fault occurred; the fault type includes signal abnormality, timing error and logic failure.

[0080] Specifically, the system establishes a benchmark database containing normal operating parameter ranges, and test results are compared with reference values ​​in this database. For signal-related faults, the system judges them by comparing signal amplitude and waveform characteristics; for timing-related faults, the system sets a response time window, and exceeding this window is considered abnormal; for logic-related faults, the system pre-establishes a standard logic mapping table to verify whether the actual operating logic meets the design requirements.

[0081] S140. When a fault is detected, voice feedback is triggered based on the location of the abnormal interface and the fault type to broadcast the fault information and the corresponding terminal identifier.

[0082] In this embodiment, the voice feedback system includes a voice synthesis module and a stereo playback device; the terminal identifier includes a terminal number and a description of its physical location.

[0083] Specifically, the system pre-establishes a mapping table between terminal identifiers and their physical locations, as well as a mapping table between fault types and handling suggestions. When a fault is detected, the system queries these mapping tables to generate a voice-text message containing the fault location, type, and handling suggestions. The text is then converted into clear voice prompts using speech synthesis technology and played through a stereo system, helping maintenance personnel quickly locate and handle the fault.

[0084] In one embodiment, refer to Figure 2 In step S110, a preset low-voltage test signal is applied to each interface and electrical response data is collected, specifically including the following steps:

[0085] S111. Apply standard voltage and current test signals to the card reader interface to test the electrical connection integrity and load capacity of the interface.

[0086] In this embodiment, the standard voltage and current test signals refer to DC power supply signals that conform to the card reader's operating specifications, used to verify the power supply quality of the card reader interface; electrical connection integrity refers to the conduction status of the signal lines; and load capacity refers to the power supply capacity of the interface under maximum load.

[0087] Specifically, the system first generates a set of incremental test voltages, gradually increasing from the minimum operating voltage to the maximum operating voltage, and records the current response value at each voltage point. By analyzing the linearity of the voltage-current curves, the stability of the power supply circuit is determined; simultaneously, the test signal output is maintained under maximum load conditions, and interface temperature changes are monitored to verify heat dissipation performance. The system pre-establishes a judgment standard table based on the voltage-current characteristic curves for quickly identifying power supply anomalies.

[0088] S112. Apply a rated power test signal to the electric lock drive interface to verify the output characteristics and current carrying capacity of the drive circuit.

[0089] In this embodiment, the rated power test signal is a pulse signal used to verify the output capability of the electric lock drive circuit. Its duty cycle and frequency match the actual electric lock drive requirements. The output characteristics include drive voltage stability and switching timing characteristics. The current carrying capacity refers to the maximum output capability of the drive circuit in continuous operation.

[0090] Specifically, the test system generates a standard drive waveform using a programmable signal generator, which is then amplified and output to the electric lock drive interface. The system employs a segmented testing method: first, a short-time power test is performed to verify instantaneous drive capability; then, a continuous power test is performed to verify long-term operational stability. During the test, a high-speed data acquisition card records the output waveform, and the performance of the drive circuit is assessed based on the waveform distortion rate.

[0091] S113. Apply a switch status simulation signal to the door magnetic sensor interface to test the signal recognition and level conversion functions of the sensor interface.

[0092] In this embodiment, the switch state analog signal is a simulated door magnetic sensor output level signal used to test the signal acquisition performance of the interface; the signal recognition function refers to the accuracy of judging different level states; the level conversion function refers to the ability to convert sensor signals into standard logic levels.

[0093] Specifically, the test system uses a digital signal generator to produce a standard square wave signal to simulate door opening and closing state changes. By adjusting the rise and fall times of the signal, the dynamic response characteristics of the interface are tested; by changing the signal amplitude, the accuracy of the level judgment threshold is verified.

[0094] S114. Synchronously collect voltage, current and impedance response data of each interface.

[0095] In this embodiment, voltage response data refers to the voltage waveform at the output of each interface; current response data refers to the change in operating current of each interface; and impedance response data refers to the characteristic of load impedance changing with frequency.

[0096] Specifically, the system employs multi-channel synchronous acquisition technology, using a high-precision data acquisition card to sample the voltage and current signals of each interface in real time. The sampled data is amplified and filtered by a signal conditioning circuit before being sent to a digital oscilloscope for waveform display and storage. The system has a pre-established standard waveform library and identifies abnormal characteristics through waveform correlation analysis. Simultaneously, it calculates the phase relationship between voltage and current and plots impedance characteristic curves to evaluate load characteristics.

[0097] In one embodiment, refer to Figure 3 The testing method also includes the following steps:

[0098] S310. Compare and analyze the electrical parameters of each interface in the current test with the benchmark data of the same model in the past, and calculate the parameter deviation value.

[0099] In this embodiment, the baseline data of historical products of the same model refers to the electrical parameter records of verified qualified products, including voltage stability, current fluctuation range and signal response time; the parameter deviation value refers to the degree of difference between the current test value and the baseline value.

[0100] Specifically, the system maintains a hierarchical parameter benchmark library, indexed by product model, production batch, and test time. During testing, the benchmark dataset corresponding to the current product is first extracted, and the measured voltage, current, and response time are compared with the benchmark values. By calculating the relative and absolute deviations, a parameter deviation distribution chart is generated to evaluate the consistency of product performance.

[0101] Furthermore, the system establishes a benchmark dataset tailored to the application characteristics of access control cabinets. First, it categorizes elevators by operating speed: high-speed, medium-speed, and low-speed elevators, as different speeds require different access control response times. Second, it classifies them by door type: center-opening doors and side-opening doors, as different door types require different electric lock drive currents. Finally, it categorizes them by installation location: ordinary floors, ground floor, and top floor, as access control card readers in different locations have different anti-interference requirements. The system extracts features from historical data of similar products, focusing on three core indicators: electric lock drive current stability, card reader signal quality, and door magnetic signal reliability, establishing a hierarchical benchmark database to provide accurate reference standards for access control cabinets in different application scenarios.

[0102] S320. Based on the distribution trend of parameter deviation values, determine whether the electrical characteristics of the current product are within the normal range and predict the direction of parameter drift.

[0103] In this embodiment, the parameter distribution trend refers to the pattern of change of various electrical parameters over time; the normal range of electrical characteristics is determined by the technical specifications specified in the product specification; and the parameter drift direction refers to the trend of change of electrical parameters as the number of tests increases.

[0104] Specifically, the system establishes a time-series-based trend analysis model to identify the direction and rate of parameter changes through analysis of multiple consecutive test data. For voltage parameters, the focus is on the decreasing trend of stability; for current parameters, the main focus is on monitoring overcurrent risk; and for response time, the focus is on the increasing trend of delay. The system uses a simple linear regression method to predict parameter change trends, triggering an early warning when the slope of the change exceeds a threshold.

[0105] S330. Based on the prediction results of the parameter drift direction, automatically adjust the amplitude and frequency range of the next round of test signals to obtain the adjusted test parameters.

[0106] In this embodiment, the amplitude range of the test signal includes the maximum value, minimum value, and step value; the frequency range includes the start frequency, end frequency, and scan rate; and the adjusted test parameters are the test configuration optimized based on the prediction results.

[0107] Specifically, the system dynamically adjusts the parameter range of the test signal based on the parameter drift prediction results. When a risk of voltage drift is predicted, the test voltage range is appropriately narrowed and the number of sampling points is increased; when a change in response characteristics is predicted, the signal frequency scanning range is adjusted to optimize test efficiency.

[0108] Furthermore, the system determines parameter adjustment formulas based on the operating characteristics of the access control cabinet. Specifically, the electric lock drive voltage range is calculated as: [rated voltage × (1 - deviation rate), rated voltage × (1 + deviation rate)], where the deviation rate is determined based on the electric lock type: 10% for heavy-duty electric locks and 15% for light-duty electric locks. The number of sampling points for the card reader power supply voltage is calculated as: base number of points × (1 + interference coefficient), where the interference coefficient is related to the floor location: 1.5 for the first floor, 1.2 for ordinary floors, and 1.8 for the top floor. The door magnetic signal detection frequency is calculated as: [reference frequency - response offset, reference frequency + response offset], where the response offset is determined based on the elevator speed: 50Hz for high-speed elevators, 30Hz for medium-speed elevators, and 20Hz for low-speed elevators. When excessive electric lock current is detected, the upper limit of the test current is reduced to 75% of the rated value. When door magnetic signal jitter is detected, the sampling period is extended to 130% of the reference value to accurately capture door status switching characteristics.

[0109] S340. When the interface electrical parameters are detected to be close to the predicted abnormal boundary, the test time is automatically extended and the data sampling accuracy is improved based on the adjusted test parameters.

[0110] In this embodiment, the abnormal boundary refers to the critical state that exceeds the normal working range; extending the test time refers to increasing the duration of a single test; improving data sampling accuracy refers to increasing the sampling rate and the number of sampling bits.

[0111] Specifically, the system monitors parameter deviations in real time, and automatically switches to precision testing mode when a parameter approaches a preset warning threshold. In this mode, the system extends the single test time to twice the standard time and increases the sampling rate to four times the basic sampling rate, ensuring that minute parameter changes can be captured. Simultaneously, a data smoothing mechanism is activated, using a moving average method to reduce the impact of random noise and improve measurement reliability.

[0112] In one embodiment, refer to Figure 4 In step S120, the access control function is verified and the elevator system is tested, which includes the following steps:

[0113] S121. Establish a communication connection between the access control cabinet and the elevator main control system, and verify the compatibility of the communication protocol.

[0114] In this embodiment, the compatibility of the communication protocol refers to the degree of matching between the data exchange format, transmission rate, and verification method between the access control cabinet and the elevator main control system; the communication connection includes two layers: physical layer connection and data link layer connection.

[0115] Specifically, the system first verifies the reliability of the physical connection through a communication interface self-test program, including signal wiring sequence, terminating resistance, and signal level. Then, it performs protocol conformance testing. The system pre-establishes a communication protocol test table, including three categories of test items: handshake signals, heartbeat packets, and data frame formats. During testing, test data packets are sent in the order defined in the table, and the response results are recorded. Protocol compatibility is determined by comparing the integrity and correctness of the received data.

[0116] S122. Test the basic permission verification process and the transmission function of floor selection instructions.

[0117] Specifically, the system establishes a standard access control test sequence library, including three types of cards: regular access cards, management cards, and visitor cards. During testing, the system simulates card-swiping actions for different card types, recording the information transmission sequence and system response process. The system uses a simple state machine model to track and verify the process, recording the timestamp and execution result of each state transition. Simultaneously, it verifies the correct transmission of floor selection instructions; the system maintains a floor mapping table to verify the accuracy of the target floor information.

[0118] S123. Verify the establishment of basic interlocking between the access control cabinet and the elevator safety system.

[0119] Specifically, the test system uses a state combination test method to verify the interlocking function. First, an interlocking state truth table is established, defining the interlocking logic under various operating states. By simulating different door lock states, operating states, and emergency states, the correctness of the system's response is verified. The system adopts a step-by-step testing strategy, first testing the action characteristics of a single interlocking point, and then verifying the coordinated effect of multiple interlocking points. For each interlocking test item, the system records the triggering conditions, response time, and executed actions, forming a complete test record.

[0120] In one embodiment, refer to Figure 5 In step S130, the test results of the second stage are analyzed and anomalies are detected to obtain the location of the abnormal interface and the fault type. Specifically, the steps include the following:

[0121] S131. Compare the matching of the authorization verification timing with the elevator response timing. When the timing deviation exceeds the preset threshold, it is identified as an authorization verification failure.

[0122] In this embodiment, the authorization verification sequence refers to the complete time chain from card swiping to elevator response; the elevator response sequence includes button enable, elevator call signal and running command; the timing deviation refers to the difference between the actual response time and the standard time.

[0123] Specifically, the system establishes a standard timing flowchart, recording the standard response time of each node under normal operating conditions. During testing, a timestamp method is used to record the time at four key points: card swiping, verification completion, button activation, and elevator call response. The time intervals between adjacent nodes are calculated and compared with the standard value. When a time interval exceeds 20% of the standard value, the system marks that node as suspicious; three consecutive instances of exceeding the limit confirm a verification failure.

[0124] S132. Analyze the timing deviation and stability of the interlock response. When the response delay or fluctuation exceeds the safe range, it is determined to be a safety interlock failure.

[0125] In this embodiment, the timing deviation of the interlock response refers to the difference between the actual time taken from interlock triggering to execution completion and the standard time taken; the stability of the interlock response refers to the degree of dispersion of the response time in multiple tests; the safety range is determined by the elevator safety specifications.

[0126] Specifically, the system employs a multi-round testing method to verify the interlocking response characteristics. First, an interlocking response benchmark table is established, including standard response parameters for three types of interlocks: door lock interlocks, emergency brake interlocks, and landing door interlocks. During testing, each interlock is tested ten times in total, and the response time is recorded for each iteration, calculating the average and standard deviation. An interlocking failure is identified when the average response time exceeds 15% of the standard value, or the standard deviation exceeds 10% of the average.

[0127] S133. Verify the consistency of elevator dispatch response under different floor permission settings. When a mismatch occurs between permissions and dispatch, it is identified as an abnormal floor permission control.

[0128] In this embodiment, floor permission setting refers to the combination of floors that can be accessed by different permission cards; elevator dispatch response refers to the floor selection enable signal generated according to the permissions; permission and dispatch mismatch means that the actual selectable floors do not match the permission definition.

[0129] Specifically, the system maintains a permission matrix table, recording the floor access permissions corresponding to different types of cards. Testing employs a full-coverage verification strategy, sequentially testing the access results of each permission card on each floor. The system compares the actual test results with the permission matrix; if the actual access status on a floor does not match the permission definition, and this occurs twice consecutively, it is confirmed as an access control anomaly.

[0130] S134. Associate the identified fault type with the corresponding interface location to generate a diagnostic result that includes the abnormal interface location and fault type.

[0131] In this embodiment, the fault types include signal abnormality, timing abnormality, and logic abnormality; the abnormal interface location refers to the specific terminal number where the fault occurred; the diagnostic results include fault description, fault level, and handling suggestions.

[0132] Specifically, the system pre-establishes a fault feature mapping table, associating different types of anomalies with possible fault causes. When an anomaly is detected, the system queries the mapping table based on the anomaly characteristics to determine the fault type; simultaneously, it locates the specific interface where the fault occurred through test records. The system employs a hierarchical fault coding scheme, combining fault type, interface location, and fault level codes to generate a standardized fault diagnosis report. The report includes specific abnormal values, reference ranges, and the degree of exceeding limits, facilitating maintenance personnel to quickly locate and handle faults.

[0133] In one embodiment, refer to Figure 6 The testing method also includes the following steps:

[0134] S610. When a fault is identified, automatically switch to fault reproduction mode and repeat the corresponding test process to verify the consistency of the fault.

[0135] S620 Record key parameter data during the fault reproduction process, including authorization verification sequence, interlock response time and floor dispatch response data.

[0136] S630: Perform statistical analysis on the authorization verification sequence, interlock response time, and floor scheduling response data to calculate the fault recurrence frequency and parameter deviation stability.

[0137] S640. The frequency of fault recurrence and the stability of parameter deviation are correlated and compared with the abnormal characteristics detected in the initial test to finally confirm the fault type and severity.

[0138] In one embodiment, refer to Figure 7 In step S140, voice feedback is triggered based on the location and type of the abnormal interface to broadcast the fault information and the corresponding terminal identifier, specifically including the following steps:

[0139] S141. Query the preset terminal identifier mapping table according to the abnormal interface location to obtain the corresponding terminal number and physical location description.

[0140] In this embodiment, the terminal identification mapping table is a data table that associates the terminal numbers of each interface in the control cabinet with their physical locations; the terminal numbers use a standard alphanumeric code; the physical location description includes the installation location, terminal block, and terminal number information.

[0141] S142. Extract the corresponding fault description and suggested handling method from the fault information database based on the fault type.

[0142] In this embodiment, the fault information database includes standard fault codes, fault phenomenon descriptions, fault cause analysis, and handling suggestions; the fault descriptions use structured language templates; and the suggested handling methods include inspection steps, handling measures, and precautions.

[0143] Specifically, the system establishes a dedicated fault information table for the access control system. Fault codes use a hierarchical coding system; for example, "E01" indicates a card reader communication fault, "E02" indicates an electric lock drive fault, and "E03" indicates a door magnetic sensor detection fault. Each fault code corresponds to a specific fault description, such as "card reader communication interruption," "excessive electric lock drive current," or "unstable door magnetic sensor signal." Troubleshooting suggestions are presented in a sequential list format, such as "check terminal connection tightness," "measure power supply voltage," and "replace the faulty component."

[0144] S143. According to the preset voice broadcast format, combine the terminal identification, fault type and handling suggestions into complete voice information content.

[0145] In this embodiment, the voice broadcast format is a preset information organization template, which includes the fault location, fault type, fault level and handling suggestions; the voice information content is a complete voice text combined in a fixed order.

[0146] S144. The voice information content is broadcast through the voice synthesis module, and the visual mark of the fault location is displayed on the screen simultaneously.

[0147] In this embodiment, the speech synthesis module includes a text analysis unit, a speech synthesis unit, and an audio output unit; the visual identifiers include a control cabinet layout diagram, fault location markers, and fault status indicators.

[0148] Specifically, the system is equipped with a professional speech synthesis engine, supporting real-time text-to-speech conversion. While broadcasting fault information, the system displays a floor plan of the control cabinet on the screen, marking the location of the faulty terminal with flashing red markers, and displaying the fault code and fault level next to the markers. This dual audio and visual prompting helps maintenance personnel quickly locate the fault. The display interface uses a segmented display method: the left side shows the control cabinet layout, the right side shows detailed fault information, and the bottom displays handling suggestions.

[0149] It should be understood that the sequence number of each step in the above embodiments does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this application.

[0150] Secondly, this application provides a local access control cabinet testing system. The local access control cabinet testing system of this application will be described below in conjunction with the above-mentioned local access control cabinet testing method.

[0151] Reference Figure 8 A local access control cabinet testing system, comprising:

[0152] The first-stage test module is used to establish electrical connections with each interface of the access control cabinet under test through a multi-channel probe array on a simulated fixture board. The interfaces include a card reader interface, an electric lock drive interface, and a door magnetic sensor interface. A preset low-voltage test signal is applied to each interface and electrical response data is collected. Line continuity test, impedance test, and port voltage reference calibration are performed to obtain the first-stage test results.

[0153] The second-stage testing module is used to establish a connection between the access control cabinet that has passed the test and the actual elevator control motherboard based on the test results of the first stage, to verify the access control function and conduct joint debugging tests on the elevator system, and to obtain the test results of the second stage.

[0154] The fault analysis module is used to analyze the test results of the second phase and detect anomalies, and to obtain the location of the abnormal interface and the fault type.

[0155] The voice feedback module, when a fault is detected, triggers voice feedback based on the location of the abnormal interface and the fault type, broadcasting the fault information and the corresponding terminal identifier.

[0156] In one embodiment, this application provides an electronic device, which may be a server, and its internal structure diagram may be as follows: Figure 9 As shown, the electronic device includes a processor, memory, and network interface connected via a system bus. The processor provides computing and control capabilities. The memory includes a non-volatile storage medium and internal memory. The non-volatile storage medium stores an operating system, computer programs, and a database. The internal memory provides an environment for the operation of the operating system and computer programs in the non-volatile storage medium. The database stores data. The network interface communicates with external terminals via a network connection. When the computer program is executed by the processor, it implements a local access control cabinet testing method.

[0157] Those skilled in the art will understand that Figure 9 The structure shown is merely a block diagram of a portion of the structure related to the present application and does not constitute a limitation on the electronic device to which the present application is applied. The specific electronic device may include more or fewer components than shown in the figure, or combine certain components, or have different component arrangements.

[0158] In one embodiment, an electronic device is also provided, including a memory and a processor, wherein the memory stores a computer program, and the processor executes the computer program to implement the steps in the above-described method embodiments.

[0159] Those skilled in the art will understand that all or part of the processes in the methods of the above embodiments can be implemented by a computer program instructing related hardware. The computer program can be stored in a non-volatile computer-readable storage medium. When executed, the computer program can include the processes of the embodiments of the above methods. Any references to memory, storage, databases, or other media used in the embodiments provided in this application can include at least one of non-volatile and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, or optical storage, etc. Volatile memory can include random access memory (RAM) or external cache memory. By way of illustration and not limitation, RAM can be in various forms, such as static random access memory (SRAM) or dynamic random access memory (DRAM), etc.

[0160] The above are all preferred embodiments of this application, and are not intended to limit the scope of protection of this application. Therefore, all equivalent changes made in accordance with the structure, shape and principle of this application should be covered within the scope of protection of this application.

Claims

1. A method of testing an access control cabinet in situ, characterised by, The method comprises the following steps: An electrical connection is established between a multi-channel probe array on a simulation fixture board and each interface of the access control cabinet to be tested, including a card reader interface, an electric lock driving interface, and a door magnetic sensor interface. A preset low-voltage test signal is applied to each interface, and electrical response data is collected. Line continuity testing, impedance testing, and port voltage reference calibration are performed to obtain first-stage test results. Based on the first-stage test results, the access control cabinet that passes the test is connected to the actual elevator control mainboard to perform access function verification and elevator system joint debugging testing to obtain second-stage test results. The second-stage test results are analyzed and abnormality detected to obtain abnormal interface positions and fault types. When a fault is detected, voice feedback is triggered based on the abnormal interface positions and the fault types to broadcast fault information and corresponding terminal identifiers. The access function verification and elevator system joint debugging testing specifically include the following steps: A communication connection is established between the access control cabinet and the elevator main control system to verify the compatibility of the communication protocol. The basic permission verification process and the transmission function of the floor selection instruction are tested. The basic interlocking between the access control cabinet and the elevator safety system is verified. The second-stage test results are analyzed and abnormality detected to obtain abnormal interface positions and fault types, specifically including the following steps: The matching of the permission verification timing and the elevator response timing is compared. When the timing deviation exceeds a preset threshold, it is identified as a permission verification failure fault. The timing deviation and stability of the interlocking response are analyzed. When the response delay or fluctuation exceeds a safe range, it is determined as a safety interlocking failure fault. The elevator dispatch response consistency under different floor permission settings is verified. When the permission and dispatch do not match, it is identified as a floor permission control anomaly. The identified fault types are associated with the corresponding interface positions to generate a diagnostic result containing abnormal interface positions and fault types.

2. The access control cabinet testing method of claim 1, wherein, The preset low-voltage test signal is applied to each interface, and electrical response data is collected, specifically including the following steps: A standard voltage and current test signal is applied to the card reader interface to test the electrical connection integrity and load capacity of the interface. A rated power test signal is applied to the electric lock driving interface to verify the output characteristics and current carrying capacity of the driving circuit. An on-off state simulation signal is applied to the door magnetic sensor interface to test the signal recognition and level conversion functions of the sensor interface. Voltage, current, and impedance response data of each interface are synchronously collected.

3. The method of claim 2, wherein, The test method further includes the following steps: The electrical parameters of each interface in the current test are compared and analyzed with the reference data of the same model of historical products to calculate parameter deviation values. Based on the distribution trend of the parameter deviation values, it is determined whether the electrical characteristics of the current product are within a normal range and the parameter drift direction is predicted. Based on the prediction result of the parameter drift direction, the amplitude and frequency range of the next round of test signals are automatically adjusted to obtain adjusted test parameters. When the electrical parameters of the interface approach the predicted abnormal boundary, the test time is automatically extended and the data sampling accuracy is improved based on the adjusted test parameters.

4. The method of claim 1, wherein, The test method further includes the following steps: When the fault is identified, automatically switch to the fault reproduction mode, repeat the corresponding test process to verify the consistency of the fault; Record the key parameter data during the fault reproduction process, including the permission verification timing, interlocking response time and floor scheduling response data; Statistical analysis of the permission verification timing, interlocking response time and floor scheduling response data, calculate the fault reproduction frequency and parameter deviation stability; Correlate the fault reproduction frequency and the parameter deviation stability with the abnormal characteristics of the initial detection, and finally confirm the fault type and severity.

5. The method of claim 1, wherein, According to the abnormal interface position and the fault type, trigger voice feedback to broadcast fault information and corresponding terminal identification, specifically including the following steps: According to the abnormal interface position, query the preset terminal identification mapping table to obtain the corresponding terminal number and physical position description; Based on the fault type, extract the corresponding fault description and suggested processing method from the fault information library; According to the preset voice broadcast format, combine the terminal identification, fault type and processing suggestion into complete voice information content; Broadcast the voice information content through the voice synthesis module, and synchronously display the visual identifier of the fault position on the display screen.

6. A local access control cabinet testing system, characterized by, The in-situ access control cabinet test method of any one of claims 1-5, comprising: A first stage test module for establishing electrical connection with each interface of the access control cabinet to be tested through a multi-channel probe array on a simulation jig board, the interface including a card reader interface, an electric lock drive interface and a door magnetic sensor interface, applying a preset low-voltage test signal to each interface and collecting electrical response data, performing line continuity test, impedance test and port voltage reference calibration to obtain first stage test results; A second stage test module for connecting the access control cabinet that passes the test to the actual elevator control mainboard according to the first stage test results, performing access function verification and elevator system joint debugging test to obtain second stage test results; A fault analysis module for analyzing and detecting abnormalities based on the second stage test results to obtain an abnormal interface position and a fault type; A voice feedback module for triggering voice feedback according to the abnormal interface position and the fault type when a fault is detected, and broadcasting fault information and corresponding terminal identification.

7. An electronic device, comprising: A computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement the steps of the in-situ access control cabinet test method of any one of claims 1-5.

8. A computer-readable storage medium having stored thereon a computer program, characterized in that, The computer program is executed by the processor to implement the steps of the in-situ access control cabinet test method of any one of claims 1-5.

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