Method for optimizing the conversion efficiency of electrical energy and related devices

Abstract

The application provides an electric energy conversion efficiency optimization method and related device. The method comprises: obtaining circuit component operating parameters and circuit switching frequency parameters; determining an initial time delay based on the circuit component operating parameters and the circuit switching frequency parameters; obtaining a plurality of stepped current values based on the initial time delay and a preset stepped time delay, each stepped current value being a current parameter corresponding to a time period after each step of the initial time delay, and the plurality of stepped current values being based on current signals from a current acquisition circuit module; and determining a target time delay based on the plurality of stepped current values. In this way, different target time delays can be determined based on the obtained current parameters in various module cases, the target time delays can change the target switching tube conduction points of different types of single-ended primary inductance converter circuit systems, the electric energy conversion efficiency is improved, and the efficiency difference and reliability risk between different modules caused by differences are eliminated.

Description

Technical Field

[0001] This invention relates to the field of single-ended primary inductor converter circuit technology, and in particular to a method and related apparatus for optimizing power conversion efficiency. Background Technology

[0002] With the rapid development of the new energy electric vehicle sector, the market demands increasingly higher efficiency from electric vehicle charging modules. To address this high efficiency requirement, a single-ended primary inductor converter circuit using boundary conduction mode (BCM) has been developed. This circuit achieves voltage tracking of the module input current through frequency modulation and employs a pre-set fixed turn-on delay for circuit control.

[0003] However, due to the inconsistencies in the consistency of different modules and components, the required turn-on delays between different modules are inconsistent. This means that the same fixed turn-on delay is not optimal for different modules, resulting in different losses between different modules, differences in module efficiency, and certain risks to the thermal stress of the switching transistors. The significant differences in the conduction position greatly increase the losses of the switching transistors and reduce the efficiency of the modules. Summary of the Invention

[0004] This application provides a method and related apparatus for optimizing power conversion efficiency, which can optimize the conduction status under different module conditions, reduce switching losses, and improve efficiency.

[0005] In a first aspect, embodiments of this application provide a method for optimizing power conversion efficiency, applied to a control circuit module of a single-ended primary inductor converter circuit system. The single-ended primary inductor converter circuit system further includes a current acquisition circuit module and a single-ended primary inductor converter circuit module, and the control circuit module is connected to both the current acquisition circuit module and the single-ended primary inductor converter circuit module. The method includes:

[0006] Obtain a circuit parameter set, which includes at least the operating parameters of the circuit components and the circuit switching frequency parameters;

[0007] The initial time delay is determined based on the operating parameters of the circuit components and the switching frequency parameters of the circuit.

[0008] Multiple step current values ​​are obtained based on the initial delay and the preset step delay. Each step current value is a current parameter corresponding to the time period after each step of the initial delay. The multiple step current values ​​are based on the current signal from the current acquisition circuit module.

[0009] The target delay is determined based on the multiple step current values. The target delay is the delay corresponding to the peak value of the oscillating current. The peak value of the oscillating current is the maximum or maximum value of the positive or negative current parameters. The target delay is used to change the target switching point of the single-ended primary inductor converter circuit system, improve the power conversion efficiency, and eliminate the efficiency differences and reliability risks between different modules caused by the differences.

[0010] In one possible embodiment, obtaining multiple step current values ​​based on the initial delay and the preset step delay includes:

[0011] The first delay and the second delay are determined based on the initial delay and the preset step delay;

[0012] The target switch in the single-ended primary inductor converter circuit module is controlled to turn on and off during the initial delay, the first delay, and the second delay, respectively, and multiple sets of sampled current values ​​corresponding to the initial delay, the first delay, and the second delay are obtained, with each set of sampled current values ​​corresponding to the initial delay, the first delay, and the second delay, respectively.

[0013] The plurality of step current values ​​are determined based on each set of sampled current values, wherein each step current value corresponds to a set of sampled current values.

[0014] In one possible embodiment, the multiple sets of sampled current values ​​include a first set of sampled current values, a second set of sampled current values, and a third set of sampled current values; controlling the target switch in the single-ended primary inductor converter circuit module to turn on and off respectively within the initial delay, the first delay, and the second delay, and acquiring the multiple sets of sampled current values ​​corresponding to the initial delay, the first delay, and the second delay respectively, includes:

[0015] The target switch in the single-ended primary inductor converter circuit module is controlled to turn on and off within the initial time delay, and the first set of sampled current values ​​within the preset voltage range is obtained.

[0016] The adjustment delay is changed from the initial delay to the first delay;

[0017] Control the target switch in the single-ended primary inductor converter circuit module to turn on and off within the first time delay, and obtain the second set of sampled current values ​​within the preset voltage range;

[0018] The time delay is adjusted from the first time delay to the second time delay;

[0019] The target switch in the single-ended primary inductor converter circuit module is controlled to turn on and off within the second time delay, and a third set of sampled current values ​​within the preset voltage range are obtained.

[0020] In one possible embodiment, the absolute value of the second delay is sequentially greater than the absolute value of the first delay, and the absolute value of the first delay is sequentially greater than the absolute value of the initial delay. The plurality of step current values ​​includes a first current step value, a second current step value, and a third current step value. The first current step value corresponds to the initial delay, the second current step value corresponds to the first delay, and the third current step value corresponds to the second delay. Determining the target delay based on the plurality of step current values ​​includes:

[0021] Determine whether the second current step value is less than the first current step value and less than the third current step value. If so, determine that the first delay is the target delay.

[0022] If not, then if the second current step value is greater than the first current step value and less than the third current step value, then multiple first-type delay groups are determined based on the initial delay and the preset step delay; if the second current step value is less than the first current step value and greater than the third current step value, then multiple second-type delay groups are determined based on the initial delay and the preset step delay; the first-type delay groups are multiple delays obtained by stepping down the preset step delay on the initial delay, and the second-type delay groups are multiple delays obtained by stepping up the preset step delay on the initial delay;

[0023] Multiple sets of negative sampling current values ​​are determined based on the first type of delay group, and the target delay is determined based on each set of negative sampling current values; or, multiple sets of positive sampling current values ​​are determined based on the second type of delay group, and the target delay is determined based on each set of positive sampling current values.

[0024] In one possible embodiment, the single-ended primary inductor converter circuit module includes a single-ended primary inductor converter circuit module with single-phase AC input or a single-ended primary inductor converter circuit module with single-phase DC input. Each group of sampled current values ​​includes at least two oscillating current values. Determining the plurality of step current values ​​based on each group of sampled current values ​​includes:

[0025] Multiple sampled current statistical values ​​are determined based on statistical calculations performed on each group of sampled current values. The statistical calculations include calculating the average value, and the sampled current statistical values ​​include the average sampled current value.

[0026] The plurality of step current values ​​are determined based on the statistical values ​​of the sampled current.

[0027] In one possible embodiment, the single-ended primary inductor converter circuit module includes a multi-phase AC input single-ended primary inductor converter circuit module, and the sampled current value includes multiple sub-phase sampled current values.

[0028] If each phase circuit in the multi-phase AC input single-ended primary inductor converter circuit module is independent, determining the plurality of step current values ​​based on each group of sampled current values ​​includes: for each phase sub-phase circuit, performing statistical calculations based on each group of sub-phase sampled current values ​​to determine a plurality of sub-phase sampled current statistical values, wherein the statistical calculations include averaging, and the sampled current statistical values ​​include the average of the sampled currents; and for each phase sub-phase circuit, determining the plurality of step current values ​​based on the sampled current statistical values.

[0029] In one possible embodiment, the single-ended primary inductor converter circuit module includes a multi-phase AC input single-ended primary inductor converter circuit module, and the sampled current value includes multiple sub-phase sampled current values.

[0030] If each phase circuit in the multi-phase AC input single-ended primary inductor converter circuit module is associated, determining the plurality of step current values ​​based on each group of sampled current values ​​includes: performing statistical calculations based on the plurality of sub-phase sampled current values ​​to determine a plurality of sub-phase sampled current statistical values, wherein the statistical calculations include averaging, and the sampled current statistical values ​​include the average of the sampled currents; and determining the plurality of step current values ​​based on the plurality of sub-phase sampled current values.

[0031] Secondly, embodiments of this application provide an energy conversion efficiency optimization device applied to a control circuit module of a single-ended primary inductor converter circuit system. The single-ended primary inductor converter circuit system further includes a current acquisition circuit module and a single-ended primary inductor converter circuit module. The control circuit module is connected to the current acquisition circuit module and the single-ended primary inductor converter circuit module. The device includes:

[0032] A data acquisition unit is used to acquire a circuit parameter set, which includes at least the operating parameters of circuit components and the circuit switching frequency parameters.

[0033] The first determining unit is used to determine the initial time delay based on the operating parameters of the circuit components and the switching frequency parameters of the circuit.

[0034] The second determining unit is used to obtain multiple step current values ​​based on the initial delay and the preset step delay. Each step current value is a current parameter corresponding to the time period after each step of the initial delay. The multiple step current values ​​are based on the current signal from the current acquisition circuit module.

[0035] The third determining unit is used to determine the target delay based on the plurality of step current values. The target delay is the delay corresponding to the peak value of the oscillating current. The peak value of the oscillating current is the maximum or maximum value of the positive or negative current parameters. The target delay is used to change the target switching point of the single-ended primary inductor converter circuit system, improve the power conversion efficiency, and eliminate the efficiency difference and reliability risk between different modules caused by the difference.

[0036] Thirdly, embodiments of this application provide a computer-readable storage medium storing an energy conversion efficiency optimization program thereon. The energy conversion efficiency optimization program includes execution instructions. When a processor executes the execution instructions stored in the memory, the processor performs some or all of the steps described in the first aspect.

[0037] Fourthly, embodiments of this application provide an electronic device, including a processor, a memory, a communication interface, and one or more programs, wherein the one or more programs are stored in the memory and configured to be executed by the processor, and when the processor executes the one or more programs, the processor executes some or all of the instructions of the steps described in the first aspect of the embodiments of this application.

[0038] Fifthly, embodiments of this application provide a computer program product, wherein the computer program product includes a non-transitory computer-readable storage medium storing a computer program operable to cause a computer to perform some or all of the steps described in the first aspect of embodiments of this application. The computer program product may be a software installation package.

[0039] By implementing the embodiments of this application, a circuit parameter set is obtained, which includes at least circuit component operating parameters and circuit switching frequency parameters; an initial time delay is determined based on the circuit component operating parameters and the circuit switching frequency parameters; multiple step current values ​​are obtained based on the initial time delay and a preset step time delay, each step current value being a current parameter corresponding to the time period after each step of the initial time delay, and the multiple step current values ​​are based on current signals from the current acquisition circuit module; a target time delay is determined based on the multiple step current values, the target time delay being a time delay corresponding to the peak value of the oscillating current, and the peak value of the oscillating current being the positive or negative maximum or maximum value among the current parameters. Thus, different target time delays can be determined based on the obtained current parameters in various module scenarios. This target time delay can change the target switching point of different types of single-ended primary inductor converter circuit systems, improving power conversion efficiency and eliminating efficiency differences and reliability risks between different modules caused by variations. Attached Figure Description

[0040] To more clearly illustrate the technical solutions in the embodiments of the present invention or the background art, the accompanying drawings used in the embodiments of the present invention or the background art will be described below.

[0041] Figure 1a This is a schematic diagram of the architecture of a single-ended primary inductor converter circuit system provided in an embodiment of this application;

[0042] Figure 1b This is a circuit topology diagram of a single-ended primary inductor converter circuit system provided in an embodiment of this application;

[0043] Figure 1c This is a circuit topology diagram of a current acquisition circuit module and a control circuit module provided in an embodiment of this application;

[0044] Figure 2 This is a flowchart illustrating a method for optimizing power conversion efficiency provided in an embodiment of this application;

[0045] Figure 3 This is a schematic diagram of the dynamic adjustment process of an energy conversion efficiency optimization method provided in an embodiment of this application;

[0046] Figure 4 This is a schematic diagram of the preset voltage range of a single-ended primary inductor converter circuit module with AC input provided in an embodiment of this application;

[0047] Figure 5 This is a schematic flowchart of the power conversion efficiency optimization method for the first single-phase AC input single-ended primary inductor converter circuit module proposed in the embodiments of this application;

[0048] Figure 6 This is a schematic flowchart of the power conversion efficiency optimization method for a single-ended primary inductor converter circuit module with single-phase AC input provided in the embodiments of this application;

[0049] Figure 7 This is a sampling schematic diagram of a single-ended primary inductor converter circuit module with multiphase AC input provided in an embodiment of this application;

[0050] Figure 8 This is a sampling schematic diagram of a DC-input single-ended primary inductor converter circuit module provided in an embodiment of this application;

[0051] Figure 9 This is a schematic diagram of the structure of an energy conversion efficiency optimization device proposed in an embodiment of this application;

[0052] Figure 10 This is a schematic diagram of the structure of an electronic device proposed in an embodiment of this application;

[0053] Figure 11This is a schematic diagram of another power conversion efficiency optimization device provided in the embodiments of this application. Detailed Implementation

[0054] To enable those skilled in the art to better understand the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present application, and not all embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of the present application.

[0055] The terms "first," "second," etc., in the specification, claims, and accompanying drawings of this application are used to distinguish different objects, not to describe a specific order. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or electronic device that includes a series of steps or units is not limited to the listed steps or units, but in an alternative example also includes steps or units not listed, or in an alternative example also includes other steps or units inherent to these processes, methods, products, or electronic devices.

[0056] In this document, the term "embodiment" means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this application. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.

[0057] To address the high efficiency requirements of charging modules, existing single-ended primary inductor converter circuits using BCM sampling mode have been developed. These circuits achieve voltage tracking of the module input current through frequency modulation and employ a pre-set fixed turn-on delay for circuit control. However, due to inconsistencies in the required turn-on delays between different modules and components, the same fixed turn-on delay may not be optimal for all modules. This leads to varying losses and efficiencies, increased thermal stress on the switching transistors, and significantly increased losses due to differences in conduction position, ultimately resulting in low module efficiency.

[0058] To address the aforementioned issues, this application provides a method and related apparatus for optimizing power conversion efficiency. This method can determine different target delays based on acquired current parameters in various module scenarios. These target delays can alter the target switching point of different types of single-ended primary inductor converter circuit systems, thereby improving power conversion efficiency and eliminating efficiency differences and reliability risks between different modules caused by variations.

[0059] The power conversion efficiency optimization method provided in this application embodiment can be applied to, for example... Figure 1a Please refer to the single-ended primary inductor converter circuit system shown. Figure 1a , Figure 1a This is a schematic diagram of the architecture of a single-ended primary inductor converter circuit system provided in an embodiment of this application. The single-ended primary inductor converter circuit system 100 includes a control circuit module 110, a current acquisition circuit module 120, and a single-ended primary inductor converter circuit module 130.

[0060] In this design, the control circuit module 110 is used to handle a large number of computational tasks, store data, and control the circuit. In this design, the control circuit module 110 is electrically connected to the current acquisition circuit module 120 and the single-ended primary inductor converter circuit module 130.

[0061] Please see Figure 1b , Figure 1b This is a circuit topology diagram of a single-ended primary inductor converter circuit system provided in an embodiment of this application.

[0062] The single-ended primary inductor converter circuit module 130 is a single-ended primary inductor converter (SEPIC) circuit under BCM, which can be abbreviated as BCM-SEPIC circuit. A SEPIC circuit is a DC / DC topology that can step up or down, meaning the inductor current drops to zero at the end of each switching cycle, i.e., it lies between continuous and discontinuous modes, naturally achieving a high power factor. The connections and functions between the power input, first diode D1, second diode D2, third diode D3, fourth diode D4, fifth diode D5, first inductor L1, second inductor Lk, third inductor Lm, first switch Q1, first capacitor C1, second capacitor C2, third capacitor C3, fourth capacitor C4, N:1 transformer, and load in the single-ended primary inductor converter circuit module 130 can be found in the descriptions of other SEPIC circuits under BCM, and will not be repeated here. The target switch is the first switch Q1.

[0063] Among them, the control circuit module 110 is Figure 1bThe DSP in the text refers to a Digital Signal Processor (DSP). The current acquisition circuit module 120 is... Figure 1b The hardware current sampling circuit feeds the current signal back to the DSP. The DSP adjusts the first switching transistor Q1 to achieve stable output voltage and a high power factor. The current acquisition circuit module 120 can be used for module short-circuit protection. It collects the current of the switching transistor throughout the entire switching cycle. The collected current is also used in power conversion efficiency optimization methods.

[0064] Optionally, the single-ended primary inductor converter circuit system also includes an input voltage sampling circuit for acquiring the voltage sampling signal after the input rectifier bridge.

[0065] Please refer to Figure 1c , Figure 1c This is a circuit topology diagram of a current acquisition circuit module and a control circuit module provided in an embodiment of this application. In addition to overcurrent protection, the current acquisition circuit module 120 is also used to obtain the circuit parameter set in the power conversion efficiency optimization method.

[0066] like Figure 1cAs shown, to ensure the DSP can sample the peak current at the moment the switching transistor is turned on without affecting the original overcurrent protection signal sampling, a peak hold and discharge circuit is used. This circuit uses the sixth diode D6 and the peak hold capacitor (the fifth capacitor C5) to hold the peak current signal. The DSP controls the discharge of the capacitor by controlling the turn-on of the second switching transistor Q2. The voltage of the fifth capacitor C5 holds the peak value of the oscillating current. After the DSP samples this signal, it controls the second switching transistor Q2 to discharge rapidly, preparing for subsequent current turn-off peak sampling. This prevents the oscillating current peak from exceeding the main power switch's turn-off current peak, which could lead to DSP misjudgment. The current acquisition circuit module 120 captures the peak current during the conduction of the first switching transistor Q1 and converts it into a voltage signal for the DSP to acquire. The current sampling resistor R1 converts the current of the first switching transistor Q1 into a voltage signal. The current of the first switching transistor Q1 is the current signal acquired from the single-ended primary inductor converter circuit module 130. The sixth diode D6 acts as a unidirectional conductor. The fifth capacitor C5 stores the peak voltage during the conduction of the first switch Q1. When the first switch Q1 is turned on, the current rises to its peak value, and the voltage across the corresponding current sampling resistor R1 also reaches its peak value. The sixth diode D6 charges the fifth capacitor C5 to this peak voltage and holds it. The sampling control switch of the second switch Q2 is controlled by the DSP: when a peak value needs to be read, the DSP controls the sampling control switch Q2 to turn on, sending the peak voltage signal stored in the fifth capacitor C5 to the DSP's sampling port. When the MOSFET is turned on, its current flows through the current sampling resistor R1, generating a voltage signal. This signal charges the fifth capacitor C5 through the sixth diode D6. The voltage of the fifth capacitor C5 is latched into the voltage value corresponding to the peak value of the current of the first switch Q1. The peak voltage signal stored in the fifth capacitor C5 is sent to the DSP's sampling channel, and the DSP calculates the current value.

[0067] Based on this, this application provides a method for optimizing power conversion efficiency, which will be described in detail below with reference to the accompanying drawings.

[0068] Please see Figure 2 , Figure 2 This is a flowchart illustrating a method for optimizing power conversion efficiency provided in an embodiment of this application. The method is applied to the control circuit module of a single-ended primary inductor converter circuit system. The single-ended primary inductor converter circuit system further includes a current acquisition circuit module and a single-ended primary inductor converter circuit module. The control circuit module is connected to both the current acquisition circuit module and the single-ended primary inductor converter circuit module. Figure 2 As shown, the method includes:

[0069] S210, Obtain the circuit parameter set, which includes at least the operating parameters of the circuit components and the circuit switching frequency parameters.

[0070] Among them, the circuit switching frequency parameter is used to determine the specific switching strategy of the switching transistor, and the circuit switching frequency parameter corresponds to the control... Figure 1b The switching frequency parameters of the first switching transistor Q1 in the embodiment. The operating parameters of the circuit components include the third inductor Lm and the first capacitor C1.

[0071] Specifically, the switching frequency parameters include the on-time Ton and off-time Toff of the first switching transistor Q1, as well as the preset maximum frequency limit fmax. Ton and Toff directly affect the efficiency of energy transfer, the energy storage and release process of the inductor.

[0072] S220, determine the initial time delay based on the operating parameters of the circuit components and the switching frequency parameters of the circuit.

[0073] Before the DSP performs dynamic adjustments, an initial delay is required, and the minimum step adjustment amount is added or subtracted based on this initial delay. Then, the changes in the peak current oscillation at the turn-on time of the switching transistor before and after adjustment are compared. The initial time delay can be calculated based on the operating parameters of the circuit components. Specifically, it can be assigned based on half the reciprocal of the oscillation frequency of the third inductor Lm and the first capacitor C1.

[0074] Example, initial delay The determination method can be based on the following formula:

[0075] .

[0076] In one possible embodiment, the initial delay includes a first initial delay or a second initial delay. Determining the initial delay based on the circuit component operating parameters and the circuit switching frequency parameters includes: based on Ton and Toff and The first initial delay is determined by the maximum frequency limit fmax. The method for determining the first initial delay is as follows: Based on the first initial delay, Ton, Toff, The current frequency value f can be determined using the following formula: Determine the relationship between the current frequency value f and the maximum frequency limit fmax. If the current operating frequency value f is much less than or equal to the maximum frequency limit fmax, indicating that the operation is at a low frequency, then the first initial delay is applied. As an initial delay, if the current operating frequency value f is close to the maximum frequency limit fmax, i.e., operating at a high frequency, the frequency is limited to the upper limit fmax, and the switching period is fixed. At this time, the period is fixed and the time delay is limited. It may not be possible to align with the first valley, resulting in hard switching. Then determine the second initial time delay and use the second initial time delay as the initial time delay. Specifically, the determination process of the second initial time delay includes: determining the extension value of the time delay based on the third inductor Lm and the first capacitor C1 through the following formula: ; determining the second initial time delay based on the extension value of the time delay and the first initial time delay. The determination process can be summation. For example: Second initial time delay = First initial time delay + ; Use the second initial time delay as the initial time delay.

[0077] It should be noted that to avoid frequent switching of the strategy at the critical point and improve stability, a hysteresis interval is introduced. The entry condition is when the frequency reaches fmax, and the exit condition is when the frequency drops to f1, where f1 < fmax, and f1 is determined according to actual tests and usually has a certain margin.

[0078] It can be seen that in this embodiment, by considering different conduction situations that may occur when the first switch Q1 operates at high frequencies due to different frequency values, the optimal valley conduction of the switch tube of the BCM-sepic single-stage topology under different device differences is achieved, eliminating the efficiency differences and reliability risks between different modules caused by the differences.

[0079] S230. Obtain multiple step current values based on the initial time delay and the preset step time delay. Each step current value is the current parameter corresponding to the time period after each step of the initial time delay. The multiple step current values are based on the current signals from the current acquisition circuit module.

[0080] Among them, the preset step time delay refers to a preset and fixed time increment. This preset step time delay can be the preferred step duration set by technicians based on different application scenarios and is not limited here. Increase or decrease the time delay by this fixed value based on the initial time delay to move to the next measurement time point. Here, the time period refers to the specific moment corresponding to each step or a short measurement time window. The step current value is the numerical value of the current parameter measured and recorded within each step time period generated by the step. The multiple step current values are arranged in chronological order to form a curve or data set of current changing with time.

[0081] In one possible embodiment, obtaining multiple step current values ​​based on the initial delay and the preset step delay includes: determining a first delay and a second delay based on the initial delay and the preset step delay; controlling the target switch in the single-ended primary inductor converter circuit module to turn on and off respectively within the initial delay, the first delay, and the second delay, and obtaining multiple sets of sampled current values ​​corresponding to the initial delay, the first delay, and the second delay, respectively, each set of sampled current values ​​corresponding to the initial delay, the first delay, and the second delay; determining the multiple step current values ​​based on each set of sampled current values, each step current value corresponding to a set of sampled current values.

[0082] Specifically, based on a preset initial delay and a preset step delay, subsequent step delay points are calculated. Specifically: the first delay is the delay point forward in the timing sequence.

[0083] ; ;

[0084] By analogy, more delay points can be generated. The target switch, i.e., the first switch Q1, in the single-ended primary inductor converter circuit module is controlled to switch according to a given duty cycle. Within each test cycle, the current acquisition circuit module performs high-speed sampling of the current to obtain a set of sampled current values ​​that vary over time. Thus, corresponding values ​​are obtained. , , The system generates three sets of sampled current values. Based on these three sets, at least one sampled current value from each set is statistically calculated to obtain a current value corresponding to each set, i.e., a step current value. This step current value can be the peak current statistical value of that set of sampled currents within one switching cycle.

[0085] For example, the above process of statistically calculating at least one sampled current value in each of the three groups of sampled current values ​​can be to calculate the average value to obtain the average current value, or it can be other calculations to obtain the overall characteristics of the current, which are not limited here.

[0086] As can be seen, in this embodiment, each time delay parameter is applied individually and complete current data is collected in adjacent independent test cycles, ensuring the uniformity of measurement conditions and the accuracy of data, which can improve the accuracy of the target conduction time calculation.

[0087] In one possible embodiment, the multiple sets of sampled current values ​​include a first set of sampled current values, a second set of sampled current values, and a third set of sampled current values. Controlling the target switch in the single-ended primary inductor converter circuit module to turn on and off within the initial delay, the first delay, and the second delay, and acquiring the multiple sets of sampled current values ​​corresponding to the initial delay, the first delay, and the second delay, respectively, includes: controlling the target switch in the single-ended primary inductor converter circuit module to turn on and off within the initial delay and acquiring the first set of sampled current values ​​within a preset voltage range; adjusting the delay from the initial delay to the first delay; controlling the target switch in the single-ended primary inductor converter circuit module to turn on and off within the first delay and acquiring the second set of sampled current values ​​within the preset voltage range; adjusting the delay from the first delay to the second delay; controlling the target switch in the single-ended primary inductor converter circuit module to turn on and off within the second delay and acquiring the third set of sampled current values ​​within the preset voltage range.

[0088] Specifically, a control signal is configured to cause the target switch, namely the first switch Q1, in the single-ended primary inductor converter circuit module to, based on the initial delay. Periodic on / off operations are performed. In this configuration, the current signal in the circuit is sampled, but the sampling action is strictly limited to a preset input voltage range. For example, in this embodiment, the preset input voltage range is Vin1 to Vin2. The sampled current value, i.e., the first set of sampled current values, is obtained within this input voltage range. The input voltage range is the sampling window defined by any two selected instantaneous values ​​in the input voltage waveform. The control timing is adjusted from the initial delay. Change to the first delay The first switch Q1 is obtained in the first time delay. The sampling current within the preset voltage range is switched on and off, i.e., the second set of sampled current values. The control timing is then adjusted from the initial delay. Change to the second delay The first switch Q1 is obtained in the second time delay. The sampling current within the preset voltage range is switched on and off, which is the third set of sampling current values.

[0089] As can be seen, in this embodiment, by strictly limiting the current sampling to a fixed preset input voltage range, this implementation method effectively eliminates the interference of input voltage fluctuations on the measurement results, and ensures that multiple sets of current data obtained under different time delay parameters have high comparability and accuracy.

[0090] S240, a target delay is determined based on the multiple step current values. The target delay is the delay corresponding to the peak value of the oscillating current. The peak value of the oscillating current is the maximum or maximum value of the positive or negative current parameters. The target delay is used to change the target switching point of the single-ended primary inductor converter circuit system, improve the power conversion efficiency, and eliminate the efficiency difference and reliability risk between different modules caused by the difference.

[0091] In this process, a one-to-one mapping relationship is established between the multiple step current values ​​obtained in the previous steps and their corresponding time delays, i.e., the initial time delay, the first time delay, the second time delay, etc., forming a set of time delay and step current value data pairs. The data pairs of time delay and step current values ​​are analyzed to determine the step current value with extreme value characteristics, i.e., the peak value of the oscillating current. This peak value is the absolute maximum or local maximum value in the positive or negative direction when the switch is switching. Specific identification methods can include traversing all step current values ​​and finding the maximum or minimum value through numerical comparison; or locating the peak or trough inflection point on the plotted time-delay current relationship curve. The time delay mapped to the identified peak value of the oscillating current is determined as the target time delay. In this way, by accurately aligning the switching point of the switch with or avoiding the peak moment of current oscillation, switching losses or conduction losses can be significantly reduced.

[0092] In one possible embodiment, please refer to Figure 3 , Figure 3 This is a schematic diagram of the dynamic adjustment process of a power conversion efficiency optimization method provided in this application embodiment. The absolute value of the second delay is greater than the absolute value of the first delay in time sequence, and the absolute value of the first delay is greater than the absolute value of the initial delay in time sequence. Multiple step current values ​​include a first current step value, a second current step value, and a third current step value. The first current step value corresponds to the initial delay, the second current step value corresponds to the first delay, and the third current step value corresponds to the second delay. Determining the target delay based on the multiple step current values ​​includes: determining the initial delay. First delay Second delay , and, corresponding to the initial delay First delay Second delay The first step current value during x consecutive switch turn-on times. Second step current value Third step current value Determine whether it satisfies If so, then the first delay is determined to be the target delay. If not, then increase by n+1 and repeat the loop, where, , where n is an integer greater than or equal to 0.

[0093] In one possible embodiment, the absolute value of the second delay is sequentially greater than the absolute value of the first delay, and the absolute value of the first delay is sequentially greater than the absolute value of the initial delay. The plurality of step current values ​​includes a first current step value, a second current step value, and a third current step value. The first current step value corresponds to the initial delay, the second current step value corresponds to the first delay, and the third current step value corresponds to the second delay. Determining the target delay based on the plurality of step current values ​​includes: determining whether the second current step value is less than the first current step value and less than the third current step value; if so, then determining the first delay as the target delay; if not, then if the second current step value is greater than the first current step value and less than the third current step value... If the third current step value is given, then multiple first-type delay groups are determined based on the initial delay and the preset step delay. If the second current step value is less than the first current step value and greater than the third current step value, then multiple second-type delay groups are determined based on the initial delay and the preset step delay. The first-type delay groups are multiple delays obtained by stepping down the preset step delay on the initial delay, and the second-type delay groups are multiple delays obtained by stepping up the preset step delay on the initial delay. Multiple sets of negative sampling current values ​​are determined based on the first-type delay groups, and the target delay is determined based on each set of negative sampling current values; or, multiple sets of positive sampling current values ​​are determined based on the second-type delay groups, and the target delay is determined based on each set of positive sampling current values.

[0094] Among them, determining whether it satisfies If so, then the first delay is determined to be the target delay. Specifically, preferably, the first delay is input as... The target delay.

[0095] If not satisfied This can be divided into two cases: further adjusting the initial delay negatively based on the step delay, and further adjusting the initial delay positively based on the step delay. It's understandable that adjusting to the positive direction... Adjust to negative .

[0096] Wherein, if the second current step value is greater than the first current step value and less than the third current step value, that is... A negative adjustment is then performed, similar to the initial adjustment, by reducing the step delay based on the initial delay to obtain a first-type delay group. For example, the first-type delay group may include multiple... ,For example, , , … .

[0097] Wherein, the second current step value is less than the first current step value and greater than the third current step value, that is... A positive adjustment is then performed, similar to the initial adjustment, by adding a step delay to the initial delay to obtain a second type of delay group. For example, the second type of delay group may include multiple... ,For example, , , … .

[0098] Similar to the initial determination, determining multiple sets of negative sampled current values ​​based on the first type of time delay group includes: acquiring multiple sampled current values ​​corresponding to each time delay in each first type of time delay group; performing statistical calculations based on the multiple sampled current values ​​to determine multiple sampled current statistical values; and obtaining the step current value. Specifically, , , … These correspond to the negative second step current values ​​respectively. Negative third step current value Negative fourth step current value ..., negative nth step current value .

[0099] Similar to the initial determination, determining multiple sets of forward sampling current values ​​based on the second type of time delay group includes: acquiring multiple sampling current values ​​corresponding to each time delay in each second type of time delay group; performing statistical calculations based on the multiple sampling current values ​​to determine multiple sampling current statistical values; and obtaining the step current value. Specifically, , , … These correspond to the second forward step current values, respectively. Forward third step current value Forward fourth step current value ..., forward nth step current value .

[0100] Determining the target time delay based on each group of negative sampled current values ​​includes: determining whether the following conditions are met. If so, then determine the stated The corresponding (n-1)th delay is the target delay. Specifically, preferably, the input of the (n-1)th delay is... The target delay.

[0101] Determining the target time delay based on each group of forward sampled current values ​​includes: determining whether the target time delay is satisfied. If so, then determine the stated The corresponding (n-1)th delay is the target delay. Specifically, preferably, the input of the (n-1)th delay is... The target delay.

[0102] As can be seen, in this embodiment, a two-way probing strategy starting from the initial delay is adopted. The possible location of the optimal delay is intelligently determined through three initial measurements, and a targeted and refined search is performed accordingly. This avoids the resource consumption of full-range scanning and greatly improves the search speed and accuracy of finding the optimal switching sequence and thus improving system efficiency.

[0103] In one possible embodiment, the single-ended primary inductor converter circuit module includes a single-ended primary inductor converter circuit module with single-phase AC input or a single-ended primary inductor converter circuit module with single-phase DC input. Each group of sampled current values ​​includes at least two oscillating current values. Determining the plurality of step current values ​​based on each group of sampled current values ​​includes: performing statistical calculations based on each group of sampled current values ​​to determine a plurality of sampled current statistical values, wherein the statistical calculations include averaging, and the sampled current statistical values ​​include the average of the sampled currents; and determining the plurality of step current values ​​based on the sampled current statistical values.

[0104] The single-ended primary inductor converter circuit module can be a SEPIC circuit module with a single-phase AC input and a rectifier bridge at the front end, or a SEPIC circuit module with a single-phase DC input directly connected to a DC power supply. This method is applicable to circuits with both of these input forms.

[0105] In the current acquisition process, corresponding to each set time delay, for example, an initial time delay, a first time delay, and a second time delay, each group of sampled current values ​​acquired includes at least two oscillating current values. These oscillating current values ​​are current values ​​acquired during the preset voltage window within one or multiple on / off cycles of the first switching transistor Q1. Where each acquired group contains multiple oscillating current values, determining multiple step current values ​​based on each group of sampled current values ​​includes: performing statistical calculations on the multiple oscillating current values ​​within each group to calculate a statistically representative sampled current statistical value. In this embodiment, the statistical calculation is preferably the arithmetic mean. The calculated sampled current statistical values, i.e., the average sampled current values ​​of each group, are directly used or further processed as the multiple step current values.

[0106] As can be seen, by averaging the multiple oscillation current values ​​collected at each time delay point, this implementation method effectively smooths out the noise and random interference that may exist in a single sampling, making the step current value used for analysis more representative and stable, thereby improving the accuracy and reliability of subsequent determination of the target time delay.

[0107] In one possible embodiment, please refer to Figure 4 , Figure 4 This is a schematic diagram of the preset voltage range of a single-ended primary inductor converter circuit module with AC input provided in an embodiment of this application. The input voltage after the rectifier bridge is sampled as a wavy line. The preset voltage range is exemplified by the voltage values ​​of Vin1 and Vin2. In each cycle, for example, cycles 1, 2, and 3 are all within Vin1 and Vin2.

[0108] In one possible embodiment, please refer to Figure 5 , Figure 5 This is a flowchart illustrating the power conversion efficiency optimization method for a single-ended primary inductor converter circuit module with single-phase AC input provided in this application embodiment. For the single-ended primary inductor converter circuit module with single-phase AC input, the relationship between the current frequency value f and the maximum frequency limit fmax is first determined. If the current frequency value f is less than or equal to the maximum frequency limit fmax, then a first initial delay is used. As the initial delay.

[0109] First initial delay The first set of sampled current values ​​is obtained by taking the peak current oscillations Ip1, Ip2...Ipn at the turn-on time of the switching transistor within n switching cycles of a preset voltage range. An example of the preset voltage range is the Vin1 and Vin2 voltage values. The average value is then taken to obtain the first current step value. Subsequently based on the initial delay Adjusting the step current value Each time increase or decrease Within the same input voltage value, according to the same The second current step value is obtained by taking the average of the peak values ​​of the switching current oscillation within period 2, denoted as . Then increase Similarly, the average value within period 3 is used to obtain the third current step value, denoted as... .

[0110] Among them, determining whether it satisfies If so, then the first delay is determined to be the target delay. Specifically, preferably, the first delay is input as... The target delay.

[0111] If not satisfied This can be divided into two cases: further adjusting the initial delay negatively based on the step delay, and further adjusting the initial delay positively based on the step delay. It's understandable that adjusting to the positive direction... Adjust to negative .

[0112] Wherein, if the second current step value is greater than the first current step value and less than the third current step value, that is... A negative adjustment is then performed, similar to the initial adjustment, by reducing the step delay based on the initial delay to obtain a first-type delay group. For example, the first-type delay group may include multiple... ,For example, , , … .

[0113] Wherein, the second current step value is less than the first current step value and greater than the third current step value, that is... A positive adjustment is then performed, similar to the initial adjustment, by adding a step delay to the initial delay to obtain a second type of delay group. For example, the second type of delay group may include multiple... ,For example, , , … .

[0114] Similar to the initial determination, determining multiple sets of negative sampled current values ​​based on the first type of time delay group includes: acquiring multiple sampled current values ​​corresponding to each time delay in each first type of time delay group; performing statistical calculations based on the multiple sampled current values ​​to determine multiple sampled current statistical values; and obtaining the step current value. Specifically, , , … These correspond to the negative second step current values ​​respectively. Negative third step current value Negative fourth step current value ..., negative nth step current value .

[0115] Similar to the initial determination, determining multiple sets of forward sampling current values ​​based on the second type of time delay group includes: acquiring multiple sampling current values ​​corresponding to each time delay in each second type of time delay group; performing statistical calculations based on the multiple sampling current values ​​to determine multiple sampling current statistical values; and obtaining the step current value. Specifically, , , … These correspond to the second forward step current values, respectively. Forward third step current value Forward fourth step current value ..., forward nth step current value .

[0116] Determining the target time delay based on each group of negative sampled current values ​​includes: determining whether the following conditions are met. If so, then determine the stated The corresponding (n-1)th delay is the target delay. Specifically, preferably, the input of the (n-1)th delay is... The target time delay is determined. If not, the process repeats to the steps described above, which determine multiple sets of negative sampling current values ​​based on the first type of time delay group, until the target time delay is met. .

[0117] Determining the target time delay based on each group of forward sampled current values ​​includes: determining whether the target time delay is satisfied. If so, then determine the stated The corresponding (n-1)th delay is the target delay. Specifically, preferably, the input of the (n-1)th delay is... The target time delay is determined. If not, the process repeats to the steps described above for determining multiple sets of forward sampling current values ​​based on the second type of time delay group, until the target time delay is met. .

[0118] As can be seen, in this embodiment, a two-way probing strategy starting from the initial delay is adopted. The possible location of the optimal delay is intelligently determined through three initial measurements, and a targeted and refined search is performed accordingly. This avoids the resource consumption of full-range scanning and greatly improves the search speed and accuracy of finding the optimal switching sequence and thus improving system efficiency.

[0119] In one possible embodiment, please refer to Figure 6 , Figure 6 This is a flowchart illustrating the second method for optimizing the power conversion efficiency of a single-ended primary inductor converter circuit module with single-phase AC input provided in this application embodiment. If the current operating frequency value f is close to the maximum frequency limit fmax, i.e., it is operating at a high frequency, it is determined whether... If yes, then determine the second initial delay and use the second initial delay as the initial delay, and execute the AND operation; otherwise, end the process, as a fault may exist. (Second initial delay) The first set of sampled current values ​​is obtained by taking the peak values ​​of the current oscillation at the turn-on time of the switching transistor within n switching cycles of a preset voltage range, i.e., the first set of sampled current values. An example of the preset voltage range is the Vin1 and Vin2 voltage values. The average value is then taken to obtain the first current step value. Subsequently based on the initial delay Adjusting the step current value Each time increase or decrease Within the same input voltage value, according to the same The second current step value is obtained by taking the average of the peak values ​​of the switching current oscillation within period 2, denoted as . Then add The third current step value is obtained by taking the average value within a period of 3 in the same way, and is denoted as... .

[0120] Among them, determining whether it satisfies If so, then the first delay is determined to be the target delay. Specifically, preferably, the first delay is input as... The target delay.

[0121] If not satisfied This can be divided into two cases: further adjusting the initial delay negatively based on the step delay, and further adjusting the initial delay positively based on the step delay. It's understandable that adjusting to the positive direction... Adjust to negative .

[0122] Wherein, if the second current step value is greater than the first current step value and less than the third current step value, that is... A negative adjustment is then performed, similar to the initial adjustment, by reducing the step delay based on the initial delay to obtain a first-type delay group. For example, the first-type delay group may include multiple... ,For example, , , … .

[0123] Wherein, the second current step value is less than the first current step value and greater than the third current step value, that is... A positive adjustment is then performed, similar to the initial adjustment, by adding a step delay to the initial delay to obtain a second type of delay group. For example, the second type of delay group may include multiple... ,For example, , , … .

[0124] Similar to the initial determination, determining multiple sets of negative sampled current values ​​based on the first type of time delay group includes: acquiring multiple sampled current values ​​corresponding to each time delay in each first type of time delay group; performing statistical calculations based on the multiple sampled current values ​​to determine multiple sampled current statistical values; and obtaining the step current value. Specifically, , , … These correspond to the negative second step current values ​​respectively. Negative third step current value Negative fourth step current value ..., negative nth step current value .

[0125] Similar to the initial determination, determining multiple sets of forward sampling current values ​​based on the second type of time delay group includes: acquiring multiple sampling current values ​​corresponding to each time delay in each second type of time delay group; performing statistical calculations based on the multiple sampling current values ​​to determine multiple sampling current statistical values; and obtaining the step current value. Specifically, , , … These correspond to the second forward step current values, respectively. Forward third step current value Forward fourth step current value ..., forward nth step current value .

[0126] Determining the target time delay based on each group of negative sampled current values ​​includes: determining whether the following conditions are met. If so, then determine the stated The corresponding (n-1)th delay is the target delay. Specifically, preferably, the input of the (n-1)th delay is... The target time delay is determined. If not, the process repeats to the steps described above, which determine multiple sets of negative sampling current values ​​based on the first type of time delay group, until the target time delay is met. .

[0127] Determining the target time delay based on each group of forward sampled current values ​​includes: determining whether the target time delay is satisfied. If so, then determine the stated The corresponding (n-1)th delay is the target delay. Specifically, preferably, the input of the (n-1)th delay is... The target time delay is determined. If not, the process repeats to the steps described above for determining multiple sets of forward sampling current values ​​based on the second type of time delay group, until the target time delay is met. .

[0128] As can be seen, in this embodiment, the method of determining the target time delay using a second initial time delay under high-frequency operation ensures the most critical soft-switching conditions, limits the highest frequency, and prevents out-of-range operation. This resolves the contradiction between frequency limitations and soft switching in high-frequency, high-efficiency power supply design without significantly increasing hardware cost and complexity. Furthermore, the bidirectional probing strategy starting from the initial time delay intelligently determines the possible location of the optimal time delay through three initial measurements and performs a targeted, refined search accordingly. This avoids the resource consumption of a full-range scan, significantly improving the search speed and accuracy for finding the optimal switching timing and thus enhancing system efficiency.

[0129] In one possible embodiment, the single-ended primary inductor converter circuit module includes a multi-phase AC input single-ended primary inductor converter circuit module, and the sampled current value includes multiple sub-phase sampled current values; if each phase circuit in the multi-phase AC input single-ended primary inductor converter circuit module is independent, determining the multiple step current values ​​based on each group of sampled current values ​​includes: for each phase sub-phase circuit, performing statistical operations based on each group of sub-phase sampled current values ​​to determine multiple sub-phase sampled current statistical values, the statistical operations including averaging, the sampled current statistical values ​​including the average of sampled currents; and for each phase sub-phase circuit, determining the multiple step current values ​​based on the sampled current statistical values.

[0130] Where each phase circuit in the multi-phase SEPIC circuit module is electrically and controllably independent—for example, each phase operates under independent closed-loop control and current sharing—the determination of multiple step current values ​​based on each set of sampled current values ​​includes: for each phase circuit, extracting the corresponding sub-phase sampled current value at each time delay point; performing statistical calculations on the set of sub-phase sampled current values ​​obtained for that phase at each time delay point (in this embodiment, calculating the arithmetic mean), and calculating the statistical value of the sub-phase sampled current at that time delay point, i.e., the mean sub-phase sampled current); then, determining all the statistical values ​​of the sub-phase sampled current obtained for that phase at each time delay point as multiple step current values ​​corresponding to that phase. Finally, the system will obtain multiple sets of step current value sequences, the same number as the number of phases.

[0131] In particular, for multi-channel parallel single-ended primary inductor converter circuit modules with multi-phase AC input, there will be consistency differences between each channel. To address this, if the switching transistor drive control for each channel is independent, each channel can be used independently. Figure 2 , Figure 5 , Figure 6 The implementation example includes some or all of the method steps for dynamically adjusting the step current value. Please refer to the detailed steps. Figure 2 , Figure 5 , Figure 6Some or all of the method steps corresponding to the embodiments will not be repeated here.

[0132] Furthermore, in one possible embodiment, the single-ended primary inductor converter circuit module includes a multi-phase AC input single-ended primary inductor converter circuit module, and the sampled current value includes multiple sub-phase sampled current values; if each phase circuit in the multi-phase AC input single-ended primary inductor converter circuit module is associated, determining the multiple step current values ​​based on each group of sampled current values ​​includes: performing statistical calculations based on the multiple sub-phase sampled current values ​​to determine multiple sub-phase sampled current statistical values, the statistical calculations including averaging, the sampled current statistical values ​​including the average of the sampled currents; and determining the multiple step current values ​​based on the multiple sub-phase sampled current values.

[0133] If the phase circuits in the multiphase phase circuit module are strongly correlated in terms of control, for example, using master-slave control and sharing the same time-delay control signal for synchronization modulation, then determining multiple step current values ​​based on each set of sampled current values ​​includes: at each time delay point, aggregating multiple sub-phase sampled current values ​​from all phase circuits into a unified dataset; performing statistical operations on this unified dataset at the time delay point, again taking the arithmetic mean as an example, the unified dataset contains data from all phases, calculating a global sub-phase sampled current statistical value, i.e., the global sampled current mean. These global statistical values ​​obtained at each time delay point are determined as multiple step current values. Finally, only one set of step current value sequences representing the overall current characteristics of the entire multiphase system is obtained.

[0134] If the drive control of each switch in a multi-phase parallel single-ended primary inductor converter circuit module is correlated, it is not possible to ensure that each switch is at the optimal valley conduction point. However, it is possible to achieve the average optimal valley conduction for the entire module. That is, the dynamic adjustment of the step current value can meet the module efficiency optimization.

[0135] The instantaneous input voltage of the BCM-sepic circuit with different line voltages differs from the switching frequency of the switching transistors. Therefore, it's not feasible to simply average the peak oscillation current at the turn-on moment of the first switching transistor Q1 in all circuits and then compare it to dynamically adjust the time delay. However, the drive control of multiple parallel BCM-sepic circuits under the same line voltage input is consistent, so averaging can be performed for multiple circuits with different line voltage inputs. When different line voltages are applied, the parallel circuits are grouped according to the input line voltage, with each phase forming a group. This ensures that the comparison range of the oscillation current peak at the turn-on moment of the switching transistors is the same, and the trend of the current peak changes is also the same. Therefore, the oscillation current at the turn-on moment of each switching transistor in the same phase is sampled and averaged before execution. Figure 2 , Figure 5 , Figure 6 By dynamically adjusting the step current value in some or all of the method steps corresponding to the embodiment, it is possible to ensure that the switching transistors of all paths under each phase are at the overall optimal valley conduction point. Please refer to the specific steps. Figure 2 , Figure 5 , Figure 6 Some or all of the method steps corresponding to the embodiments will not be repeated here.

[0136] Please refer to Figure 7 , Figure 7 This is a sampling schematic diagram of a single-ended primary inductor converter circuit module with multiphase AC input provided in an embodiment of this application. Figure 7 As shown, in the case of multiphase AC input, the multiphase AC source serves as the power input for the entire system. The multiphase AC source connects to multiple parallel BCM-sepic modules, including BCM-sepic-1, BCM-sepic-2…BCM-sepic-n. Each BCM-sepic module is connected to a data acquisition circuit module to collect operating data such as voltage and current. The aforementioned multiphase AC source includes a three-phase AC source. These sampled signals are ultimately aggregated to the control circuit module, i.e., the DSP, which controls, regulates, and manages all parallel BCM-sepic modules, i.e., BCM-sepic-1, BCM-sepic-2…BCM-sepic-n.

[0137] As can be seen, this embodiment provides differentiated and highly adaptable data processing paths for the two working modes in multi-phase situations. When the phase circuits are independent, the performance of each phase is optimized, and when the phase circuits are interconnected, the overall state is grasped. This ensures that key features can be accurately extracted under different architectures, eliminating efficiency differences and reliability risks between different modules caused by differences.

[0138] In one possible embodiment, the single-ended primary inductor converter circuit module includes a single-ended primary inductor converter circuit module with a single DC input. Under DC input, the switching frequency of the first switching transistor Q1 is fixed under constant input and output voltages. The peak value of the oscillating current at each switching transistor turn-on moment is very close. When the output voltage remains constant, the Ton and Toff of the switching transistor are constant, and the switching frequency is also constant. Therefore, it is not necessary to determine the sampling and calculation range based on a preset voltage range; it is only necessary to sample in segments based on the number of times the switching transistor is turned on. The rest is the same as in the single-phase AC input case. Figure 2 , Figure 5 , Figure 6 The corresponding implementation methods are the same.

[0139] In one possible embodiment, the single-ended primary inductor converter circuit module includes a single-ended primary inductor converter circuit module with multiple parallel DC inputs. If the DC inputs are multiple in parallel, they are grouped according to the drive control. The rest is consistent with the embodiment in the multi-phase AC case, that is, it also satisfies... Figure 2 , Figure 5 , Figure 6 The corresponding implementation examples.

[0140] In one possible embodiment, please refer to Figure 8 , Figure 8 This is a sampling schematic diagram of a DC-input single-ended primary inductor converter circuit module provided in an embodiment of this application, as shown below. Figure 8 As shown, the sampled current values ​​are obtained within x consecutive switching transistor turn-on times, i.e., the first set of sampled current values. The control timing is adjusted from the initial delay. Change to the first delay The first switch Q1 is obtained in the first time delay. The sampling current within the preset voltage range is switched on and off, i.e., the second set of sampled current values. The control timing is then adjusted from the initial delay. Change to the second delay The first switch Q1 is obtained in the second time delay. Sample the current within the preset voltage range during switching, i.e., the third set of sampled current values. Determine the initial time delay. First delay Second delay , and, corresponding to the initial delay First delay Second delay The first step current value within the preset voltage range Second step current value Third step current value Determine if the condition is met. If so, then the first delay is determined to be the target delay. Specifically, preferably, the first delay is input as... The target delay.

[0141] If not satisfied This can be divided into two cases: further adjusting the initial delay negatively based on the step delay, and further adjusting the initial delay positively based on the step delay. It's understandable that adjusting to the positive direction... Adjust to negative .

[0142] Wherein, if the second current step value is greater than the first current step value and less than the third current step value, that is... A negative adjustment is then performed, similar to the initial adjustment, by reducing the step delay based on the initial delay to obtain a first-type delay group. For example, the first-type delay group may include multiple... ,For example, , , … .

[0143] Wherein, the second current step value is less than the first current step value and greater than the third current step value, that is... A positive adjustment is then performed, similar to the initial adjustment, by adding a step delay to the initial delay to obtain a second type of delay group. For example, the second type of delay group may include multiple... ,For example, , , … .

[0144] Similar to the initial determination, determining multiple sets of negative sampled current values ​​based on the first type of time delay group includes: acquiring multiple sampled current values ​​corresponding to each time delay in each first type of time delay group; performing statistical calculations based on the multiple sampled current values ​​to determine multiple sampled current statistical values; and obtaining the step current value. Specifically, , , … These correspond to the negative second step current values ​​respectively. Negative third step current value Negative fourth step current value ..., negative nth step current value .

[0145] Similar to the initial determination, determining multiple sets of forward sampling current values ​​based on the second type of time delay group includes: acquiring multiple sampling current values ​​corresponding to each time delay in each second type of time delay group; performing statistical calculations based on the multiple sampling current values ​​to determine multiple sampling current statistical values; and obtaining the step current value. Specifically, , , … These correspond to the second forward step current values, respectively. Forward third step current value Forward fourth step current value ..., forward nth step current value .

[0146] Determining the target time delay based on each group of negative sampled current values ​​includes: determining whether the following conditions are met. If so, then determine the stated The corresponding (n-1)th delay is the target delay. Specifically, preferably, the input of the (n-1)th delay is... The target time delay is determined. If not, the process repeats to the steps described above, which determine multiple sets of negative sampling current values ​​based on the first type of time delay group, until the target time delay is met. .

[0147] Determining the target time delay based on each group of forward sampled current values ​​includes: determining whether the target time delay is satisfied. If so, then determine the stated The corresponding (n-1)th delay is the target delay. Specifically, preferably, the input of the (n-1)th delay is... The target time delay is determined. If not, the process repeats to the steps described above for determining multiple sets of forward sampling current values ​​based on the second type of time delay group, until the target time delay is met. .

[0148] As can be seen, in this embodiment, in the case of a DC single-ended primary inductor converter circuit module, a bidirectional probing strategy starting from the initial time delay is adopted. The possible location of the optimal time delay is intelligently determined through three initial measurements, and a directional fine-grained search is performed accordingly. This avoids the resource consumption of full-range scanning and greatly improves the search speed and accuracy of finding the optimal switching sequence and thus improving system efficiency.

[0149] As can be seen, by implementing the embodiments of this application, a circuit parameter set is obtained, which includes at least the operating parameters of the circuit components and the circuit switching frequency parameters; an initial time delay is determined based on the operating parameters of the circuit components and the circuit switching frequency parameters; multiple step current values ​​are obtained based on the initial time delay and a preset step time delay, each step current value being a current parameter corresponding to the time period after each step of the initial time delay, and the multiple step current values ​​being based on the current signal from the current acquisition circuit module; a target time delay is determined based on the multiple step current values, the target time delay being the time delay corresponding to the peak value of the oscillating current, and the peak value of the oscillating current being the positive or negative maximum or maximum value among the current parameters. Thus, different target time delays can be determined based on the obtained current parameters in various module scenarios. This target time delay can change the target switching point of different types of single-ended primary inductor converter circuit systems, improving power conversion efficiency and eliminating efficiency differences and reliability risks between different modules caused by variations.

[0150] Please see Figure 9 , Figure 9This is a schematic diagram of a power conversion efficiency optimization device proposed in an embodiment of this application. The device is applied to the control circuit module of a single-ended primary inductor converter circuit system. The single-ended primary inductor converter circuit system further includes a current acquisition circuit module and a single-ended primary inductor converter circuit module. The control circuit module is connected to the current acquisition circuit module and the single-ended primary inductor converter circuit module. Figure 9 As shown, the power conversion efficiency optimization device 900 includes: a data acquisition unit 910, a first determination unit 920, a second determination unit 930, and a third determination unit 940. The data acquisition unit 910 is used to acquire a circuit parameter set, which includes at least circuit component operating parameters and circuit switching frequency parameters. The first determination unit 920 is used to determine an initial time delay based on the circuit component operating parameters and the circuit switching frequency parameters. The second determination unit 930 is used to acquire multiple step current values ​​based on the initial time delay and a preset step time delay, each of the step current values ​​being the initial time delay. The initial delay is determined by the current parameters corresponding to the time period after each step, wherein the multiple step current values ​​are based on the current signal from the current acquisition circuit module; the third determining unit 940 is used to determine the target delay based on the multiple step current values, wherein the target delay is the delay corresponding to the peak value of the oscillating current, wherein the peak value of the oscillating current is the positive or negative maximum or maximum value among the current parameters, and the target delay is used to change the target switching point of the single-ended primary inductor converter circuit system, thereby improving the power conversion efficiency and eliminating the efficiency differences and reliability risks between different modules caused by differences.

[0151] In one possible embodiment, the second determining unit 930, in acquiring multiple step current values ​​based on the initial delay and the preset step delay, is specifically used for:

[0152] The first delay and the second delay are determined based on the initial delay and the preset step delay;

[0153] The target switch in the single-ended primary inductor converter circuit module is controlled to turn on and off during the initial delay, the first delay, and the second delay, respectively, and multiple sets of sampled current values ​​corresponding to the initial delay, the first delay, and the second delay are obtained, with each set of sampled current values ​​corresponding to the initial delay, the first delay, and the second delay, respectively.

[0154] The plurality of step current values ​​are determined based on each set of sampled current values, wherein each step current value corresponds to a set of sampled current values.

[0155] In one possible embodiment, the multiple sets of sampled current values ​​include a first set of sampled current values, a second set of sampled current values, and a third set of sampled current values; the second determining unit 930, in controlling the target switch in the single-ended primary inductor converter circuit module to turn on and off respectively during the initial delay, the first delay, and the second delay, and acquiring the multiple sets of sampled current values ​​corresponding to the initial delay, the first delay, and the second delay respectively, is specifically used for:

[0156] The target switch in the single-ended primary inductor converter circuit module is controlled to turn on and off within the initial time delay, and the first set of sampled current values ​​within the preset voltage range is obtained.

[0157] The adjustment delay is changed from the initial delay to the first delay;

[0158] Control the target switch in the single-ended primary inductor converter circuit module to turn on and off within the first time delay, and obtain the second set of sampled current values ​​within the preset voltage range;

[0159] The time delay is adjusted from the first time delay to the second time delay;

[0160] The target switch in the single-ended primary inductor converter circuit module is controlled to turn on and off within the second time delay, and a third set of sampled current values ​​within the preset voltage range are obtained.

[0161] In one possible embodiment, the absolute value of the second delay is sequentially greater than the absolute value of the first delay, and the absolute value of the first delay is sequentially greater than the absolute value of the initial delay. The plurality of step current values ​​includes a first current step value, a second current step value, and a third current step value. The first current step value corresponds to the initial delay, the second current step value corresponds to the first delay, and the third current step value corresponds to the second delay. The third determining unit 940, in determining the target delay based on the plurality of step current values, is specifically used for:

[0162] Determine whether the second current step value is less than the first current step value and less than the third current step value. If so, determine that the first delay is the target delay.

[0163] If not, then if the second current step value is greater than the first current step value and less than the third current step value, then multiple first-type delay groups are determined based on the initial delay and the preset step delay; if the second current step value is less than the first current step value and greater than the third current step value, then multiple second-type delay groups are determined based on the initial delay and the preset step delay; the first-type delay groups are multiple delays obtained by stepping down the preset step delay on the initial delay, and the second-type delay groups are multiple delays obtained by stepping up the preset step delay on the initial delay;

[0164] Multiple sets of negative sampling current values ​​are determined based on the first type of delay group, and the target delay is determined based on each set of negative sampling current values; or, multiple sets of positive sampling current values ​​are determined based on the second type of delay group, and the target delay is determined based on each set of positive sampling current values.

[0165] In one possible embodiment, the single-ended primary inductor converter circuit module includes a multi-phase AC input single-ended primary inductor converter circuit module, and the sampled current value includes multiple sub-phase sampled current values; the second determining unit 930, in determining the multiple step current values ​​based on each group of the sampled current values, is specifically used for:

[0166] Multiple sampled current statistical values ​​are determined based on statistical calculations performed on each group of sampled current values. The statistical calculations include calculating the average value, and the sampled current statistical values ​​include the average sampled current value.

[0167] The plurality of step current values ​​are determined based on the statistical values ​​of the sampled current.

[0168] In one possible embodiment, the single-ended primary inductor converter circuit module includes a single-phase AC input single-ended primary inductor converter circuit module or a single-phase DC input single-ended primary inductor converter circuit module, and each group of sampled current values ​​includes at least two oscillating current values; if each phase circuit in the multi-phase AC input single-ended primary inductor converter circuit module is independent, the second determining unit 930, in determining the plurality of step current values ​​based on each group of sampled current values, is specifically used for:

[0169] For each phase sub-phase circuit, a plurality of sub-phase sampling current statistical values ​​are determined based on statistical calculations of the sampling current values ​​of each group of sub-phase circuits. The statistical calculations include averaging, and the sampling current statistical values ​​include the average of the sampling currents. For each phase sub-phase circuit, the plurality of step current values ​​are determined based on the sampling current statistical values.

[0170] In one possible embodiment, the single-ended primary inductor converter circuit module includes a multi-phase AC input single-ended primary inductor converter circuit module, and the sampled current value includes multiple sub-phase sampled current values; if each phase circuit in the multi-phase AC input single-ended primary inductor converter circuit module is associated, the second determining unit 930, in determining the multiple step current values ​​based on each group of sampled current values, is specifically used for:

[0171] Statistical calculations are performed on the multiple sub-phase sampled current values ​​to determine multiple sub-phase sampled current statistical values. The statistical calculations include averaging, and the sampled current statistical values ​​include the average of the sampled currents. The multiple step current values ​​are then determined based on the multiple sub-phase sampled current values.

[0172] It is worth noting that the specific functional implementation of the power conversion efficiency optimization device 900 can be found in [link to relevant documentation]. Figure 2 The description of the power conversion efficiency optimization method illustrates that, for example, data acquisition unit 910 is used to implement the relevant content of execution S210, first determining unit 920 is used to implement the relevant content of execution S220, second determining unit 930 is used to implement the relevant content of execution S230, and third determining unit 940 is used to implement the relevant content of execution S240. Each unit or module in the power conversion efficiency optimization device 900 can be individually or entirely merged into one or more other units or modules, or some of the units or modules can be further divided into multiple functionally smaller units or modules. This achieves the same operation without affecting the technical effect of the embodiments of the present invention. The above-mentioned units or modules are based on logical function division. In practical applications, the function of one unit (or module) is implemented by multiple units (or modules), or the function of multiple units (or modules) is implemented by one unit (or module).

[0173] As can be seen, the power conversion efficiency optimization device described in this application embodiment acquires a circuit parameter set, which includes at least circuit component operating parameters and circuit switching frequency parameters; determines an initial time delay based on the circuit component operating parameters and the circuit switching frequency parameters; acquires multiple step current values ​​based on the initial time delay and a preset step time delay, where each step current value is a current parameter corresponding to the time period after each step of the initial time delay, and the multiple step current values ​​are based on current signals from the current acquisition circuit module; and determines a target time delay based on the multiple step current values, where the target time delay corresponds to the peak value of the oscillating current, and the peak value of the oscillating current is the positive or negative maximum or maximum value among the current parameters. Thus, different target time delays can be determined based on the acquired current parameters in various module scenarios. This target time delay can change the target switching point of different types of single-ended primary inductor converter circuit systems, improving power conversion efficiency and eliminating efficiency differences and reliability risks between different modules caused by variations.

[0174] Please see Figure 10 , Figure 10 This is a schematic diagram of the structure of an electronic device proposed in an embodiment of this application, as shown below. Figure 10 As shown, the electronic device 1000 includes a processor 1010, a memory 1020, a communication interface 1030, and one or more programs 1021, which are stored in the memory 1020 and configured to be executed by the processor 1010.

[0175] The processor 1010, memory 1020, and communication interface 1030 are interconnected and perform communication with each other.

[0176] The memory 1020 can be a volatile memory such as dynamic random access memory (DRAM) or a non-volatile memory such as a hard disk drive (HDD). The memory 1020 stores a set of executable program code, and the processor 1010 calls one or more programs 1021 stored in the memory 1020 to execute some or all of the steps of any power conversion efficiency optimization method described in the above embodiments.

[0177] Among them, electronic devices 1000 may include smartphones (such as Android phones, iOS phones, Windows Phones, etc.), tablet computers, PDAs, dashcams, in-vehicle electronic devices, servers, laptops, mobile internet electronic devices (MIDs, Mobile Internet Devices) or wearable electronic devices (such as smartwatches, Bluetooth headsets), etc. The above are just examples and not an exhaustive list, including but not limited to the above electronic devices.

[0178] In the case of using integrated units, please refer to Figure 11 , Figure 11 This is a schematic diagram of another power conversion efficiency optimization device provided in an embodiment of this application, as shown below. Figure 11 As shown, the power conversion efficiency optimization device 900 includes a processing module 902 and a communication module 901. The processing module 902 controls and manages the operation of the power conversion efficiency optimization device 900, for example, executing the steps of the data acquisition unit 910, the first determination unit 920, the second determination unit 930, and the third determination unit 940, and / or performing other processes of the technology described herein. The communication module 901 is used for interaction between the power conversion efficiency optimization device 900 and other devices. Figure 11 As shown, the power conversion efficiency optimization device 900 may further include a storage module 903, which is used to store the program code and data of the power conversion efficiency optimization device 900.

[0179] The processing module 902 can be a processor or controller, such as a central processing unit (CPU), a general-purpose processor, a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA), or other programmable logic devices, transistor logic devices, hardware components, or any combination thereof. It can implement or execute various exemplary logic blocks, modules, and circuits described in conjunction with the disclosure of this application. The processor can also be a combination that implements computing functions, such as a combination of one or more microprocessors, a combination of a DSP and a microprocessor, etc. The communication module 901 can be a transceiver, RF circuitry, or a communication interface, etc. The storage module 903 can be a memory.

[0180] All relevant content in each scenario involved in the above method embodiments can be referenced from the functional descriptions of the corresponding functional modules, and will not be repeated here. The above-mentioned power conversion efficiency optimization device 900 can execute the power conversion efficiency optimization method of the above embodiments.

[0181] This application also provides a computer storage medium storing a computer program for electronic data interchange, which causes a computer to perform some or all of the steps of any of the methods described in the above method embodiments, wherein the computer includes an electronic device.

[0182] This application also provides a computer program product, which includes a non-transitory computer-readable storage medium storing a computer program operable to cause a computer to perform some or all of the steps of any of the methods described in the above method embodiments. The computer program product may be a software installation package, and the computer may include an electronic device.

[0183] It should be noted that, for the sake of simplicity, the foregoing method embodiments are all described as a series of actions. However, those skilled in the art should understand that this application is not limited to the described order of actions, as some steps may be performed in other orders or simultaneously according to this application. Furthermore, those skilled in the art should also understand that the embodiments described in the specification are preferred embodiments, and the actions and modules involved are not necessarily essential to this application.

[0184] In the above embodiments, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions in other embodiments.

[0185] In the several embodiments provided in this application, it should be understood that the disclosed apparatus can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of the units described above is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between devices or units may be electrical or other forms.

[0186] The units described above as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0187] Furthermore, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.

[0188] If the integrated units described above are implemented as software functional units and sold or used as independent products, they can be stored in a computer-readable storage device (CMD). Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a memory and includes several instructions to cause a computer electronic device (which may be a personal computer, electronic device, or network electronic device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this application. The aforementioned memory includes various media capable of storing program code, such as USB flash drives, read-only memory (ROM), random access memory (RAM), portable hard drives, magnetic disks, or optical disks.

[0189] Those skilled in the art will understand that all or part of the steps in the various methods of the above embodiments can be implemented by a program instructing related hardware. The program can be stored in a computer-readable storage device, which may include: a flash drive, a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk, etc.

[0190] The embodiments of this application have been described in detail above. Specific examples have been used to illustrate the principles and implementation methods of this application. The description of the above embodiments is only for the purpose of helping to understand the method and core ideas of this application. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the ideas of this application. Therefore, the content of this specification should not be construed as a limitation of this application.

Claims

1. A method for optimizing electrical energy conversion efficiency, characterized in that, A control circuit module is applied to a single-ended primary inductor converter circuit system, wherein the single-ended primary inductor converter circuit system further includes a current acquisition circuit module and a single-ended primary inductor converter circuit module, and the control circuit module is connected to the current acquisition circuit module and the single-ended primary inductor converter circuit module; the method includes: Obtain a circuit parameter set, which includes at least circuit element operating parameters and circuit switching frequency parameters; The initial time delay is determined based on the operating parameters of the circuit elements and the switching frequency parameters of the circuit. Multiple step current values ​​are obtained based on the initial delay and the preset step delay. Each step current value is a current parameter corresponding to the time period after each step of the initial delay. The multiple step current values ​​are based on the current signal from the current acquisition circuit module. Specifically, a first delay and a second delay are determined based on the initial delay and the preset step delay. The target switch in the single-ended primary inductor converter circuit module is controlled to turn on and off within the initial delay, the first delay, and the second delay, respectively, and multiple sets of sampled current values ​​corresponding to the initial delay, the first delay, and the second delay are obtained. Each set of sampled current values ​​corresponds to the initial delay, the first delay, and the second delay. The multiple step current values ​​are determined based on each set of sampled current values, and each step current value corresponds to one set of sampled current values. The target delay is determined based on the multiple step current values. The target delay is the delay corresponding to the peak value of the oscillating current. The peak value of the oscillating current is the maximum value of the positive or negative current parameters. The target delay is used to change the target switching point of the single-ended primary inductor converter circuit system, improve the power conversion efficiency, and eliminate the efficiency difference and reliability risk between different modules caused by the difference.

2. The method according to claim 1, characterized in that, The multiple sets of sampled current values ​​include a first set of sampled current values, a second set of sampled current values, and a third set of sampled current values; controlling the target switch in the single-ended primary inductor converter circuit module to turn on and off respectively within the initial delay, the first delay, and the second delay, and acquiring the multiple sets of sampled current values ​​corresponding to the initial delay, the first delay, and the second delay respectively, includes: The target switch in the single-ended primary inductor converter circuit module is controlled to turn on and off within the initial time delay, and the first set of sampled current values ​​within the preset voltage range is obtained. The adjustment delay is changed from the initial delay to the first delay; Control the target switch in the single-ended primary inductor converter circuit module to turn on and off within the first time delay, and obtain the second set of sampled current values ​​within the preset voltage range; The time delay is adjusted from the first time delay to the second time delay; The target switch in the single-ended primary inductor converter circuit module is controlled to turn on and off within the second time delay, and a third set of sampled current values ​​within the preset voltage range are obtained.

3. The method according to claim 2, characterized in that, The absolute value of the second delay is greater than the absolute value of the first delay in timing, and the absolute value of the first delay is greater than the absolute value of the initial delay in timing. Multiple step current values ​​include a first current step value, a second current step value, and a third current step value. The first current step value corresponds to the initial delay, the second current step value corresponds to the first delay, and the third current step value corresponds to the second delay. Determining the target delay based on the multiple step current values ​​includes: Determine whether the second current step value is less than the first current step value and less than the third current step value. If so, determine that the first delay is the target delay. If not, then if the second current step value is greater than the first current step value and less than the third current step value, then multiple first-type delay groups are determined based on the initial delay and the preset step delay; if the second current step value is less than the first current step value and greater than the third current step value, then multiple second-type delay groups are determined based on the initial delay and the preset step delay; the first-type delay groups are multiple delays obtained by stepping down the preset step delay on the initial delay, and the second-type delay groups are multiple delays obtained by stepping up the preset step delay on the initial delay; Multiple sets of negative sampling current values ​​are determined based on the first type of delay group, and the target delay is determined based on each set of negative sampling current values; or, multiple sets of positive sampling current values ​​are determined based on the second type of delay group, and the target delay is determined based on each set of positive sampling current values.

4. The method according to claim 1, characterized in that, The single-ended primary inductor converter circuit module includes a single-phase AC input single-ended primary inductor converter circuit module or a single-phase DC input single-ended primary inductor converter circuit module. Each group of sampled current values ​​includes at least two oscillating current values. Determining the plurality of step current values ​​based on each group of sampled current values ​​includes: Multiple sampled current statistical values ​​are determined based on statistical calculations performed on each group of sampled current values. The statistical calculations include calculating the average value, and the sampled current statistical values ​​include the average sampled current value. The plurality of step current values ​​are determined based on the statistical values ​​of the sampled current.

5. The method according to claim 1, characterized in that, The single-ended primary inductor converter circuit module includes a multi-phase AC input single-ended primary inductor converter circuit module, and the sampled current value includes multiple sub-phase sampled current values. If each phase circuit in the multi-phase AC input single-ended primary inductor converter circuit module is independent, determining the plurality of step current values ​​based on each group of sampled current values ​​includes: for each phase sub-phase circuit, performing statistical calculations based on each group of sub-phase sampled current values ​​to determine a plurality of sub-phase sampled current statistical values, wherein the statistical calculations include averaging, and the sampled current statistical values ​​include the average of the sampled currents; and for each phase sub-phase circuit, determining the plurality of step current values ​​based on the sampled current statistical values.

6. The method according to claim 1, characterized in that, The single-ended primary inductor converter circuit module includes a multi-phase AC input single-ended primary inductor converter circuit module, and the sampled current value includes multiple sub-phase sampled current values. If each phase circuit in the multi-phase AC input single-ended primary inductor converter circuit module is associated, determining the plurality of step current values ​​based on each group of sampled current values ​​includes: performing statistical calculations based on the plurality of sub-phase sampled current values ​​to determine a plurality of sub-phase sampled current statistical values, wherein the statistical calculations include averaging, and the sampled current statistical values ​​include the average of the sampled currents; and determining the plurality of step current values ​​based on the plurality of sub-phase sampled current values.

7. A device for optimizing electrical energy conversion efficiency, characterized in that, A control circuit module for a single-ended primary inductor converter circuit system, wherein the single-ended primary inductor converter circuit system further includes a current acquisition circuit module and a single-ended primary inductor converter circuit module, and the control circuit module is connected to the current acquisition circuit module and the single-ended primary inductor converter circuit module; the device includes: A data acquisition unit is used to acquire a circuit parameter set, which includes at least circuit element operating parameters and circuit switching frequency parameters. The first determining unit is used to determine the initial time delay based on the operating parameters of the circuit elements and the switching frequency parameters of the circuit; The second determining unit is configured to acquire multiple step current values ​​based on the initial delay and the preset step delay, each step current value being a current parameter corresponding to the time period after each step of the initial delay, and the multiple step current values ​​being based on a current signal from the current acquisition circuit module; specifically, the second determining unit is configured to determine a first delay and a second delay based on the initial delay and the preset step delay; control the target switch in the single-ended primary inductor converter circuit module to turn on and off respectively within the initial delay, the first delay, and the second delay, and acquire multiple sets of sampled current values ​​corresponding to the initial delay, the first delay, and the second delay, respectively, each set of sampled current values ​​corresponding to the initial delay, the first delay, and the second delay; and determine the multiple step current values ​​based on each set of sampled current values, each step current value corresponding to a set of sampled current values; The third determining unit is used to determine the target delay based on the plurality of step current values. The target delay is the delay corresponding to the peak value of the oscillating current. The peak value of the oscillating current is the maximum value of the positive or negative current parameters. The target delay is used to change the target switching point of the single-ended primary inductor converter circuit system, improve the power conversion efficiency, and eliminate the efficiency difference and reliability risk between different modules caused by the difference.

8. A computer-readable storage medium, characterized in that, The device stores a power conversion efficiency optimization program, including execution instructions, which, when executed by the processor of the electronic device, perform the method as described in any one of claims 1 to 6.

9. An electronic device, characterized in that, It includes a processor, memory, a communication interface, and one or more programs, which are stored in the memory and configured to be executed by the processor; When the processor executes the one or more programs stored in the memory, the processor performs the method as described in any one of claims 1 to 6.

Images