Chip of electrofluid nozzle and forming method

Abstract

The invention relates to a chip of an electrofluid nozzle and a forming method, and the chip comprises a silicon plate, the surface of which is provided with a plurality of through jet holes; the insulating plate is attached to the top face of the silicon plate, a plurality of liquid outlet holes are formed in the surface of the insulating plate, and the liquid outlet holes communicate with the spraying holes correspondingly; the dielectric layer is formed on the bottom surface of the silicon plate; and the electrode structure comprises a plurality of electrode rings, the plurality of electrode rings are all connected to the bottom surface of the dielectric layer, and the plurality of electrode rings respectively surround the plurality of jet holes. The silicon plate is used as the spraying plate, the spraying holes with higher precision and smaller size are easy to machine, and the printing precision and the printing quality are guaranteed.

Description

Technical Field

[0001] This application relates to the field of inkjet printing technology, and in particular to a chip for an electro-hydraulic printhead and a molding method thereof. Background Technology

[0002] Inkjet printing, as a direct-write additive manufacturing technology, boasts advantages such as no need for masks, flexible production, and high material utilization, showing promising application prospects in fields such as printed displays, printed circuits, and printed solar cells. Electrohydraulic inkjet printing, in particular, uses an electric field as the primary driving force, significantly enhancing the ink's driving power and enabling the printing of high-viscosity inks. Furthermore, because the ink is ejected locally from the meniscus, the resulting droplet size can be much smaller than the nozzle diameter, thus significantly improving printing resolution.

[0003] In related technologies, by opening spray holes on the spray plate and arranging electrode rings at the spray holes, voltage is applied at each spray hole, enabling individual control of multiple spray holes.

[0004] Because a relatively high voltage is required to create an electric field that propels the functional liquid out of the spray nozzle, the spray plate needs to have good high-pressure resistance. Generally, glass is used as the material for the spray plate to meet the pressure resistance requirements.

[0005] However, creating jet holes on glass jetting plates typically employs laser-induced etching, which cannot utilize higher-precision processes such as photolithography, dry etching, or wet etching. Laser-induced etching results in poor surface morphology and internal wall morphology within the jet holes, leading to inconsistent diameters across different areas and negatively impacting printing accuracy. This is particularly problematic when printing very small droplets, requiring jet hole diameters on the micrometer scale; laser-induced etching renders these holes essentially unusable. Therefore, glass jetting plates cannot meet the demands of high-precision jetting. Summary of the Invention

[0006] This application provides a chip and molding method for an electro-hydraulic nozzle to solve the technical problem in the related art where the nozzle precision of glass material spray plates is poor, which has an adverse effect on the printing effect and cannot meet the requirements of high-precision printing.

[0007] In a first aspect, a chip for an electrofluid nozzle is provided, comprising: A silicon plate, wherein a plurality of through-holes are formed on the surface of the silicon plate; An insulating plate is attached to the top surface of the silicon plate, and the surface of the insulating plate has a plurality of liquid outlet holes, which are respectively connected to a plurality of spray holes; A dielectric layer is formed on the bottom surface of the silicon substrate; An electrode structure comprising multiple electrode rings, each electrode ring being connected to the bottom surface of the dielectric layer and surrounding multiple injection holes.

[0008] In some embodiments, a recessed annular groove is formed on the bottom surface of the silicon substrate, a boss is formed in the middle of the recessed annular groove, the injection hole is formed on the bottom surface of the boss, and the electrode is arranged around the recessed annular groove.

[0009] In some embodiments, the bottom surface of the boss is higher than the bottom surface of the silicon substrate.

[0010] In some embodiments, the silicon substrate includes an SOI silicon wafer, which includes a top silicon layer, a buried oxide layer and a bottom silicon layer from bottom to top. The insulating plate is attached to the top surface of the bottom silicon layer, the recessed annular groove is formed in the top silicon layer, and the bottom surface of the boss is flush with the bottom surface of the buried oxide layer.

[0011] In some embodiments, the plurality of liquid outlet holes are arranged coaxially with the plurality of spray holes, and the diameter of the liquid outlet holes is larger than the diameter of the spray holes.

[0012] In some embodiments, the electrode structure includes a plurality of leads, all of which are connected to the bottom surface of the dielectric layer, and are electrically connected to a plurality of electrode rings, and are also electrically connected to an external flexible circuit board.

[0013] In some embodiments, a receiving groove is formed at the bottom edge of the silicon plate, and a plurality of leads extend along the bottom surface of the silicon plate to the bottom of the receiving groove, wherein the portion of the leads in the receiving groove is electrically connected to the external flexible circuit board.

[0014] In some embodiments, the electrode structure further includes a passivation layer covering the electrode ring and the lead surface.

[0015] In some embodiments, the chip of the current fluid nozzle further includes a hydrophobic layer covering the surfaces of the passivation layer and the dielectric layer. In some embodiments, The beneficial effects of the technical solution provided in this application include: This application provides a chip for an electrofluid printhead, using a silicon substrate as the spray plate. The silicon substrate can be processed with spray holes using a dry etching process to ensure the processing accuracy of the spray holes and achieve micron-level aperture processing, thereby improving printing accuracy and ensuring print quality. In addition, the morphology at the orifice of the spray hole is better, and after the functional liquid is sprayed out, it is less likely to be affected at the orifice opening and cause spray direction deflection, and it is also less likely to cause ink sludge, thus ensuring print quality. Furthermore, since the spray holes penetrate through the silicon substrate, the depth consistency of multiple spray holes is better, resulting in better printing consistency.

[0016] The arrangement of the insulating plate serves several purposes. First, it insulates the top surface of the silicon substrate, preventing it from being punctured and ensuring its normal operation, thus improving its high-voltage resistance. Second, the insulating plate reinforces the silicon substrate, preventing deformation or even breakage and ensuring its morphological stability. This results in more stable morphology and position of the jetting holes, guaranteeing printing quality. Third, the liquid outlet holes on the insulating plate are arranged throughout, ensuring better consistency in depth among multiple outlet holes. The functional liquid is supplied to the jetting holes through these outlet holes, and the functional liquid above the jetting holes accumulates within the outlet holes, ensuring consistent and stable supply of functional liquid to multiple jetting holes.

[0017] The arrangement of the dielectric layer provides insulation protection for the bottom surface of the silicon substrate, preventing it from being broken down and ensuring its normal operation, thus improving its high-voltage resistance. Because the electrode structure is separated from the silicon substrate by the dielectric layer, it ensures that the silicon substrate can operate normally in high-voltage environments.

[0018] Secondly, a molding process for a current-current nozzle chip is provided, for molding the current-current nozzle chip as described above, comprising the following steps: A glass wafer is used as an insulating plate, and multiple liquid outlet holes are machined on the surface of the insulating plate; Obtain an SOI silicon wafer as a silicon substrate, arrange the bottom silicon layer of the SOI silicon wafer facing upwards, and bond an insulating plate to the top surface of the silicon substrate; Etch a receiving groove along the bottom edge of the silicon substrate; Multiple sinking grooves are etched on the bottom surface of the silicon substrate, and the sinking grooves penetrate the top silicon layer of the SOI silicon wafer. The bottom of the sinking grooves is the surface of the buried oxide layer. An annular groove and injection holes are etched at the bottom of each sinking trough to form the sinking annular groove, the boss in the middle of the sinking annular groove, and the injection holes on the surface of the boss. Deposit a dielectric layer on the bottom surface of a silicon substrate; Multiple sets of electrode rings and leads are patterned on the surface of the dielectric layer, and the end of the lead away from the electrode ring extends to the bottom of the receiving groove. A passivation layer is deposited on the electrode ring and lead surface; A hydrophobic layer is formed on the surface of the passivation layer, the surface of the dielectric layer, the surface of the boss, the bottom of the sinking annular groove, and the groove wall.

[0019] Another embodiment of this application provides a molding process for a chip of a current fluid nozzle. Since this molding process for a chip of a current fluid nozzle is used to mold the chip of the current fluid nozzle, the beneficial effects of this molding process for a chip of a current fluid nozzle are the same as the beneficial effects of the chip of the current fluid nozzle, and will not be repeated here. Attached Figure Description

[0020] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0021] Figure 1 A schematic diagram of the chip for the electrofluid nozzle provided in the embodiments of this application; Figure 2 This is a schematic diagram of the structure of a silicon substrate provided in an embodiment of this application; Figure 3 This is a flowchart illustrating the molding process of a chip for an electrofluid nozzle provided in another embodiment of this application.

[0022] In the figure: 1. Silicon plate; 1a. Spray hole; 1b. Sinking ring groove; 1c. Boss; 1d. Receiving groove; 11. Top silicon layer; 12. Buried oxide layer; 13. Bottom silicon layer; 2. Insulating plate; 2a. Liquid outlet hole; 3. Electrode structure; 31. Electrode ring; 32. Lead wire; 33. Passivation layer; 4. Dielectric layer; 5. Hydrophobic layer; a. Sinking groove. Detailed Implementation

[0023] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0024] This application provides a chip and molding method for an electrohydrodynamic nozzle. By using a silicon substrate as the jetting plate, it is easier to process jetting holes with higher precision and smaller size, thus ensuring printing accuracy and quality. This application solves the technical problem in related technologies where the jetting holes of glass material jetting plates have poor precision, which adversely affects the printing effect and cannot meet the requirements of high-precision printing.

[0025] Reference Figure 1 A chip for an electrofluid nozzle includes a silicon substrate 1, an insulating plate 2, a dielectric layer 4, and an electrode structure 3. The insulating plate 2 is attached to the top surface of the silicon substrate 1, the dielectric layer 4 is formed on the bottom surface of the silicon substrate 1, and the electrode structure 3 is formed on the bottom surface of the dielectric layer 4. A through-hole 1a is formed on the silicon substrate 1, and a liquid outlet 2a communicating with the through-hole 1a is formed on the insulating plate 2. Functional liquid is supplied through the liquid outlet 2a, and the functional liquid in the liquid outlet 2a is supplied to the through-hole 1a. When the electrode structure 3 is energized, the functional liquid in the through-hole 1a is ejected by the electric field force.

[0026] Reference Figure 1 The silicon substrate 1 has multiple through-holes 1a arranged in multiple rows. The insulating substrate 2 has multiple liquid outlet holes 2a, also arranged in multiple rows, each corresponding to and connected to one of the spray holes 1a. Functional liquid is supplied to the spray holes 1a through the liquid outlet holes 2a.

[0027] This configuration uses silicon substrate 1 as the jetting plate. The jetting holes 1a can be machined on silicon substrate 1 using a dry etching process, ensuring the machining accuracy of jetting holes 1a and enabling the machining of micron-level apertures. This improves printing accuracy and guarantees printing quality. Furthermore, the morphology at the orifice of jetting hole 1a is better, making it less likely for the jetting direction to be deflected after liquid jetting, and reducing the likelihood of ink buildup, thus ensuring printing quality. Additionally, since jetting holes 1a penetrate through silicon substrate 1, the depth consistency of multiple jetting holes 1a is better, resulting in better printing consistency.

[0028] Furthermore, the arrangement of the insulating plate 2 serves several purposes. First, it provides insulation protection to the top surface of the silicon plate 1, preventing it from being punctured and ensuring its normal operation, thus improving its high-voltage resistance. Second, the insulating plate 2 reinforces the silicon plate 1, preventing deformation or even breakage and ensuring its stable shape. Consequently, the shape and position of the jetting holes 1a are more stable, guaranteeing printing quality. Third, the liquid outlet holes 2a on the insulating plate 2 are arranged throughout, resulting in better consistency in depth among the multiple outlet holes 2a. The functional liquid is supplied to the jetting holes 1a through the outlet holes 2a, and the functional liquid above the jetting holes 1a accumulates within the outlet holes 2a, ensuring consistent and stable supply of functional liquid to the multiple jetting holes 1a.

[0029] In this embodiment, the insulating plate 2 includes a glass plate.

[0030] In this embodiment, the silicon substrate 1 and the insulating substrate 2 are connected by bonding.

[0031] Furthermore, the multiple liquid outlet holes 2a are arranged coaxially with the multiple spray holes 1a, and the diameter of the liquid outlet holes 2a is larger than the diameter of the spray holes 1a.

[0032] This design allows the ink outlet 2a to store ink, ensuring a stable ink supply to the ejection orifice 1a. By supplying ink to the ejection orifice 1a through the ink outlet 2a, the smaller aperture of the ejection orifice 1a, while accommodating the printing of small droplets, still ensures a stable and portable supply of functional ink. Furthermore, since the functional ink is ejected from the ejection orifice 1a, the requirements for the inner wall morphology of the ink outlet 2a are not high, simplifying manufacturing and saving costs.

[0033] Reference Figure 1 The dielectric layer 4 is disposed on the bottom surface of the silicon substrate 1, and protects the bottom surface of the silicon substrate 1. In this embodiment, the dielectric layer 4 comprises Si3N4. Preferably, the thickness of the dielectric layer 4 is 2 micrometers. The dielectric layer 4 is formed on the bottom surface of the silicon substrate 1 by deposition.

[0034] This arrangement of dielectric layer 4 provides insulation protection for the bottom surface of silicon substrate 1, preventing it from being broken down and ensuring its normal operation, thus improving its high-voltage resistance. Since electrode structure 3 is separated from silicon substrate 1 by dielectric layer 4, it ensures that silicon substrate 1 can operate normally in high-voltage environments.

[0035] Reference Figure 1 The electrode structure 3 includes multiple electrode rings 31, all of which are connected to the bottom surface of the dielectric layer 4 and surround multiple injection holes 1a. By energizing the electrode rings 31, the functional liquid within the injection holes 1a is propelled out using an electric field.

[0036] Since the electrode ring 31 is separated from the silicon plate 1 by the dielectric layer 4, it ensures that the silicon plate 1 can operate normally in a high-voltage environment.

[0037] The silicon plate 1 has a recessed annular groove 1b on its bottom surface, a boss 1c is formed in the middle of the recessed annular groove 1b, an injection hole 1a is opened on the bottom surface of the boss 1c, and an electrode ring 31 is arranged around the recessed annular groove 1b.

[0038] This configuration, through the arrangement of the recessed annular groove 1b, creates a gap between the boss 1c and the electrode ring 31. After the functional liquid exits from the injection hole 1a and forms a Taylor cone on the surface of the boss 1c, the recessed annular groove 1b prevents the functional liquid from spreading to the electrode ring 31, thus avoiding corrosion and ensuring the cleanliness of the electrode ring 31, and guaranteeing the controllability of the electric field force. The height difference between the injection surface of the boss 1c and the bottom of the recessed annular groove 1b ensures that the functional liquid adheres to the injection surface of the boss 1c to form a Taylor cone, preventing the functional liquid from spreading to the bottom of the recessed annular groove 1b and from accumulating on the circumferential outer surface of the boss 1c. This keeps the injection surface of the boss 1c clean, minimizing its impact on the subsequent Taylor cone formation and ensuring the injection accuracy of the corresponding injection hole 1a. However, if the height of the boss 1c is too high, it will affect the direction of the droplets ejected from adjacent bosses 1c, impacting printing uniformity.

[0039] Preferably, the bottom surface of the boss 1c is higher than the bottom surface of the silicon plate 1. Therefore, the boss 1c is located inside the recessed annular groove 1b.

[0040] With this configuration, the Taylor cone formed by the spray surface of the boss 1c is located inside the sunken annular groove 1b, ensuring that the functional liquid on the surface of the boss 1c spreads to the bottom surface of the silicon plate 1.

[0041] It should be noted that when the bottom surface of the silicon substrate 1 is provided with a recessed annular groove 1b and a boss 1c, the dielectric layer 4 is arranged on the bottom surface of the silicon substrate 1, the groove wall and bottom of the recessed annular groove 1b, and the bottom surface of the boss 1c.

[0042] Reference Figure 1 and Figure 2 The silicon substrate 1 includes an SOI silicon wafer, which, from bottom to top, comprises a top silicon layer 11, a buried oxide layer 12, and a bottom silicon layer 13. An insulating plate 2 is attached to the top surface of the bottom silicon layer 13. In this embodiment, the insulating plate 2 is bonded to the bottom silicon layer 13. A recessed annular groove 1b is formed in the top silicon layer 11, and the bottom surface of the boss 1c is flush with the bottom surface of the buried oxide layer 12.

[0043] With this configuration, during the etching process to form the boss 1c, due to the multi-layered structure of the SOI silicon wafer and the different materials of the top silicon layer 11 and the buried oxide layer 12, the etching selectivity of the top silicon layer 11 and the buried oxide layer 12 is different. Therefore, after removing the top silicon layer 11 by etching, the buried oxide layer 12 can be completely preserved as the jetting surface of the boss 1c. As a result, the flatness of the jetting surface of the boss 1c is higher, thus ensuring printing quality and printing consistency.

[0044] It is important to note that when etching away material to form a groove structure, the etching depth accuracy and flatness are limited. If the smoothness of the jetting surface of boss 1c is insufficient, it will affect the formation of the Taylor cone and negatively impact the printing effect.

[0045] Reference Figure 1 The electrode structure 3 further includes multiple leads 32, which are all connected to the bottom surface of the dielectric layer 4. The multiple leads 32 are electrically connected to multiple electrode rings 31 respectively, and the multiple leads 32 are all electrically connected to the external flexible circuit board.

[0046] With this configuration, after the lead wire 32 is electrically connected to the external flexible circuit board, the electrode ring 31 can be powered through the lead wire 32. By applying voltage to different electrode rings 31, independent control of different injection holes 1a can be achieved.

[0047] Specifically, the electrode ring 31 and the lead wire 32 are made of one or more of the following materials: gold, silver, copper, aluminum, and chromium.

[0048] Reference Figure 1 In this embodiment, a receiving groove 1d is provided at the bottom edge of the silicon plate 1, and multiple leads 32 extend along the bottom surface of the silicon plate 1 to the bottom of the receiving groove 1d. The part of the leads 32 inside the receiving groove 1d is electrically connected to the external flexible circuit board.

[0049] This configuration, through the processing of the receiving groove 1d, leaves space for the connection and installation of the flexible circuit board, avoids the flexible circuit board being directly encapsulated on the bottom surface of the silicon substrate 1, avoids occupying the space on the bottom surface of the silicon substrate 1, and ensures that the boss 1c can be as close as possible to the substrate to be printed, thereby ensuring the adjustment range of the printing height.

[0050] Preferably, after the flexible circuit board is connected to the lead 32 in the receiving groove 1d, the lowest point of the flexible circuit board is higher than the bottom surface of the silicon plate 1.

[0051] Preferably, the receiving tank 1d is wet-etched, resulting in a sloped tank wall that facilitates the extension of the lead wire 32 along the tank wall to the bottom of the receiving tank 1d. In this embodiment, the slope of the tank wall of the receiving tank 1d is between 50 and 80 degrees.

[0052] Furthermore, the depth of the receiving tank 1d is consistent with the thickness of the top silicon layer 11, and the bottom of the receiving tank 1d is the surface of the buried oxide layer 12, which ensures the flatness of the bottom of the receiving tank 1d, thereby facilitating the forming of various structures on the bottom surface of the tank.

[0053] It should be noted that dielectric layer 4 covers the tank walls and bottom of receiving tank 1d.

[0054] Reference Figure 1 The electrode structure 3 further includes a passivation layer 33, which covers the surfaces of the electrode ring 31 and the lead wire 32.

[0055] Specifically, in this embodiment, the passivation layer 33 is made of silicon dioxide. It is patterned on the surfaces of the electrode ring 31 and the lead 32 using a spray adhesive and metal stripping process to protect the electrode ring 31 and the lead 32. In this embodiment, the end of the lead 32 located at the bottom of the receiving groove 1d is not covered by the passivation layer 33 to leave space for connection with the flexible circuit board.

[0056] The chip of the current fluid nozzle also includes a hydrophobic layer 5, which covers the passivation layer 33, the surface of the dielectric layer 4, the surface of the boss 1c, the bottom and the wall of the sinking annular groove 1b.

[0057] Specifically, the hydrophobic layer 5 is made of pyrene and is applied to the bottom surface of the silicon substrate 1 via sputtering to cover the structure of the bottom surface of the silicon substrate 1, namely, the surface of the passivation layer 33, the surface of the dielectric layer 4, and the surface of the boss 1c. In this embodiment, the end of the lead 32 at the bottom of the receiving groove 1d is blocked by a mask, and the hydrophobic layer 5 is formed by sputtering. The end of the lead 32 at the bottom of the receiving groove 1d is not covered by the hydrophobic layer 5 to reserve a connection position with the flexible circuit board.

[0058] This arrangement of the hydrophobic layer 5 ensures that the functional liquid forms a meniscus on the spray surface of the boss 1c, preventing the functional liquid from overflowing.

[0059] This application provides a chip for a current fluid printhead, using a silicon substrate 1 as the spray plate. The silicon substrate 1 can be processed with spray holes 1a using a dry etching process to ensure the processing accuracy of the spray holes 1a and to achieve micron-level aperture processing, thereby improving printing accuracy and ensuring printing quality. In addition, the morphology at the opening of the spray holes 1a is better, and after functional liquid spraying, it is less likely to be affected at the opening of the spray holes 1a and cause spray direction deflection, and it is also less likely to cause ink sludge, thus ensuring printing quality. Furthermore, since the spray holes 1a penetrate through the silicon substrate 1, the depth consistency of multiple spray holes 1a is better, resulting in better printing consistency.

[0060] The arrangement of the insulating plate 2 serves several purposes. First, it provides insulation protection to the top surface of the silicon plate 1, preventing it from being punctured and ensuring its normal operation, thus improving its high-voltage resistance. Second, the insulating plate 2 reinforces the silicon plate 1, preventing deformation or even breakage and ensuring its morphological stability. Consequently, the shape and position of the jetting holes 1a are more stable, guaranteeing printing quality. Third, the liquid outlet holes 2a on the insulating plate 2 are arranged throughout, resulting in better consistency in depth among the multiple outlet holes 2a. The liquid is supplied to the jetting holes 1a through the outlet holes 2a, and the functional liquid above the jetting holes 1a accumulates within the outlet holes 2a, ensuring consistent and stable supply of functional liquid to the multiple jetting holes 1a.

[0061] The arrangement of dielectric layer 4 provides insulation protection for the bottom surface of silicon substrate 1, preventing it from being broken down and ensuring its normal operation, thus improving its high-voltage resistance. Since electrode structure 3 is separated from silicon substrate 1 by dielectric layer 4, it ensures that silicon substrate 1 can operate normally in high-voltage environments.

[0062] Reference Figure 3 Secondly, a molding process for a chip of an electro-hydraulic nozzle is provided, for molding a chip of an electro-hydraulic nozzle as described above, including steps S100-S900.

[0063] S100. Obtain a glass wafer as an insulating plate 2, and process multiple liquid outlet holes 2a on the surface of the insulating plate 2.

[0064] S200. Obtain an SOI silicon wafer as silicon plate 1, arrange the bottom silicon layer 13 of the SOI silicon wafer facing upwards, and bond the insulating plate 2 to the top surface of the silicon plate 1.

[0065] S300, Etch receiving groove 1d on the bottom edge of silicon substrate 1.

[0066] S400. Multiple recessed grooves a are etched on the bottom surface of the silicon substrate 1, and the recessed grooves a penetrate the top silicon layer 11 of the SOI silicon wafer. The bottom of the recessed grooves a is the surface of the buried oxide layer 12.

[0067] S500, an annular groove and injection hole 1a are etched at the bottom of each sinking groove a to form a sinking annular groove 1b and a boss 1c in the middle of the sinking annular groove 1b, and injection hole 1a on the surface of the boss 1c.

[0068] S600, a dielectric layer 4 is deposited on the surface exposed below the silicon substrate 1.

[0069] S700, multiple sets of electrode rings 31 and leads 32 are patterned on the surface of dielectric layer 4, and the end of the lead 32 away from the electrode ring 31 extends to the bottom of the receiving groove 1d.

[0070] S800, a passivation layer 33 is deposited on the surface of electrode ring 31 and lead wire 32.

[0071] S900, a hydrophobic layer 5 is formed on the surface of the passivation layer 33, the surface of the dielectric layer 4, the surface of the boss 1c, the bottom of the sinking annular groove 1b, and the groove wall.

[0072] In step S100, a glass wafer is obtained as an insulating plate 2, and multiple liquid outlet holes 2a are processed on the surface of the insulating plate 2. Specifically: A glass wafer is used as the insulating plate 2, and the liquid outlet holes 2a are processed by laser-induced etching. Using a glass wafer not only enhances the structural strength of the silicon substrate 1 but also improves the high-pressure resistance of the top surface of the silicon substrate 1. Since the glass wafer is not used as the jetting plate, the liquid outlet holes 2a are processed by laser-induced etching. Although the morphology of the liquid outlet holes 2a is generally poor, it does not adversely affect printing and saves costs.

[0073] In step S200, an SOI silicon wafer is obtained as silicon substrate 1, with the bottom silicon layer 13 of the SOI silicon wafer facing upwards, and an insulating plate 2 is bonded to the top surface of silicon substrate 1. Specifically: An SOI silicon wafer is used as the silicon substrate 1. The SOI silicon wafer has a three-layer structure, consisting of a top silicon layer 11, a buried oxide layer 12, and a bottom silicon layer 13. The top silicon layer 11 and the bottom silicon layer 13 are made of silicon, while the buried oxide layer 12 is made of silicon dioxide. When the SOI silicon wafer is bonded to the insulating plate 2, the SOI silicon wafer is inverted, and the bottom silicon layer 13 is bonded to the insulating plate 2.

[0074] In step S300, a receiving groove 1d is etched at the edge of the bottom surface of the silicon substrate 1. Specifically: A wet etching process is used to process a receiving groove 1d at the bottom edge of the silicon substrate 1, that is, to process a receiving groove 1d on the surface of the top silicon layer 11. The depth of the receiving groove 1d is the same as the thickness of the top silicon layer 11. In addition, the wet etching process gives the bottom of the receiving groove 1d a slope, which is between 50 and 80 degrees.

[0075] This configuration, through the processing of the receiving groove 1d, leaves space for the connection and installation of the flexible circuit board, avoids the flexible circuit board being directly encapsulated on the bottom surface of the silicon substrate 1, avoids occupying the space on the bottom surface of the silicon substrate 1, and ensures that the boss 1c can be as close as possible to the substrate to be printed, thereby ensuring the adjustment range of the printing height.

[0076] The depth of the receiving groove 1d is consistent with the thickness of the top silicon layer 11. The bottom of the receiving groove 1d is the surface of the buried oxide layer 12, ensuring the flatness of the bottom of the receiving groove 1d, thus facilitating the molding of various structures on the bottom surface. In addition, since the groove wall of the receiving groove 1d has a slope, it facilitates the subsequent extension of the lead wire 32 from the groove wall to the bottom of the groove, ensuring the molding quality of the lead wire 32.

[0077] In step S400, multiple recessed grooves a are etched on the bottom surface of the silicon substrate 1, and the recessed grooves a penetrate the top silicon layer 11 of the SOI silicon wafer, with the bottom of the recessed grooves a being the surface of the buried oxide layer 12. Specifically: A dry etching process is used to etch multiple recessed grooves a on the bottom surface of the silicon substrate 1, that is, multiple recessed grooves a on the surface of the top silicon layer 11. By controlling the depth of the recessed grooves a to be consistent with the thickness of the top silicon layer 11, the bottom of the recessed grooves a is the surface of the buried oxide layer 12. Therefore, the bottom of the recessed grooves a has good flatness and morphology.

[0078] In step S500, an annular groove and injection hole 1a are etched at the bottom of each sinking groove a to form a sinking annular groove 1b, a boss 1c in the middle of the sinking annular groove 1b, and injection holes 1a on the surface of the boss 1c. Specifically: Using a dry etching process, a recessed annular groove 1b is further formed at the bottom of the recessed groove a to create a boss 1c. The outer wall of the recessed annular groove 1b is the same as the wall of the recessed groove a. As the recessed annular groove 1b is processed, the jetting hole 1a on the boss 1c can be initially etched simultaneously, at which point the jetting hole 1a is in a countersunk hole state.

[0079] Then, through a second etching process, the injection hole 1a is etched separately to penetrate the injection hole 1a.

[0080] This configuration, through machining the recessed annular groove 1b, forms the boss 1c. The bottom surface of the boss 1c is the spray surface, which is also the surface of the embedded oxide layer 12. Therefore, the spray surface of the boss 1c has good smoothness. This ensures that the Taylor cone is stably formed on the spray surface of the boss 1c, guaranteeing printing quality and consistency.

[0081] Furthermore, the jet hole 1a is initially machined together with the recessed annular groove 1b, and then the jet hole 1a is etched separately to complete its penetration. This two-step machining of the jet hole 1a reduces the technological difficulty of directly penetrating it, thus improving the yield rate. On the other hand, the simultaneous machining of the jet hole 1a and the recessed annular groove 1b saves machining steps and improves printing efficiency.

[0082] Furthermore, the spray surface of the boss 1c is higher than the bottom surface of the silicon plate 1. Therefore, the functional liquid on the spray surface of the boss 1c is less likely to spread to the electrode ring 31 and contaminate the electrode.

[0083] In step S600, a dielectric layer 4 is deposited on the exposed surface below the silicon substrate 1. Specifically: A dielectric layer 4 is deposited on the bottom surface of the silicon substrate 1 through a deposition process. The dielectric layer 4 covers the entire lower surface of the silicon substrate 1, including the bottom surface of the silicon substrate 1, the wall and bottom of the sinking annular groove 1b, and the spraying surface of the boss 1c.

[0084] Optionally, the thickness of dielectric layer 4 includes 1-10 micrometers. The material of dielectric layer 4 is preferably Si3N4.

[0085] With this setup, since the charge will concentrate in the part of the jet hole 1a during the printing process, and the silicon plate 1 is a semiconductor, it is easily broken down under high voltage. The dielectric layer 4 protects the silicon plate 1 and ensures that the printing proceeds normally.

[0086] In step S700, multiple sets of electrode rings 31 and leads 32 are patterned on the surface of dielectric layer 4, and one end of the lead 32 away from the electrode rings 31 extends to the bottom of the receiving groove 1d. Specifically: Multiple electrode rings 31 and multiple leads 32 are deposited on the surface of dielectric layer 4. The multiple electrode rings 31 are respectively encircled by the sinking ring groove 1b, and the center line of the electrode ring 31 is collinear with the center line of the injection hole 1a. One end of the lead 32 is electrically connected to the electrode ring 31, and the other end extends to the bottom of the receiving groove 1d.

[0087] Specifically, the electrode ring 31 and the lead wire 32 are made of one or more of the following materials: gold, silver, copper, aluminum, and chromium.

[0088] This configuration extends one end of the lead wire 32 into the receiving groove 1d to facilitate connection with an external flexible circuit board, thereby enabling the electrode ring 31 to be energized.

[0089] In step S800, a passivation layer 33 is deposited on the surfaces of the electrode ring 31 and the lead 32. Specifically: A passivation layer 33 is deposited on the surfaces of the electrode ring 31 and the lead 32. The passivation layer 33 is preferably silicon dioxide, and its thickness is preferably 300-500 nanometers. The passivation layer 33 is then applied to the surfaces of the electrode ring 31 and the lead 32 using a spray adhesive and metal stripping process to protect them. In this embodiment, the end of the lead 32 located at the bottom of the receiving groove 1d is not covered with the passivation layer 33 to leave space for connection to the flexible circuit board.

[0090] In step S900, a hydrophobic layer 5 is formed on the surface of the passivation layer 33, the surface of the dielectric layer 4, the surface of the boss 1c, the bottom of the sinking annular groove 1b, and the groove wall. Specifically: The hydrophobic layer 5 is made of pyrene and is applied to the bottom surface of the silicon substrate 1 via sputtering to cover the structure of the bottom surface of the silicon substrate 1, namely, the surface of the passivation layer 33, the surface of the dielectric layer 4, and the surface of the boss 1c. Preferably, the thickness of the hydrophobic layer 5 is 1-5 micrometers. In this embodiment, the lead 32 is positioned at the end of the bottom of the receiving groove 1d by a mask, and the hydrophobic layer 5 can be formed by sputtering.

[0091] This arrangement of the hydrophobic layer 5 ensures that the functional liquid forms a meniscus on the spray surface of the boss 1c, preventing the functional liquid from overflowing.

[0092] Another embodiment of this application provides a molding process for a chip of a current fluid nozzle. Since this molding process for a chip of a current fluid nozzle is used to mold the chip of the current fluid nozzle, the beneficial effects of this molding process for a chip of a current fluid nozzle are the same as the beneficial effects of the chip of the current fluid nozzle, and will not be repeated here.

[0093] In the description of this application, it should be noted that the terms "upper," "lower," etc., indicating the orientation or positional relationship are based on the orientation or positional relationship shown in the accompanying drawings, and are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this application. Unless otherwise expressly specified and limited, the terms "installed," "connected," and "linked" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication between two elements. For those skilled in the art, the specific meaning of the above terms in this application can be understood according to the specific circumstances.

[0094] It should be noted that in this application, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0095] The above description is merely a specific embodiment of this application, enabling those skilled in the art to understand or implement this application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of this application. Therefore, this application is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features claimed herein.

Claims

1. A chip for an electrohydrodynamic nozzle, characterized in that, It includes: A silicon plate, wherein a plurality of through-holes are formed on the surface of the silicon plate; An insulating plate is attached to the top surface of the silicon plate, and the surface of the insulating plate has a plurality of liquid outlet holes, which are respectively connected to a plurality of spray holes; A dielectric layer is formed on the bottom surface of the silicon substrate; An electrode structure comprising multiple electrode rings, each electrode ring being connected to the bottom surface of the dielectric layer and surrounding multiple injection holes.

2. The chip of the electrohydrodynamic nozzle according to claim 1, characterized in that, The bottom surface of the silicon plate has a recessed annular groove, and a boss is formed in the middle of the recessed annular groove. The injection hole is opened on the bottom surface of the boss, and the electrode is arranged around the recessed annular groove.

3. The chip of the electrohydrodynamic nozzle according to claim 2, characterized in that, The bottom surface of the boss is higher than the bottom surface of the silicon plate.

4. The chip of the electrohydrodynamic nozzle according to claim 3, characterized in that, The silicon substrate includes an SOI silicon wafer, which includes a top silicon layer, a buried oxide layer and a bottom silicon layer from bottom to top. The insulating plate is attached to the top surface of the bottom silicon layer, the recessed annular groove is formed in the top silicon layer, and the bottom surface of the boss is flush with the bottom surface of the buried oxide layer.

5. The chip of the electro-hydraulic nozzle according to claim 1, characterized in that, The plurality of liquid outlet holes are arranged coaxially with the plurality of spray holes, and the diameter of the liquid outlet holes is larger than the diameter of the spray holes.

6. The chip of the electrohydrodynamic nozzle according to claim 1, characterized in that, The electrode structure includes multiple leads, all of which are connected to the bottom surface of the dielectric layer. The multiple leads are electrically connected to multiple electrode rings, and all of the multiple leads are electrically connected to an external flexible circuit board.

7. The chip of the electrohydrodynamic nozzle according to claim 6, characterized in that, A receiving groove is formed at the bottom edge of the silicon plate, and a plurality of leads extend along the bottom surface of the silicon plate to the bottom of the receiving groove. The portion of the leads in the receiving groove is electrically connected to the external flexible circuit board.

8. The chip of the electrofluid nozzle according to claim 6 or 7, characterized in that, The electrode structure further includes a passivation layer that covers the electrode ring and the lead surface.

9. The chip of the electrohydrodynamic nozzle according to claim 8, characterized in that, It also includes a hydrophobic layer that covers the surfaces of the passivation layer and the dielectric layer.

10. A molding process for a chip of an electrohydrodynamic nozzle, characterized in that, A chip for forming an electrohydrodynamic nozzle as described in any one of claims 1 to 9 comprises the following steps: A glass wafer is used as an insulating plate, and multiple liquid outlet holes are machined on the surface of the insulating plate; Obtain an SOI silicon wafer as a silicon substrate, arrange the bottom silicon layer of the SOI silicon wafer facing upwards, and bond an insulating plate to the top surface of the silicon substrate; Etch a receiving groove along the bottom edge of the silicon substrate; Multiple sinking grooves are etched on the bottom surface of the silicon substrate, and the sinking grooves penetrate the top silicon layer of the SOI silicon wafer. The bottom of the sinking grooves is the surface of the buried oxide layer. An annular groove and injection holes are etched at the bottom of each sinking trough to form the sinking annular groove, the boss in the middle of the sinking annular groove, and the injection holes on the surface of the boss. Deposit a dielectric layer on the exposed surface beneath the silicon substrate; Multiple sets of electrode rings and leads are patterned on the surface of the dielectric layer, and the end of the lead away from the electrode ring extends to the bottom of the receiving groove. A passivation layer is deposited on the electrode ring and lead surface; A hydrophobic layer is formed on the surface of the passivation layer, the surface of the dielectric layer, the surface of the boss, the bottom of the sinking annular groove, and the groove wall.

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