Embedded computing platform digital twin construction method and system

Abstract

The invention relates to the technical field of digital twinning, and discloses an embedded computing platform digital twinning construction method and system, and the method comprises the steps: extracting hardware parameters of physical equipment, simulating core hardware and matched operation components of an embedded computer board card, constructing a universal digital target machine model library, and constructing a modularized virtual environment; carrying out custom configuration on the model component, and packaging the model component into a unit which can be assembled and reused; performing data transmission based on a data distribution service communication technology, executing development and joint test, test verification, deployment operation and maintenance, and efficiency excitation and evaluation in an upgrade extension stage; based on a visual monitoring and debugging tool, functional modules are deployed in a micro-service mode, and business data visualization, hardware resource evaluation, integrated debugging and semi-physical equipment resource sharing are executed. Efficiency, stability and practicability of embedded computing platform digital twin construction can be improved, and reliable technical support is provided for full life cycle management.

Description

Technical Field

[0001] This invention relates to the field of digital twin technology, and in particular to a method and system for constructing a digital twin of an embedded computing platform. Background Technology

[0002] Embedded computing platforms are widely used in various complex scenarios, and their operational stability, functional reliability, and lifecycle management efficiency directly affect the overall performance of related systems. Digital twin technology, by constructing a virtual model that is precisely mapped to physical devices, enables the simulation, monitoring, debugging, and optimization of physical devices. It has become a key technology direction for breaking through the development and maintenance bottlenecks of traditional embedded computing platforms, and can effectively solve problems such as long software and hardware adaptation cycles, incomplete test scenario coverage, and delayed maintenance response in traditional models.

[0003] As the application scenarios of embedded computing platforms continue to expand, their hardware configurations are becoming increasingly diverse and their functional requirements are becoming more complex, placing higher demands on the efficiency, adaptability, and full lifecycle support capabilities of digital twins. Existing technologies have begun to explore the construction and application of digital twins for embedded computing platforms. Some solutions have achieved joint simulation and resource collaborative control of multiple models, while others focus on specific stages of functional development based on digital twins, thus promoting the development of embedded digital twin technology to a certain extent.

[0004] However, existing technologies still have many shortcomings and deficiencies. For example, patent document CN119512687A discloses a co-simulation method for multiple types of embedded computer digital twin models. This method involves: acquiring configuration information for the simulation object; acquiring several types of models required for simulation; encapsulating each type of model to build a simulation model library to be run; synchronously parsing each type of model; starting the simulation model library and performing synchronous simulation; determining resource synchronization competition characterization parameters for the synchronous simulation process based on the complexity differences and load competition rates of each type of model to classify the resource synchronization competition categories for the synchronous simulation process; adaptively controlling simulation parameters based on the resource synchronization competition categories during synchronous simulation; and monitoring and displaying each simulation data in real time.

[0005] However, in the model building phase of the aforementioned co-simulation method, the configuration flexibility of model components is insufficient, making it difficult to quickly respond to personalized needs under different application scenarios. For hardware changes during system upgrade and expansion phases, there is a lack of efficient model component replacement and parameter reconstruction mechanisms, resulting in extended adaptation cycles. At the same time, its integration depth in semi-physical device resource sharing is insufficient, and the synergy between the virtual environment and the semi-physical stimulus environment is inadequate, failing to fully reproduce real operating scenarios, limiting the accuracy and comprehensiveness of test results. Furthermore, it lacks a full lifecycle performance incentive and evaluation system, making it difficult to comprehensively control system performance at each stage of development, testing, and deployment.

[0006] For example, CN120104434A discloses an embedded computer predictive maintenance control system based on digital twins, including: a data fusion modeling module, which uses a digital twin to construct a high-precision digital model; a fault and anomaly detection module, which determines whether the junction temperature of the chip exceeds the warning threshold and issues a warning, and uses wavelet packet decomposition to extract the energy entropy value of the vibration signal, and determines whether the energy entropy value exceeds a preset value, and if so, determines that the embedded computer has malfunctioned; a predictive equipment maintenance module, which uses reinforcement learning to dynamically adjust the maintenance cycle; and a human-machine collaborative decision-making module, which obtains machine evaluation, obtains human evaluation based on the high-precision digital model, and merges machine evaluation and human evaluation to obtain human-machine collaborative evaluation.

[0007] The aforementioned embedded computer predictive maintenance control system primarily focuses on the predictive maintenance application of digital twins during the operation and maintenance phase. It fails to cover the entire process requirements of embedded computing platforms, from development and testing to upgrades and expansions. It lacks a performance incentive and evaluation mechanism throughout the entire process, making it impossible to promptly identify potential system problems in the early development and testing phases. Furthermore, its virtual environment has a low degree of componentization, and the reusability of model components is insufficient. When facing embedded platforms with different hardware configurations, a large amount of repetitive development work is required, significantly increasing construction costs and timelines. Simultaneously, this solution has shortcomings in integrating visual monitoring and debugging functions, failing to achieve seamless integration of business data visualization and local debugging tools. The debugging process is cumbersome, affecting the efficiency of problem localization and resolution.

[0008] Overall, current related technical solutions still have significant room for improvement in areas such as full lifecycle coverage of digital twin construction, flexibility and reusability of model components, deep integration of virtual environments and semi-physical devices, and integrated visualization, monitoring, and debugging. They are insufficient to fully meet the comprehensive requirements of embedded computing platforms for efficiency, adaptability, and practicality in digital twin construction. Therefore, there is an urgent need for a systematic method and system for constructing digital twins for embedded computing platforms that can address the aforementioned issues. Summary of the Invention

[0009] To address the aforementioned issues, this invention proposes a method and system for constructing a digital twin of an embedded computing platform. This method enables efficient reuse of model components, reduces repetitive development work, ensures the real-time performance and reliability of data transmission through the application of data distribution service communication technology, enhances the flexibility and scalability of functional modules through microservice deployment, and comprehensively supports the full lifecycle management of the digital twin of the embedded computing platform through the coordinated implementation of various functions, thereby improving overall development and operation efficiency.

[0010] The technical solution adopted in this invention is as follows: A method for constructing a digital twin of an embedded computing platform, comprising: Extract the hardware parameters of physical devices, simulate the core hardware and supporting operating components of embedded computer boards, build a general digital target machine model library, and construct a component-based virtual environment; customize the configuration of model components and encapsulate them into units that can be assembled and reused. Data transmission is performed based on data distribution service communication technology, and performance incentives and evaluations are conducted during the development and joint testing, testing and verification, deployment and maintenance, and upgrade and expansion phases. Based on visual monitoring and debugging tools, functional modules are deployed in a microservice manner to perform business data visualization, hardware resource assessment, integrated debugging, and semi-physical equipment resource sharing.

[0011] Furthermore, the embedded board core hardware and supporting operating components include a CPU processor architecture, operating system, board-level support package, bus interface and interaction object; the general digital target machine model library includes models corresponding to various types of processors, operating systems, peripheral interfaces and peripheral sensors.

[0012] Furthermore, during the development and testing phase, a software and hardware co-design and development model based on a general digital target machine model is adopted, and the debugging environment is consistent with the hardware debugging environment.

[0013] Furthermore, in the testing and verification phase, all software within the embedded system undergoes layered and graded testing, simulates real fault injection for performance incentives, covers all functional tests at the unit, integration, and system stages, and supports regression testing and closed-loop upgrades of the test case library.

[0014] Furthermore, during the deployment and maintenance phase, a software and hardware model supporting one-click deployment of a simulated real system is set up to monitor the interactive data flow status, log recording, playback control, and fault information in the system in real time.

[0015] Furthermore, during the upgrade and expansion phase, when the CPU processor architecture, operating system, bus, or peripherals of the system hardware device change, the replacement of board model components, parameter configuration, and bus connection are completed through a visual interface to generate a new board adaptation model.

[0016] Furthermore, the business data visualization includes data analysis, data filtering, anomaly handling, historical data import, and historical data playback.

[0017] Furthermore, the integrated debugging includes: integrating virtual environment business software with local debugging tools, so that during the operation of virtual environment business, the software of the virtual environment can be debugged through the integrated development tools of the local development environment.

[0018] Furthermore, the semi-physical device resource sharing includes: interacting with the semi-physical stimulus environment through an interface sub-card, inputting stimulus into the semi-physical stimulus environment, and realizing integration with the semi-physical stimulus environment.

[0019] A system for constructing a digital twin of an embedded computing platform, comprising: The modular virtual environment building module is configured to extract the hardware parameters of physical devices, simulate the core hardware and supporting operating components of embedded computer boards, build a general digital target machine model library, and construct a modular virtual environment; it also allows for custom configuration of model components and encapsulation into units that can be assembled and reused. The performance incentive and evaluation module is configured to perform performance incentives and evaluations based on data distribution service communication technology for data transmission, and to perform the development and joint testing, testing and verification, deployment and maintenance and upgrade and expansion phases. The visualization monitoring and debugging module is configured to deploy functional modules in a microservice manner based on visualization monitoring and debugging tools, and to perform business data visualization, hardware resource evaluation, integrated debugging, and semi-physical equipment resource sharing.

[0020] The beneficial effects of this invention are as follows: 1. This invention extracts physical device hardware parameters, simulates core hardware and supporting components, and constructs a general-purpose digital target machine model library and a componentized virtual environment. Model components can be customized, configured, and encapsulated for reuse. This invention can improve model reusability, reduce redundant development costs, and adapt to the needs of different types of embedded computing platforms; it overcomes the shortcomings of insufficient configuration flexibility in the CN119512687A model and solves the problem of low reusability in the CN120104434A model, reducing adaptation costs and quickly responding to diverse needs.

[0021] 2. This invention relies on data transmission technology to provide performance incentives and evaluations across the entire development and testing phase, including deployment, maintenance, and upgrades / expansions. The development and testing phase ensures smooth hardware and software collaboration; the testing and verification phase achieves full functional coverage and optimization; the deployment and maintenance phase simplifies operations and improves fault response speed; and the upgrade / expansion phase rapidly adapts to hardware changes. It overcomes the limitations of CN119512687A, which lacks a full lifecycle assessment, and compensates for the shortcomings of CN120104434A, which only focuses on the maintenance phase, covering the entire process and reducing losses during phase transitions.

[0022] 3. This invention employs data distribution service communication technology to ensure real-time and accurate data transmission, providing reliable support for full-stage performance evaluation. The evaluation covers multiple dimensions, including functional integrity and resource adaptability, accurately reflecting the mapping consistency between the digital twin and physical devices. Compared to the insufficient data transmission and evaluation coordination issues in CN119512687A, and the lack of systematic evaluation in CN120104434A, the evaluation results of this invention are more realistic, providing a comprehensive decision-making basis for system optimization.

[0023] 4. This invention utilizes microservice deployment modules to achieve business data visualization, hardware resource assessment, integrated debugging, and semi-physical device resource sharing. Integrated debugging breaks down environmental barriers, while semi-physical integration enhances the realism of test scenarios. It addresses the insufficient semi-physical integration depth issue in CN119512687A, improves the poor integration of debugging tools in CN120104434A, enhances problem localization and resolution efficiency, and strengthens system flexibility.

[0024] 5. When hardware changes occur, this invention uses a visual interface to replace model components, configure parameters, and connect the bus, quickly generating a new adapted model. This reduces the technical threshold and operational complexity of upgrades and expansions, and shortens the adaptation cycle. Compared to the long adaptation cycle of CN119512687A and the lack of a flexible upgrade mechanism in CN120104434A, this invention can improve the system's adaptability to hardware iterations and extend the lifespan of the digital twin.

[0025] In summary, this invention can improve the efficiency, stability, and practicality of building digital twins for embedded computing platforms, and specifically addresses the shortcomings of existing technologies in terms of adaptability, scenario coverage, and integration depth, providing reliable technical support for full lifecycle management. Attached Figure Description

[0026] Figure 1 This is a schematic diagram of the components of the embedded system virtual simulation environment construction system according to Embodiment 2 of the present invention.

[0027] Figure 2 This is a diagram illustrating the graphical modeling process of the digital target machine in Embodiment 2 of the present invention.

[0028] Figure 3 This is a schematic diagram of the interaction between components in the embedded computing platform digital twin system of Embodiment 2 of the present invention.

[0029] Figure 4 This is a functional view of the communication middleware DDS in Embodiment 2 of the present invention.

[0030] Figure 5 This is a flowchart of the embedded computing platform digital twin system of Embodiment 2 of the present invention.

[0031] Figure 6 This is a flowchart of the test verification (fault injection) process of Embodiment 2 of the present invention. Detailed Implementation

[0032] To provide a clearer understanding of the technical features, objectives, and effects of the present invention, specific embodiments are now described. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention; that is, the described embodiments are only a part of the embodiments of the invention, not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without inventive effort are within the scope of protection of the present invention.

[0033] Example 1 This embodiment provides a method for constructing a digital twin of an embedded computing platform, including: Extract the hardware parameters of physical devices, simulate the core hardware and supporting operating components of embedded computer boards, build a general digital target machine model library, and construct a component-based virtual environment; customize the configuration of model components and encapsulate them into units that can be assembled and reused. Data transmission is performed based on data distribution service communication technology, and performance incentives and evaluations are conducted during the development and joint testing, testing and verification, deployment and maintenance, and upgrade and expansion phases. Based on visual monitoring and debugging tools, functional modules are deployed in a microservice manner to perform business data visualization, hardware resource assessment, integrated debugging, and semi-physical equipment resource sharing.

[0034] It should be noted that this method enables efficient reuse of model components, reduces repetitive development work, ensures the real-time performance and reliability of data transmission through the application of data distribution service communication technology, enhances the flexibility and scalability of functional modules through the microservice deployment model, and fully supports the full lifecycle management of the embedded computing platform's digital twin through the collaborative implementation of various functions, thereby improving the overall development and operation efficiency.

[0035] Preferably, the core hardware and supporting operating components of the embedded board include a CPU processor architecture, operating system, board-level support package, bus interface and interaction object; the general digital target machine model library includes models corresponding to various types of processors, operating systems, peripheral interfaces and peripheral sensors.

[0036] Specifically, when simulating the core hardware and supporting operating components of embedded boards, the CPU processor architecture is explicitly taken as the core simulation object. Simultaneously, a comprehensive simulation is performed on the compatible operating system, the board-level support package that ensures hardware and software compatibility, the bus interface that realizes data transmission, and the interactive objects that have data interaction or functional cooperation with the board. In the process of building a general digital target machine model library, the characteristic parameters of various types of processors with mainstream and special needs on the market are collected for modeling. The operating logic models of different versions and types of operating systems are covered. Corresponding models are built for the communication protocols and connection specifications of various peripheral interfaces. At the same time, the sensing principles and data output formats of common peripheral sensors are simulated and modeled. All of the above models are integrated to form a complete general digital target machine model library.

[0037] It should be noted that by clearly defining the specific scope of the core hardware and supporting operating components of the embedded board, the comprehensiveness and relevance of the simulation are ensured. The general digital target machine model library covers various key models and can be adapted to different types of embedded computing platforms, thereby improving the versatility and applicability of the model library.

[0038] Preferably, during the development and testing phases, a software and hardware co-design and development model based on a general-purpose digital target machine model is adopted, and the debugging environment is consistent with the hardware debugging environment. Specifically, during the development and testing phases, firstly, relevant models such as processors, operating systems, and peripheral interfaces that match the actual physical devices are selected from the general-purpose digital target machine model library to build a virtual hardware operating environment; during software development, code is written, compiled, and initially tested based on this virtual hardware environment, while hardware design is carried out simultaneously with reference to the adaptation requirements of the virtual environment, achieving coordinated advancement of software and hardware design; when building the debugging environment, the configuration strictly refers to the key characteristics of the physical hardware debugging environment, such as interface types, operating logic, and fault feedback mechanisms, to ensure that the virtual debugging environment is consistent with the physical hardware debugging environment in terms of user experience and functional performance.

[0039] It should be noted that the software and hardware co-design and development model reduces compatibility conflicts between software and hardware, and shortens the development cycle; the consistency between the debugging environment and the hardware debugging environment eliminates the need for developers to make adaptation adjustments between different environments, reducing debugging difficulty and improving the efficiency and accuracy of development and joint testing.

[0040] Preferably, during the testing and verification phase, all software within the embedded system undergoes layered and graded testing. Real-world fault injections are simulated for performance incentives, covering all functional tests at the unit, integration, and system stages. This also supports regression testing and closed-loop upgrades of the test case library. Specifically, during the testing and verification phase, all software within the embedded system is first divided into layers and grades according to module hierarchy and functional importance. For software modules at different levels, corresponding test plans are developed, and unit testing, integration testing, and system testing are conducted sequentially to ensure coverage of all software functionalities. During testing, real-world fault scenarios such as hardware failures, communication anomalies, and data errors that may occur in physical devices during actual operation are simulated. Relevant fault incentive signals are injected into the system, and the system's response and processing capabilities are observed. After testing, for subsequent software changes or added functions, regression testing is conducted based on existing test cases. Simultaneously, new problems and scenarios discovered during testing are added to the test case library, achieving closed-loop updates and upgrades of the test case library.

[0041] It should be noted that layered and graded testing ensures the systematic and comprehensive nature of testing, avoiding the omission of key functionalities; the method of injecting real faults makes the performance evaluation more in line with actual application scenarios, improving the reliability of the system; regression testing and closed-loop upgrades of the test case library can continuously ensure software quality and reduce the risk of failures during subsequent system operation.

[0042] Preferably, during the deployment and maintenance phase, a hardware and software model simulating a real system is set up to support one-click deployment, and the interactive data flow status, log recording, playback control, and fault information in the system are monitored in real time. Specifically, during the deployment and maintenance phase, the hardware and software model simulating the real system is integrated and configured in advance, standardized deployment procedures and parameter settings are formulated, and a one-click deployment function module is built. Users only need to trigger the deployment command, and the system can automatically complete the loading, configuration, and startup of the hardware and software model, quickly building a virtual operating environment consistent with the real system. At the same time, a real-time monitoring system is built to capture the interactive data flow between various components in the system in real time through a data acquisition interface, record various operation logs, status logs, and other information during system operation, and provide log query and management functions. A data playback control function is set up to support the playback of historical operating data according to specified time periods or event nodes. When a system failure occurs, the monitoring system captures the time, location, and type of the failure in real time and provides timely feedback.

[0043] It should be noted that the one-click deployment function simplifies the deployment process, lowers the deployment threshold, and improves deployment efficiency; real-time monitoring of data flow status, log records, and fault information makes it easier for operation and maintenance personnel to grasp the system's operating status in a timely manner and quickly locate and troubleshoot faults; the data playback function provides strong support for fault analysis and system optimization, improving the convenience and effectiveness of deployment and operation and maintenance.

[0044] Preferably, during the upgrade and expansion phase, when the CPU processor architecture, operating system, bus, or peripherals of the system hardware change, the replacement of board model components, parameter configuration, and bus connection are completed through a visual interface, generating a new board adaptation model. Specifically, during the upgrade and expansion phase, when the CPU processor architecture, operating system, bus, or peripherals of the system hardware change, the system automatically detects the type of change and presents relevant prompts in the visual interface; the user selects board model components matching the changed hardware from the general digital target machine model library through the operation menu of the visual interface, replacing the original model components; in the visual interface, the user adjusts and configures the relevant parameters of the newly selected model components according to the parameter requirements of the changed hardware; the system automatically completes the adaptation adjustment of the bus connection based on the configured model components and the characteristics of the hardware, ultimately generating a new board model that is fully compatible with the changed hardware.

[0045] It should be noted that the use of a visual interface for replacing model components, configuring parameters, and connecting buses simplifies the upgrade and expansion process, lowers the technical threshold, and eliminates the need for professional personnel to write complex code and configure it. It also allows for the rapid generation of new board adaptation models, shortens the system upgrade and expansion cycle, and improves the system's adaptability and flexibility to hardware device changes.

[0046] Preferably, business data visualization includes data analysis, data filtering, anomaly handling, historical data import, and historical data playback. Specifically, during the implementation of business data visualization, various types of business data generated during system operation are first collected and organized. Appropriate data analysis algorithms are used to mine and analyze the data, identifying the relationships and patterns of change between data. Filtering rules are set according to the purpose and type of the data to screen the collected raw data, retaining valid data and removing useless data. When abnormal values ​​or events exceeding the normal range appear in the data, the system automatically triggers an early warning mechanism to promptly alert staff for handling. It supports importing historical business data from external storage into the system according to a specified format and integrating it with existing data. Simultaneously, a historical data playback function is provided, dynamically presenting historical data in chronological order or event sequence, facilitating staff's review of the system's past operational status.

[0047] It should be noted that data analysis can uncover the potential value of data and provide data support for system optimization and decision-making; data filtering reduces interference from useless data and improves data processing efficiency; abnormal event handling ensures the stable operation of the system; and the historical data import and playback functions make it easy for staff to trace the system's operating history, conduct problem analysis and experience summarization, and comprehensively improve the utilization efficiency of business data.

[0048] Preferably, integrated debugging includes: integrating virtual environment business software with local debugging tools, enabling software debugging of the virtual environment during its operation using the integrated development environment (IDE) of the local development environment. Specifically, in implementing integrated debugging, a communication connection is first established between the virtual environment business software and the local debugging tools to achieve data transmission and command interaction between the two; the running status data and log information of the virtual environment business software are synchronized to the local debugging tools in real time; when the virtual environment business software is running, developers send debugging commands through the IDE of the local development environment to perform debugging operations such as setting breakpoints, single-stepping code execution, and viewing variables in the software of the virtual environment; relevant data and results generated during debugging are fed back to the local development tools in real time for developers to view and analyze.

[0049] It should be noted that integrated debugging achieves seamless integration between virtual environment business software and local debugging tools, breaking down the barriers between the virtual environment and the local development environment; developers can complete debugging operations without switching to the virtual environment, simplifying the debugging process and improving debugging efficiency; real-time data synchronization and result feedback make it easier for developers to quickly locate software problems and shorten the debugging cycle.

[0050] Preferably, the sharing of semi-physical device resources includes: interacting with the semi-physical stimulus environment through an interface daughter card, inputting stimulus into the semi-physical stimulus environment, and achieving integration with the semi-physical stimulus environment. Specifically, when realizing the sharing of semi-physical device resources, firstly, an interface daughter card matching the communication protocol of the semi-physical stimulus environment is selected, and the interface daughter card is physically connected and protocol adapted to both the virtual environment and the semi-physical stimulus environment; the virtual environment generates corresponding stimulus signals according to test requirements, and the interface daughter card converts the stimulus signals into a format that the semi-physical stimulus environment can recognize and receive; the interface daughter card inputs the converted stimulus signals into the semi-physical stimulus environment, and simultaneously receives the response data fed back by the semi-physical stimulus environment, and transmits it back to the virtual environment, realizing bidirectional data interaction and functional integration between the virtual environment and the semi-physical stimulus environment.

[0051] It should be noted that the interface daughter card enables an effective connection between the virtual environment and the semi-physical stimulus environment, breaking the limitations of pure virtual environment testing; the virtual environment inputs stimuli into the semi-physical stimulus environment, making the test scenario closer to the actual application situation, improving the authenticity and reliability of the test results; the sharing of semi-physical device resources expands the system's testing capabilities and application scenarios, providing strong support for the comprehensive testing of embedded computing platforms.

[0052] Accordingly, this embodiment also provides a digital twin construction system for an embedded computing platform, including: The modular virtual environment building module is configured to extract the hardware parameters of physical devices, simulate the core hardware and supporting operating components of embedded computer boards, build a general digital target machine model library, and construct a modular virtual environment; it also allows for custom configuration of model components and encapsulation into units that can be assembled and reused. The performance incentive and evaluation module is configured to perform performance incentives and evaluations based on data distribution service communication technology for data transmission, and to perform the development and joint testing, testing and verification, deployment and maintenance and upgrade and expansion phases. The visualization monitoring and debugging module is configured to deploy functional modules in a microservice manner based on visualization monitoring and debugging tools, and to perform business data visualization, hardware resource evaluation, integrated debugging, and semi-physical equipment resource sharing.

[0053] Specifically, after the component-based virtual environment construction module starts, it first extracts the hardware parameters of the physical device through the data acquisition interface. Based on these parameters, it performs simulation modeling of the core hardware and supporting operating components of the embedded computer board, integrates various simulation models to form a general digital target machine model library, and builds a component-based virtual environment. This module also provides a custom configuration function for model components. After the user completes the configuration according to their needs, the module automatically encapsulates the configured model components into assembleable and reusable units. The performance incentive and evaluation module builds a stable data transmission channel based on data distribution service communication technology. In each stage of development and joint testing, testing and verification, deployment and maintenance, and upgrade and expansion, relevant data is obtained through this channel, performance incentive operations are performed, and comprehensive evaluation is conducted to output the evaluation results. The visualization monitoring and debugging module selects suitable visualization monitoring and debugging tools and deploys functional modules such as business data visualization, hardware resource evaluation, integrated debugging, and semi-physical equipment resource sharing according to a microservice architecture. Each functional module runs independently and works collaboratively to complete relevant business operations.

[0054] It should be noted that this system achieves full-process coverage of the construction of digital twins for embedded computing platforms through the division of labor and cooperation of three functional modules; the component-based virtual environment construction module ensures the reusability of the model and the flexibility of the virtual environment; the performance incentive and evaluation module ensures accurate evaluation of system performance at each stage; and the visual monitoring and debugging module improves the operability and maintainability of the system. The three modules work together to comprehensively improve the efficiency and quality of the construction of digital twins for embedded computing platforms, providing strong system support for the full lifecycle management of embedded computing platforms.

[0055] Example 2 This embodiment provides a method and system for constructing a digital twin of an embedded computing platform. It uses a QEMU model to construct a lightweight digital twin, which can realize high-fidelity simulation of embedded software throughout its entire lifecycle without hardware. It can also discover software problems through fault injection, continuous integration feedback and automated regression testing, thereby improving the efficiency of embedded system development. The specific details are as follows.

[0056] I. Lightweight Model Library Based on Target Hardware Configuration By extracting the hardware parameters of physical devices and simulating the CPU processor architecture, operating system, BSP, bus interface, and interactive objects of embedded computer boards, a general-purpose digital target machine model library independent of hardware devices is realized, ensuring the openness of the digital twin modeling architecture. By upgrading and replacing the functional modules of digital boards, simulation stimulation of various types of processing boards can be completed.

[0057] This embodiment employs a component-based virtual design, constructing component-based virtual environments, including: a processor minimum system virtual component, an operating system virtual component, an interactive object virtual component, a bus interface virtual component, and a virtual runtime environment construction platform, such as... Figure 1 As shown.

[0058] The custom configuration feature for model components allows for the encapsulation of corresponding components into assemblable and reusable units based on the composition and characteristics of the functional model, thereby enabling the reuse of model components within a visual graphical interface. The graphical modeling process is as follows: Figure 2 As shown.

[0059] II. Building a Digital Twin Interface Based on DDS This embodiment uses twin technology to implement different business functions through different components. The components communicate with each other using DDS. It adopts a data-centric network design pattern and an efficient real-time data transmission mechanism. Combined with hardware acceleration and optimized drivers, it achieves near-real-time performance.

[0060] This real-time data transmission mechanism includes: underlying model hardware acceleration to improve model running speed, thereby increasing data transmission rate; driver software optimization to improve the operating efficiency of simulation environment software; cross-platform communication framework construction to improve communication efficiency between different platforms and simulation subsystems; hardware platform acceleration to improve hardware running speed, thereby improving the running speed of the simulation system; and a highly efficient real-time data transmission interface designed to ensure real-time synchronization of data between the virtual environment and the actual hardware through hardware acceleration and optimized drivers; and a universal data format defined, through which simulation resources can quickly achieve communication and interaction on single or multiple digital board models or external semi-physical devices.

[0061] The communication middleware module DDS is encapsulated to implement publish and subscribe pattern data communication, such as... Figure 3 and Figure 4 As shown, each node can define the data type and name through Topics, use DataWriter / DataReader to read and write the actual data, and control various communication behaviors through QoS Policies.

[0062] III. Full Life Cycle Performance Incentives and Evaluation like Figure 5 As shown, the digital twin of the embedded computing platform runs through the entire embedded system development lifecycle: 1) Development and testing phase: Model-based software and hardware co-design and development, supporting online debugging, 1:1 replication with hardware debugging environment, greatly shortening the development and testing cycle.

[0063] 2) Testing and verification phase: such as Figure 6 As shown, it can perform layered and graded testing on all software within an embedded system, simulate real fault injection for performance incentives, cover all functional tests (unit, integration, and system phase tests) in a fully digital scenario, and immediately perform regression testing when problems are found, and upgrade the test case library in a closed loop to improve product reliability.

[0064] 3) Deployment and maintenance phase: Various software and hardware models simulating the real system can be deployed at any time with one click, and the interactive data flow status, log recording, playback control, fault information, etc. of the system can be monitored in real time, reducing the cost of hardware equipment resources, and the system status can be monitored synchronously with full digital simulation.

[0065] 4) Upgrades and expansions: When the CPU, operating system, bus, or peripherals of the system hardware devices change, developers do not need to redesign the entire simulation framework. They only need to replace the board model components, configure parameters, and connect the bus through the visual interface to quickly generate a new board adaptation model, which greatly improves development efficiency and adaptation flexibility.

[0066] IV. Visualized operation and sharing of semi-physical equipment resources This embodiment provides a visual monitoring and debugging tool, employing a B / S architecture. The backend is implemented using Java and Go, while the frontend uses the React framework, implementing each functional module in a microservice manner, which facilitates platform access, expansion, and external service provision. The frontend page displays the system status, hardware resources, simulation progress, etc., supporting graphical debugging and troubleshooting, as detailed below.

[0067] 1) Business data visualization enables front-end users to view and evaluate business data in real time, including data analysis, filtering, abnormal event handling, historical data import and playback.

[0068] 2) Hardware resource assessment: Real-time monitoring and dynamic deployment of hardware resources used in the virtual environment can be achieved, improving hardware utilization efficiency.

[0069] 3) Integrated debugging function: It integrates virtual environment business software and local debugging tools, enabling software debugging of the virtual environment through the local development environment IDE during the operation of the virtual environment business, thereby improving development and testing efficiency.

[0070] 4) Supports integration with the physical stimulus environment and provides input stimulus to the physical stimulus environment, interacting with the physical stimulus environment through the interface sub-card.

[0071] 5) Highly efficient visual monitoring function, supporting real-time viewing of system running status, resource usage, etc., while also equipped with powerful debugging functions to help developers quickly locate and regress problems.

[0072] In summary, this invention constructs a full-scenario collaborative simulation and verification platform for embedded systems based on embedded computing platform digital twin technology. It not only realizes full-scenario closed-loop simulation of control flow and virtual interaction, but also completes the full-process system software simulation testing after the development of the front-end hardware modules, reducing the time for later integration and testing of embedded system application software and hardware, but also significantly shortens the firmware testing cycle and effectively reduces the defect escape rate.

[0073] Example 3 This embodiment is based on embodiment 1: This embodiment provides a computer device, including a memory and a processor. The memory stores a computer program, and the processor executes the computer program to implement the embedded computing platform digital twin construction method of Embodiment 1. The computer program can be in the form of source code, object code, executable file, or some intermediate form.

[0074] Example 4 This embodiment is based on embodiment 1: This embodiment provides a computer-readable storage medium storing a computer program that, when executed by a processor, implements the embedded computing platform digital twin construction method of Embodiment 1. The computer program can be in the form of source code, object code, executable file, or some intermediate form. The storage medium includes any entity or device capable of carrying computer program code, a recording medium, a computer memory, a read-only memory (ROM), a random access memory (RAM), an electrical carrier signal, a telecommunication signal, and a software distribution medium, etc.

[0075] The above description is merely a preferred embodiment of the present invention. It should be understood that the present invention is not limited to the forms disclosed herein and should not be construed as excluding other embodiments. It can be used in various other combinations, modifications, and environments, and can be altered within the scope of the concept described herein through the above teachings or related technologies or knowledge. Modifications and variations made by those skilled in the art that do not depart from the spirit and scope of the present invention should be within the protection scope of the appended claims.

[0076] It should be noted that, for the sake of simplicity, the foregoing method embodiments are described as a series of actions. However, those skilled in the art should understand that this application is not limited to the described order of actions, as some steps may be performed in other orders or simultaneously according to this application. Furthermore, those skilled in the art should also understand that the embodiments described in the specification are preferred embodiments, and the actions and modules involved are not necessarily essential to this application.

Claims

1. A method for constructing a digital twin of an embedded computing platform, characterized in that, include: Extract the hardware parameters of physical devices, simulate the core hardware and supporting operating components of embedded computer boards, build a general digital target machine model library, and construct a componentized virtual environment; Customize the model components and encapsulate them into units that can be assembled and reused; Data transmission is performed based on data distribution service communication technology, and performance incentives and evaluations are conducted during the development and joint testing, testing and verification, deployment and maintenance, and upgrade and expansion phases. Based on visual monitoring and debugging tools, functional modules are deployed in a microservice manner to perform business data visualization, hardware resource assessment, integrated debugging, and semi-physical equipment resource sharing.

2. The method for constructing a digital twin of an embedded computing platform according to claim 1, characterized in that, The embedded board core hardware and supporting operating components include CPU processor architecture, operating system, board-level support package, bus interface and interaction object; the general digital target machine model library includes models corresponding to various types of processors, operating systems, peripheral interfaces and peripheral sensors.

3. The method for constructing a digital twin of an embedded computing platform according to claim 1, characterized in that, During the development and testing phase, a software and hardware co-design and development model based on a general digital target machine model is adopted, and the debugging environment is consistent with the hardware debugging environment.

4. The method for constructing a digital twin of an embedded computing platform according to claim 1, characterized in that, During the testing and verification phase, all software within the embedded system undergoes layered and graded testing. Real-world fault injections are simulated for performance incentives, covering all functional tests at the unit, integration, and system stages. Regression testing and closed-loop upgrades of the test case library are also supported.

5. The method for constructing a digital twin of an embedded computing platform according to claim 1, characterized in that, During the deployment and maintenance phase, a software and hardware model that supports one-click deployment to simulate a real system is set up, and the interactive data flow status, log recording, playback control, and fault information in the system are monitored in real time.

6. The method for constructing a digital twin of an embedded computing platform according to claim 1, characterized in that, During the upgrade and expansion phase, when the CPU processor architecture, operating system, bus, or peripherals of the system hardware device change, the replacement of board model components, parameter configuration, and bus connection are completed through a visual interface to generate a new board adaptation model.

7. The method for constructing a digital twin of an embedded computing platform according to claim 1, characterized in that, The business data visualization includes data analysis, data filtering, abnormal event handling, historical data import, and historical data playback.

8. The method for constructing a digital twin of an embedded computing platform according to claim 1, characterized in that, The integrated debugging includes: integrating virtual environment business software with local debugging tools, enabling software debugging of the virtual environment through the integrated development tools of the local development environment during the operation of the virtual environment business.

9. The method for constructing a digital twin of an embedded computing platform according to claim 1, characterized in that, The semi-physical device resource sharing includes: interacting with the semi-physical stimulus environment through an interface sub-card, inputting stimulus into the semi-physical stimulus environment, and realizing integration with the semi-physical stimulus environment.

10. A system for constructing a digital twin of an embedded computing platform, characterized in that, include: The modular virtual environment building module is configured to extract the hardware parameters of physical devices, simulate the core hardware and supporting operating components of embedded computer boards, build a general digital target machine model library, and construct a modular virtual environment; it also allows for custom configuration of model components and encapsulation into units that can be assembled and reused. The performance incentive and evaluation module is configured to perform performance incentives and evaluations based on data distribution service communication technology for data transmission, and to perform the development and joint testing, testing and verification, deployment and maintenance and upgrade and expansion phases. The visualization monitoring and debugging module is configured to deploy functional modules in a microservice manner based on visualization monitoring and debugging tools, and to perform business data visualization, hardware resource evaluation, integrated debugging, and semi-physical equipment resource sharing.

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