Semiconductor chip and PCB (printed circuit board) flat transformation integrated device

Abstract

The invention relates to the technical field of semiconductor device packaging, and discloses a semiconductor chip and PCB (printed circuit board) flat transformation integrated device, which comprises a circuit board, an upper half magnetic core arranged on the upper surface of the circuit board and a lower half magnetic core arranged on the lower surface of the circuit board, and is characterized in that a primary winding corresponding to the upper half magnetic core is arranged on the inner side of the circuit board; a secondary winding which is located below the primary winding and corresponds to the primary winding is arranged on the inner side of the circuit board, an embedding cavity corresponding to the secondary winding is formed in the inner side of the circuit board, and a semiconductor chip is installed in the embedding cavity. According to the semiconductor chip and PCB flat transformation integrated device, the semiconductor chip is directly embedded into the circuit board and is in zero-distance connection with the terminal point of the secondary winding of the planar transformer, so that parasitic inductance and resistance introduced by long wiring in the traditional surface mounting layout are eliminated, and the switching loss and voltage stress of a power loop are remarkably reduced; and meanwhile, the surface area of the circuit board is released, so that the power density of the module is increased.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of semiconductor device packaging, in particular to a semiconductor chip and PCB flat transformer integrated device. BACKGROUND

[0002] In the field of semiconductor and power electronics, in order to realize efficient DC-DC or AC-DC power conversion, it is usually necessary to integrate power semiconductor chips and high-frequency transformers in the same circuit system; among them, the planar transformer is often designed in the internal layer of the multi-layer printed circuit board due to its low profile, good consistency, and suitability for high-frequency work, and the winding is formed by etching copper foil; the power semiconductor chip is used as a switching or rectifying element, which is the core of completing power conversion; in the existing mainstream scheme, the planar transformer and the power chip are usually treated as two independent discrete elements: the planar transformer is fixed on the specific area of the PCB through the magnetic core, and the winding end points are led out to the surface of the PCB through the via; the power chip is mounted on the reserved pad on the surface of the PCB by surface mounting or wire bonding, and the electrical connection between the two is completed by the copper foil trace of the surface layer or the internal layer of the PCB, thereby constituting a power conversion module together.

[0003] However, the above-mentioned existing layout and mounting method has certain defects: first, the discrete architecture leads to a long connection path between the power chip and the transformer winding, introducing a parasitic inductance and resistance that cannot be ignored, which not only increases the switching loss and voltage stress, limits the improvement of working frequency, but also reduces the conversion efficiency and reliability, at the same time, the chip and the transformer occupy the surface area of the PCB, which restricts the power density of the module; in addition, the high heat flux heat generated by the power chip during operation is mainly dissipated to the environment through the PCB below, and the heat dissipation path is long and the thermal resistance is large, which easily leads to the chip junction temperature being too high, which becomes a key factor limiting the output power and life of the module. SUMMARY

[0004] The technical problem to be solved by the present application is that the existing discrete layout leads to large parasitic parameters between the chip and the transformer, low power density, and poor heat dissipation path, therefore we propose a semiconductor chip and PCB flat transformer integrated device.

[0005] To achieve the above objectives, this application adopts the following technical solution: a semiconductor chip and PCB flat plate transformer integration device, including a circuit board, an upper half magnetic core disposed on the upper surface of the circuit board and a lower half magnetic core disposed on the lower surface of the circuit board, a primary winding corresponding to the upper half magnetic core disposed inside the circuit board, a secondary winding located below the primary winding and corresponding to the primary winding disposed inside the circuit board, an embedding cavity corresponding to the secondary winding disposed inside the circuit board, a semiconductor chip being installed in the embedding cavity, and the electrical terminus of the secondary winding extending to the inside of the embedding cavity and having a copper foil pad corresponding to the bottom of the semiconductor chip; It also includes a heat dissipation component disposed on the circuit board. The heat dissipation component includes a heat-conducting layer disposed on the inner side of the circuit board. A heat-conducting main channel corresponding to the embedded cavity is disposed on the heat-conducting layer. A heat dissipation pad corresponding to the upper half magnetic core is disposed on the upper surface of the circuit board. A heat-conducting branch corresponding to the heat dissipation pad is disposed on the heat-conducting main channel. A copper-filled via array is disposed between the heat-conducting main channel and the copper foil pad, and between the heat-conducting branch and the heat dissipation pad.

[0006] Preferably, the upper half of the magnetic core is an E-type manganese-zinc ferrite core, which includes side legs at both ends and a middle leg in the middle. A window area is formed between the side legs and the middle leg. The window area on one side of the primary winding and the secondary winding corresponds to the window area. The heat dissipation pad corresponds to the side legs and the middle leg of the upper half of the magnetic core.

[0007] Preferably, the circuit board includes a top layer located at the topmost layer, a first primary winding layer disposed at the bottom of the top layer, a second primary winding layer disposed at the bottom of the first primary winding layer, a primary winding disposed on the first primary winding layer and the second primary winding layer, an electromagnetic shielding layer disposed at the bottom of the second primary winding layer, a secondary winding layer disposed at the bottom of the electromagnetic shielding layer, a secondary winding and an embedded cavity disposed on the secondary winding layer, and a heat-conducting layer disposed at the bottom of the secondary winding layer.

[0008] Preferably, the thermally conductive layer is based on polyimide and filled with boron nitride flakes.

[0009] Preferably, the four corners of the upper and lower magnetic cores are fixed to the circuit board by screws, the screws passing through the four corners of the upper and lower magnetic cores and the circuit board, and one end of the screw is threaded with a nut.

[0010] Preferably, an air gap adjustment mechanism is provided between the upper half magnetic core and the circuit board. The air gap adjustment mechanism includes a thermally conductive elastomer disposed between the side leg of the upper half magnetic core and the heat dissipation pad, and a thermally induced deformation element is disposed between the middle leg of the upper half magnetic core and the corresponding heat dissipation pad. The thermally induced deformation element deforms in response to the temperature change of the semiconductor chip to change the magnetic circuit air gap between the upper half magnetic core and the circuit board. A disc spring washer is provided on the outer side of the screw near the nut to provide preload to the upper magnetic core.

[0011] Preferably, the thermo-deformation element is a shape memory alloy sheet disposed at the bottom of the middle leg of the upper half magnetic core.

[0012] Preferably, the thermo-deformable element is a bimetallic strip disposed at the bottom of the middle leg of the upper half magnetic core. The bimetallic strip is composed of two metals with different coefficients of thermal expansion and is pre-formed into an upward arched shape. Its arch top contacts the middle leg, and both ends of the bimetallic strip are connected to the upper surface of the circuit board through a flexible thermally conductive connection layer.

[0013] Preferably, the flexible thermally conductive bonding layer is a high thermal conductivity silicone gel or a flexible epoxy resin.

[0014] Preferably, the thermally conductive elastomer is a high thermal conductivity silicone pad.

[0015] The technical effects and advantages of this invention are as follows: In this invention, by directly embedding the semiconductor chip inside the circuit board and achieving zero-distance connection with the end of the secondary winding of the planar transformer, the parasitic inductance and resistance introduced by long traces in the traditional surface mount layout are eliminated. This significantly reduces the switching losses and voltage stress of the power circuit, thereby allowing the system to operate at higher frequencies and improve conversion efficiency. At the same time, the built-in semiconductor chip frees up valuable surface area of ​​the circuit board, enabling a leap in module power density, and the overall structure is more robust and reliable due to the reduction of external solder joints.

[0016] Based on the above, to address the heat dissipation challenge of embedded semiconductor chips, a solid-state thermal bus consisting of a high-density copper-filled via array and a dedicated thermal conductive layer is constructed inside the circuit board. This structure can actively and with low resistance vertically conduct the concentrated heat generated by the semiconductor chip and rapidly diffuse it horizontally to the entire upper half of the magnetic core area, making the upper half of the magnetic core a heat sink. This integrated heat dissipation path effectively controls the junction temperature of the semiconductor chip without the need for external heat dissipation components, thus breaking through the thermal management bottleneck under high power density.

[0017] Based on the above, by using the heat generated by the semiconductor chip as a driving signal, the air gap of the upper half of the magnetic core is directly adjusted through the mechanical response of the thermo-deformable element. When under heavy load and high temperature, the air gap decreases, which increases the inductance, naturally suppressing current ripple and optimizing efficiency. At the same time, the increased clamping force between the upper half of the magnetic core and the circuit board reduces the interface thermal resistance and enhances heat dissipation. Under light load and low temperature, the larger air gap corresponds to the smaller inductance, reducing light load losses. Furthermore, the higher thermal resistance at this time helps the semiconductor chip to heat up quickly to the optimal efficiency range. This passive closed-loop mechanism synergistically optimizes the electrical and thermal performance under all operating conditions. Attached Figure Description

[0018] The disclosure of this invention is illustrated with reference to the accompanying drawings. It should be understood that the drawings are for illustrative purposes only and are not intended to limit the scope of protection of this invention. In the drawings, the same reference numerals are used to refer to the same parts: Figure 1 This is a schematic diagram of the structure of the present invention; Figure 2 This is a schematic diagram of the structure of the present invention from the bottom view; Figure 3 This is a schematic diagram of the upper half magnetic core, lower half magnetic core, and circuit board of the present invention in a disassembled state; Figure 4 This is a partial cross-sectional structural diagram of the connection between the upper and lower magnetic cores and the circuit board of the present invention. Figure 5 This is an exploded view of the circuit board of the present invention; Figure 6 This is a schematic diagram of the secondary winding layer of the present invention; Figure 7 This is a schematic diagram of the structure of the thermal conductive layer of the present invention; Figure 8 This is a schematic diagram of the structure of the first embodiment of the thermo-deformable element of the present invention; Figure 9 This is a schematic diagram of the structure of the second embodiment of the thermo-deformable element of the present invention; Figure 10 This is a schematic diagram of the overall mating structure of the screw and the butterfly spring washer of the present invention.

[0019] Legend: 1. Circuit board; 2. Upper half magnetic core; 3. Lower half magnetic core; 4. Screw; 5. Heat dissipation pad; 6. Primary winding; 7. Secondary winding; 8. Semiconductor chip; 9. Embedded cavity; 10. Main heat conduction channel; 11. Top layer; 12. First primary winding layer; 13. Second primary winding layer; 14. Electromagnetic shielding layer; 15. Secondary winding layer; 16. Heat conduction layer; 17. Auxiliary wiring layer; 18. Bottom layer; 19. Copper foil pad; 20. Heat conduction branch; 21. Heat conduction elastomer; 22. Shape memory alloy sheet; 23. Bimetallic sheet; 24. Flexible heat conduction connection layer; 25. Nut; 26. Butterfly spring washer. Detailed Implementation

[0020] It is readily understood that, based on the technical solution of this invention, those skilled in the art can propose various interchangeable structural methods and implementations without altering the essential spirit of the invention. Therefore, the following detailed embodiments and accompanying drawings are merely illustrative examples of the technical solution of this invention and should not be considered as the entirety of the invention or as limitations or restrictions on the technical solution of this invention.

[0021] Reference Figures 1-10As shown, the present invention provides a technical solution: a semiconductor chip and PCB flat plate transformer integration device, including a circuit board 1, an upper half magnetic core 2 disposed on the upper surface of the circuit board 1, and a lower half magnetic core 3 disposed on the lower surface of the circuit board 1. The upper half magnetic core 2 is an E-type manganese zinc ferrite core, which includes side legs at both ends and a middle leg located in the middle, and a window area is formed between the side legs and the middle leg. The lower half magnetic core 3 is an I-type ferrite core, and its outline matches that of the upper half magnetic core 2. A primary winding 6 corresponding to the upper half magnetic core 2 is disposed inside the circuit board 1. A secondary winding 7 located below the primary winding 6 and corresponding to the primary winding 6 is disposed inside the circuit board 1. An embedding cavity 9 corresponding to the secondary winding 7 is disposed inside the circuit board 1. A semiconductor chip 8 is installed in the embedding cavity 9.

[0022] Specifically, the circuit board 1 includes a top layer 11 located at the topmost layer, which uses a conventional FR-4 substrate and is chemically plated with nickel and gold. This layer is used to arrange surface mount components such as control integrated circuits, input / output power terminals and feedback networks. In the area covered by the upper half magnetic core 2, a large area heat dissipation pad 5 is formed using thickened copper foil. Its function is to serve as a key interface for heat to be conducted from the inside of the circuit board 1 to the upper half magnetic core 2. The heat dissipation pad 5 corresponds to the side legs and the middle legs of the upper half magnetic core 2. The top layer 11 has a first primary winding layer 12 at the bottom, and the first primary winding layer 12 has a second primary winding layer 13 at the bottom. These two layers are FR-4 dielectric and have identical planar spiral copper foil patterns etched on them. Together they form the primary winding 6 of the planar transformer. The two winding layers are electrically connected in parallel through a dense array of metallized vias to reduce the on-resistance. The projection of the copper foil patterns of all primary windings 6 onto the horizontal plane is limited to one of the window areas of the upper half core 2. A secondary winding layer 15 is disposed at the bottom of the second primary winding layer 13. The secondary winding 7 and the embedded cavity 9 are disposed on the secondary winding layer 15. This layer is made of FR-4 dielectric, and a planar spiral copper foil of the secondary winding 7 is etched on it. The copper thickness is usually increased to carry a larger current. The electrical terminus of the secondary winding 7 is an enlarged exposed copper foil pad 19. This copper foil pad 19 directly forms the bottom of the downward-opening embedded cavity 9. The embedded cavity 9 is mechanically milled downward from the upper surface of the secondary winding layer 15, and its depth is designed according to the thickness of the semiconductor chip 8. The semiconductor chip 8 is placed in the embedded cavity with the active surface facing down. Inside cavity 9, the power electrodes are directly aligned and reflow soldered onto copper foil pads 19 via tin-silver-copper solder bumps or copper pillar bumps. This structure achieves zero-distance, ultra-low parasitic inductance electrical connection between the transformer secondary output and the semiconductor chip 8 input. The control electrodes of the semiconductor chip 8 are connected to the control circuit pads of the top layer 11 via several metal bonding wires. After soldering, a highly thermally conductive, low-strain insulating encapsulant is injected into the embedded cavity 9, preferably filled with boron nitride epoxy resin, for bottom filling and overall encapsulation. Its function is to fix the semiconductor chip 8, buffer thermomechanical stress, and provide additional auxiliary heat dissipation paths. An electromagnetic shielding layer 14 is provided between the second primary winding layer 13 and the secondary winding layer 15. This layer is a complete and uninterrupted copper foil layer. Its function is to provide complete grounding shielding, effectively isolate the high-frequency noise coupling between the primary winding 6 and the secondary winding 7, and serve as an electrostatic discharge protection layer. The electromagnetic shielding layer 14 is insulated from the adjacent second primary winding layer 13 and secondary winding layer 15 by solid FR-4 dielectric to ensure no electrical short circuit.

[0023] It also includes a heat dissipation assembly disposed on the circuit board 1. In a preferred embodiment, the heat dissipation assembly includes a thermally conductive layer 16 disposed on the inner side of the circuit board 1. The thermally conductive layer 16 is located at the bottom of the secondary winding layer 15 and is made of an insulating high thermal conductivity composite material sheet. Specifically, it is made of polyimide as the matrix and filled with a certain volume fraction of boron nitride flakes. After preforming, it is pressed into the circuit board 1. The material has a high in-plane thermal conductivity. The sheet is pre-processed with specific thermally conductive main channels 10 and thermally conductive branches 20 patterns. The thermally conductive main channels 10 are located directly below the embedded cavity 9. The thermally conductive branches 20 extend to the area inside the circuit board 1 corresponding to the middle leg and side leg of the upper half magnetic core 2. This layer is firmly bonded to the upper and lower layers by a prepreg. Its function is to serve as a highly efficient heat diffusion channel in the horizontal direction. The thermally conductive main channels 10 and Copper via arrays are provided between the copper foil pads 19 and between the heat-conducting branches 20 and the heat dissipation pads 5. A larger diameter isolation ring is etched at the corresponding position of the electromagnetic shielding layer 14 to ensure that the vias are insulated from the electromagnetic shielding layer 14. The heat from the semiconductor chip 8 region is introduced into the heat-conducting layer 16 through the copper vias between the heat-conducting main channel 10 and the copper foil pads 19. With its ultra-high in-plane thermal conductivity, the heat spreads rapidly to the surrounding areas along the preset pattern of the heat-conducting main channel 10. Its function is to achieve efficient and directional heat transfer within the plane of the circuit board 1 and avoid local overheating. The copper vias between the heat-conducting branches 20 and the heat dissipation pads 5 are used to conduct the heat that has been horizontally transferred to the target area vertically upward to the surface of the circuit board 1. Finally, the heat is dissipated through the upper half magnetic core 2.

[0024] The four corners of the upper magnetic core 2 and the lower magnetic core 3 are fixed to the circuit board 1 by screws 4. The screws 4 pass through the four corners of the upper magnetic core 2 and the lower magnetic core 3, as well as the circuit board 1, and one end of the screw 4 is threaded with a nut 25. The penetration point between the screw 4 and the circuit board 1 is insulated to ensure that any conductive part maintains a safe distance from the edge of the hole, preventing accidental short circuits caused by drilling errors or material deformation.

[0025] An air gap adjustment mechanism is provided between the upper magnetic core 2 and the circuit board 1. The air gap adjustment mechanism includes a thermally conductive elastomer 21 disposed between the side leg of the upper magnetic core 2 and the heat dissipation pad 5. The thermally conductive elastomer 21 is preferably a high thermal conductivity silicone pad. Its function is to ensure good thermal contact between the outer leg and the upper surface of the circuit board 1 while allowing micro-movement, and to buffer mechanical stress. A thermo-deformable element is disposed between the middle leg of the upper magnetic core 2 and the corresponding heat dissipation pad 5. The thermo-deformable element deforms in response to the temperature change of the semiconductor chip 8 to change the magnetic circuit air gap between the upper magnetic core 2 and the circuit board 1. A butterfly spring washer 26 is disposed on the outer side of the screw 4 near the nut 25 to provide pre-tightening force to the upper magnetic core 2. Its function is to: ensure tight contact between the interfaces; allow the upper magnetic core 2 to make small vertical displacements as a whole; absorb the thermal expansion stress between different materials and protect the brittle upper magnetic core 2.

[0026] The thermally induced deformation element has at least two embodiments: First embodiment: as follows Figure 8 As shown, the thermally induced deformation element is a shape memory alloy sheet 22 disposed at the bottom of the middle leg of the upper half magnetic core 2. It is a nickel-titanium alloy sheet that has undergone unidirectional shape memory training and is firmly bonded to the lower surface of the middle leg of the upper half magnetic core 2. Its austenitic phase transformation end temperature is set to T. When the directional heat flow from the semiconductor chip 8 causes the temperature of this area to be lower than T, the shape memory alloy sheet 22 is in a thicker martensite phase, with a larger air gap and a smaller inductance, thus optimizing the light load efficiency. When the temperature reaches or exceeds T, the shape memory alloy sheet 22 transforms into a thinner austenitic phase. Driven by the pre-tightening force of the butterfly spring washer 26, the upper half magnetic core 2 moves downward as a whole, the air gap decreases, and the inductance increases, thereby optimizing the heavy load ripple and enhancing the heat dissipation interface contact pressure.

[0027] Second embodiment: as follows Figure 9 As shown, the thermo-deformable element is a bimetallic strip 23 disposed at the bottom of the middle leg of the upper half magnetic core 2. The bimetallic strip 23 is composed of two metals with different coefficients of thermal expansion and is pre-formed into an upward arched shape. Its arch top contacts the middle leg. When the temperature rises, the bimetallic strip 23 tends to flatten due to the difference in thermal expansion, and the arch height decreases, which drives the upper half magnetic core 2 to move downward, thereby reducing the air gap and increasing the inductance, achieving the same adjustment function as in the first embodiment. The two ends of the bimetallic strip 23 are connected to the upper surface of the circuit board 1 through a flexible thermally conductive connection layer 24. The flexible thermally conductive connection layer 24 is preferably a high thermal conductivity silicone gel or a flexible epoxy resin. While achieving mechanical fixation and heat transfer, it can absorb the stress generated during the thermo-deformation of the bimetallic strip 23 through its own elastic deformation, ensuring the long-term reliability of the connection.

[0028] It should be noted that the above adjustment function is based on the following principle: The air gap in the magnetic core is a key factor that determines the winding inductance. According to Ohm's law for magnetic circuits, inductance is inversely proportional to magnetic reluctance. Magnetic reluctance is mainly composed of the magnetic reluctance of the magnetic core material and the magnetic reluctance of the air gap connected in series. The air gap magnetic reluctance is much greater than the magnetic core magnetic reluctance and is directly proportional to the length of the air gap. Therefore, a small change in the air gap can lead to a significant change in inductance.

[0029] Therefore, under heavy load / high temperature conditions: the heat-generating air gap adjustment mechanism of semiconductor chip 8 reduces the air gap. According to the above principle, this directly leads to a decrease in the total magnetic reluctance of the magnetic circuit, thereby increasing the winding inductance. The increased inductance can more effectively suppress the current peak and ripple in the power circuit, reduce the stress and loss of the switching device, and thus optimize the heavy load efficiency. At the same time, the reduction of the air gap is often accompanied by an increase in the contact pressure between the thermally conductive elastomer 21 at the bottom of the upper half magnetic core 2 and the upper surface of the circuit board 1, which reduces the thermal resistance of the heat dissipation interface and improves the heat dissipation capacity to cope with high heat generation.

[0030] Under light load / low temperature or startup conditions: The air gap adjustment mechanism resets, increasing the air gap and reducing the inductance. The smaller inductance reduces the energy stored in the magnetic core and the feedback energy, which helps to reduce the circulating current loss and magnetic core loss under light load, thus improving the efficiency under light load. In addition, the larger air gap at this time forms a higher thermal resistance between the upper half magnetic core 2 and the upper surface of the circuit board 1, which slows down the heat dissipation rate of the semiconductor chip 8, allowing the semiconductor chip 8 to rise from the ambient temperature to the optimal efficiency operating temperature range determined by its semiconductor characteristics more quickly, thus improving the overall energy efficiency performance of the system during startup and light load phases.

[0031] It should be noted that the above-mentioned thermo-deformation element can be replaced by other similar structures or elements, and the stroke of the above-mentioned adjustment function is limited to ensure that the magnetic core working flux density has a sufficient safety margin under the highest working conditions of the module to prevent saturation.

[0032] Working principle: An external power input causes current to flow through the primary winding 6 inside the multilayer circuit board 1, generating a high-frequency alternating magnetic field. This magnetic field passes vertically through the dielectric layer of the circuit board 1 and is tightly coupled to the secondary winding 7, which is aligned vertically within the same window projection area. A current is induced on the exposed copper foil pad at the end of the secondary winding 7. The semiconductor chip 8, which is directly flip-chip soldered onto this copper foil pad, then rectifies or switches the induced current and outputs it to the load, completing the power conversion. During this process, the semiconductor chip 8 generates heat, which is directly conducted through its bottom copper foil pad to the dense array of copper-filled thermal vias below. The heat is vertically and efficiently transported to the dedicated thermal conductive layer 16 inside the circuit board 1, and then rapidly diffuses horizontally along the preset thermal conductive main channel 10 and thermal conductive branch 20 pattern to the heat dissipation pad 5 area corresponding to the upper half of the magnetic core 2. The heat is ultimately introduced into the entire upper half of the magnetic core 2 and dissipated. The heat is directionally conducted to the area below the middle leg of the upper half of the magnetic core 2 and acts synchronously on the thermo-deformable element attached there. When the temperature reaches the threshold, the thermo-deformable element deforms and contracts. Driven by the constant preload established by the butterfly spring pad 26, the upper half of the magnetic core 2 undergoes a micro-displacement, which reduces the air gap between the upper half of the magnetic core 2 and the upper surface of the circuit board 1, thereby increasing the winding inductance to optimize heavy load ripple and efficiency. At the same time, the enhanced clamping force reduces the thermal resistance of the heat dissipation interface. When the load is reduced and the temperature drops, the thermo-deformable element recovers its deformation. Under the action of the reset force of the thermo-deformable element and the thermally conductive elastomer 21, the air gap increases and the inductance decreases to reduce light load loss. This forms a passive magnetic-thermal-electric parameter adaptive collaborative optimization closed loop based on the thermal state of the semiconductor chip 8 itself.

[0033] The technical scope of this invention is not limited to the content described above. Those skilled in the art can make various modifications and variations to the above embodiments without departing from the technical concept of this invention, and all such modifications and variations should fall within the protection scope of this invention.

Claims

1. A semiconductor chip and PCB flat panel transformer integration device, characterized in that, The circuit includes a circuit board, an upper half magnetic core disposed on the upper surface of the circuit board, and a lower half magnetic core disposed on the lower surface of the circuit board. A primary winding corresponding to the upper half magnetic core is disposed inside the circuit board. A secondary winding located below and corresponding to the primary winding is disposed inside the circuit board. An embedded cavity corresponding to the secondary winding is disposed inside the circuit board. A semiconductor chip is installed in the embedded cavity. The electrical terminus of the secondary winding extends to the inside of the embedded cavity and is provided with a copper foil pad corresponding to the bottom of the semiconductor chip. It also includes a heat dissipation component disposed on the circuit board. The heat dissipation component includes a heat-conducting layer disposed on the inner side of the circuit board. A heat-conducting main channel corresponding to the embedded cavity is disposed on the heat-conducting layer. A heat dissipation pad corresponding to the upper half magnetic core is disposed on the upper surface of the circuit board. A heat-conducting branch corresponding to the heat dissipation pad is disposed on the heat-conducting main channel. A copper-filled via array is disposed between the heat-conducting main channel and the copper foil pad, and between the heat-conducting branch and the heat dissipation pad.

2. The semiconductor chip and PCB flat panel transformer integration device according to claim 1, characterized in that: The upper half of the magnetic core is an E-type manganese-zinc ferrite core, which includes side legs at both ends and a middle leg in the middle. A window area is formed between the side legs and the middle leg. The window area on one side of the primary winding and the secondary winding corresponds to the window area. The heat dissipation pad corresponds to the side legs and the middle leg of the upper half of the magnetic core.

3. The semiconductor chip and PCB flat panel transformer integration device according to claim 1, characterized in that: The circuit board includes a top layer at the topmost layer, a first primary winding layer at the bottom of the top layer, a second primary winding layer at the bottom of the first primary winding layer, a primary winding disposed on the first primary winding layer and the second primary winding layer, an electromagnetic shielding layer at the bottom of the second primary winding layer, a secondary winding layer at the bottom of the electromagnetic shielding layer, a secondary winding and an embedded cavity disposed on the secondary winding layer, and a heat-conducting layer at the bottom of the secondary winding layer.

4. The semiconductor chip and PCB flat panel transformer integration device according to claim 3, characterized in that: The thermally conductive layer is based on polyimide and filled with boron nitride flakes.

5. The semiconductor chip and PCB flat panel transformer integration device according to claim 2, characterized in that: The upper and lower magnetic cores are fixed to the circuit board at their four corners by screws. The screws pass through the four corners of the upper and lower magnetic cores and the circuit board, and one end of the screw is threaded with a nut.

6. The semiconductor chip and PCB flat panel transformer integration device according to claim 5, characterized in that: An air gap adjustment mechanism is provided between the upper half magnetic core and the circuit board. The air gap adjustment mechanism includes a thermally conductive elastomer disposed between the side leg of the upper half magnetic core and the heat dissipation pad. A thermo-deformable element is disposed between the middle leg of the upper half magnetic core and the corresponding heat dissipation pad. The thermo-deformable element deforms in response to the temperature change of the semiconductor chip to change the magnetic circuit air gap between the upper half magnetic core and the circuit board. A disc spring washer is provided on the outer side of the screw near the nut to provide preload to the upper magnetic core.

7. The semiconductor chip and PCB flat panel transformer integration device according to claim 6, characterized in that: The thermo-deformable element is a shape memory alloy sheet disposed at the bottom of the middle leg of the upper half of the magnetic core.

8. The semiconductor chip and PCB flat panel transformer integration device according to claim 6, characterized in that: The thermo-deformable element is a bimetallic sheet located at the bottom of the middle leg of the upper half magnetic core. The bimetallic sheet is composed of two metals with different coefficients of thermal expansion and is pre-formed into an upward arched shape. Its arch top contacts the middle leg, and both ends of the bimetallic sheet are connected to the upper surface of the circuit board through a flexible thermally conductive connection layer.

9. The semiconductor chip and PCB flat panel transformer integration device according to claim 8, characterized in that: The flexible thermally conductive bonding layer is a high thermal conductivity silicone gel or a flexible epoxy resin.

10. The semiconductor chip and PCB flat panel transformer integration device according to claim 6, characterized in that: The thermally conductive elastomer is a high thermal conductivity silicone pad.

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