Synchronous rectifying device for wireless charging receiving end

By using low-resistance MOSFETs to construct an active rectifier bridge and employing zero-voltage switching control, the problem of high current conduction loss in diode rectifier bridges in wireless charging systems is solved, achieving efficient wireless charging.

CN121886983APending Publication Date: 2026-04-17NANJING BEIDOU SANCI ELECTRONIC TECH CO LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
NANJING BEIDOU SANCI ELECTRONIC TECH CO LTD
Filing Date
2023-05-16
Publication Date
2026-04-17

AI Technical Summary

Technical Problem

In traditional wireless charging systems, the diode rectifier bridge suffers from high conduction losses under high current, leading to severe heat generation in the device and low system conversion efficiency.

Method used

A full-bridge active rectifier bridge is constructed using low-resistance MOSFETs, and a MOSFET control signal is generated through a commutation timing generation circuit to achieve zero-voltage switching control.

Benefits of technology

Significantly reduces rectifier bridge losses, improves system efficiency, reduces device heat generation, and enables simple and low-cost wireless charging applications.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention discloses a synchronous rectification device for a wireless charging receiving end. The synchronous rectification device comprises an MOS (Metal Oxide Semiconductor) tube rectifier bridge, an MOS tube driving circuit and a commutation time sequence generation circuit, the core of the circuit is that when the current is large and is positive, an edge signal of square wave voltage of an input port of an MOS tube rectifier bridge is detected to generate an opening signal corresponding to an MOS tube, and then after a certain delay time, a closing signal corresponding to the MOS tube is generated. When the charging current is small or negative, the control signal of the MOS tube is closed, and the system uses the body diode of the MOS tube rectifier bridge to carry out passive rectification, so that the system is prevented from entering an inversion mode. Based on the method, a low-resistance MOS tube can be used for replacing a diode on a traditional rectifier bridge, so that the loss on the rectifier bridge is greatly reduced. Meanwhile, on the basis of the commutation time sequence generation method provided by the invention, the switching actions of all MOS transistors are in a soft switching state, and the circuit is simple to implement, low in cost and suitable for various wireless charging application scenes.
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Description

Technical Field

[0001] This invention relates to wireless charging technology and applications, and in particular to a synchronous rectification device for a wireless charging receiver. Background Technology

[0002] Over the past decade, wireless charging technology has developed rapidly and has been quickly applied in various fields, such as portable electronic devices like mobile phones and tablets, AGV robots, implantable medical devices, and electric vehicles. Compared to traditional wired charging methods, wireless charging has no exposed interfaces, making it safer and more convenient, and thus has significant market demand and development potential.

[0003] Existing wireless charging systems typically use high-frequency electromagnetic fields to achieve wireless energy transfer. At the receiver end of the wireless charging system, a diode-based rectifier bridge is usually used to convert high-frequency AC power into DC power usable by a DC load. However, traditional diode rectifier bridges generate significant conduction losses at high current levels, leading to severe overheating of the receiver and reduced system conversion efficiency.

[0004] To address the above problems, this invention proposes a "synchronous rectification device for a wireless charging receiver," which can replace traditional rectifier diodes with low-resistance MOSFETs, thereby constructing a high-efficiency rectifier bridge. Its core lies in employing a special commutation mechanism to achieve the switching of the MOSFET switching control signal. The structure and principle of the device are described below. Summary of the Invention

[0005] This invention comprises three parts: 1) a MOSFET rectifier bridge; 2) a MOSFET driving circuit; and 3) a commutation timing generation circuit. The functions and principles of each part are described below:

[0006] 1) MOSFET rectifier bridge: It consists of 4 low-resistance MOSFETs, forming a full-bridge active rectifier bridge. Under the control of the gate drive signal, it performs switching operations in a certain timing sequence.

[0007] 2) MOSFET driver circuit: used to convert the control signal output by the controller into a gate drive signal with MOSFET driving capability, and control the operation of the switching transistor.

[0008] 3) Commutation timing generation circuit: detects the voltage waveform on the input side of the rectifier bridge, and after calculation and processing, generates control signals for four low-impedance MOSFETs: S1, S2, S3, and S4.

[0009] Of the three functional modules mentioned above, 3) the commutation timing generation circuit is the core innovation of this invention. Its main feature is that it generates a switching control signal based on the voltage waveform on the input side of the rectifier bridge. Figure 2 The resonant current I1 of the wireless charging receiver and the input voltage U of the rectifier bridge are given.in-A The relative waveforms of the MOSFET control signals, and its basic control strategy can be summarized in the following steps:

[0010] 1. At time 0, all four control signals are low, all MOSFETs are off, and the resonant current I1 at the receiving end changes from negative to positive, starting to flow through the body diodes of S3 and S2. At this time, U in-A The voltage changes from 0 to the battery voltage U. bat This generates a rising edge signal.

[0011] 2. The commutation timing generation circuit generates the U signal at time 0. in-A The rising edge is detected, and then after a delay of t1, positive control signals S3 and S2 are generated, which turn on S3 and S2, while keeping S1 and S4 closed.

[0012] 3. After S3 and S2 are turned on for k*T / 2 time (T is the waveform period, k<1), the commutation timing generation circuit turns off the control signals of S3 and S2 at time t2, so that all switches remain closed, and I1 continues to conduct through the body diodes of S3 and S2.

[0013] 4. At time t3, all four control signals are low, all MOSFETs are off, and the resonant current I1 at the receiving end changes from positive to negative, starting to flow through the body diodes of S1 and S4. At this time, U in-A The voltage from the battery voltage U bat It becomes 0, generating a falling edge signal.

[0014] 5. The commutation timing circuit for U at time t3 in-A The falling edge is detected, and then after a delay of t1, positive control signals S1 and S4 are generated, which turn on S1 and S4, while keeping S2 and S3 closed.

[0015] 6. After S1 and S4 are turned on for k*T / 2 time, the commutation timing generation circuit turns off the control signals of S1 and S4 at time t4, so that all switches remain closed and I1 continues to flow through the body diodes of S1 and S4.

[0016] The above six steps complete one cycle. The advantages of this scheme include: 1) Using low-resistance MOSFETs instead of diodes for rectification significantly reduces losses on the rectifier bridge. 2) Only one end of the rectifier bridge is input voltage U. in-A The edge transition is detected, eliminating the need for more complex AC current sampling, making the circuit implementation simple. 3) The switching action occurs when the MOSFET body diode is turned on, and the MOSFET voltage drop is close to zero, thus achieving zero-voltage switching (ZVS). Attached Figure Description

[0017] Appendix Figure 1 Circuit diagram of a synchronous rectification device for a wireless charging receiver.

[0018] Appendix Figure 2 A signal timing diagram of a synchronous rectification device for a wireless charging receiver.

[0019] Appendix Figure 3 This is a circuit diagram for detecting the input voltage edge signal of a synchronous rectification device for a wireless charging receiver. Implementation

[0020] As attached Figure 1 As shown, the "Synchronous Rectification Device for a Wireless Charging Receiver" comprises three parts: 1) a MOS transistor rectifier bridge; 2) a MOS transistor driving circuit; and 3) a commutation timing generation circuit. The implementation methods of each part are described below:

[0021] 1) MOSFET Rectifier Bridge: Taking wireless charging applications for electric bicycles as an example, the voltage of the 48V battery connected to the rectifier bridge output typically varies between 36V and 55V. Therefore, a 60V withstand voltage MOSFET is selected to construct the rectifier bridge, and it is installed according to the attached... Figure 1 The topology shown is used for connection. In actual implementation, the MOSFET IRFS7530TRLPBF from Infenion is selected, with core parameters of 60V maximum withstand voltage and 2mΩ on-resistance. When the charging current is 5A, the single-transistor loss is approximately 50mW, while the single-transistor loss of a traditional diode rectifier bridge is close to 4W (5A*0.8V). It is evident that using a low-resistance MOSFET to construct an active rectifier bridge can significantly reduce the losses on the rectifier bridge.

[0022] 2) MOSFET drive circuit: using from 3 TI's LM5109B chip is used to construct a bootstrap driver circuit, allowing a single chip to drive both the upper and lower transistors of one bridge arm simultaneously. Depending on the specific requirements, various driver circuit designs are available, such as using different driver chips or designing independent driver circuits for the upper and lower transistors based on isolated power supplies. None of these variations affect the spirit and scope of this invention.

[0023] 3) Commutation timing generation circuit: as shown in the attached diagram. Figure 3 As shown, firstly, two voltage divider resistors R1 and R2 are used to divide the input voltage U of the rectifier bridge. in-A After voltage division, the voltage is connected to the positive input terminal of the comparator. The selection of R1 and R2 should ensure that the divided voltage value is within the effective input range of the comparator. In this embodiment, the values ​​of R1 and R2 are 200kΩ and 10kΩ, respectively. in-AWhen the voltage varies between 36V and 55V, the voltage after voltage division varies between 1.7V and 2.7V. Then, a reference DC voltage is set and connected to the negative input of the comparator. In this embodiment, the reference DC voltage is set to 0.5V. Next, a hysteresis comparator is constructed using R3, R4, R5, and the TLV3201 comparator, where R3 and R4 have the same resistance value. By adjusting the ratio of R5 / R3, the hysteresis range of the comparator can be adjusted, thereby avoiding frequent jumps in the output signal at the edge. In this embodiment, the hysteresis range is set to 0.1V, meaning that when the voltage after voltage division rises to 0.6V, the comparator outputs a positive level, and when the voltage after voltage division drops to 0.4V, the comparator outputs a zero level. R6 is a pull-up resistor, providing a positive output voltage in the open-drain comparator.

[0024] 4) MOS transistor control signal generation algorithm: using the attached... Figure 3 The circuit shown detects the input voltage U of the rectifier bridge. in-A The edge signal. Simultaneously, utilizing the attached... Figure 1 The topology shown allows for real-time monitoring of the battery charging current. When the charging current is low, such as less than 0.2A, all control signals for the MOSFETs are low, and all four MOSFETs are off. The wireless charging system utilizes the body diodes of the MOSFETs for passive rectification. When the charging current is high, such as greater than 0.2A, the controller adjusts the current based on the detected U... in-A The edge signal is used to generate a control signal. When U is detected... in-A After the rising edge signal, after a delay of t1 (typically 1µs), the control signals S3 and S2 are set high. Then, after a delay of k*T / 2 (typically 0.8), the control signals S3 and S2 are set low. When detecting 4...

[0025] To U in-A After the falling edge signal, after a delay of t1 (typically 1µs), the control signals of S1 and S4 are set to high. Then, after a delay of k*T / 2 (typically 0.8), the control signals of S1 and S4 are set to low.

[0026] By adopting the technical solution of this invention, low-resistance MOSFETs can be used instead of traditional diodes for rectification, significantly reducing the conduction loss of the rectifier bridge. Furthermore, all MOSFETs in this invention operate as ZVS (Zero-Voltage Switching) soft switches, with negligible switching losses. In addition, the control scheme described in this invention is simple to implement, low-cost, and suitable for various wireless charging applications.

[0027] It should be noted that the above embodiments are merely illustrative of the basic principles of the present invention. Those skilled in the art can make various modifications and variations based on the present invention without departing from its spirit and scope. If such modifications and variations fall within the scope of the claims of the present invention and their equivalents, they are all within the protection scope of the present invention.

Claims

1. A synchronous rectification device for a wireless charging receiver, characterized in that: Its components include a MOSFET rectifier bridge, a MOSFET driving circuit, and a commutation timing generation circuit. Among them, the commutation timing generation circuit is the core of the invention. It generates the corresponding turn-on signal of the MOSFET by detecting the edge signal of the square wave voltage at the input port of the MOSFET rectifier bridge, and then generates the corresponding turn-off signal of the MOSFET after a certain delay time.

2. The commutation timing generation circuit as described in claim 1, characterized in that: The square wave voltage at one input port of the MOSFET rectifier bridge is divided to ensure it falls within the effective input voltage range of the comparator. This divided voltage is then connected to the positive input of the comparator. Simultaneously, a reference DC voltage is connected to the negative input of the comparator, and the comparator is configured as a hysteresis comparator via an external resistor. Therefore, when the voltage at the designated input port of the MOSFET rectifier bridge changes from zero to battery voltage, the comparator outputs a high level and generates a rising edge signal; conversely, when the voltage at the designated input port changes from battery voltage to zero, the comparator outputs a zero level and generates a falling edge signal.

3. The commutation timing generation circuit as described in claim 1, characterized in that: After the controller MCU detects the rising edge of the comparator output, it generates a high-level control signal for the two MOSFETs through which current flows after a short delay (e.g., 1µs), turning on the MOSFETs to allow the resonant current at the receiving end to flow. Then, after another certain delay (e.g., 0.8 half-cycles), before the resonant current changes direction, the high-level control signal for the two MOSFETs is set low again.

4. The commutation timing generation circuit as described in claim 1, characterized in that: After the controller MCU detects the falling edge of the comparator output, it generates a high-level control signal for the two MOSFETs through which current flows after a short delay (e.g., 1µs), turning on the MOSFETs to allow the resonant current at the receiving end to flow. Then, after another certain delay (e.g., 0.8 half-cycles), before the resonant current changes direction, the high-level control signal for the two MOSFETs is set low again.

5. The commutation timing generation circuit as described in claim 1, characterized in that: The generated control signal can control the switching action of the MOSFET in ZVS state. Specifically, when the MOSFET is turned on, the resonant current at the receiving end flows forward through the body diode of the corresponding MOSFET, and the MOSFET voltage drop is approximately zero. When the MOSFET is turned off, the resonant current at the receiving end continues to flow through the body diode of the corresponding MOSFET, maintaining the MOSFET voltage drop close to zero.

6. The MOS transistor rectifier bridge as described in claim 1, characterized in that: A full-bridge rectifier topology is constructed using four MOSFETs.

7. The MOS transistor driving circuit as described in claim 1, characterized in that: A bootstrap drive scheme or a scheme based on an isolated power supply design with independent drive of the upper and lower transistors of the same bridge arm can be adopted.