PCB processing method for eliminating stub and PCB

Abstract

The invention discloses a PCB processing method for eliminating stub and a PCB, and the method comprises the steps: preparing photocurable plating-resistant ink through a target dielectric constant of the PCB, coating a core board with the plating-resistant ink, carrying out the photocuring of the plating-resistant ink to form a plating-resistant film layer, pressing the core board into a whole board, and carrying out the drilling of holes to obtain plating-resistant regions formed by the plating-resistant film layers on different layers of core boards, bottom copper is deposited on the through hole to enable the hole wall of the through hole to form a discontinuous bottom copper layer which is separated by the plating resisting areas in the axial direction, and electroplating thickening treatment is carried out on the through hole to remove the bottom copper layer between the plating resisting areas and thicken the other bottom copper layer. The plating-resistant film layer formed by the plating-resistant ink is reserved in the PCB obtained by pressing, so that the dielectric constant of the PCB can be ensured to be within an error range, film stripping treatment is not needed, and the problems of tedious process, high cost and related PCB quality caused by cleaning and film stripping in the prior art are solved.

Description

PCB fabrication methods and PCBs for eliminating stubs Technical Field

[0001] This invention relates to the field of PCB manufacturing technology, and in particular to a PCB processing method and a PCB for eliminating stubs. Background Technology

[0002] In PCBs, metallized vias are an important structure that connects layers and enables the transmission of electrical signals between circuits.

[0003] In multilayer PCBs, there are connection layers and non-connection layers. The traces between non-connection layers do not need to be connected. When through-holes are metallized, the metal layer on the hole wall will extend to the non-connection layer, forming an extra copper segment on the hole wall, which is called a "stub". Stubs can cause problems such as impedance discontinuity, signal reflection and delay mismatch in PCB signal transmission. Therefore, it is necessary to reduce or even eliminate stubs.

[0004] Existing technologies propose a process of printing anti-plating ink on a designated layer and then removing the stub after copper plating. This process requires screen printing of the anti-plating ink. However, the mask formed by printing the anti-plating ink is temporary, and the dielectric constant of the anti-plating ink does not match that of the PCB substrate. In order to ensure the dielectric constant of the PCB, a strong alkali stripping process is required after copper plating, which poses a risk of corrosion to the circuit structure. Moreover, the stripping process is lengthy, energy-intensive, and has poor cleaning consistency, making it difficult to adapt to the requirements of automation and high-reliability manufacturing. Incomplete stripping will affect the consistency of subsequent electroplating and may even cause via blockage or discontinuous conductive paths. Summary of the Invention

[0005] This invention provides a PCB processing method and a PCB for eliminating stubs, thereby solving the problem that strong alkali cleaning and stripping treatment is required when using screen printing to print anti-electroplating inks during PCB processing.

[0006] In a first aspect, the present invention provides a PCB manufacturing method for eliminating stubs, comprising: providing N core boards after circuit printing is completed, and obtaining structural design data of the PCB, wherein the structural design data includes at least the target dielectric constant of the PCB; formulating a photocurable resist ink based on the target dielectric constant, wherein the dielectric constant of the resist ink after photocuring is within a preset error range of the target dielectric constant; determining M core boards from the N core boards to be coated with the resist ink according to the structural design data, and coating the M core boards with the resist ink. Ink is photocured to form a resist film layer on the core board; N core boards are laminated to obtain a complete board, and holes are drilled in the complete board based on the structural design data. The hole walls of the drilled through holes include resist areas formed by the resist film layers on different core boards; a base copper is deposited on the through holes, so that the hole walls of the through holes form discontinuous base copper layers in the axial direction, which are separated by the resist areas; the through holes are electroplated to thicken them, so as to remove the base copper layers between the resist areas and thicken the remaining base copper layers, thereby obtaining a PCB including the resist film layer.

[0007] Optionally, formulating a photocurable resist ink based on the target dielectric constant includes: determining the organic substrate and at least two inorganic fillers of the resist ink, and determining the volume ratio of the at least two inorganic fillers; determining the volume percentage of the at least two inorganic fillers based on a logarithmic mixture model and the volume ratio, wherein the volume percentage of the inorganic fillers, the dielectric constant, and the dielectric constant of the organic substrate are used as independent variables in the logarithmic mixture model, and the target dielectric constant is used as the dependent variable; calculating the mass percentage of each inorganic filler using the volume percentage of each inorganic filler, and formulating the resist ink based on the mass percentage.

[0008] Optionally, when determining the volume percentage of at least two inorganic fillers based on the logarithmic mixture model and the volume ratio, the method further includes: adding a thermal expansion constraint condition, wherein the thermal expansion constraint condition is that the sum of the mass percentages of the inorganic fillers is within a preset mass percentage range.

[0009] Alternatively, the mathematical expression for the logarithmic mixture model is as follows: lnε t =φ1lnε1+φ2lnε2+(1-φ1-φ2) lnε m ; where ε t Let φ1 and ε1 be the volume percentage and dielectric constant of the first inorganic filler, respectively, and φ2 and ε2 be the volume percentage and dielectric constant of the second inorganic filler, respectively. m It is the dielectric constant of the organic substrate.

[0010] Optionally, based on structural design data, M core boards to be coated with resist ink are determined from N core boards, and resist ink is coated on the M core boards and then photocured to form a resist film layer on the core boards. This includes: determining the M core boards to be coated with resist ink based on structural design data, and determining the spraying path and spraying area for each of the M core boards; for each of the M core boards, controlling the nozzle of the spraying equipment to move along the spraying path; and when the nozzle moves to a spraying area, spraying a pre-set pattern in the spraying area by layered spraying and step-by-step photocuring to form a resist film layer on the spraying area of ​​the core board.

[0011] Optionally, determining the spraying path and spraying area for each core board in the M core boards includes: determining the type of through hole based on the structural design data; if the through hole is a single-line network hole, determining the area on the core board with the line network that needs to be drilled as the spraying area, and determining the target core board, determining the area on the side of the target core board facing away from the line network that needs to be drilled as the spraying area, the target core board being the outermost core board; if the through hole is a double-line network hole, determining the area on the two core boards with the line network that needs to be drilled as the spraying area.

[0012] Optionally, the pre-set pattern is sprayed in the spraying area by a layered spraying and step-by-step photocuring method, including: controlling the nozzle to continuously spray the resist ink m times in the spraying area, each spray being 10~25μm; after spraying the resist ink m times, using ultraviolet light to photocur the sprayed resist ink, and returning to the step of controlling the nozzle to continuously spray the resist ink m times in the spraying area, until the total number of sprays reaches the preset number.

[0013] Optionally, before pressing N core boards together to obtain a complete board, the method further includes: performing an interface coupling pretreatment on the pressing interface of each core board; the interface coupling pretreatment is: introducing a coupling agent containing silane functional groups to form a pretreatment layer on the surface of at least one core board to be pressed, the surface of the resist film layer on the pressing interface, and the contact interface between the core board and the prepreg, wherein the coupling agent is at least one of aminopropylsilane, epoxysilane, and methacryloxysilane.

[0014] Optionally, the vias are subjected to electroplating thickening treatment to remove the bottom copper layer between the resist plating areas and to thicken the remaining bottom copper layer, resulting in a PCB including the resist plating film layer. This includes: placing the entire board in an electroplating solution, connecting a phosphor bronze ball to the anode, and connecting the entire PCB to the cathode, such that the bottom copper layer other than that between the resist plating areas is connected to the cathode, and the bottom copper layer between the resist plating areas becomes the anode; applying a first current density to the anode and the cathode for a first duration, thereby forming a micro-cell effect in the bottom copper layer between the resist plating areas to remove the bottom copper layer between the resist plating areas through the micro-cell effect; and after the first duration, applying a second current density to the anode and the cathode for a second duration, wherein the first current density is less than the second current density.

[0015] Optionally, the vias are subjected to electroplating thickening treatment to remove the bottom copper layer between the resist plating areas and to thicken the remaining bottom copper layer, resulting in a PCB including the resist plating film layer. The method further includes: adjusting the pH value, copper ion concentration, and ratio of complexing agent or corrosion inhibitor of the electroplating solution to improve the micro-cell effect of the bottom copper layer between the resist plating areas.

[0016] In a second aspect, the present invention provides a PCB manufactured by the PCB manufacturing method for eliminating stubs as described in any one of the first aspects.

[0017] The PCB processing method for eliminating stubs in this invention has the following beneficial effects: (1) The resist ink is formulated based on the target dielectric constant of the PCB. Its dielectric constant after photocuring is within the error range of the target dielectric constant. Even if the resist film layer formed by the resist ink is permanently left in the PCB obtained by lamination, the dielectric constant of the PCB can be guaranteed to be within the error range. Before electroplating thickening, there is no need to clean the resist film layer with alkaline stripping solution. The process of cleaning the resist film layer with alkaline stripping solution can be omitted, which simplifies the process, adapts to batch automated manufacturing, and avoids damage to other circuits caused by alkaline stripping solution cleaning, thereby improving the PCB yield.

[0018] (2) The resist ink is a light-curing ink, which does not require high-temperature drying and curing treatment, thus avoiding the expansion and contraction of the core board due to heat, and is more suitable for thin core boards.

[0019] It should be understood that the description in this section is not intended to identify key or essential features of the embodiments of the present invention, nor is it intended to limit the scope of the invention. Other features of the invention will become readily apparent from the following description. Attached Figure Description

[0020] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0021] Figure 1 is a schematic diagram of a stub; Figure 2 is a flowchart of a PCB processing method for eliminating stubs according to Embodiment 1 of the present invention; Figure 3 is a schematic diagram of a PCB processing procedure for eliminating stubs according to an embodiment of the present invention; Figure 4 is a flowchart of a PCB processing method for eliminating stubs according to Embodiment 2 of the present invention; Figure 5 is a schematic diagram of single-line network holes and dual-line network holes; Figure 6 is a schematic diagram of the boundary and thickness dimensions of inkjet printing; Figure 7 is a schematic diagram of electroplating thickening. Detailed Implementation

[0022] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present invention.

[0023] As shown in Figure 1, in the traditional hole metallization process, a metal layer 1 is first formed in the through hole (Figure 1a), and then the excess copper layer is removed by back drilling (Figure 1b). However, due to the influence of drilling accuracy, the excess residual copper 2 cannot be completely removed (Figure 1c). This residual copper is called a stub. The presence of a stub in the through hole will cause problems such as PCB impedance discontinuity, signal reflection, and delay mismatch. Unlike eliminating the stub by back drilling, an anti-plating ink is screen-printed on the core board, and after pressing and drilling, a resist film layer is formed on the through hole wall to prevent copper deposition and eliminate the stub. However, the anti-plating ink film changes the PCB layer structure, resulting in an uncontrollable dielectric constant of the PCB. It is necessary to use an alkaline solution to clean and peel off the residual anti-plating ink film in the PCB layer structure to ensure that the dielectric constant of the PCB is within a controllable range. The purpose of this invention is to provide the following embodiments to solve the problem that when eliminating the stub by forming a resist film layer by screen printing, an alkaline solution is needed to clean and peel off the resist film layer.

[0024] Figure 2 is a flowchart of a PCB processing method for eliminating stubs according to Embodiment 1 of the present invention. This embodiment can be applied to the situation of eliminating stubs during PCB processing. As shown in Figure 2, the PCB processing method for eliminating stubs includes: S201, providing N core boards after the circuit printing is completed, and obtaining the structural design data of the PCB. The structural design data includes at least the target dielectric constant of the PCB.

[0025] In this embodiment, the core board can be the core board after the inner layer circuitry is printed. The circuitry forms a circuit network. Specifically, the circuitry can be obtained by transferring the pattern on the copper-clad core board, resulting in N core boards after the circuitry is printed. The number of N can be determined during the overall PCB design. During the overall PCB design, vias for connecting the circuitry on each core board can be designed. The structural design data can be obtained from the PCB design data. The structural design data can include the target dielectric constant of the PCB, the wiring diagram of each layer, the via design data, the interlayer connection relationship, and the data of non-drillable layers. The via design data includes the diameter, depth, and position coordinates of the vias.

[0026] S202. Formulate a photocurable resist ink based on the target dielectric constant, wherein the dielectric constant of the prepared resist ink after photocuring is within the preset error range of the target dielectric constant.

[0027] In this embodiment, the resist ink can be an ink that can prevent copper from depositing in the resist area during the copper plating process. The resist ink can be cured by photocuring, for example, by UV light irradiation.

[0028] In one embodiment, the organic substrate and at least two inorganic fillers of the resist ink can be determined first. The organic substrate, as the matrix of the resist ink, can be used for flowability and deformation control. The inorganic fillers can be used to adjust dielectric constant, thermal expansion properties, density, etc. Specifically, in this embodiment, the volume ratio of various inorganic fillers can be set, and then the volume percentage of at least two inorganic fillers can be determined by the logarithmic mixture model and the set volume ratio. Specifically, the volume percentage of each inorganic filler is calculated by combining the target dielectric constant with the logarithmic mixture model and the set volume ratio. The mass percentage of each inorganic filler is then calculated using this volume percentage. The resist ink is formulated based on the mass percentage of each inorganic filler. The dielectric constant of the resulting resist ink after photocuring is within the error range of the target dielectric constant.

[0029] S203. Based on the structural design data, determine the M core boards to be coated with resist ink from the N core boards, and then apply resist ink to the M core boards and light-cur it to form a resist film layer on the core boards.

[0030] In one embodiment, M core boards among N core boards to be coated with resist ink can be determined based on data such as the location coordinates, diameter, and depth of through holes in the structural design data. For example, M core boards to be coated with resist ink for eliminating stubs can be determined based on data such as the wiring diagrams of each layer, the interlayer connection relationships, and the non-drillable layers in the structural design data. Different PCBs require different core boards to be coated with resist ink. Those skilled in the art can determine the M core boards to be coated with resist ink according to the PCB structural design data.

[0031] After determining the M core boards, the coating areas for resist ink on each core board can be determined based on the coordinates of the through holes and the locations where stubs need to be removed. Then, the coating equipment is controlled to apply resist ink to the coating areas. For example, resist ink can be applied by screen printing, spraying, or other methods and then cured by light to form a resist film layer.

[0032] In this embodiment, the resist ink is a functional ink. After forming a resist film layer, this resist ink is used to inhibit the nucleation and diffusion of copper ions on the surface of the resist film layer to form a base copper layer during copper deposition and electroplating thickening. For example, the resist ink has inherent molecular characteristics that repel copper deposition (such as extremely low surface energy), so that the resist ink no longer relies on a "physical covering barrier" to maintain copper deposition blocking, but forms an intrinsically non-depositable region through the joint action of material-surface chemical mechanisms. In addition, the resist ink is a highly crosslinked photocurable ink, that is, the resist ink can be cured into a film by ultraviolet light irradiation. Specifically, the resist ink can use phenolic epoxy resin and DBE system as the main components, so that the resist ink has rapid evaporation and quick-drying characteristics, and introduces UV reactive monomers with high crosslinking density, so that the resist ink can be rapidly cured and crosslinked by ultraviolet light. The photoinitiator combination can achieve deep curing of thick film structures. Preferably, the resist ink can also include non-conductive microparticles. The dielectric constant of the resist ink film can be adjusted by the type and proportion of non-conductive microparticles in the resist ink.

[0033] Of course, resist inks can also include other components, such as dispersants and leveling agents, to improve the stability and film uniformity of various particles in the ink. This allows the resist ink to complete surface and deep cross-linking after UV exposure following spraying, forming a uniform and dense resist film without the need for high-temperature baking and drying.

[0034] S204. Press N core boards together to obtain a whole board, and drill holes in the whole board based on the structural design data. The hole walls of the drilled through holes include the resist plating areas formed by the resist plating film layers on different core boards.

[0035] After coating N core boards with resist ink and curing them under light to form a resist film layer, the N core boards can be laminated according to their designed positions in the overall board to obtain the complete board. Multiple through holes are then drilled into the entire board based on the position coordinates, diameter, and non-drillable layers of the through holes. The non-drillable layers are determined by the interlayer structure design data and are layers that cannot be drilled through, minimizing or eliminating the stub. After drilling, the hole walls along the axial direction of the through holes include the resist areas formed by the resist film layers on each core board.

[0036] S205. Deposit bottom copper on the through hole, so that the hole wall of the through hole forms a discontinuous bottom copper layer that is separated by the resist plating area in the axial direction.

[0037] Since the resist plating area is a resist plating film layer obtained by photocuring resist plating ink, it can inhibit the nucleation and diffusion of copper ions on the surface of the resist plating film layer to form bottom copper. When depositing bottom copper on the through hole, the resist plating area on the hole wall cannot deposit copper, so that the hole wall of the through hole forms a discontinuous bottom copper layer that is separated by the resist plating area in the axial direction.

[0038] S206. Electroplating is performed on the through holes to remove the bottom copper layer between the resist plating areas and to thicken the remaining bottom copper layer, resulting in a PCB including the resist plating film layer.

[0039] Figure 3 shows a schematic diagram of the PCB manufacturing process. The specific manufacturing process is as follows: Step 1, after image transfer, the copper-clad core board 1 is obtained as a core board including the circuit 11; Step 2, the positions where through holes need to be drilled on the circuit are coated with pre-prepared resist ink and cured by ultraviolet light to form a resist film layer 12; Step 3, the core boards of each layer are laminated to obtain the whole board 2; Step 4, through holes 3 are drilled in the whole board 2. The hole wall of the through hole 3 includes a resist film layer, which forms a resist area 4 on the hole wall; Step 5, the bottom copper is deposited. Since the resist film layer forms the resist area 4 on the hole wall, the resist area 4 inhibits copper deposition during copper deposition. The accumulation cannot form a base copper layer, resulting in a discontinuous base copper layer 5 on the hole wall; Step 6, the copper plating is thickened. After the whole board is placed in the electrolyte, the phosphor bronze ball is connected to the anode, and the remaining base copper layer outside the area between the resist plating areas 4 is connected to the cathode through the whole PCB board, so that the base copper layer between the resist plating areas 4 becomes the anode and the remaining base copper layer becomes the cathode. Under the electrochemical reaction, the base copper layer between the resist plating areas 4 loses electrons and is removed. The copper ions in the electrolyte near the remaining base copper layer gain electrons and are deposited on the base copper layer, so that the base copper layer outside the area between the resist plating areas 4 is thickened, and finally, through holes with no copper layer on the hole wall at points A and B are obtained, that is, the stub is eliminated.

[0040] This embodiment can achieve the following beneficial effects: (1) The resist ink is formulated based on the target dielectric constant of the PCB. Its dielectric constant after photocuring is within the error range of the target dielectric constant. Even if the resist film layer formed by the resist ink is permanently left in the PCB, the dielectric constant of the PCB can be guaranteed to be within the error range. Before electroplating thickening, there is no need to clean the resist film layer with alkaline stripping solution. The process of cleaning the resist film layer with alkaline stripping solution can be omitted, which simplifies the process, adapts to batch automated manufacturing, and avoids damage to other circuits caused by alkaline stripping solution cleaning, thereby improving the PCB yield.

[0041] (2) The resist ink is a light-curing ink, which does not require high-temperature drying and curing treatment, thus avoiding the expansion and contraction of the core board due to heat. It is suitable for thin core boards.

[0042] Figure 4 is a flowchart of a PCB processing method for eliminating stubs provided in Embodiment 2 of the present invention. The present invention is an optimization based on Embodiment 1 above. As shown in Figure 4, the PCB processing method for eliminating stubs includes: S401, providing N core boards after circuit printing is completed, and obtaining the structural design data of the PCB. The structural design data includes at least the target dielectric constant of the PCB.

[0043] In this embodiment, the core board can be the core board after the inner layer circuitry is printed. The circuitry forms a circuit network. Specifically, as shown in Step 1 of Figure 3, after cutting and transferring the pattern on the copper-clad core board 1 to form the circuitry 11, N core boards including printed circuitry can be obtained. The structural design data of the PCB can be obtained. The structural design data can include the target dielectric constant of the PCB, the wiring diagram of each layer, the via design data, the interlayer connection relationship and the non-drillable layer, etc. The via setting data includes the diameter, depth and position coordinates of the via.

[0044] S402, determine the organic substrate of the resist ink and at least two inorganic fillers, and determine the volume ratio of the at least two inorganic fillers.

[0045] Organic substrates, used as the base material for resist inks, can be used for flowability and deformation control. Inorganic fillers can be used to adjust dielectric constant, thermal expansion properties, density, etc. For example, the organic substrate is polyacrylate or an organic resin of polyacrylate modified system. The inorganic fillers include a first inorganic filler and a second inorganic filler, wherein the first inorganic filler has a higher dielectric constant than the second inorganic filler. Of course, the fillers may also include photocuring agents and materials such as boron nitride for adjusting thermal expansion properties. In this embodiment, the volume ratio can be set based on the characteristics of the first and second inorganic fillers, so that the set volume ratio can ensure that the resist ink has good flowability.

[0046] S403. Determine the volume percentage of at least two inorganic fillers based on a logarithmic mixing model and volume ratio.

[0047] In one embodiment, taking the inorganic packing comprising a first inorganic packing and a second inorganic packing as an example, the expression for the logarithmic mixture model is as follows: lnε t =φ1lnε1+φ2lnε2+(1-φ1-φ2) lnε m ; where ε t Let φ1 and ε1 be the volume percentage and dielectric constant of the first inorganic filler, respectively, and φ2 and ε2 be the volume percentage and dielectric constant of the second inorganic filler, respectively. m It is the dielectric constant of the organic substrate (such as polyacrylate). Taking φ1:φ2=2:1 as an example, the above logarithmic mixture model uses the volume percentage and dielectric constant of the inorganic filler and the dielectric constant of the organic substrate as independent variables, and the target dielectric constant as the dependent variable.

[0048] Optionally, thermal expansion constraint conditions can also be set, which can be that the sum of the mass percentages of inorganic fillers is within a preset mass percentage range. For example, the sum of the mass percentages of various inorganic fillers is within the control range of 20–40 wt%, so that the in-plane thermal expansion coefficient of the cured resist ink is controlled in the range of 15–25 ppm / K, and basically matches the thermal expansion coefficient of the organic substrate.

[0049] As shown in Table 1 below, the organic substrate is polyacrylate, and the inorganic fillers include a first inorganic filler and a second inorganic filler as examples. The dielectric constant, density, and function of various materials are shown in Table 1 below: Table 1: With the target dielectric constant ε t = 3.20 as an example, ε in the table above m = 3.00, ε1= 4.00, ε2=2.20, ε t Substituting 3.20 into the expression of the logarithmic mixed model, and letting φ2 = k φ1 = 0.5 φ1, the result is as follows: ln3.20 = φ1ln4.00 + 0.5φ1ln2.2 + (1 - φ1 - 0.5φ1) ln3.00; after solving, we get φ1≈0.13, φ2≈0.065, that is, the volume percentage of the first inorganic filler is about 13 vol%, the volume percentage of the second inorganic filler is about 6.5 vol %, and the volume percentage of the two fillers is about 19.5 vol %. The specific values ​​can be finely adjusted according to the actual situation.

[0050] S404. Calculate the mass percentage of various inorganic fillers using the volume percentage of various inorganic fillers, and formulate resist inks based on the mass percentage.

[0051] In one embodiment, the conversion from volume percentage to mass percentage is as follows: W i φ represents the mass percentage of the i-th material. i ρ is the volume percentage of the i-th material. i Let be the density of the i-th material.

[0052] Table 2 below shows examples of volume percentage and mass percentage for various materials: Table 2: When the content of the first inorganic filler increases, the elastic modulus increases, the coefficient of thermal expansion decreases, but the dielectric constant increases. When the volume percentage of the second inorganic filler is greater than 8 vol%, the dielectric constant decreases but the film-forming properties deteriorate. Finally, it was determined that the volume percentage of the first inorganic filler should be finely adjusted within 10–15 vol%, and the volume percentage of the second inorganic filler should be finely adjusted within 5–7 vol%.

[0053] Alternatively, two preparation schemes can be formed as shown in Table 3 below: Table 3: Those skilled in the art can fine-tune the volume percentage of two inorganic fillers according to the application scenario of the PCB and the required dielectric constant, and then formulate the resist ink based on the mass percentage after converting it to a mass percentage.

[0054] This embodiment uses a logarithmic mixture model and a target dielectric constant to back-engineer the design, determining the volume percentage of various inorganic fillers. This ensures that the dielectric constant of the prepared resist ink after photocuring matches the dielectric constant of the organic substrate (such as polyacrylate) (e.g., within the range of 3.20 ± 0.05). Simultaneously, thermal expansion constraints balance low thermal expansion performance and processability. Even if the resist ink remains in the laminated PCB after photocuring, the dielectric constant of the PCB can still be guaranteed to be within the error range of the target dielectric constant. This provides support for the lamination and embedding of resist ink without the need for washing after drilling.

[0055] Furthermore, in order to make the resist ink of this embodiment usable for spraying, the resist ink has the following characteristics: quick drying: The resist ink system can use DBE (dimethyl diacid) or low-to-medium boiling point ester diluents with moderate evaporation rate. After being sprayed onto the core board surface, it completes surface drying and preliminary shaping within a few seconds, without flowing, hanging on the wall, or spreading. This drying rate can be adapted to the micro-droplet deposition mode during the spraying process, avoiding self-aggregation of the resist ink after spraying and causing blurring of the pattern boundary.

[0056] UV curing responsiveness: High-functionality acrylate reactive monomers can be used in combination with dual-band photoinitiators to ensure deep cross-linking and curing under UV irradiation in the range of 300~420 nm. The resulting resist film has a high glass transition temperature and high hardness, is resistant to swelling and alkali corrosion, and is suitable for use in through holes.

[0057] Film density and particle distribution stability: Surface-modified non-conductive microparticles are added to the ink and dispersed by a coupling agent to maintain a stable distribution. After curing, a highly dense film with low surface energy is formed, which inhibits copper ion deposition and constructs an effective resistance path interruption.

[0058] Of course, in practical applications, those skilled in the art can formulate resist inks according to the needs of spraying. This embodiment does not limit the composition of resist inks.

[0059] S405. Based on the structural design data, determine the M core boards to be coated with resist ink, and determine the spraying path and spraying area for each core board in the M core boards.

[0060] In one embodiment, resist ink can be applied by spraying, screen printing, or other methods. Taking spraying as an example, based on the location coordinates, diameter, depth, and other data of the vias in the structural design data, M core boards out of N core boards to be sprayed with resist ink can be determined. For example, based on the wiring diagrams of each layer, the interlayer connection relationships, and the non-drillable layers in the structural design data, the M core boards to be sprayed with resist ink for stub removal can be determined. Different PCBs have different core boards requiring resist ink spraying. Those skilled in the art can determine the M core boards to be sprayed with resist ink according to the PCB structural design data. After determining the M core boards, the spraying area for resist ink on each core board can be determined based on the location coordinates of the vias and the location where the stub needs to be removed.

[0061] The structural design data can also include the type of through hole. The type of through hole can be determined from the structural design data. If the through hole is a single-line network hole, the area on the core board with the line network that needs to be drilled is determined as the spraying area. The target core board is also determined, and the area on the side of the target core board facing away from the line network that needs to be drilled is determined as the spraying area. The target core board is the outermost core board. If the through hole is a double-line network hole, the area on the two core boards with the line network that needs to be drilled is determined as the spraying area.

[0062] As shown in Figure 5, a single-line network hole 31 can refer to a through-hole that penetrates only one layer of the line network 11, while a double-line network hole 32 can refer to a through-hole that penetrates two layers of the line network 11. For the single-line network hole 31 shown in Figure 5, the core boards to be coated with resist ink can be identified as L1 and L3. The area on the core board L1 with the line network 11 that needs to be drilled can be defined as the coating area, as can the area on the side of the core board L3 facing away from the line network 11 that needs to be drilled. Core board L3 is the outermost core board. For the double-line network hole 32, the two core boards L1 and L3 with the line network 11 can be identified as the core boards to be coated with resist ink, and the areas on the core boards L1 and L3 with the line network that need to be drilled can be defined as the coating areas. A core board may have multiple coating areas. The coating path can be planned based on the position of the coating areas, and the movement of the nozzle of the coating equipment can be controlled by the coating path.

[0063] By spraying resist ink onto single-line network holes 31 and dual-line network holes 32, stubs can be reduced or even eliminated, enabling signal lines to be arranged on one or both sides, i.e., multi-channel signal routing. This makes routing more flexible and also allows for dense routing. Those skilled in the art can choose single-line network holes 31 and dual-line network holes 32 to implement interlayer routing according to actual routing needs, and can reduce or even eliminate stubs.

[0064] S406. Control the movement of the nozzles of the spraying equipment along the spraying path.

[0065] A core board may have multiple spraying areas, and the nozzles of the spraying equipment can be controlled to move according to the spraying path.

[0066] S407. When the nozzle moves to a spraying area, a pre-set pattern is sprayed in the spraying area by layered spraying and step-by-step photocuring to form a resist film layer in the spraying area of ​​the core board.

[0067] Before spraying resist ink onto the core board, the core board surface can be dusted and preheated. The heat treatment temperature can be 40-50℃ to enhance the wettability of the resist ink.

[0068] Layered spraying and curing can refer to continuously spraying m times, curing once, and then continuing to spray until the formed resist film layer reaches the preset thickness. Specifically, the nozzle can be controlled to continuously spray resist ink m times in the spraying area, with each spray being 10~25μm. After spraying the resist ink m times, the sprayed resist ink is photocured with ultraviolet light, and the process is repeated until the total number of sprays reaches the preset number.

[0069] For example, m=2, that is, after spraying the resist ink twice, the sprayed resist ink is cured by irradiating it with ultraviolet light to form a resist film layer, and then spraying continues until the thickness reaches the preset thickness. As shown in Figure 6, the thickness of the resist film layer is 60-100μm, and the distance from the outer contour boundary to the through hole boundary is at least 100μm.

[0070] This embodiment uses a spraying method to apply resist ink. Combined with pattern design and layered spraying and light curing, the spraying path, spraying thickness, and the outline of the pattern formed after curing can be precisely controlled.

[0071] S408. Press N core boards together to obtain a whole board, and drill holes in the whole board based on the structural design data. The hole walls of the drilled through holes include the resist plating areas formed by the resist plating film layers on different core boards.

[0072] In one embodiment, before laminating the N core boards, the N core boards can be subjected to a browning treatment to improve the quality of the entire board after lamination. After the N core boards have completed the browning treatment, they can be laminated according to the designed positions of the N core boards in the entire board to obtain the entire board.

[0073] In another embodiment, before pressing N core boards together, a coupling agent pretreatment layer can be formed on the surface of the pressing interface. Specifically, after the resist ink is applied and cured by light to form a resist film layer, and before pressing, a coupling agent containing silane functional groups is introduced on the surface of the resist film layer, the exposed resin surface of the core board, or the interface in contact with the prepreg by spraying, brushing, or dipping to form a coupling agent pretreatment layer with a thickness of nanometer to micrometer. The coupling agent can be one or more of aminopropylsilane, epoxysilane, or methacryloxysilane. One end of its molecule can react with hydroxyl, epoxy, or acrylate groups on the surface of the resist film or core board, while the other end undergoes a hydrolysis-condensation reaction during the pressing and heating process, forming a continuous Si–O–Si bond network structure at the interface. Through the above-mentioned interface coupling effect, the resist film is transformed from the original "physical adhesion" to a composite interface structure of "chemical bonding + network interlocking". This effectively alleviates the interface stress concentration caused by the difference in thermal expansion coefficient during pressing and subsequent thermal cycling, enhances the interface bonding strength between the resist film and the PCB core board, and improves the stability of the multilayer pressing structure under thermal cycling conditions.

[0074] The press-fit structure with the above-mentioned interface coupling and thermal expansion synergistic design maintains a stable bond between the resist film layer and the core board interface during subsequent processing and use, under the conditions of thermal cycling, reflow soldering and interconnection stress. No delamination, blistering or resist film failure was observed.

[0075] In one example, the pressing conditions are a temperature of 180–190°C, a pressure of 1.8–2.2 MPa, and a pressure maintenance time of 60–90 min. This allows the resist ink to be cured a second time during pressing after photocuring, preventing the resist ink from being reduced during the chemical copper plating stage. This results in a stable non-conductive resist area that cannot be copper-plated, achieving a 0-stub structure that does not require rinsing.

[0076] After lamination, multiple through holes can be drilled on the entire board based on data such as the position coordinates, diameter, and non-drillable layers of the through holes. The non-drillable layers are determined by the interlayer structure design data and are layers that cannot be drilled through, reducing or eliminating the stub. After drilling, the hole walls along the axial direction include the resist coating areas formed by the resist coating layers on each core layer.

[0077] Figure 5 shows a cross-sectional view of the through hole after drilling. Along the axial direction on the hole wall, the hole wall includes the resist plating area formed by the resist film layers on each core board. As shown in Figure 5, the resist plating area of ​​the single-line network hole 31 includes the main resist film layer 121 and the auxiliary resist film layer 122, while the double-line network hole 32 includes two resist plating areas 11. Furthermore, for the single-line network hole 31, resist ink is sprayed on the outermost layer L3 to form an "auxiliary isolation layer." Through the isolation effect between the auxiliary resist film layer 122 and the main resist film layer 121, the effect of forming a discontinuous copper layer during copper plating is better.

[0078] S409. Deposit bottom copper on the through hole, so that the hole wall of the through hole forms a discontinuous bottom copper layer that is separated by the resist plating area in the axial direction.

[0079] Since the resist plating area is a resist plating film layer obtained by photocuring resist plating ink, it can inhibit the nucleation and diffusion of copper ions on the surface of the resist plating film layer to form bottom copper. When depositing bottom copper on the through hole, the resist plating area on the hole wall cannot deposit copper, so that the hole wall of the through hole forms a discontinuous bottom copper layer that is separated by the resist plating area in the axial direction.

[0080] As shown in Step 5 of Figure 3, the basic principle of chemical copper plating is as follows: After pretreatment (such as degreasing, micro-etching, and activation), palladium catalytic particles are introduced onto the surface of the resin pore wall of the through-hole, so that copper ions in the electrolyte are deposited on the pore wall in the subsequent chemical reduction reaction to form an initial conductive copper layer (i.e., bottom copper). Since the circuit lines in the through-hole are coated with a resist ink with hydrophobic and metal deposition inhibition properties to form a resist film layer, this resist film layer forms resist region 4. The surface energy of resist region 4 is significantly reduced, and it cannot effectively adsorb catalytic particles or induce the nucleation and deposition of copper ions, so that the chemical copper film layer in resist region 4 cannot grow continuously, thus forming a discontinuous copper layer in the axial direction structure of the through-hole, that is, as shown in Step 5 of Figure 3, the copper layer on the through-hole wall is separated by two resist regions 4 to form a discontinuous bottom copper 5.

[0081] S410. Electroplating is performed on the through-holes to remove the bottom copper layer between the resist plating areas and to thicken the remaining bottom copper layer, resulting in a PCB including the resist plating film layer.

[0082] Specifically, the entire board can be placed in the electroplating solution, with the phosphor bronze balls connected to the anode and the entire PCB board connected to the cathode. This connects the bottom copper layer outside the resist plating areas to the cathode, while the bottom copper layer between the resist plating areas becomes the anode. The anode and cathode are energized and the time is preset.

[0083] During the electroplating thickening process, as shown in Figure 7, after the entire board is placed in the electrolyte, the phosphor bronze ball is connected to the anode, and the remaining bottom copper outside the resist plating area 4 becomes the cathode after the entire PCB board is connected to the cathode. After the anode and cathode are energized with a small first current density, the bottom copper layer between the resist plating area 4 is induced to form a micro-cell effect, so that the bottom copper layer between the resist plating area 4 loses electrons during the electroplating process and dissolves into copper ions and is stripped off. That is, the hole wall of the through hole forms a more reliable and consistent copper layer interruption structure between the resist plating area 4. Compared with washing the bottom copper layer between the resist plating area 4 with alkaline cleaning solution, a stable stub break can be formed efficiently.

[0084] After the cathode and anode are energized at a first current density for a first duration, the bottom copper layer between the resist plating regions 4 has been dissolved and stripped. The anode and cathode can then be energized at a larger second current density for a second duration to increase the plating thickness of the remaining bottom copper outside the resist plating regions 4.

[0085] After the anode and cathode are energized, the bottom copper layer between the resist plating regions 4 loses electrons under the effect of the micro-cell, forming copper ions that dissolve into the solution. Meanwhile, the copper ions in the solution move to the bottom copper layer outside the resist plating regions 4 under the action of the cathode and gain electrons to form copper deposits on the bottom copper layer, thus thickening the bottom copper layer outside the resist plating regions 4. Since the resist plating region 4 is a resist film layer, which is mainly composed of anti-plating material, it can ensure that the surface of the resist film layer will not be plated with copper during the chemical copper plating and electroplating thickening process. Finally, a through hole without copper layer is obtained between the resist plating regions 4, that is, the stub is eliminated.

[0086] The following example illustrates the electroplating thickening process: S1. Place the entire board in an electroplating solution containing copper ions, controlling the pH value of the solution within the range of 8.5–9.5, ensuring the copper ion concentration is equal to the preset concentration, and adding a polar auxiliary agent to improve electroplating uniformity; S2. Connect the cathode to the copper layer outside of resist plating area 4 on the entire PCB board, and use phosphor bronze balls as the anode to form a complete electrode system; S3. First, apply a low current density (0.5–1.0 A / dm³). 2S1) Apply power for 1–5 minutes, utilizing the micro-cell effect formed between the base copper layer and the overall copper layer in resist plating region 4, to preferentially dissolve or self-peel the weak base copper layer in resist plating region 4; S4, switch to normal current density (1.5–2.0 A / dm³). 2 Continue for 20–40 minutes to complete the overall thickening of the bottom copper layer outside of resist plating area 4, forming a stable vertical copper layer interruption structure and ensuring the effect of eliminating stubs.

[0087] Optionally, during the electroplating thickening process, the pH value, copper ion concentration, and ratio of complexing agent or corrosion inhibitor in the electroplating solution can be adjusted to enhance the micro-cell effect of the bottom copper layer between the resist plating areas. For example, the concentration of metal ions, pH value, and content of complexing agent or auxiliary agent in the electroplating solution can be adjusted to optimize the local potential difference, thereby selectively enhancing the micro-cell effect of the bottom copper layer between the resist plating areas 4, improving the rate and stability of self-corrosion dissolution of the bottom copper layer between the resist plating areas 4, and preventing corrosion or damage to other copper layer structures.

[0088] In this embodiment, during the electroplating thickening process, a low-density current is first used for electroplating thickening to enhance the micro-cell effect of the bottom copper layer between the resist plating areas, thereby removing the bottom copper layer between the resist plating areas. Then, a high-density current is used for electroplating thickening. With the adjustment and control of the pH value, copper ion concentration, and ratio of complexing agent or corrosion inhibitor in the electroplating solution, the bottom copper layer between the resist plating areas can be removed efficiently and stably through electrochemical reaction, while avoiding corrosion or damage to other copper layer structures.

[0089] In one embodiment, before electroplating the thickened copper layer, an alkaline stripping solution can be used to clean the via to remove the resist film layer. Specifically, after chemical copper plating to form the base copper, a weakly adhered base copper layer is formed in the area of ​​the resist film layer in the via. The resist film layer and the adhered base copper can be stripped by an alkaline stripping solution of a pre-set concentration, thereby forming a structural base copper interruption area inside the via. This base copper interruption area cannot form a film due to the potential interruption during the subsequent electroplating thickening process. This can improve the integrity of the copper layer interruption in the via and avoid the short circuit risk caused by copper residue on the resist film layer. It is suitable for high-speed signal PCB products with high reliability requirements.

[0090] It should be noted that whether or not alkaline stripping solution is needed to clean and remove the resist coating layer from the vias can be set according to actual needs and is not mandatory. For example, if the PCB is a high-frequency board with high signal requirements, the dielectric constant of the resist coating layer formed after the resist ink is cured can be well matched with the dielectric constant of the dielectric material in the PCB (with small error). The resist coating layer can remain permanently in the PCB without the need for alkaline stripping solution to clean and remove it. If the PCB is a low-frequency board with low signal requirements, the dielectric constant of the resist coating layer formed after the resist ink is cured can be well matched with the dielectric constant of the dielectric material in the PCB (with small error). In fact, it is not even necessary to care about whether the dielectric constant is matched. The resist coating layer in the PCB can be cleaned and removed with alkaline stripping solution before electroplating thickening.

[0091] This embodiment has the following beneficial effects: (1) The volume percentage of each component in the resist ink is calculated by combining the target dielectric constant of the PCB with the logarithmic mixture model and converted into the mass percentage before the resist ink is prepared. This makes the dielectric constant of the resist ink after photocuring close to or even equal to the dielectric constant of the substrate in the PCB. Even if the resist film layer formed by the resist ink is permanently left in the PCB obtained by lamination, the dielectric constant of the PCB can be guaranteed to be within the error range. Before electroplating thickening, there is no need to clean the resist film layer with alkaline stripping solution. On the one hand, the permanent presence of the resist film layer in the PCB will not have an adverse effect on signal transmission, avoiding signal distortion and reflection caused by dielectric difference. On the other hand, the process of cleaning the resist film layer with alkaline stripping solution can be omitted. The resist film layer can prevent copper deposition and stub formation during the copper plating process. This simplifies the process, adapts to batch automated manufacturing, and avoids damage to other circuits caused by alkaline stripping solution cleaning, thereby improving the PCB yield.

[0092] (2) The resist ink is a light-curing ink, which does not require high-temperature drying and curing treatment, thus avoiding the expansion and contraction of the core board due to heat, and is more suitable for thin core boards.

[0093] (3) In the process of back-calculating the volume percentage of each component in the resist ink through a logarithmic mixture model, a thermal expansion constraint condition is set. The thermal expansion constraint condition is that the sum of the mass percentages of inorganic fillers is within a preset mass percentage range, so that the thermal expansion coefficient of the resist film formed by the resist ink is close to that of the substrate (15–25 ppm / K). Before pressing the core board, a silane coupling pretreatment layer is introduced at the pressing interface. Through pressing heating or secondary curing reaction, a cross-linked network structure with Si–O–Si bonds is formed at the interface. Through the synergistic effect of the above material design and interface structure, the resist film can effectively alleviate the risk of interface failure caused by thermal cycling and interconnect stress when it remains in the multilayer pressing structure for a long time. After reliability verification related to thermal stress cycling and interconnect stress, no delamination, blistering or interface peeling phenomenon occurred in the pressing structure. The peeling strength is about 20–30% higher than that of the control structure without the introduction of interface coupling treatment, which significantly enhances the pressing reliability and long-term use stability of the multilayer PCB.

[0094] This embodiment also provides a PCB that can be processed by the PCB processing method of eliminating stubs in this embodiment. This PCB can eliminate through-hole stubs, and there is no need to clean the resist coating layer with alkaline stripping solution during the processing, avoiding damage to other circuits caused by alkaline stripping solution cleaning, thereby improving the electrical performance and yield of the PCB.

[0095] It should be understood that the various forms of processes shown above can be used, with steps reordered, added, or deleted. For example, the steps described in this invention can be executed in parallel, sequentially, or in different orders, as long as the desired result of the technical solution of this invention can be achieved, and this is not limited herein.

[0096] The specific embodiments described above do not constitute a limitation on the scope of protection of this invention. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this invention should be included within the scope of protection of this invention.

Claims

1. A PCB manufacturing method for eliminating stubs, characterized in that, include: The process involves providing N core boards after circuit printing is completed, and obtaining PCB structural design data, which includes at least the target dielectric constant of the PCB. Based on the target dielectric constant, a photocurable resist ink is formulated, wherein the dielectric constant of the photocured resist ink is within a preset error range of the target dielectric constant. According to the structural design data, M core boards to be coated with the resist ink are determined from the N core boards, and the resist ink is coated on the M core boards and then photocured to form a resist film layer on the core boards. The N core boards are pressed together to obtain a complete board, and holes are drilled into the complete board based on the structural design data. The hole walls of the drilled through-holes include resist areas formed by resist film layers on different core boards. Base copper is deposited on the through-holes, such that the hole walls of the through-holes form discontinuous base copper layers separated by the resist areas in the axial direction. The through-holes are then subjected to electroplating thickening treatment to remove the base copper layers between the resist areas and to thicken the remaining base copper layers, resulting in a PCB including the resist film layer.

2. The method according to claim 1, characterized in that, Formulating a photocurable resist ink based on the target dielectric constant includes: determining the organic substrate and at least two inorganic fillers of the resist ink, and determining the volume ratio of the at least two inorganic fillers; determining the volume percentage of the at least two inorganic fillers based on a logarithmic mixture model and the volume ratio, wherein the volume percentage of the inorganic fillers, the dielectric constant, and the dielectric constant of the organic substrate are used as independent variables in the logarithmic mixture model, and the target dielectric constant is used as the dependent variable; calculating the mass percentage of each inorganic filler using the volume percentage of each inorganic filler, and formulating the resist ink based on the mass percentage.

3. The method according to claim 2, characterized in that, When determining the volume percentage of at least two inorganic fillers based on the logarithmic mixture model and the volume ratio, the method further includes: adding a thermal expansion constraint condition, wherein the thermal expansion constraint condition is that the sum of the mass percentages of the inorganic fillers is within a preset mass percentage range.

4. The method according to claim 2, characterized in that, The mathematical expression for the logarithmic mixture model is as follows: lnε t =φ1lnε1+φ2lnε2+(1-φ1-φ2) lnε m ; where ε t Let φ1 and ε1 be the volume percentage and dielectric constant of the first inorganic filler, respectively, and φ2 and ε2 be the volume percentage and dielectric constant of the second inorganic filler, respectively. m It is the dielectric constant of the organic substrate.

5. The method according to any one of claims 1-4, characterized in that, Based on structural design data, M core boards to be coated with the resist ink are determined from N core boards. After coating the resist ink on the M core boards, photocuring is performed to form a resist film layer on the core boards. This includes: determining the M core boards to be coated with the resist ink based on structural design data, and determining the spraying path and spraying area for each of the M core boards; for each of the M core boards, controlling the nozzle of the spraying equipment to move along the spraying path; when the nozzle moves to a spraying area, a pre-set pattern is sprayed in the spraying area by layered spraying and step-by-step photocuring to form a resist film layer on the spraying area of ​​the core board.

6. The method according to claim 5, characterized in that, Determining the spraying path and spraying area for each core board in M ​​core boards includes: determining the type of through hole based on the structural design data; if the through hole is a single-line network hole, determining the area on the core board with the line network that needs to be drilled as the spraying area, and determining the target core board, determining the area on the side of the target core board facing away from the line network that needs to be drilled as the spraying area, the target core board being the outermost core board; if the through hole is a double-line network hole, determining the areas on the two core boards with the line network that need to be drilled as the spraying area.

7. The method according to claim 5, characterized in that, The pre-set pattern is sprayed in the spraying area by a layered spraying and step-by-step photocuring method, including: controlling the nozzle to continuously spray the resist ink m times in the spraying area, each spray being 10~25μm; after spraying the resist ink m times, the sprayed resist ink is photocured with ultraviolet light, and the process is repeated to control the nozzle to continuously spray the resist ink m times in the spraying area until the total number of sprays reaches the preset number.

8. The method according to any one of claims 1-4, characterized in that, Before pressing N core boards together to obtain a complete board, the process further includes: performing an interface coupling pretreatment on the pressing interface of each core board; the interface coupling pretreatment is: introducing a coupling agent containing silane functional groups to form a pretreatment layer on the surface of at least one core board to be pressed, the surface of the resist film layer on the pressing interface, and the contact interface between the core board and the prepreg, wherein the coupling agent is at least one of aminopropylsilane, epoxysilane, and methacryloxysilane.

9. The method according to any one of claims 1-4, characterized in that, The vias are subjected to electroplating thickening treatment to remove the bottom copper layer between the resist plating areas and to thicken the remaining bottom copper layer, resulting in a PCB including the resist plating film layer. The process includes: placing the entire board in an electroplating solution; connecting a phosphor bronze ball to the anode and the entire PCB to the cathode, such that the bottom copper layer outside the resist plating areas is connected to the cathode, and the bottom copper layer between the resist plating areas becomes the anode; applying a first current density to the anode and the cathode for a first duration, causing a micro-cell effect to form between the bottom copper layers of the resist plating areas, thereby removing the bottom copper layer between the resist plating areas through the micro-cell effect; after the first duration ends, applying a second current density to the anode and the cathode for a second duration, wherein the first current density is less than the second current density.

10. A PCB, characterized in that, The PCB is manufactured by the PCB manufacturing method for eliminating stubs as described in any one of claims 1-9.

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