Construction method of tandem type high-voltage power circuit board scheme

Abstract

The invention relates to the technical field of power circuit board manufacturing, and discloses a construction method of a tandem type high-voltage power circuit board scheme, which comprises the following steps of: etching a metal layer on the surface of a copper-clad resin substrate to form an insulating circuit, and processing a groove and a bore log in a resin insulating layer in the middle of the substrate through laser, carrying out electroplating hole filling treatment to obtain a prefabricated substrate; embedding a power chip into the groove, and directly connecting a metal layer at the bottom of the power chip with a metal layer at the bottom of the substrate to form a power layer; connecting a driving chip or a passive device with the conductive metal layer to form a driving layer; and placing an insulating resin layer between the power layer and the driving layer. The construction method of the tandem type high-voltage power circuit board scheme aims to solve the problems that a heat dissipation path is lengthy, thermal resistance accumulation is serious, power density is limited and the single board bearing capacity is insufficient in high-voltage application due to the fact that an existing power circuit board adopts a step-by-step packaging and surface mounting technology.

Description

Technical Field

[0001] This invention relates to the field of power circuit board manufacturing technology, specifically to a method for constructing a series-connected high-voltage power circuit board. Background Technology

[0002] Currently, the mainstream product form of power modules and power supply modules mostly adopts a two-step approach of "chip packaging - circuit board mounting". First, the power chip and driver chip are packaged into independent devices or modules, and then mounted onto the surface of a printed circuit board through processes such as soldering. Finally, they are combined with other loads and power supplies to achieve power conversion and signal transmission. This approach has mature technology and high yield rates at each stage. With the rapid rise of industries such as robotics, aircraft, and artificial intelligence, the market demand for power modules has increased significantly. At the same time, higher requirements are placed on the power density, energy conversion efficiency, heat dissipation performance, and lightweight performance of products. The traditional solution of separating packaging and mounting is no longer sufficient to meet the needs of highly integrated applications.

[0003] The main drawbacks of existing technologies are as follows: the step-by-step packaging and mounting process for power chips and circuit boards results in multiple thermal resistance interfaces between the chip and the heat dissipation structure, leading to lengthy heat dissipation paths and significant thermal resistance accumulation that severely impacts heat dissipation efficiency. Simultaneously, surface-mount devices occupy a large amount of circuit board space, limiting the improvement of power density. Furthermore, in high-voltage applications, a single circuit board must withstand the entire input voltage, placing extremely high demands on the insulation and withstand voltage performance of the substrate material, increasing material costs and design complexity. These issues restrict the performance of traditional solutions in high-power-density, high-efficiency heat dissipation, and high-voltage application scenarios, failing to meet the urgent needs of emerging applications for integrated, lightweight, and low-thermal-resistance power modules. Summary of the Invention

[0004] The purpose of this invention is to solve the problems of long heat dissipation paths, severe thermal resistance accumulation, limited power density, and insufficient single-board pressure bearing capacity in high-voltage applications caused by the step-by-step packaging and mounting process of existing power circuit boards. Therefore, a method for constructing a series high-voltage power circuit board is proposed.

[0005] The technical solution of the present invention to solve the above-mentioned technical problems is as follows: A method for constructing a series-connected high-voltage power circuit board includes the following steps: S1. The metal layer on the surface of the copper-clad resin substrate is etched to form an insulating circuit. Grooves and holes are processed in the resin insulating layer in the middle of the substrate by laser engraving, and electroplating is performed to fill the holes to obtain the prefabricated substrate. S2. Embed the power chip into the groove, so that the bottom metal layer of the power chip is directly connected to the bottom metal layer of the substrate to form a power layer; S3. Connect the driver chip or passive device to the conductive metal layer to form a driver layer; S4. An insulating resin layer is placed between the power layer and the drive layer, and the power layer and the drive layer are connected by a pressing process. S5. Etching is performed on the metal layer of the driving layer, and metal vias are made by laser drilling and electroplating to connect the electrodes of the power chip to the driving layer network. S6. An insulating resin layer and a conductive metal layer are stacked on top of the driving layer and connected by a lamination process. Metal vias are made to lead the lower circuit to the outer metal layer, and a control chip or logic chip is mounted on the surface of the outer metal layer to form a single circuit board. S7. Fabricate two single circuit boards, connect them to both sides of the heat dissipation channel through insulating pads, and connect the edge power interfaces of the two circuit boards through metal structural components to form a series voltage divider circuit.

[0006] Based on the above technical solution, the present invention can be further improved as follows.

[0007] Furthermore, in S2, the connection between the power chip and the bottom metal layer of the substrate is achieved by welding or sintering. When welding, a solder layer is placed between the bottom metal layer of the power chip and the bottom metal layer of the substrate, and the solder layer is melted to form a welding interface through a reflow soldering process. When sintering, silver paste or copper paste is coated between the bottom metal layer of the power chip and the bottom metal layer of the substrate, and the metal particles are sintered to form a connection interface through heating and pressurization.

[0008] Furthermore, the connection between the driver chip or passive device and the conductive metal layer in S3 includes: when using a soldering connection, solder is applied to the pins or pads of the driver chip or passive device, and soldered to the conductive metal layer through a reflow soldering process; when using a sintering connection, conductive paste is coated on the bottom of the driver chip or passive device, and connected to the conductive metal layer through a sintering process; when using an adhesive connection, conductive adhesive or insulating adhesive is coated on the bottom of the driver chip or passive device, and a curing process is used to make the surface of the device and the upper surface of the conductive metal layer on the same plane or to form a flat surface with a height difference of less than 0.1 mm.

[0009] Furthermore, the etching process of the driving layer metal layer in S5 includes: the first method is to retain a portion of the unetched metal layer above the driving chip or passive device, the retained metal layer forming direct contact with the electrode pads of the driving chip or passive device to form an equipotential connection area, and the metal vias subsequently formed by laser drilling and electroplating are connected to the equipotential connection area; the second method is to completely etch away the metal layer above the driving chip or passive device, form via pillars in the insulating resin layer by laser drilling, and the metal vias formed after electroplating are directly connected to the surface pads or electrodes of the driving chip or passive device.

[0010] Furthermore, in S6, the components mounted on the surface of the outer metal layer include control chips or logic chips, as well as passive components such as capacitors, resistors, or inductors. The control chips or logic chips are connected to the etched lines of the outer metal layer through surface mounting technology. The passive components are distributed in different areas of the outer metal layer and are connected to the conductive lines of the outer metal layer through soldering or mounting technology. The outer metal layer is connected to the circuit networks of the driving layer and the power layer through metal vias, forming a three-layer circuit structure of power layer, driving layer, and control layer.

[0011] Furthermore, the metal structural component in S7 includes an input metal structural component, an output metal structural component, and a grounding metal structural component. The metal structural component is connected to the metal layer at the edge power interface of the two circuit boards by bolt connection or welding. The first connecting part of the metal structural component is connected to the power chip output terminal of the first circuit board, and the second connecting part is connected to the power chip input terminal of the second circuit board, forming a series electrical path between the two circuit boards. At the same time, the metal structural component fixes the two circuit boards to the outer shell of the heat dissipation channel by a mechanical fixing structure.

[0012] Furthermore, in S7, the two circuit boards are connected by metal structural components to form a series circuit structure. The first electrode of the power chip on the first circuit board is connected to the system input terminal through a metal layer and metal structural components. The second electrode of the power chip on the first circuit board is led out to the edge power interface through a metal via, a driving layer circuit, and an outer metal layer. The edge power interface is connected to the first electrode of the power chip on the second circuit board through a metal structural component. The second electrode of the power chip on the second circuit board is connected to the system output terminal through a metal layer and metal structural components, forming a series voltage divider circuit topology of the two circuit boards.

[0013] Furthermore, in step S1, a groove is processed in the middle resin insulating layer of the substrate to embed the power chip. A hole pillar structure is processed in the resin insulating layer around the groove by laser engraving, and the hole pillar structure is chemically plated with copper or electroplated with copper. A metal plating layer is formed on the inner wall and bottom of the hole pillar. After filling with conductive material, a metal through hole is formed. The metal through hole is distributed in the non-chip embedding area of ​​the substrate and connects the metal layers on the upper and lower sides of the substrate.

[0014] Furthermore, the pressing process in S4 and S6 includes: stacking the power layer, insulating resin layer and driving layer to be pressed in sequence, or stacking the driving layer, insulating resin layer and outer conductive metal layer in sequence, placing them in a hot press, and maintaining them at a temperature of 150℃-200℃ and a pressure of 2MPa-5MPa for 20 minutes-60 minutes, so that the resin material in the insulating resin layer softens and flows to fill the gaps between layers. After cooling, the insulating resin layer solidifies to form an interlayer bonding structure, and the adjacent metal layers and chip or device layers are connected and fixed through the insulating resin layer.

[0015] Furthermore, in S7, the two circuit boards are respectively attached to the outer surfaces of the heat dissipation channel on both sides by insulating pads. The insulating pads are made of aluminum nitride ceramic, alumina ceramic, or thermally conductive and insulating polymer materials, with a thickness of 0.2mm-1mm. The power chip contacts the outer wall of the heat dissipation channel in sequence through the bottom metal layer of the substrate and the insulating pads, forming a heat transfer path from the power chip to the heat dissipation channel. Coolant channels are set inside the heat dissipation channel, and the coolant circulates in the channels to carry away heat. The two circuit boards share the same heat dissipation channel as a heat dissipation structure.

[0016] Compared with the prior art, the technical solution of this application has the following beneficial technical effects: This invention creates a groove in the middle resin insulating layer of the substrate and embeds the power chip therein, so that the bottom metal layer of the power chip is directly connected to the bottom metal layer of the substrate. This eliminates the multiple thermal resistance interfaces such as the packaging shell, pins, and solder layer in the traditional packaging process. The power chip is directly connected to the heat dissipation channel through the bottom metal layer of the substrate and the insulating pad, forming the shortest heat dissipation path, reducing thermal resistance accumulation and improving heat dissipation efficiency. This invention embeds or mounts the driver chip or passive device inside the substrate, adopts a three-layer three-dimensional integrated structure of power layer, driver layer and control layer, and realizes interlayer electrical connection through metal via holes. The original device layout laid flat on the surface of the circuit board is transformed into a vertical layered layout, integrating more functional circuits in the same board area, greatly improving power density and reducing product size. This invention creates a series voltage divider circuit by fabricating two circuit boards and connecting the edge power interface with metal structural components. This allows each circuit board to withstand only half of the total input voltage, effectively reducing the requirements for the insulation and withstand voltage performance of the substrate material and reducing material costs. At the same time, the two circuit boards share the same heat dissipation channel, further improving system integration and heat dissipation efficiency. Attached Figure Description

[0017] Figure 1 This is a schematic diagram of the overall structure of the series-connected high-voltage power circuit board solution of the present invention; Figure 2 This is a schematic diagram of the prefabricated substrate processing structure of the present invention; Figure 3 This is a schematic diagram of the power chip embedded connection structure of the present invention; Figure 4 This is a schematic diagram of the device mounting structure of the driving layer of the present invention; Figure 5 This is a schematic diagram of the bonding structure between the power layer and the drive layer of the present invention; Figure 6 This is a schematic diagram of the electrical interconnection structure of the driving layer of the present invention; Figure 7 This is a schematic diagram of the integrated three-layer circuit structure of the present invention; Figure 8 This is a cross-sectional schematic diagram of the complete structure of a single circuit board of the present invention; Figure 9 This is a schematic diagram of the series voltage divider circuit topology of the two circuit boards of the present invention; Figure 10 This is a schematic diagram of the heat dissipation channel and circuit board assembly structure of the present invention.

[0018] In the diagram: 1. Metal layer; 2. Resin insulation layer; 3. Insulated circuit; 4. Groove; 5. Metal via; 6. Power chip; 7. Driver chip or passive device; 8. Equipotential bonding area; 9. Surface pad or electrode; 10. Control chip or logic chip; 11. Metal structural component; 12. Insulating pad; 13. Heat dissipation channel. Detailed Implementation

[0019] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0020] This invention provides a method for constructing a series-connected high-voltage power circuit board, such as... Figure 1 As shown, this method combines chip embedding technology with multilayer lamination process to achieve three-dimensional integration of power layer, drive layer and control layer, and reduces the pressure requirements of single board through series pressure divider structure.

[0021] Step S1: Preparation of the prefabricated substrate like Figure 2 As shown, a double-sided copper-clad resin substrate is selected as the base material. The upper and lower surfaces of the substrate are covered with a metal layer 1, and the middle is a resin insulating layer 2. First, the metal layer 1 on the surface of the copper-clad resin substrate is etched to form an insulating line 3. The etching process adopts the standard PCB process flow of photoresist coating, exposure and development, and chemical etching to remove the copper layer in areas that do not need to be conductive, while retaining the circuit lines.

[0022] Subsequently, grooves 4 and vias 5 are machined in the intermediate resin insulating layer 2 of the substrate using laser engraving. Specifically, grooves 4 are machined in the intermediate resin insulating layer 2 of the substrate to embed the power chip 6. The laser engraving equipment uses a CO2 laser or an ultraviolet laser. By controlling the laser power, scanning speed, and processing depth, grooves 4 matching the external dimensions of the power chip 6 are machined at predetermined positions in the resin insulating layer 2. The groove depth is slightly greater than the thickness of the power chip to ensure that the chip does not protrude from the substrate surface after embedding. Vias 5 structures are machined in the resin insulating layer 2 around the grooves 4 using laser engraving. These vias are located in the non-chip embedding area and are used to achieve interlayer electrical connections.

[0023] The via structures are then subjected to chemical or electroplated copper treatment to form a metal plating layer on the inner wall and bottom of the vias. After filling with conductive material, metal vias 5 are formed. The chemical copper plating process includes steps such as desmearing, roughening, activation, and chemical plating to form a uniform copper layer on the inner wall of the vias. The electroplating process further thickens the copper layer on the inner wall of the vias through electrolysis. Finally, conductive paste or electroplating is used to completely fill the vias, forming reliable metal vias 5. The metal vias 5 are distributed in the non-chip embedding area of ​​the substrate, connecting the metal layers 1 on the upper and lower sides of the substrate. After completing the above treatment, a prefabricated substrate is obtained, ready for subsequent chip embedding and lamination.

[0024] Step S2: Formation of the power layer like Figure 3 As shown, the power chip 6 is embedded in the groove 4, so that the bottom metal layer of the power chip is directly connected to the bottom metal layer 1 of the substrate to form a power layer. The power chip 6 can be a power semiconductor device such as IGBT, MOSFET, SiC or GaN, and the appropriate voltage rating and current capacity can be selected according to the application scenario.

[0025] In S2, the connection between the power chip 6 and the bottom metal layer 1 of the substrate is achieved through either welding or sintering. When welding is used, a solder layer is placed between the bottom metal layer of the power chip 6 and the bottom metal layer 1 of the substrate. A reflow soldering process melts the solder layer to form a welding interface. SAC305 lead-free solder or SnPb eutectic solder can be used. The reflow temperature profile is set to 150-180℃ in the preheating zone and 240-260℃ in the reflow zone, with the peak temperature duration controlled at 30-60 seconds. When sintering is used, silver or copper paste is applied between the bottom metal layer of the power chip 6 and the bottom metal layer 1 of the substrate. Heating and pressurizing are applied to sinter the metal particles to form the connection interface. The sintering process parameters are: temperature 220-280℃, pressure 5-15MPa, and holding time 5-15 minutes. The resulting connection layer has lower thermal resistance and higher reliability.

[0026] After the chip is embedded, its front electrode is exposed on the upper surface of the substrate and connected to the driving layer circuit through subsequent metal vias. The bottom electrode directly forms a low thermal resistance connection path with the bottom metal layer 1 of the substrate. Compared with traditional packaging devices, this structure eliminates multiple layers of interfaces such as packaging shell, pins, and pads, significantly shortening the heat dissipation path.

[0027] Step S3: Formation of the driving layer like Figure 4 As shown, after the power layer is fabricated, the driver chip or passive device 7 is connected to the conductive metal layer 1 to form the driver layer. The driver chip can be a gate driver chip, a current sampling chip, or an isolation driver chip. The passive device 7 includes a drive resistor, a gate resistor, a filter capacitor, a bootstrap diode, etc.

[0028] The connection between the driver chip or passive device 7 and the conductive metal layer 1 in S3 includes three process routes: When using soldering connection, solder is applied to the pins or pads of the driver chip or passive device 7, and soldered to the conductive metal layer 1 through reflow soldering process. This method is suitable for standard packaged devices with pins or pads; When using sintering connection, conductive paste is coated on the bottom of the driver chip or passive device 7, and connected to the conductive metal layer 1 through sintering process. This method is suitable for bare chips or devices with a large area of ​​metallization layer on the bottom; When using adhesive connection, conductive adhesive or insulating adhesive is coated on the bottom of the driver chip or passive device 7, and the device surface and the upper surface of the conductive metal layer 1 are made to be on the same plane or form a flat surface with a height difference of less than 0.1 mm through curing process. This method is suitable for embedded structures that require flattening treatment. The cured adhesive layer can achieve mechanical fixation and ensure the flatness requirements of the subsequent pressing process.

[0029] The layout of devices in the driver layer needs to take into account their electrical connection with the power chip. The driver chip is usually placed near the power chip to shorten the parasitic inductance of the drive circuit and improve the switching speed; passive devices are distributed in corresponding positions according to the circuit topology.

[0030] Step S4: Press-fit connection between the power layer and the drive layer like Figure 5 As shown, after the device is mounted on the power layer and driver layer, an insulating resin layer 2 is placed between the power layer and the driver layer, and the power layer and driver layer are connected by a lamination process. The insulating resin layer 2 can be made of prepreg material, commonly including FR-4 epoxy resin, polyimide, BT resin, etc., and a suitable material system is selected according to the withstand voltage rating and dielectric performance requirements.

[0031] The lamination process in S4 and S6 includes: stacking the power layer, insulating resin layer 2, and drive layer sequentially, with the stacking order being the bottom power layer, the middle insulating resin layer 2, and the top drive layer, ensuring that each layer is aligned and free of bubbles or impurities. The layers are placed in a hot press and held at 150℃-200℃ and 2MPa-5MPa for 20-60 minutes. Specific process parameters are adjusted according to the resin system and board thickness; for example, FR-4 material typically uses a process window of 170-180℃, 3-4MPa, and 30-40 minutes. This softens and allows the resin material in the insulating resin layer 2 to flow and fill the interlayer gaps. After cooling, the insulating resin layer 2 solidifies to form an interlayer bonding structure, connecting and fixing adjacent metal layers 1 and chip or device layers through the insulating resin layer 2. During lamination, the resin flow must be moderate, filling gaps without excessive flow that could cause short circuits. Natural or controlled cooling is used during the cooling stage to ensure the resin fully solidifies and forms a stable interlayer structure.

[0032] Step S5: Electrical interconnection between the driver layer and the power chip like Figure 6 As shown, after lamination, etching is performed on the driving layer metal layer 1. Metal vias 5 are then created using laser drilling and electroplating to connect the electrodes of the power chip 6 to the driving layer network. This step achieves the crucial electrical connection between the power chip and the driving circuit.

[0033] In S5, the etching process of the driving layer metal layer 1 includes two technical solutions: The first method involves leaving a portion of the unetched metal layer 1 above the driving chip or passive device 7. This retained metal layer 1 makes direct contact with the electrode pads of the driving chip or passive device 7, forming an equipotential connection region 8. This region serves as an electrical node, and subsequent metal vias 5, created through laser drilling and electroplating, are connected to this equipotential connection region 8. This method is suitable for situations where the device electrodes are small or where a larger soldering area is required. The second method involves completely etching away the metal layer 1 above the driving chip or passive device 7, forming via pillars in the insulating resin layer 2 through laser drilling, and then directly contacting the surface pads or electrodes 9 of the driving chip or passive device 7 after electroplating. This method reduces intermediate connection steps and lowers contact resistance, making it suitable for situations where the device pad area is sufficient and the position is precise.

[0034] Laser drilling uses ultraviolet or CO2 lasers. The laser parameters are selected based on the number and thickness of the material layers to be drilled, and the drilling diameter is typically 0.1-0.3 mm. The electroplating filling process is similar to step S1. A conductive layer is formed on the hole wall through chemical and electroplating copper plating, and then the through-hole is completely filled using electroplating filling technology to ensure electrical continuity and mechanical strength.

[0035] Step S6: Integration of the control layer and fabrication of outer layer circuits like Figure 7 As shown, after the electrical interconnection of the driving layer is completed, an insulating resin layer 2 and a conductive metal layer 1 are superimposed on top of the driving layer and connected by a lamination process. The lamination process parameters are the same as in step S4. Alternatively, the driving layer, the insulating resin layer 2, and the outer conductive metal layer 1 can be stacked sequentially to form a third layer structure. Metal vias 5 are fabricated to bring the lower layer circuitry to the outer metal layer. Key signals and power nodes of the driving layer and power layer are brought to the outer layer by laser drilling and electroplating filling techniques.

[0036] A control chip or logic chip 10 is mounted on the surface of the outer metal layer to form a single circuit board. The components mounted on the surface of the outer metal layer 1 in S6 include the control chip or logic chip 10 and passive components 7 such as capacitors, resistors, or inductors. The control chip can be a digital controller such as a DSP, MCU, or FPGA, or an analog controller such as a PWM control chip or protection chip. The control chip or logic chip 10 is connected to the etched lines of the outer metal layer 1 through a surface mount process, and the mounting is completed using reflow soldering or selective wave soldering. The passive components 7 are distributed in different areas of the outer metal layer 1 and are connected to the conductive lines of the outer metal layer 1 through soldering or mounting processes. These include input filter capacitors, output filter capacitors, sampling resistors, and signal isolation capacitors. The outer metal layer 1 is connected to the circuit networks of the driving layer and the power layer through the metal vias 5, forming a three-layer circuit structure of power layer, driving layer and control layer. This structure realizes functional layering in the vertical direction. The bottom layer is a high current power path, the middle layer is driving and signal processing, and the top layer is logic control and human-machine interaction. Each layer forms a complete electrical network through the metal vias 5.

[0037] At this point, the production of a single circuit board is complete. This circuit board integrates power switches, drive circuits, and control circuits, and has complete power conversion functions.

[0038] Step S7: Assembly of the series voltage divider structure like Figure 8 As shown, two single circuit boards are fabricated and connected to both sides of the heat dissipation channel 13 via insulating pads 12. The edge power interfaces of the two circuit boards are connected via metal structural components 11 to form a series voltage divider circuit. This is one of the core innovations of this invention, achieving voltage divider operation under high voltage input through a series topology.

[0039] In S7, two circuit boards are attached to the outer surfaces of the heat dissipation channel 13 on both sides via insulating pads 12. The insulating pads 12 are made of aluminum nitride ceramic, alumina ceramic, or thermally conductive and insulating polymer materials, with a thickness of 0.2mm-1mm. Aluminum nitride ceramic has a high thermal conductivity (170-220W / m·K) and good insulation properties, making it suitable for high power density applications; alumina ceramic has a lower cost but a slightly lower thermal conductivity (20-30W / m·K); thermally conductive and insulating polymer materials such as boron nitride-filled silicone pads have good flexibility and assembly tolerance. The power chip 6 contacts the outer wall of the heat dissipation channel 13 sequentially through the bottom metal layer 1 of the substrate and the insulating pads 12, forming a heat transfer path from the power chip 6 to the heat dissipation channel 13. This path contains only three interfaces, reducing the thermal resistance by 5-6 layers compared to traditional solutions, resulting in a thermal resistance reduction of more than 50%. The cooling channel 13 has a coolant flow channel inside, in which the coolant circulates and carries away heat. The two circuit boards share the same cooling channel 13 as a heat dissipation structure. The cooling channel 13 is usually made of aluminum alloy or copper material by extrusion or welding. The internal flow channel is designed as a serpentine or parallel multi-channel structure. The coolant can be water, water glycol mixture or fluorinated liquid, and is driven to circulate by an external pump.

[0040] The metal structural component 11 in S7 includes an input metal structural component, an output metal structural component, and a grounding metal structural component. The metal structural component 11 is connected to the metal layer 1 at the edge power interface of the two circuit boards via bolts or welding. Bolt connections facilitate assembly and maintenance, while welding connections offer lower contact resistance. The first connection portion of the metal structural component 11 connects to the output terminal of the power chip 6 on the first circuit board, and the second connection portion connects to the input terminal of the power chip 6 on the second circuit board, forming a series electrical path between the two circuit boards. Simultaneously, the metal structural component 11 secures the two circuit boards to the outer casing of the heat dissipation channel 13 via a mechanical fixing structure. This mechanical fixing structure can employ bolt fastening, snap-locking, or pressure plate fixing methods to ensure the overall mechanical strength and vibration resistance of the structure.

[0041] In S7, two circuit boards are connected via a metal structural component 11 to form a series circuit structure. Specifically, the first electrode of the power chip 6 on the first circuit board is connected to the system input terminal via a metal layer 1 and the metal structural component 11. This first electrode is typically the drain or collector of the power device and withstands the high input voltage. The second electrode of the power chip 6 on the first circuit board is led out to an edge power interface via a metal via 5, a driver layer circuit, and an outer metal layer 1. This second electrode is the source or emitter of the power device and is led out to the board edge via the vertical interconnection of the multilayer circuit boards. This edge power interface is connected to the first electrode of the power chip 6 on the second circuit board via the metal structural component 11, achieving a series connection between the two boards. The second electrode of the power chip 6 on the second circuit board is connected to the system output terminal via a metal layer 1 and the metal structural component 11, forming a series voltage divider circuit topology for the two circuit boards. In this topology, when the system input voltage is 800V, each circuit board only withstands 400V, which reduces the voltage rating of devices that originally required 1200V to 600V, significantly reducing device cost and substrate insulation requirements.

[0042] The control signals from the two circuit boards are electrically isolated and transmitted via optical fiber or an isolation transformer to ensure safe isolation between the high and low voltage sides. During system operation, the two power chips switch synchronously to achieve series chopping or series inverter functions, applicable to high-voltage DC-DC conversion, high-voltage motor drives, photovoltaic inverters, and other applications.

[0043] This invention, through the aforementioned seven steps, organically combines power chip embedding, multi-layer circuit integration, and series voltage division to construct a power circuit board solution with high power density, low thermal resistance, and high withstand voltage. Compared to the traditional "chip packaging-circuit board mounting" solution, this invention reduces volume by 30-40% and thermal resistance by 40-50% at the same power level, and lowers device costs by 20-30% in high-voltage applications, demonstrating significant technical advantages and application value.

[0044] It should be noted that, in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0045] Although embodiments of the invention have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of the invention, the scope of which is defined by the appended claims and their equivalents.

Claims

1. A method for constructing a series-connected high-voltage power circuit board, characterized in that, Includes the following steps: S1. The metal layer (1) on the surface of the copper-clad resin substrate is etched to form an insulating line (3). The groove (4) and the hole pillar (5) are processed in the middle resin insulating layer (2) of the substrate by laser. The hole is filled by electroplating to obtain the prefabricated substrate. S2. Embed the power chip (6) into the groove (4) so ​​that the bottom metal layer of the power chip is directly connected to the bottom metal layer (1) of the substrate to form a power layer; S3. Connect the driver chip or passive device (7) to the conductive metal layer (1) to form a driver layer; S4. An insulating resin layer (2) is placed between the power layer and the drive layer, and the power layer and the drive layer are connected by a pressing process. S5. Etching is performed on the driving layer metal layer (1), and metal vias (5) are made by laser drilling and electroplating to connect the electrodes of the power chip (6) to the driving layer network. S6. An insulating resin layer (2) and a conductive metal layer (1) are superimposed on the driving layer and connected by a pressing process to create a metal through hole (5) to lead the lower circuit to the outer metal layer. A control chip or logic chip (10) is mounted on the surface of the outer metal layer to form a single circuit board. S7. Make two single circuit boards and connect them to both sides of the heat dissipation channel (13) through insulating pads (12). Connect the edge power interfaces of the two circuit boards through metal structural parts (11) to form a series voltage divider circuit.

2. The method for constructing a series-connected high-voltage power circuit board according to claim 1, characterized in that, The connection between the power chip (6) and the bottom metal layer (1) of the substrate in S2 is achieved by welding or sintering. When welding, a solder layer is set between the bottom metal layer of the power chip (6) and the bottom metal layer (1) of the substrate. The solder layer is melted by the reflow soldering process to form a welding interface. During sintering, silver paste or copper paste is applied between the bottom metal layer of the power chip (6) and the bottom metal layer (1) of the substrate, and the metal particles are sintered by heating and pressurizing to form a connection interface.

3. The method for constructing a series-connected high-voltage power circuit board according to claim 1, characterized in that, The connection between the driving chip or passive device (7) and the conductive metal layer (1) in S3 includes: when using a welding connection, solder is placed on the pins or pads of the driving chip or passive device (7) and welded to the conductive metal layer (1) through a reflow soldering process; when using a sintering connection, conductive paste is coated on the bottom of the driving chip or passive device (7) and connected to the conductive metal layer (1) through a sintering process; when using an adhesive connection, conductive adhesive or insulating adhesive is coated on the bottom of the driving chip or passive device (7) and the device surface and the upper surface of the conductive metal layer (1) are made to be on the same plane or form a flat surface with a height difference of less than 0.1 mm through a curing process.

4. The method for constructing a series-connected high-voltage power circuit board according to claim 1, characterized in that, The etching process of the driving layer metal layer (1) in S5 includes: the first method is to retain a portion of the unetched metal layer (1) above the driving chip or passive device (7), the retained metal layer (1) forms direct contact with the electrode pads of the driving chip or passive device (7) to form an equipotential connection area (8), and the metal via (5) subsequently formed by laser drilling and electroplating is connected to the equipotential connection area (8); the second method is to completely etch away the metal layer (1) above the driving chip or passive device (7), form a via pillar in the insulating resin layer (2) by laser drilling, and the metal via (5) formed after electroplating is directly connected to the surface pads or electrodes (9) of the driving chip or passive device (7).

5. The method for constructing a series-connected high-voltage power circuit board according to claim 1, characterized in that, The components mounted on the surface of the outer metal layer (1) in S6 include a control chip or logic chip (10) and passive components (7) such as capacitors, resistors or inductors. The control chip or logic chip (10) is connected to the etched lines of the outer metal layer (1) through a surface mount process. The passive components (7) are distributed in different areas of the outer metal layer (1) and are connected to the conductive lines of the outer metal layer (1) through a soldering or mounting process. The outer metal layer (1) is connected to the circuit networks of the driving layer and the power layer through metal vias (5) to form a three-layer circuit structure of power layer, driving layer and control layer.

6. The method for constructing a series-connected high-voltage power circuit board according to claim 1, characterized in that, The metal structure component (11) in S7 includes an input end metal structure component, an output end metal structure component and a ground end metal structure component. The metal structure component (11) is connected to the metal layer (1) at the edge power interface of the two circuit boards by bolt connection or welding. The first connection part of the metal structure component (11) is connected to the output end of the power chip (6) of the first circuit board, and the second connection part is connected to the input end of the power chip (6) of the second circuit board, forming a series electrical path between the two circuit boards. At the same time, the metal structure component (11) fixes the two circuit boards to the outer shell of the heat dissipation channel (13) by mechanical fixing structure.

7. The method for constructing a series-connected high-voltage power circuit board according to claim 1, characterized in that, In S7, the two circuit boards are connected by a metal structure (11) to form a series circuit structure. The first electrode of the power chip (6) of the first circuit board is connected to the system input terminal through the metal layer (1) and the metal structure (11). The second electrode of the power chip (6) of the first circuit board is led out to the edge power interface through the metal via (5), the driving layer circuit and the outer metal layer (1). The edge power interface is connected to the first electrode of the power chip (6) of the second circuit board through the metal structure (11). The second electrode of the power chip (6) of the second circuit board is connected to the system output terminal through the metal layer (1) and the metal structure (11), forming a series voltage divider circuit topology of the two circuit boards.

8. The method for constructing a series-connected high-voltage power circuit board according to claim 1, characterized in that, In S1, a groove (4) is processed in the middle resin insulating layer (2) of the substrate for embedding a power chip (6). A hole pillar structure is processed in the resin insulating layer (2) around the groove (4) by laser, and the hole pillar structure is chemically plated or electroplated with copper. A metal plating layer is formed on the inner wall and bottom of the hole pillar. After filling with conductive material, a metal through hole (5) is formed. The metal through hole (5) is distributed in the non-chip embedding area of ​​the substrate and connects the metal layers (1) on the upper and lower sides of the substrate.

9. The method for constructing a series-connected high-voltage power circuit board according to claim 1, characterized in that, The pressing process in S4 and S6 includes: stacking the power layer, insulating resin layer (2) and driving layer to be pressed in sequence, or stacking the driving layer, insulating resin layer (2) and outer conductive metal layer (1) in sequence, placing them in a hot press, and maintaining them for 20 minutes to 60 minutes at a temperature of 150℃-200℃ and a pressure of 2MPa-5MPa, so that the resin material in the insulating resin layer (2) softens and flows to fill the gaps between layers. After cooling, the insulating resin layer (2) is cured to form an interlayer bonding structure, and the adjacent metal layers (1) and chip or device layers are connected and fixed through the insulating resin layer (2).

10. The method for constructing a series-connected high-voltage power circuit board according to claim 1, characterized in that, In S7, the two circuit boards are respectively attached to the outer surfaces of the heat dissipation channel (13) on both sides by insulating pads (12). The insulating pads (12) are made of aluminum nitride ceramic, alumina ceramic or thermally conductive and insulating polymer material, with a thickness of 0.2mm-1mm. The power chip (6) contacts the outer wall of the heat dissipation channel (13) in sequence through the bottom metal layer (1) of the substrate and the insulating pads (12), forming a heat transfer path from the power chip (6) to the heat dissipation channel (13). The heat dissipation channel (13) is provided with a coolant flow channel. The coolant circulates in the flow channel to carry away heat. The two circuit boards share the same heat dissipation channel (13) as a heat dissipation structure.

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