Gicl package structure with integrated isolation as part of the die
By introducing an insulating layer and molding compound structure between integrated circuit dies, the problem of increased die size caused by excessively large coils in current-isolated communication is solved, enabling inductively coupled communication with smaller coils and smaller dies.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- NXP USA INC
- Filing Date
- 2024-11-29
- Publication Date
- 2026-06-02
AI Technical Summary
In the prior art, communication between current-isolated integrated circuit dies requires a large coil to maintain signal power, which leads to an increase in the size of the integrated circuit die.
By introducing insulating layers and molding compound structures between integrated circuit dies, the distance between coils is reduced, current isolation is provided by the insulating layers, and communication is achieved through inductive coupling, thereby reducing coil size and die area.
This approach achieves improved signal transmission efficiency by reducing coil size and integrated circuit die area while maintaining current isolation.
Smart Images

Figure CN122138708A_ABST
Abstract
Description
Technical Field
[0001] This disclosure relates to integrated circuit packaging structures. Background Technology
[0002] Current-isolated integrated circuits can enable wireless communication. For example, two current-isolated integrated circuit dies can each have a conductive coil that can be used for communication via inductive coupling. Summary of the Invention
[0003] In an example embodiment, a system includes: a first integrated circuit die having a first communication coil; a second integrated circuit die having a second communication coil, wherein the second integrated circuit die is positioned relative to the first integrated circuit die such that the first communication coil and the second communication coil are aligned to allow inductive coupling between the first communication coil and the second communication coil; a molding compound structure positioned around the periphery of the second integrated circuit die; and an insulating layer positioned between the first integrated circuit die and the second integrated circuit die, and positioned between the first integrated circuit die and the molding compound structure.
[0004] Additional example embodiments of the system include: the insulating layer comprising a polymer layer formed on the back side of the second integrated circuit die and on the molding compound structure, and the insulating layer comprising a polyimide layer. Further example embodiments include: the molding compound structure covering the back side of the second integrated circuit die, and the insulating layer comprising a polymer layer formed on the molding compound structure. Further example embodiments include: the first integrated circuit die and the second integrated circuit die being in separate voltage domains, and the insulating layer providing current isolation between the first integrated circuit die and the second integrated circuit die; a dielectric adhesive layer situated between the first integrated circuit die and the insulating layer; the first integrated circuit die including at least a third communication coil, and the second integrated circuit die including at least a fourth communication coil.
[0005] In another example embodiment, a packaged integrated circuit device includes: a first integrated circuit die having a first conductive coil and a first bonding pad for providing a first electrical connection to the first integrated circuit die; a second integrated circuit die having a second conductive coil for inductively coupling to the first conductive coil and a second bonding pad for providing a second electrical connection to the second integrated circuit die, the second integrated circuit die being surrounded by a molding compound structure on at least four sides; and a dielectric layer positioned on the back side of the second integrated circuit die and the molding compound structure, wherein the dielectric layer is positioned between the first integrated circuit die and the second integrated circuit die.
[0006] Additional example embodiments of the packaged integrated circuit device may include: the dielectric layer comprising a polymer layer, such as a polyimide layer spin-coated on the back side of the second integrated circuit die and the molding compound structure; and an adhesive layer situated between the dielectric layer and the first integrated circuit die. Additional example embodiments include: the dielectric layer providing current isolation between the first integrated circuit die and the second integrated circuit die, wherein the first bonding pad and the second bonding pad are current-isolated from each other.
[0007] In another example embodiment, a method may include: forming a first conductive coil on a first integrated circuit die; forming a second conductive coil on a second integrated circuit die; back-grinding the second integrated circuit die; forming a molding compound structure on at least four sides of the second integrated circuit die; grinding the molding compound structure to expose the back side of the second integrated circuit die; forming an insulating layer on the back side of the second integrated circuit die and the molding compound structure; and coupling the second integrated circuit die to the first integrated circuit die such that the second conductive coil is aligned with the first conductive coil to allow inductive coupling between the first conductive coil and the second conductive coil and such that the insulating layer provides current isolation between the first integrated circuit die and the second integrated circuit die.
[0008] Additional example embodiments of the method include: forming the insulating layer includes forming a polyimide layer on the back side of the second integrated circuit die and the molding compound structure; and coupling the second integrated circuit die to the first integrated circuit die includes applying an adhesive to the first integrated circuit die and placing the second integrated circuit die in the adhesive. Further example embodiments of the method include: wherein the insulating layer provides current isolation between the first integrated circuit die and the second integrated circuit die; wherein the first integrated circuit die and the second integrated circuit die are in separate voltage domains, and the insulating layer provides current isolation between the first integrated circuit die and the second integrated circuit die; forming at least a third communication coil on the first integrated circuit die; and forming at least a fourth communication coil on the second integrated circuit die. Attached Figure Description
[0009] This disclosure is illustrated by means of examples, embodiments, etc., and is not limited to the accompanying drawings, in which similar reference numerals indicate similar elements. Elements in the drawings are shown for simplicity and clarity and are not necessarily drawn to scale. The accompanying drawings, together with the detailed description, are incorporated in and form a part of this specification, and are used to further illustrate examples, embodiments, etc., and to explain various principles and advantages based on this disclosure, in which:
[0010] Figure 1 and Figure 2 This is a cross-sectional view of a packaged electronic device that includes two currently isolated integrated circuit devices.
[0011] Figure 3A and Figure 3B Example process flows according to various embodiments are shown; and
[0012] Figure 4 This is a flowchart illustrating example methods according to various embodiments. Detailed Implementation
[0013] The following detailed description is provided for illustrative purposes and is not intended to limit the invention or its application and uses. Furthermore, it is not intended to be bound by any explicit or implicit theory presented in the foregoing technical field, background art, or the following detailed description.
[0014] For simplicity and clarity, the accompanying drawings illustrate a general construction, and descriptions and details of well-known features and techniques may be omitted to avoid unnecessarily obscuring the invention. Furthermore, the elements in the drawings are not necessarily drawn to scale. For example, the dimensions of some elements or regions may be enlarged relative to other elements or regions to aid in understanding embodiments of the invention.
[0015] The terms “first,” “second,” “third,” “fourth,” etc. (if present) used in the description and claims are used to distinguish similar elements and are not necessarily used to describe a particular sequence or chronological order. It should be understood that the terms thus used are interchangeable where appropriate, such that embodiments of the invention described herein can be operated, for example, in a different order than that shown or described herein. Furthermore, the terms “comprise,” “include,” “have,” and any variations thereof are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus comprising a list of elements is not necessarily limited to those elements, but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. The term “coupled” as used herein is defined as a direct or indirect connection, either electrically or non-electrically. As used herein, the terms “substantially” and “basically” mean sufficient to achieve the stated purpose in a practical manner, and minor defects (if present) are not important to the stated purpose.
[0016] Unless otherwise stated, directional references, such as “top,” “bottom,” “left,” “right,” “above,” “below,” etc., are not intended to require any preferred orientation, but are for illustrative purposes and refer to the orientation of one or more corresponding figures.
[0017] It should be understood that the steps of the various processes described herein are non-limiting examples of suitable processes according to embodiments and are for illustrative purposes. Systems and apparatuses according to embodiments herein may use any suitable process, including processes that omit the steps described above, processes that perform those steps in a different order, and similar processes, and so on. It should also be understood that well-known features may be omitted for clarity.
[0018] Unless otherwise expressly stated, the terms “approximately,” “substantially,” and similar terms are used with respect to the dimensions, relative positioning, or orientation of various features to indicate that the dimensions, positioning, or orientation of those features are subject to the tolerances and / or anticipated process variations of the equipment and processes chosen to form the described features. Unless otherwise expressly stated, the terms “approximately,” “substantially,” and similar terms are used with respect to measurable values or characteristics to indicate that the expected measurement accuracy of the equipment and methods used to measure those values or characteristics and / or within the tolerance limits specified by the technical standards applicable to the described technology.
[0019] Communication between currently isolated integrated circuit dies can be achieved by inductively coupling conductive communication coils within the integrated circuit die. This type of communication is referred to herein as a currently isolated communication link (GICL). The size of the coils used for the GICL (and / or the amount of signal power) can be affected by the distance between the coils. For example, for a given signal power, a larger distance between inductively coupled coils will result in larger coils, which in turn can increase the overall size of the integrated circuit die.
[0020] By reducing the distance between coils in an integrated circuit die while maintaining current isolation, thereby allowing for a reduction in coil size and potentially a reduction in the integrated circuit die area, the various embodiments described herein improve signal transmission. A stacked combination of two integrated circuit dies includes a top die with an insulating material that acts as an insulating layer between the two dies, the insulating layer being configured to provide the required amount of DC voltage isolation between the two dies. The top die is back-milled to reduce thickness, and the coils in the two integrated circuit dies are separated by the thickness of the top die, as well as the thickness of the insulating layer and any adhesive. These and other embodiments are further described below.
[0021] Figure 1 This is a cross-sectional view of a packaged electronic device that includes two currently isolated integrated circuit devices. Figure 1The packaged electronic device includes a first integrated circuit die 110 and a second integrated circuit die 150 separated by an insulating layer 120. In some embodiments, the insulating layer 120 has high voltage breakdown characteristics (e.g., the insulating layer 120 can withstand voltages >5000 volts without breaking down), allowing the two integrated circuit dies to operate in different voltage domains and to withstand large voltage transients without damaging either integrated circuit die. As an example, but not as a limitation, one integrated circuit die may include a digital control circuitry system operating at relatively low voltages (e.g., less than 10 volts), and the second integrated circuit die may include a high-voltage circuitry system (e.g., operating at hundreds of volts) designed to drive an inverter or motor (e.g., for an electric vehicle).
[0022] like Figure 1 As shown, a first integrated circuit die 110 is mounted to a leadframe segment 186. The first integrated circuit die 110 includes one or more conductive coils 112 and at least one bonding pad 114 formed thereon. In some embodiments, the conductive coils 112 and bonding pads 114 are formed on one or more metallization layers on the first integrated circuit die 110. Figure 1 In this example, bonding pad 114 provides power to the first integrated circuit die 110. In some embodiments, bonding pad 114 can provide a signal connection to the first integrated circuit die 110. Bonding pads formed on the integrated circuit die 110 can be used for any combination of signal and power connections. Figure 1 In this example, wire 174 is bonded to bonding pad 114 and lead frame segment 184. A conductive coil 112 is shown on the integrated circuit die 110; however, any number of conductive coils may be included. Similarly, a bonding pad 114 is shown on the integrated circuit die 110; however, any number of bonding pads may be included.
[0023] In some embodiments, the conductive coil 112 is electrically coupled to a wireless communication circuit within the integrated circuit die 110. For example, one or more conductive coils of the conductive coil 112 may be coupled to a transmitter circuit, a receiver circuit, a transceiver circuit, etc. In some embodiments, the bonding pad 114 may be electrically coupled to one or more circuit nodes within the integrated circuit die 110 that supply power to the circuitry within the integrated circuit die 110. In these embodiments, when a voltage is applied to the bonding pad 114, power can be supplied to the circuitry within the integrated circuit die 110, such as control circuitry, transmitter circuitry, receiver circuitry, transceiver circuitry, etc.
[0024] The second integrated circuit die 150 includes one or more conductive coils 152 and one or more bonding pads 154 formed thereon. In some embodiments, the conductive coils 152 and bonding pads 154 are formed on a metallization layer on the second integrated circuit die 150. Figure 1 In this example, bonding pad 154 can provide signal and power connections to the second integrated circuit die 150. For example, first bonding pad 154 can provide power to the second integrated circuit die 150, and second bonding pad 156 can provide additional signal routing to the integrated circuit die 150. Figure 1 In this example, wire 172 is connected to bonding pad 154 and lead frame segment 182. A conductive coil 152 is shown on the integrated circuit die 150; however, any number of conductive coils may be included. Similarly, a bonding pad 154 is shown on the integrated circuit die 150; however, any number of bonding pads may be included.
[0025] In some embodiments, the conductive coil 152 is electrically coupled to wireless communication circuitry within the integrated circuit die 150. For example, one or more conductive coils of the conductive coil 152 may be coupled to transmitter circuitry, receiver circuitry, transceiver circuitry, etc. In some embodiments, the bonding pad 154 may be electrically coupled to one or more circuit nodes within the integrated circuit die 150 that supply power to circuitry within the integrated circuit die 150. In these embodiments, when a voltage is applied to the bonding pad 154, power can be supplied to circuitry within the integrated circuit die 150, such as control circuitry, transmitter circuitry, receiver circuitry, transceiver circuitry, etc.
[0026] The insulating layer 120 may comprise any material (at any thickness) that provides the desired amount of dielectric insulation quality (e.g., >5000V breakdown characteristics). For example, a passivation layer (e.g., a polymer such as polyimide) may be formed on the back side of the integrated circuit die 150 to provide the desired characteristics.
[0027] The second integrated circuit die 150 has molding compound structures 170 on at least four sides. In some embodiments, the back side of the second integrated circuit die 150 is polished or ground (also referred to herein as “backside grinding”) until the second integrated circuit die 150 is of the desired thickness, and then molding compound is formed around the second integrated circuit die 150. An insulating layer 120 is formed on the back side of the second integrated circuit die 150 and the molding compound structure 170. These processes and related processes are further described below.
[0028] A second integrated circuit die 150 having a molding compound structure 170 and an insulating layer 120 is mounted to a first integrated circuit die 110 such that a conductive coil 152 is substantially vertically aligned with a conductive coil 112. In some embodiments, this is performed using a non-conductive adhesive 160. In some embodiments, the second integrated circuit die 150 extends beyond the coverage area of the first integrated circuit die 110, such as... Figure 1As shown, the second integrated circuit die 150 further extends to the left of the coverage area of the first integrated circuit die 110. In other embodiments, the second integrated circuit die 150 is bonded to the first integrated circuit die 110 within the coverage area of the first integrated circuit die 110.
[0029] In the Figure 1 In the illustrated embodiment, insulating layer 120 is positioned between the first integrated circuit die 110 and the second integrated circuit die 150, and also between the first integrated circuit die 110 and the molding compound structure 170. The distance between the inductively coupled conductive coils 152 and 112 is reduced compared to embodiments where the second integrated circuit die 150 is not polished and / or has a thicker insulating layer 120. If the second integrated circuit die 150 is not polished to reduce its thickness, and / or the insulating layer is a thicker layer, the distance between the inductively coupled conductive coils increases. In the various embodiments described herein, the inductively coupled conductive coils are closer together, potentially allowing for lower signal power, smaller conductive coils, smaller integrated circuit dies, or any combination thereof.
[0030] Figure 2 This is a cross-sectional diagram of a packaged electronic device comprising two currently isolated integrated circuit devices. Figure 2 In the illustrated embodiment, the molding compound structure 170 surrounds the second integrated circuit 150 on five sides. In these embodiments, an insulating layer 120 is positioned between the first integrated circuit die 110 and the second integrated circuit die 150, and also between the first integrated circuit die 110 and the molding compound structure 170. In some embodiments, this is achieved by back-grinding the second integrated circuit die 150, forming the molding compound structure 170 on the second integrated circuit die 150 (including on the back side), forming the insulating layer 120 on the molding compound structure 170, and bonding the second integrated circuit die 150 to the first integrated circuit die 110 in a manner that aligns the conductive communication coils 112 and 152 to allow inductive coupling between the coils.
[0031] Figure 3A and 3B Example process flows according to various embodiments are shown. At 310, wafer 312 includes a plurality of second integrated circuit dies 150. Conductive communication coils 152 and bonding pads 154 have been formed on the integrated circuit dies 150 shown at 310. Furthermore, at 310, the back side of wafer 312 is ground to a desired thickness. For example, in some embodiments, the wafer may be ground to a thickness of approximately 75 μm. The integrated circuit dies 150 may then be individually diced.
[0032] At 320, individual integrated circuit dies are placed onto substrate 322 (e.g., a strip), where the back side is exposed. The distance between dies 150 can be determined using any mechanism or criterion, including, for example, internal creepage requirements. In some embodiments, as examples, the distance between dies 150 on substrate 322 can be approximately 120-300 μm.
[0033] At 330, molding compound 170 is formed on stripe 322 and die 150 to form a reconstructed wafer. Molding compound 170 covers all four sides of each die 150 and also covers the back side of the die 150. At 340, molding compound 170 is ground. In some embodiments, molding compound 170 is ground sufficiently to expose the back side of the die 150. In other embodiments, molding compound 170 is ground to produce a uniform surface, but not sufficiently to expose the back side of the die 150. In yet another embodiment, the action at 340 is skipped, and the molding compound is not ground at all. After the action at 340, the reconstructed wafer may include a die 150 having molding compound 170 on four sides, or a die 150 having molding compound on five sides (e.g., four sides plus the back side).
[0034] At 350°, an insulating layer 120 is formed on the reconstructed wafer. In some embodiments, a polymer layer is formed on the reconstructed wafer to form the insulating layer 120. In some embodiments, the insulating layer 120 is made of a dielectric material thick enough to provide the desired minimum voltage breakdown characteristics (e.g., >5000V). For example, the insulating layer 120 may be formed of a polyimide layer having a desired thickness (e.g., about 20 μm). In some embodiments, the insulating layer 120 may contact the molding compound 170 and the back side of the die 150 (e.g., when the molding compound is on all four sides of the die 150), while in other embodiments, the insulating layer 120 may contact only the molding compound 170 (e.g., when the molding compound is on all five sides of the die 150). The die 150 and the surrounding molding compound may then be individually separated.
[0035] A top view of the single die is shown at 360°. The single die includes an integrated circuit die 150, a molding compound structure 170, and an insulating layer 120. In some embodiments, as shown in section AA at 370°, the insulating layer 120 contacts only the molding compound structure 170. This can be achieved by not back-grinding the molding compound at 340° or by leaving some molding compound at 340° to cover the back side of the die 150. In other embodiments, as shown in section AA at 380°, the insulating layer 120 contacts both the molding compound structure 170 and the back side of the integrated circuit die 150.
[0036] refer to Figure 3A and 3BThe described operation prepares a second integrated circuit die 150, a molding compound structure 170, and an insulating layer 120 to be combined with the first integrated circuit die 110 to form Figure 1 and / or Figure 2 The packaged integrated circuit device is shown. In some embodiments, the second integrated circuit die 150, together with the molding compound structure 170 and the insulating layer 120, is attached to the integrated circuit die 110 in a manner that aligns conductive communication coils to allow inductive coupling between the coils. This can be achieved using a non-conductive or dielectric adhesive by applying an adhesive to the first integrated circuit die 110 and placing the single die structure shown at 370 or 380 in the adhesive, wherein the insulating layer 120 is between the first integrated circuit die 110 and the second integrated circuit die 150 and between the first integrated circuit die 110 and the molding compound structure 170.
[0037] The resulting packaged integrated circuit device (see) Figure 1 , 2 The device includes: a first integrated circuit die 110 having a first communication coil 112; a second integrated circuit die 150 having a second communication coil 152, wherein the second integrated circuit die 150 is positioned relative to the first integrated circuit die 110 such that the first communication coil 112 and the second communication coil 152 are aligned to allow inductive coupling between the first communication coil 112 and the second communication coil 152; a molding compound structure 170 positioned around the periphery (e.g., on four sides) of the second integrated circuit die 150; and an insulating layer 120 positioned between the first integrated circuit die 110 and the second integrated circuit die 150 and between the first integrated circuit die 110 and the molding compound structure 170.
[0038] Figure 4 This is a flowchart illustrating example methods according to various embodiments. At 410, a first conductive coil is formed on a first integrated circuit die. The first conductive coil may be a communication coil for inductive coupling to a coil in another integrated circuit die, the other integrated circuit die being current-isolated from the first integrated circuit die. For example, the operation of 410 may involve forming a conductive coil 112 on integrated circuit die 110.
[0039] At 420, a second conductive coil is formed on a second integrated circuit die. The second conductive coil may be a communication coil for inductive coupling to a coil in another integrated circuit die, the other integrated circuit die being current-isolated from the second integrated circuit die. For example, operation of 420 may involve forming a conductive coil 152 on integrated circuit die 150.
[0040] At position 430, the back side of the second integrated circuit die is ground. In some embodiments, this includes back-grinding a wafer comprising a plurality of second integrated circuit dies. For example, as referenced above. Figure 3A As described in 310, the back side of wafer 312 can be ground to produce a plurality of second integrated circuit dies 150 having a desired thickness. The wafer can then be diced to produce individual, individually diced integrated circuit dies 150, which are then placed, for example, in the reference above. Figure 3A The 320 described in the text is on a substrate such as a strip.
[0041] At 440, a molding compound structure is formed on at least four sides of the second integrated circuit die. In some embodiments, this includes forming the molding compound on the integrated circuit die 150 on a substrate to produce a reconstructed wafer, as referenced above. Figure 3A As described in section 330. At 450, the molding compound structure is ground to expose the back side of the second integrated circuit die. For example, the molding compound structure may be as described above. Figure 3B As described in step 340, the molding compound is ground away such that it remains around the periphery of the second integrated circuit die (e.g., on four sides), but not on the back side of the second integrated circuit die. In other embodiments, the molding compound structure on the back side of the second integrated circuit die may not be completely ground away, such that the molding compound remains around the periphery of the second integrated circuit die and also on the back side of the second integrated circuit die (e.g., on five sides). In yet another embodiment, step 450 is omitted, and the molding compound structure is not ground away at all.
[0042] At 460, an insulating layer is formed on the back side of the second integrated circuit die and on the molding compound structure. In some embodiments, the insulating layer is a passivation layer formed of a polymer. The insulating layer insulates the second integrated circuit die from the first integrated circuit die to provide current isolation between the integrated circuit dies, while providing wireless communication between conductive coils in the integrated circuit die via inductive coupling. In some embodiments, the insulating layer is formed on a combination of the back side of the second integrated circuit die and the molding compound structure, such as... Figure 3B 380 places and Figure 1 As shown in the packaged integrated circuit device. In other embodiments, the insulating layer is formed on the molding compound structure, such as... Figure 3B 370 places and Figure 2 The packaged integrated circuit device shown in the image.
[0043] Additionally, the first integrated circuit die may be mounted on a lead frame. In some embodiments, this includes mounting on a lead frame with electrically isolated lead frame segments. For example, the first integrated circuit die may be mounted on a first lead frame segment isolated from the second and third lead frame segments (e.g., lead frame segments 182, 184).
[0044] At 470, the second integrated circuit die is coupled to the first integrated circuit die such that the second conductive coil is aligned with the first conductive coil to allow inductive coupling, and such that the insulating layer provides current isolation between the first integrated circuit die and the second integrated circuit die.
Claims
1. A system, characterized in that, include: A first integrated circuit die having a first communication coil; A second integrated circuit die having a second communication coil, wherein the second integrated circuit die is positioned relative to the first integrated circuit die such that the first communication coil is aligned with the second communication coil to allow inductive coupling between the first communication coil and the second communication coil; A molding compound structure positioned around the periphery of the second integrated circuit die; as well as An insulating layer is positioned between the first integrated circuit die and the second integrated circuit die, and between the first integrated circuit die and the molding compound structure.
2. The system according to claim 1, characterized in that, The insulating layer includes a polymer layer formed on the back side of the second integrated circuit die and on the molding compound structure.
3. The system according to claim 1, characterized in that, The insulating layer includes a polyimide layer or a material with similar properties.
4. The system according to claim 1, characterized in that, The molding compound structure covers the back side of the second integrated circuit die.
5. The system according to claim 1, characterized in that, Additionally, a dielectric adhesive layer is included between the first integrated circuit die and the insulating layer.
6. A packaged integrated circuit device, characterized in that, include: A first integrated circuit die has a first conductive coil and a first bonding pad for providing a first electrical connection to the first integrated circuit die; The second integrated circuit die has a second conductive coil for inductive coupling to the first conductive coil, and a second bonding pad for providing a second electrical connection to the second integrated circuit die, the second integrated circuit die being surrounded by a molding compound structure on at least four sides; as well as A dielectric layer is positioned on the back side of the second integrated circuit die and on the molding compound structure, wherein the dielectric layer is positioned between the first integrated circuit die and the second integrated circuit die.
7. The packaged integrated circuit device according to claim 6, characterized in that, Additionally, an adhesive layer is included between the dielectric layer and the first integrated circuit die.
8. The packaged integrated circuit device according to claim 6, characterized in that, The first bonding pad and the second bonding pad are electrically isolated from each other.
9. A method, characterized in that, include: A first conductive coil is formed on the first integrated circuit die; A second conductive coil is formed on the second integrated circuit die; The back of the second integrated circuit die is ground. A molding compound structure is formed on at least four sides of the second integrated circuit die; The molding compound structure is ground to expose the back side of the second integrated circuit die; An insulating layer is formed on the back side of the second integrated circuit die and on the molding compound structure; as well as The second integrated circuit die is coupled to the first integrated circuit die, the second conductive coil is aligned with the first conductive coil to allow inductive coupling between the first conductive coil and the second conductive coil, and the insulating layer provides current isolation between the first integrated circuit die and the second integrated circuit die.
10. The method according to claim 9, characterized in that, The step of coupling the second integrated circuit die to the first integrated circuit die includes: Apply adhesive to the first integrated circuit die; and The second integrated circuit die is placed in the adhesive.