A method and system for optimizing the scheduling process of a gluing and developing apparatus

CN122596449APending Publication Date: 2026-08-18JIANGXI WEIYIKE SEMICON TECH CO LTD
View PDF 0 Cites 0 Cited by

Patent Information

Application Number
CN202610494899.X
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2026-04-15
Publication Date
2026-08-18

AI Technical Summary

Technical Problem

[0003]然而,现有技术的调度方法存在不足,难以满足当前半导体制造精细化、高效化的生产需求,其核心问题在于调度过程过度依赖人工操作和经验判断,缺乏标准化、系统化的调度逻辑和精准化的控制手段

Benefits of technology

本发明通过自动采集晶圆及设备相关数据,通过构建工艺链时序约束矩阵与温度协同约束模型、划分工艺分区并设定机械手调度边界,规范了晶圆流转规则与资源分配逻辑,解决了工艺单元负载失衡的问题;通过加权计算晶圆处理紧迫度与温度时序匹配度确定调度优先级,实现了晶圆调度的科学化,缩短了晶圆等待时间;通过预先生成机械手转运路径,避免了转运混乱,提升了转运效率;通过实时温度校验与自适应调节,保障了工艺温度适配性,同时实时更新设备及晶圆状态并反馈,形成完整调度闭环,进一步提升了调度的精准性与持续性,最终有效提高了涂胶显影设备的调度效率与工艺质量,适配半导体制造精细化、高效化、规模化的发展需求。

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN122596449A_ABST
    Figure CN122596449A_ABST
Patent Text Reader

Abstract

The application discloses a kind of gumming developing equipment scheduling process optimization method and system, the method includes: obtaining the batch of wafer to be handled, process, temperature and processing priority information, the state of each process unit and partition manipulator of equipment is synchronously collected;Based on the data collected, construct process chain timing constraint matrix and temperature coordination constraint model, divide process partition and set manipulator scheduling boundary;Combining processing urgency and temperature timing matching degree weighted calculation wafer batch scheduling priority and output sorting result;According to sorting result, wafer is distributed to corresponding process partition, controls manipulator and is transported according to preset path;Wafer temperature is checked before transportation, and if it is not consistent, it is adjusted to the admission threshold through the hot plate and cold plate before process treatment;After wafer processing is completed, equipment, manipulator state and wafer progress are updated in real time and feedback.The application optimizes scheduling, improves the scheduling efficiency and process quality of gumming developing equipment.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] This invention relates to the field of semiconductor fabrication technology, and more specifically to a method and system for optimizing the scheduling process of a coating and developing equipment. Background Technology

[0002] In the current era of rapid development in the semiconductor manufacturing industry, wafer manufacturing processes are continuously upgrading towards refinement, efficiency, and large-scale production. Coating and developing, as core processes in wafer manufacturing, directly determine the processing precision and product yield of the wafers. The rationality and efficiency of its scheduling process have a decisive impact on the capacity, efficiency, and cost control of the entire semiconductor production line. With the continuous increase in wafer size and the shrinking of process nodes, the number of wafer batches to be processed on a single production line has increased significantly, and process requirements have become more diversified and differentiated. The number of process units in coating and developing equipment is constantly increasing, and the relationships between these units are becoming increasingly complex. At the same time, the coordination requirements for robotic transfer, temperature control, and other aspects are also constantly improving.

[0003] However, existing scheduling methods have shortcomings and are unable to meet the current demands for refined and efficient semiconductor manufacturing. The core problem lies in the excessive reliance on manual operation and experience-based judgment in the scheduling process, lacking standardized and systematic scheduling logic and precise control methods. Specifically, under manual scheduling, the wafer processing sequence and process unit allocation depend entirely on the operator's experience, making it impossible to achieve reasonable resource allocation and easily leading to uneven process unit loads and excessively long wafer waiting times; the robotic arm transfer lacks standardized paths, easily resulting in chaotic transfers and low efficiency. Summary of the Invention

[0004] In view of the shortcomings of the prior art, the purpose of this invention is to provide a method and system for optimizing the scheduling process of coating and developing equipment, which aims to solve the problems described in the background art.

[0005] A first aspect of the present invention is to provide a method for optimizing the scheduling process of a coating and developing equipment, the method comprising: Acquire batch, process, wafer temperature and processing priority information of the wafers to be processed, and synchronously collect the operating status of each process unit of the equipment and the status of each zone robot arm; Based on the collected data, a process chain timing constraint matrix and a temperature co-constraint model are constructed to determine wafer transfer constraints, process zones are divided, and the process range and robot scheduling boundaries of each zone are set. The scheduling priority of each wafer batch is calculated by weighting the processing urgency of wafer processing with the temperature timing matching degree, and the priority ranking result is output. Based on the priority sorting results, each wafer batch is assigned to the corresponding process partition, and the robotic arms in each partition are controlled to perform transfer tasks according to the pre-generated transfer path. Before transferring the wafer to any target process unit, determine whether the current temperature of the wafer meets the temperature threshold corresponding to the target process unit. If not, the wafer temperature is adaptively changed by adjusting the hot plate temperature or cold plate temperature, and after the wafer temperature meets the temperature threshold, it is allowed to enter the target process unit for corresponding process processing. After the wafer completes the processing of the target process unit, the operating status of the target process unit, the idle status of the robot, and the wafer processing progress data are updated in real time and data feedback is provided.

[0006] According to one aspect of the above technical solution, based on the collected data, the steps of constructing a process chain timing constraint matrix and a temperature co-constraint model to determine wafer transfer constraints, dividing the process into zones, and setting the process range and robot scheduling boundaries for each zone include: The collected data is preprocessed, including data cleaning and normalization. Based on the preprocessed data, a process chain constraint matrix with time-series weights is constructed to clarify the wafer transfer timing rules. A temperature co-constraint model is built simultaneously to dynamically generate the temperature admission thresholds for each process unit. Furthermore, an adaptive partitioning algorithm is adopted to dynamically adjust the process partition range and robot scheduling boundary based on the real-time task volume, thereby achieving dynamic resource adaptation.

[0007] According to one aspect of the above technical solution, based on the preprocessed data, a process chain constraint matrix with time-series weights is constructed to clarify the wafer transfer timing rules. Simultaneously, a temperature-coordinated constraint model is built, and the temperature thresholds for each process unit are dynamically generated. This includes the following steps: Based on the preprocessed data, the operating parameters, wafer process dependencies, and historical flow data of each process unit are extracted to determine the correlation dimensions between the process units. Using reinforcement learning algorithms, the idle time and wafer turnaround interval of the process units are used as input parameters to dynamically allocate the timing correlation weights between each process unit. By combining the wafer process dependencies with the timing association weights, a process chain constraint matrix with timing weights is constructed; wherein, the matrix elements correspond to the flow timing parameters between each process unit; Extract pre-processed wafer temperature, process requirements, and real-time operating temperature data of process units to determine the core influencing parameters of temperature co-constraint. Embed process chain timing parameters as timing factors into temperature constraints to build a temperature co-constraint model that couples timing factors. Using the real-time operating temperature of the process unit and the rate of change of wafer temperature as feedback parameters, the parameters of the temperature co-constraint model are corrected in real time. Based on the corrected temperature co-constraint model, the temperature admission threshold corresponding to each process unit is dynamically generated.

[0008] According to one aspect of the above technical solution, the step of using the real-time operating temperature of the process unit and the rate of change of wafer temperature as feedback parameters to real-time correct the parameters of the temperature collaborative constraint model, and dynamically generating the temperature admission threshold corresponding to each process unit based on the corrected temperature collaborative constraint model, includes: Set the parameter correction period of the temperature co-constraint model, collect real-time feedback data of the real-time operating temperature of the process unit and the rate of change of the wafer temperature within each correction period, and perform filtering and noise reduction processing on the feedback data. The filtered feedback data is substituted into the temperature co-constraint model, the deviation value of the model parameters is calculated, and the weight coefficients and threshold parameters of the temperature co-constraint model are adjusted based on the deviation value using the gradient descent method. Substitute the corrected model parameters into the temperature co-constraint model, and combine them with the temperature reference value in the process requirements to divide the upper and lower limits of the temperature access threshold for each process unit, thereby generating a dynamically adapted temperature access threshold.

[0009] According to one aspect of the above technical solution, the step of calculating the scheduling priority of each wafer batch based on the processing urgency and temperature timing matching degree of wafer processing, and outputting the priority ranking result, includes: Collect the target process unit waiting time, current temperature, process requirement temperature threshold, and equipment operating load data for each wafer batch; The waiting time of the target process unit is statistically analyzed, and the urgency of processing each wafer batch is determined in combination with the urgent processing needs of the wafer batch. Detect the current temperature of each wafer batch, compare it with the temperature access threshold of the target process unit, and determine the degree of temperature timing matching. By combining the urgency of processing with the degree of temperature timing matching, the scheduling priority of each wafer batch is determined, and the results are output after sorting by priority from highest to lowest.

[0010] According to one aspect of the above technical solution, the calculation expression for the processing urgency is as follows: ; In the formula, To address the urgency, The current waiting time for the target process unit. To preset the longest waiting threshold, This represents the number of wafer batches currently awaiting processing. This represents the total number of batches to be processed. , This is a weighting coefficient, which is dynamically adjusted based on the real-time load of the equipment. The expression for calculating the temperature time series matching degree is as follows: ; In the formula, For temperature time series matching degree, This is the current temperature of the wafer. The target process unit temperature admission threshold. For correction amount, This is a correction factor for the matching degree.

[0011] According to one aspect of the above technical solution, the expression for calculating scheduling priority is: ; In the formula, Prioritize wafer batch scheduling. , These are weighting coefficients. Positively correlated with equipment load, It is positively correlated with the requirements for process precision.

[0012] A second aspect of the present invention is to provide a scheduling optimization system for coating and developing equipment, applied to the method shown in the above-described technical solution, the method comprising: The data acquisition module is used to acquire information on the batch, process, wafer temperature and processing priority of the wafers to be processed, and to simultaneously collect the operating status of each process unit of the equipment and the status of each zone robot. The data processing module is used to construct a process chain timing constraint matrix and a temperature co-constraint model based on the collected data to determine wafer transfer constraints, divide the process into partitions, and set the process range and robot scheduling boundaries for each partition. The priority sorting module is used to calculate the scheduling priority of each wafer batch based on the processing urgency and temperature timing matching degree of wafer processing, and output the priority sorting result. The allocation and execution module is used to allocate each wafer batch to the corresponding process partition according to the priority sorting result, and control the robot in each partition to perform the transfer task according to the pre-generated transfer path; The condition judgment module is used to determine whether the current temperature of the wafer meets the temperature threshold corresponding to the target process unit before transferring the wafer to any target process unit. The temperature control module is used to adjust the hot plate temperature or cold plate temperature to adaptively change the wafer temperature when the condition judgment module determines that the current temperature of the wafer does not meet the temperature access threshold corresponding to the target process unit. After the wafer temperature meets the temperature access threshold, it is allowed to enter the target process unit for corresponding process processing. The data feedback module is used to update the operating status of the target process unit, the idle status of the robot arm, and the wafer processing progress data in real time and provide data feedback after the wafer completes the processing of the target process unit.

[0013] A third aspect of the present invention is to provide a computer-readable storage medium storing computer instructions that, when executed by a processor, implement the steps of the method described in the above-described technical solution.

[0014] A fourth aspect of the present invention is to provide an electronic device, the electronic device including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein when the processor executes the computer program, it implements the steps of the method described in the above technical solutions.

[0015] Compared with existing technologies, the advantages of the coating and developing equipment scheduling optimization method and system shown in this invention are as follows: This invention automatically collects wafer and equipment-related data, constructs a process chain timing constraint matrix and a temperature co-constraint model, divides process zones, and sets robot scheduling boundaries. This standardizes wafer transfer rules and resource allocation logic, solving the problem of process unit load imbalance. By weighted calculation of wafer processing urgency and temperature timing matching degree to determine scheduling priority, it achieves scientific wafer scheduling and shortens wafer waiting time. By pre-generating robot transfer paths, it avoids transfer chaos and improves transfer efficiency. Through real-time temperature verification and adaptive adjustment, it ensures process temperature adaptability, while simultaneously updating and feeding back equipment and wafer status in real time, forming a complete scheduling closed loop. This further improves the accuracy and continuity of scheduling, ultimately effectively improving the scheduling efficiency and process quality of coating and developing equipment, adapting to the development needs of refined, efficient, and large-scale semiconductor manufacturing. Attached Figure Description

[0016] The above and / or additional aspects and advantages of the present invention will become apparent and readily understood from the description of the embodiments taken in conjunction with the following drawings, in which: Figure 1 This is a flowchart illustrating the method for optimizing the scheduling process of a coating and developing equipment according to an embodiment of the present invention. Figure 2 The diagram below shows the structure of the coating and developing equipment scheduling process optimization system provided in this embodiment of the invention. Detailed Implementation

[0017] To make the objectives, features, and advantages of the present invention more apparent and understandable, specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings. Several embodiments of the present invention are shown in the drawings. However, the present invention can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that the disclosure of the present invention will be more thorough and complete.

[0018] It should be noted that when a component is said to be "fixed to" another component, it can be directly on the other component or there may be an intervening component. When a component is said to be "connected to" another component, it can be directly connected to the other component or there may be an intervening component. The terms "vertical," "horizontal," "left," "right," and similar expressions used in this document are for illustrative purposes only.

[0019] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. The terminology used herein in the description of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. The term "and / or" as used herein includes any and all combinations of one or more of the associated listed items.

[0020] Example 1 Please see Figure 1 The first embodiment of the present invention provides a method for optimizing the scheduling process of a coating and developing equipment, the method comprising steps S10-S70: Step S10: Obtain information on the batch, process, wafer temperature, and processing priority of the wafer to be processed, and simultaneously collect the operating status of each process unit of the equipment and the status of each zone robot.

[0021] It is important to note that the batch information of the wafers to be processed directly determines the differences in subsequent process adaptation standards. Different batches of wafers differ significantly in process parameters, quality requirements, and urgency. Only by accurately distinguishing the information of each batch can targeted and differentiated scheduling be achieved. The process formula parameters are the core basis for all subsequent process operations such as coating, developing, and temperature adjustment. They directly determine the specific operating standards and parameter settings of each process step and are the primary prerequisite for ensuring process quality. The initial wafer temperature directly affects the process adaptation effect. The coating and developing processes are extremely sensitive to temperature, and initial temperature deviations may lead to defects in subsequent processes. The processing priority clarifies the basis for ranking the urgency of wafer batches and provides a basic reference for subsequent priority calculations.

[0022] Simultaneously, the system collects the operating status of each process unit and the status of the robotic arms in each zone, thereby understanding the current resource availability of the equipment. Specifically, this includes the real-time operating parameters, occupancy status, and fault warning information of each process unit (coating unit, developing unit, hot plate, cold plate, etc.), as well as the position, load, idle status, and operating accuracy of the robotic arms. This effectively avoids problems such as resource conflicts, equipment idleness, or disordered robotic arm scheduling during the scheduling process.

[0023] Step S20: Based on the collected data, construct the process chain timing constraint matrix and temperature co-constraint model to determine the wafer transfer constraints, divide the process into partitions and set the process range and robot scheduling boundary for each partition.

[0024] Among them, the construction of the process chain timing constraint matrix, by quantifying the correlation between each process unit and the flow timing parameters, clarifies the core rules such as the flow order of wafers between different process units, the shortest flow time, and the longest waiting time, ensuring that the wafer processing process is orderly and controllable, effectively avoiding problems such as wafer scrap, process defects, and low production efficiency caused by disordered process sequence (such as developing before coating), and ensuring the stability of the production process.

[0025] Furthermore, the temperature co-constraint model focuses on the compatibility between wafer temperature and process unit. Combining the high temperature sensitivity of the coating and developing process, it incorporates factors such as the initial wafer temperature, process formulation temperature requirements, and real-time temperature of the process unit into the model, providing clear model support for subsequent temperature verification and adjustment, and ensuring that temperature control is accurately matched with process requirements.

[0026] Meanwhile, the coating thermal processing zone and the developer processing zone are divided, and the process range and robot scheduling boundaries of each zone are clearly defined. The purpose is to achieve a reasonable allocation of equipment resources, physically isolate different types of operations, avoid mutual interference between different process links (such as the adhesive in the coating link and the developer in the developing link), and clarify the scheduling range of the robot to avoid ineffective cross-zone transfer by the robot and improve the transfer efficiency of the robot.

[0027] Step S30: Calculate the scheduling priority of each wafer batch based on the processing urgency and temperature timing matching degree of wafer processing, and output the priority ranking result.

[0028] The urgency level is determined by a combination of factors, including the urgency of the wafer batch, customer order requirements, and production delivery cycle. The focus is on ensuring that high-urgency, high-priority wafer batches (such as expedited orders and orders from key customers) can be processed quickly to avoid efficiency losses and order delays caused by excessive waiting time, and to ensure that production progress meets expectations.

[0029] Temperature timing matching focuses on the compatibility between the current wafer temperature and the temperature requirements of the target process unit. Since the coating and developing process is extremely sensitive to temperature, temperature compatibility is used as an important dimension for priority calculation. This can effectively reduce the time spent on subsequent temperature adjustments, avoid process rework due to temperature mismatch, and thus improve overall scheduling efficiency and process pass rate.

[0030] Ultimately, by integrating the two dimensions of indicators through weighted calculation, the weight ratio is dynamically adjusted according to the real-time operating conditions of the equipment, and a clear priority ranking result is output. This ensures that high-urgency and high-adaptability wafer batches are processed first, while low-priority batches are queued reasonably, avoiding situations where low-priority wafers occupy high-quality resources and high-priority wafers wait too long, thus achieving optimal allocation of equipment resources.

[0031] Step S40: Based on the priority sorting result, each wafer batch is assigned to the corresponding process partition, and the robotic arms in each partition are controlled to perform transfer tasks according to the pre-generated transfer path.

[0032] Specifically, based on the priority ranking results, wafer batches with different urgency levels and different process requirements are accurately allocated to the corresponding process partitions. High-priority wafer batches are preferentially allocated to the process partitions with the best adaptability and the most abundant resources to ensure that they can quickly enter the target process unit for processing and shorten the waiting time. Low-priority wafer batches are allocated reasonably according to the availability of resources to avoid resource idleness.

[0033] Meanwhile, based on the preset process partition boundaries, equipment resource distribution, and wafer transfer distance, the robot in each partition is controlled to perform transfer tasks according to the pre-generated optimal transfer path. The pre-planned transfer path has been scientifically calculated and optimized, which can effectively avoid problems such as robot cross-conflict, back-turn waiting, and path redundancy, significantly shorten the transfer time, and ensure that the wafer can arrive at the target process unit in a timely and stable manner, seamlessly connecting with subsequent process operations.

[0034] Step S50: Before transferring the wafer to any target process unit, determine whether the current temperature of the wafer meets the temperature threshold corresponding to the target process unit.

[0035] If it is determined that the current temperature of the wafer does not meet the temperature threshold corresponding to the target process unit, the method shown in this embodiment proceeds to step S60.

[0036] Step S60: By adjusting the temperature of the hot plate or the cold plate to adaptively change the wafer temperature, and after the wafer temperature meets the temperature threshold, it is allowed to enter the target process unit for corresponding process processing.

[0037] Specifically, before a wafer is transferred to the target process cell, its current temperature must be rigorously detected and verified to determine whether it meets the temperature access requirements of that process cell. If the detection finds that the temperature does not meet the requirements, the operating parameters of temperature control equipment such as hot plates and cold plates are adjusted to adaptively adjust the wafer temperature, and the wafer temperature change is monitored in real time until the temperature reaches the access standard of that process cell before it is allowed to enter the process processing stage.

[0038] Step S70: After the wafer completes the processing of the target process unit, update the operating status of the target process unit, the idle status of the robot, and the wafer processing progress data in real time and provide data feedback.

[0039] Specifically, once a wafer completes all processing steps of the target process unit, the system will promptly update the operating status of that process unit, switching it from an occupied state to an idle state to facilitate the receipt of new wafer batches and prevent the process unit from being idle. At the same time, the system will update the operating status of the robotic arm, recording information such as the transfer time and operating status of the robotic arm to facilitate subsequent maintenance and optimization. In addition, the system will record the wafer processing progress in detail and mark it as completed, forming a complete production schedule.

[0040] Meanwhile, all updated data is fed back to the data acquisition stage in real time, realizing a closed loop of data acquisition, scheduling execution, status update, and feedback optimization. This ensures that subsequent scheduling can be dynamically adjusted and optimized based on real-time equipment status, task changes, and process requirements, continuously improving scheduling efficiency, process quality, and resource utilization.

[0041] In summary, compared with the prior art, the optimized scheduling method for the coating and developing equipment shown in this embodiment has the following advantages: This embodiment automatically collects wafer and equipment-related data, constructs a process chain timing constraint matrix and a temperature co-constraint model, divides process zones, and sets robot scheduling boundaries. This standardizes wafer transfer rules and resource allocation logic, solving the problem of process unit load imbalance. By weighted calculation of wafer processing urgency and temperature timing matching degree to determine scheduling priority, it achieves scientific wafer scheduling and shortens wafer waiting time. By pre-generating robot transfer paths, it avoids transfer chaos and improves transfer efficiency. Through real-time temperature verification and adaptive adjustment, it ensures process temperature adaptability, while simultaneously updating and feeding back equipment and wafer status in real time, forming a complete scheduling closed loop. This further improves the accuracy and continuity of scheduling, ultimately effectively improving the scheduling efficiency and process quality of the coating and developing equipment, adapting to the development needs of refined, efficient, and large-scale semiconductor manufacturing.

[0042] Example 2 The second embodiment of the present invention also provides a method for optimizing the scheduling process of a coating and developing equipment. The method shown in this embodiment is basically similar to the method shown in the first embodiment, except that: In this embodiment, based on the collected data, the steps of constructing a process chain timing constraint matrix and a temperature co-constraint model to determine wafer transfer constraints, dividing the process into partitions, and setting the process range and robot scheduling boundaries for each partition include: The collected data is preprocessed, including data cleaning and normalization. Based on the preprocessed data, a process chain constraint matrix with time-series weights is constructed to clarify the wafer transfer timing rules. A temperature co-constraint model is built simultaneously to dynamically generate the temperature admission thresholds for each process unit. Furthermore, an adaptive partitioning algorithm is adopted to dynamically adjust the process partition range and robot scheduling boundary based on the real-time task volume, thereby achieving dynamic resource adaptation.

[0043] It should be noted that the raw data collected (including wafer-related data, equipment process unit data, robot status data, etc.) often contains various interference factors. Due to sensor errors, environmental interference, equipment failures, etc., during the data acquisition process, some data may contain outliers, missing values, duplicate values, etc. At the same time, the units of measurement of different types of data are not consistent. If directly used for model building and partitioning, it will lead to inaccurate constraint matrices, blurred partition boundaries, and excessive model errors, thereby affecting the rationality and accuracy of subsequent scheduling. Therefore, in this embodiment, data cleaning operations are performed to remove outliers and duplicate values ​​from the data and to supplement missing data, which can ensure the accuracy and completeness of the data; and normalization processing is used to convert data with different units of measurement into standardized data of a uniform range, eliminating the impact of numerical differences between different types of data.

[0044] Specifically, the time-weighted process chain constraint matrix constructed in this embodiment can dynamically adjust the time weights between process units based on their real-time operating status, wafer processing requirements, and production schedule, making the timing requirements for wafer transfer more targeted and flexible. For example, when a process unit has a long idle time, its weight can be appropriately increased to prioritize wafer batch allocation and avoid resource idleness; when a process unit has an excessively high load, its weight can be reduced to decrease wafer allocation and avoid task overload.

[0045] Meanwhile, the temperature coordination constraint model built simultaneously is not an isolated temperature control model, but is bound to the process sequence. It fully integrates factors such as the initial wafer temperature, process recipe requirements, real-time temperature of process units, and wafer transfer sequence to ensure that temperature control is consistent with the wafer transfer rhythm and avoid the problem of temperature adjustment being out of sync with the process progress.

[0046] Furthermore, through an adaptive partitioning algorithm, the scope of process partitions and the boundaries of robot scheduling are dynamically adjusted based on changes in real-time task volume, the process type of wafer batches, and the operating status of equipment resources. For example, when the number of wafer batches to be processed increases and the task volume increases, the scope of the corresponding process partitions can be flexibly expanded to allocate more robot resources to meet production needs; while when the task volume decreases and some process units are idle, the partition scope can be narrowed to integrate resources, avoid resource idleness and waste, and achieve a dynamic balance between task volume and resource allocation.

[0047] At the same time, the process scope and robot scheduling boundaries of each zone are clearly defined, and the operations of different process types are clearly divided to avoid scheduling conflicts between different zones and invalid transfer of robots across zones, so as to ensure efficient and orderly transfer of robots and further improve the optimization effect of the overall scheduling process and the utilization rate of equipment resources.

[0048] In this embodiment, the steps of constructing a process chain constraint matrix with time-series weights based on preprocessed data to clarify wafer transfer timing rules, simultaneously building a temperature co-constraint model, and dynamically generating temperature thresholds for each process unit include: Based on the preprocessed data, the operating parameters, wafer process dependencies, and historical flow data of each process unit are extracted to determine the correlation dimensions between the process units. Using reinforcement learning algorithms, the idle time and wafer turnaround interval of the process units are used as input parameters to dynamically allocate the timing correlation weights between each process unit. By combining the wafer process dependencies with the timing association weights, a process chain constraint matrix with timing weights is constructed; wherein, the matrix elements correspond to the flow timing parameters between each process unit; Extract pre-processed wafer temperature, process requirements, and real-time operating temperature data of process units to determine the core influencing parameters of temperature co-constraint. Embed process chain timing parameters as timing factors into temperature constraints to build a temperature co-constraint model that couples timing factors. Using the real-time operating temperature of the process unit and the rate of change of wafer temperature as feedback parameters, the parameters of the temperature co-constraint model are corrected in real time. Based on the corrected temperature co-constraint model, the temperature admission threshold corresponding to each process unit is dynamically generated.

[0049] Specifically, in this embodiment, based on the preprocessed high-quality data, the core operating parameters of each process unit are further extracted, including operating power, processing efficiency, idle time, fault records, and maintenance cycles. Simultaneously, wafer process dependencies are extracted to clarify the process sequence that the wafer must follow. For example, the coating process must be completed before the developing process can begin, and the temperature conditioning process must be completed before proceeding to subsequent processing stages, preventing process sequence errors. Furthermore, historical wafer transfer data is extracted, including average transfer time between process units, transfer anomaly records, and priority allocation history. This historical data provides important reference for timing weight allocation, avoiding repeated scheduling errors and optimizing scheduling strategies. By extracting the above key data, the relationships between each process unit are accurately analyzed, and the correlation dimensions are determined, including time correlations (transfer time, waiting time), process dependency correlations (process sequence), and resource usage correlations (equipment load, robot arm usage), providing a clear and specific basis for subsequent timing weight allocation and constraint matrix construction.

[0050] Secondly, based on reinforcement learning algorithms, the idle time of process units and wafer turnaround intervals are used as core input parameters. These are combined with auxiliary parameters such as process unit load, wafer processing progress, and process yield to dynamically allocate temporal correlation weights between process units. For example, when a process unit has a long idle time and low load, its weight can be appropriately increased to prioritize wafer batch allocation and fully utilize idle resources. When wafer turnaround intervals fluctuate or a bottleneck occurs in a process step, the weights are adjusted promptly to match the turnaround rhythm, avoiding scheduling imbalances, resource waste, or task overload caused by fixed weights, ensuring that the resources of each process unit are fully utilized.

[0051] Then, by combining the wafer process dependencies, the timing correlation weights are incorporated into the construction of the constraint matrix. The rows and columns of the matrix correspond to different process units, and the matrix elements clearly correspond to the flow timing parameters between each process unit, including the shortest time, longest time, priority weight, flow taboos, etc. Through this matrix, the flow rules of the wafer between each process unit can be clearly and quantitatively presented, avoiding scheduling disorder caused by ambiguity of timing rules.

[0052] First, preprocessed wafer temperature data (initial temperature, real-time temperature changes), process requirement data (standard temperature range and allowable temperature deviation for each process step), and real-time temperature data of the process unit (current operating temperature and temperature stability) are extracted. Data analysis is then used to determine the core influencing parameters of temperature co-constraints, including wafer temperature change rate, process unit temperature stability, and the impact coefficient of temperature deviation on process quality. Subsequently, the process chain timing parameters constructed in the previous step are used as timing factors and embedded into the temperature constraint logic to build a temperature co-constraint model coupled with these timing factors. This ensures that temperature control can adapt to the timing requirements of wafer transfer. For example, when a wafer is about to enter the next process unit, the model will predict the temperature requirements of that unit in advance, and adjust the temperature based on the current wafer temperature and transfer time to ensure that the wafer arrives at the correct temperature, avoiding process delays caused by untimely temperature adjustments.

[0053] Finally, the real-time operating temperature of the process unit and the rate of change of wafer temperature are used as core feedback parameters to monitor the deviation between the model output and the actual operating conditions in real time. Based on the deviation, the parameters of the temperature co-constraint model are corrected in a timely manner, including the temperature weight coefficient and the threshold adjustment ratio, to ensure that the model can adapt to the real-time operating conditions of the equipment and the changes in wafer temperature in real time, and avoid the problem of insufficient adaptability caused by fixed model parameters.

[0054] In this embodiment, the steps of using the real-time operating temperature of the process unit and the rate of change of wafer temperature as feedback parameters to correct the parameters of the temperature co-constraint model in real time, and dynamically generating the temperature threshold corresponding to each process unit based on the corrected temperature co-constraint model, include: Set the parameter correction period of the temperature co-constraint model, collect real-time feedback data of the real-time operating temperature of the process unit and the rate of change of the wafer temperature within each correction period, and perform filtering and noise reduction processing on the feedback data. The filtered feedback data is substituted into the temperature co-constraint model, the deviation value of the model parameters is calculated, and the weight coefficients and threshold parameters of the temperature co-constraint model are adjusted based on the deviation value using the gradient descent method. Substitute the corrected model parameters into the temperature co-constraint model, and combine them with the temperature reference value in the process requirements to divide the upper and lower limits of the temperature access threshold for each process unit, thereby generating a dynamically adapted temperature access threshold.

[0055] Specifically, the parameter correction period of the temperature co-constraint model should be set first. The setting of the period should take into account both real-time performance and stability. It should ensure that the model can adapt to the dynamic changes of equipment conditions and wafer temperature in a timely manner to avoid excessive deviation of the model due to untimely correction, and avoid excessive fluctuation of model parameters and unstable operation due to frequent correction. The correction period is usually set to 1-5 minutes according to the process complexity and temperature change rate.

[0056] During each correction cycle, real-time feedback data on the process unit's operating temperature and the wafer temperature change rate are collected via equipment sensors. Since the collected feedback data may contain invalid information due to sensor errors, environmental interference (such as workshop temperature fluctuations), and equipment operating noise, it is necessary to filter and denoise the feedback data. Methods such as mean filtering and median filtering are used to remove interference signals and abnormal data, retaining accurate and valid feedback information to ensure that the feedback data truly reflects the equipment's operating status and wafer temperature.

[0057] Furthermore, the filtered feedback data is substituted into the temperature co-constraint model. The model calculates the deviation between the current model parameters (including temperature weighting coefficients, threshold parameters, coupling factors, etc.) and the actual operating conditions. The magnitude of the deviation directly reflects the degree of fit between the model parameters and actual requirements. The larger the deviation, the lower the fit between the model parameters and actual operating conditions, requiring significant adjustments. Gradient descent is then used to precisely adjust the model parameters. This ensures that the temperature co-constraint model can adapt to the operating status of the process unit and wafer temperature changes in real time, improving the reliability and accuracy of the model and avoiding temperature control deviations caused by fixed model parameters.

[0058] Finally, the corrected model parameters are substituted into the temperature co-constraint model, and combined with the temperature reference values ​​in the process formula requirements (i.e., the standard temperature range and allowable temperature deviation values ​​of each process step), the upper and lower limits of the temperature access thresholds of each process unit are divided through model calculation, and a dynamically adapted temperature access threshold is generated.

[0059] It should be noted that the above thresholds are not fixed values, but can be dynamically updated as model parameters are corrected, process requirements change, and equipment operating status is adjusted. This can meet the process temperature requirements of different wafer batches (such as the coating temperature requirements of different batches of wafers may differ), and also adapt to the real-time operating status of process units (such as temperature stability changes caused by process unit aging). This provides accurate and clear judgment criteria for subsequent wafer temperature verification and adjustment, ensuring that the wafer temperature is accurately matched with process requirements and effectively avoiding process defects caused by temperature deviations.

[0060] In this embodiment, the step of calculating the scheduling priority of each wafer batch based on a weighted average of the processing urgency and temperature timing matching degree, and outputting the priority ranking result, includes: Collect the target process unit waiting time, current temperature, process requirement temperature threshold, and equipment operating load data for each wafer batch; The waiting time of the target process unit is statistically analyzed, and the urgency of processing each wafer batch is determined in combination with the urgent processing needs of the wafer batch. Detect the current temperature of each wafer batch, compare it with the temperature access threshold of the target process unit, and determine the degree of temperature timing matching. By combining the urgency of processing with the degree of temperature timing matching, the scheduling priority of each wafer batch is determined, and the results are output after sorting by priority from highest to lowest.

[0061] Specifically, by comprehensively collecting the core data corresponding to each wafer batch, it is ensured that the data covers all the requirements of the two dimensions of priority calculation (processing urgency and temperature timing matching), including the waiting time of the target process unit, the current temperature of the wafer, the temperature threshold required by the process, and the real-time operating load data of the equipment.

[0062] First, the waiting time for the target process unit corresponding to each wafer batch is calculated. This waiting time serves as the basic criterion; the longer the waiting time, the higher the initial assessment of urgency. Then, the urgency level reflected by the waiting time is adjusted based on the urgent processing needs of the wafer batch, such as rush orders, special customer requirements, and production delivery cycle constraints. For example, if a batch of wafers is a rush order, its urgency level should be appropriately increased even if the waiting time is short; conversely, if a batch of wafers has no urgent requirements, its urgency level can be appropriately reduced even if the waiting time is long. This process ultimately determines the processing urgency of each wafer batch. It effectively distinguishes the urgency levels of different wafer batches, avoiding priority bias caused by judging solely by waiting time, ensuring that high-urgency wafers are prioritized, reducing waiting time losses, and guaranteeing that production progress meets expectations.

[0063] Secondly, temperature sensors are used to detect the current temperature of each wafer batch to ensure the accuracy of the temperature data. The current temperature is then compared with the temperature threshold of the target process unit, and the absolute deviation is calculated. The magnitude of the deviation directly reflects the compatibility between the current wafer temperature and the target process unit. A smaller deviation indicates better compatibility and a higher degree of temperature timing matching, requiring less subsequent temperature adjustments and allowing for rapid entry into the process. Conversely, a larger deviation indicates a lower degree of temperature timing matching, requiring more time to adjust the temperature and potentially causing process delays.

[0064] Finally, combining the processing urgency and temperature timing matching determined in the first two steps, the scheduling priority of each wafer batch is calculated according to a preset weighting rule. The weight ratio of the two dimensions is dynamically adjusted based on the real-time operating load of the equipment to ensure that the priority calculation closely matches the real-time production conditions. For example, when the equipment load is high and production tasks are tight, the weight of processing urgency is appropriately increased to prioritize smooth processes and avoid task backlog; when process precision requirements are high and product quality requirements are strict, the weight of temperature timing matching is appropriately increased to prioritize scheduling wafer batches with good temperature adaptability to ensure process quality.

[0065] After the calculation is completed, each wafer batch is sorted according to its priority, with higher priority batches being sorted earlier. At the same time, the sorting results are synchronized to the equipment scheduling system, so that subsequent batch allocation and robotic arm transfer can accurately match the sorting results. This achieves seamless integration of priority sorting, batch allocation, and transfer execution, improving the efficiency and rationality of the overall scheduling process and ensuring the ultimate achievement of the optimization goals.

[0066] In this embodiment, the calculation expression for the processing urgency is as follows: ; In the formula, To address the urgency, The current waiting time for the target process unit. To preset the longest waiting threshold, This represents the number of wafer batches currently awaiting processing. This represents the total number of batches to be processed. , This is a weighting coefficient, which is dynamically adjusted based on the real-time load of the equipment. The expression for calculating the temperature time series matching degree is as follows: ; In the formula, For temperature time series matching degree, This is the current temperature of the wafer. The target process unit temperature admission threshold. For correction amount, This is a correction factor for the matching degree.

[0067] And, the expression for calculating scheduling priority is: ; In the formula, Prioritize wafer batch scheduling. , These are weighting coefficients. Positively correlated with equipment load, It is positively correlated with the requirements for process precision.

[0068] Example 3 Please see Figure 2 The third embodiment of the present invention provides a scheduling process optimization system for coating and developing equipment, applied to the method described in any embodiment, the system comprising: The data acquisition module 10 is used to acquire information on the batch, process, wafer temperature and processing priority of the wafers to be processed, and to simultaneously collect the operating status of each process unit of the equipment and the status of each zone robot. Data processing module 20 is used to construct a process chain timing constraint matrix and a temperature co-constraint model based on the collected data to determine wafer transfer constraints, divide process zones and set the process range and robot scheduling boundaries for each zone; The priority sorting module 30 is used to calculate the scheduling priority of each wafer batch based on the processing urgency and temperature timing matching degree of wafer processing, and output the priority sorting result. The allocation execution module 40 is used to allocate each wafer batch to the corresponding process partition according to the priority sorting result, and control the robot in each partition to perform the transfer task according to the pre-generated transfer path; The condition judgment module 50 is used to determine whether the current temperature of the wafer meets the temperature access threshold corresponding to the target process unit before transferring the wafer to any target process unit. The temperature control module 60 is used to adjust the hot plate temperature or cold plate temperature to adaptively change the wafer temperature when the condition judgment module determines that the current temperature of the wafer does not meet the temperature access threshold corresponding to the target process unit, so that the wafer temperature meets the temperature access threshold and allows it to enter the target process unit for corresponding process processing. The data feedback module 70 is used to update the operating status of the target process unit, the idle status of the robot arm, and the wafer processing progress data in real time and provide data feedback after the wafer completes the processing of the target process unit.

[0069] Compared with existing technologies, the optimized scheduling method for coating and developing equipment shown in this embodiment has the following advantages: This embodiment automatically collects wafer and equipment-related data, constructs a process chain timing constraint matrix and a temperature co-constraint model, divides process zones, and sets robot scheduling boundaries. This standardizes wafer transfer rules and resource allocation logic, solving the problem of process unit load imbalance. By weighted calculation of wafer processing urgency and temperature timing matching degree to determine scheduling priority, it achieves scientific wafer scheduling and shortens wafer waiting time. By pre-generating robot transfer paths, it avoids transfer chaos and improves transfer efficiency. Through real-time temperature verification and adaptive adjustment, it ensures process temperature adaptability, while simultaneously updating and feeding back equipment and wafer status in real time, forming a complete scheduling closed loop. This further improves the accuracy and continuity of scheduling, ultimately effectively improving the scheduling efficiency and process quality of the coating and developing equipment, adapting to the development needs of refined, efficient, and large-scale semiconductor manufacturing.

[0070] Example 4 A fourth embodiment of the present invention provides a computer-readable storage medium storing computer instructions, which, when executed by a processor, implement the steps of the method described in any embodiment.

[0071] Example 5 A fifth embodiment of the present invention provides an electronic device, the electronic device including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein when the processor executes the computer program, it implements the steps of the method described in any embodiment.

[0072] In the description of this specification, references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.

[0073] The embodiments described above are merely illustrative of several implementations of the present invention, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the present invention. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of the present invention, and these all fall within the protection scope of the present invention. Therefore, the protection scope of this patent should be determined by the appended claims.

Claims

1. A method for optimizing the scheduling process of a coating and developing equipment, characterized in that, The method includes: Acquire batch, process, wafer temperature and processing priority information of the wafers to be processed, and synchronously collect the operating status of each process unit of the equipment and the status of each zone robot arm; Based on the collected data, a process chain timing constraint matrix and a temperature co-constraint model are constructed to determine wafer transfer constraints, process zones are divided, and the process range and robot scheduling boundaries of each zone are set. The scheduling priority of each wafer batch is calculated by weighting the processing urgency of wafer processing with the temperature timing matching degree, and the priority ranking result is output. Based on the priority sorting results, each wafer batch is assigned to the corresponding process partition, and the robotic arms in each partition are controlled to perform transfer tasks according to the pre-generated transfer path. Before transferring the wafer to any target process unit, determine whether the current temperature of the wafer meets the temperature threshold corresponding to the target process unit. If not, the wafer temperature is adaptively changed by adjusting the hot plate temperature or cold plate temperature, and after the wafer temperature meets the temperature threshold, it is allowed to enter the target process unit for corresponding process processing. After the wafer completes the processing of the target process unit, the operating status of the target process unit, the idle status of the robot, and the wafer processing progress data are updated in real time and data feedback is provided.

2. The method for optimizing the scheduling process of coating and developing equipment according to claim 1, characterized in that, Based on the collected data, the following steps are taken: constructing a process chain timing constraint matrix and a temperature co-constraint model to determine wafer transfer constraints; dividing the process into zones and setting the process range and robot scheduling boundaries for each zone; including: The collected data is preprocessed, including data cleaning and normalization. Based on the preprocessed data, a process chain constraint matrix with time-series weights is constructed to clarify the wafer transfer timing rules. A temperature co-constraint model is built simultaneously to dynamically generate the temperature admission thresholds for each process unit. Furthermore, an adaptive partitioning algorithm is adopted to dynamically adjust the process partition range and robot scheduling boundary based on the real-time task volume, thereby achieving dynamic resource adaptation.

3. The method for optimizing the scheduling process of coating and developing equipment according to claim 2, characterized in that, Based on the preprocessed data, a process chain constraint matrix with time-series weights is constructed to clarify the wafer transfer timing rules. Simultaneously, a temperature-coordinated constraint model is built, and the temperature thresholds for each process unit are dynamically generated. This process includes the following steps: Based on the preprocessed data, the operating parameters, wafer process dependencies, and historical flow data of each process unit are extracted to determine the correlation dimensions between the process units. Using reinforcement learning algorithms, the idle time and wafer turnaround interval of the process units are used as input parameters to dynamically allocate the timing correlation weights between each process unit. By combining the wafer process dependencies with the timing association weights, a process chain constraint matrix with timing weights is constructed; wherein, the matrix elements correspond to the flow timing parameters between each process unit; Extract pre-processed wafer temperature, process requirements, and real-time operating temperature data of process units to determine the core influencing parameters of temperature co-constraint. Embed process chain timing parameters as timing factors into temperature constraints to build a temperature co-constraint model that couples timing factors. Using the real-time operating temperature of the process unit and the rate of change of wafer temperature as feedback parameters, the parameters of the temperature co-constraint model are corrected in real time. Based on the corrected temperature co-constraint model, the temperature admission threshold corresponding to each process unit is dynamically generated.

4. The method for optimizing the scheduling process of coating and developing equipment according to claim 3, characterized in that, The steps of using the real-time operating temperature of the process unit and the rate of change of wafer temperature as feedback parameters to correct the parameters of the temperature co-constraint model in real time, and dynamically generating the temperature threshold corresponding to each process unit based on the corrected temperature co-constraint model, include: Set the parameter correction period of the temperature co-constraint model, collect real-time feedback data of the real-time operating temperature of the process unit and the rate of change of the wafer temperature within each correction period, and perform filtering and noise reduction processing on the feedback data. The filtered feedback data is substituted into the temperature co-constraint model, the deviation value of the model parameters is calculated, and the weight coefficients and threshold parameters of the temperature co-constraint model are adjusted based on the deviation value using the gradient descent method. Substitute the corrected model parameters into the temperature co-constraint model, and combine them with the temperature reference value in the process requirements to divide the upper and lower limits of the temperature access threshold for each process unit, thereby generating a dynamically adapted temperature access threshold.

5. The method for optimizing the scheduling process of coating and developing equipment according to any one of claims 1-4, characterized in that, The steps for calculating the scheduling priority of each wafer batch based on the processing urgency and temperature timing matching degree, and outputting the priority ranking results, include: Collect the target process unit waiting time, current temperature, process requirement temperature threshold, and equipment operating load data for each wafer batch; The waiting time of the target process unit is statistically analyzed, and the urgency of processing each wafer batch is determined in combination with the urgent processing needs of the wafer batch. Detect the current temperature of each wafer batch, compare it with the temperature access threshold of the target process unit, and determine the degree of temperature timing matching. By combining the urgency of processing with the degree of temperature timing matching, the scheduling priority of each wafer batch is determined, and the results are output after sorting by priority from highest to lowest.

6. The method for optimizing the scheduling process of coating and developing equipment according to claim 5, characterized in that, The formula for calculating the urgency of the processing is as follows: ; In the formula, To address the urgency, The current waiting time for the target process unit. To preset the longest waiting threshold, This represents the number of wafer batches currently awaiting processing. This represents the total number of batches to be processed. , This is a weighting coefficient, which is dynamically adjusted based on the real-time load of the equipment. The expression for calculating the temperature time series matching degree is as follows: ; In the formula, For temperature time series matching degree, This is the current temperature of the wafer. The target process unit temperature admission threshold. For correction amount, This is a correction factor for the matching degree.

7. The method for optimizing the scheduling process of coating and developing equipment according to claim 6, characterized in that, The expression for calculating scheduling priority is: ; In the formula, Prioritize wafer batch scheduling. , These are weighting coefficients. Positively correlated with equipment load, It is positively correlated with the requirements for process precision.

8. A scheduling process optimization system for coating and developing equipment, characterized in that, The system, applicable to the method of any one of claims 1-7, comprises: The data acquisition module is used to acquire information on the batch, process, wafer temperature and processing priority of the wafers to be processed, and to simultaneously collect the operating status of each process unit of the equipment and the status of each zone robot. The data processing module is used to construct a process chain timing constraint matrix and a temperature co-constraint model based on the collected data to determine wafer transfer constraints, divide the process into partitions, and set the process range and robot scheduling boundaries for each partition. The priority sorting module is used to calculate the scheduling priority of each wafer batch based on the processing urgency and temperature timing matching degree of wafer processing, and output the priority sorting result. The allocation and execution module is used to allocate each wafer batch to the corresponding process partition according to the priority sorting result, and control the robot in each partition to perform the transfer task according to the pre-generated transfer path; The condition judgment module is used to determine whether the current temperature of the wafer meets the temperature threshold corresponding to the target process unit before transferring the wafer to any target process unit. The temperature control module is used to adjust the hot plate temperature or cold plate temperature to adaptively change the wafer temperature when the condition judgment module determines that the current temperature of the wafer does not meet the temperature access threshold corresponding to the target process unit. After the wafer temperature meets the temperature access threshold, it is allowed to enter the target process unit for corresponding process processing. The data feedback module is used to update the operating status of the target process unit, the idle status of the robot arm, and the wafer processing progress data in real time and provide data feedback after the wafer completes the processing of the target process unit.

9. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores computer instructions that, when executed by a processor, implement the steps of the method according to any one of claims 1-7.

10. An electronic device, characterized in that, The electronic device includes a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein when the processor executes the computer program, it implements the steps of the method according to any one of claims 1-7.