Semiconductor device, thinning method, and semiconductor device

Abstract

The application discloses a semiconductor device, a thinning method and a semiconductor device, and belongs to the technical field of semiconductors. The semiconductor device comprises one or more transmission platforms and one or more thinning devices; the transmission platform is used for transmitting a wafer to the thinning device, the wafer has a plurality of first material layers arranged in a stack; the thinning device is used for forming a conformal first modified layer on the upper and lower surfaces of each first material layer, and selectively removing the first modified layer to thin the plurality of first material layers; and the semiconductor device is used for realizing the thinning of the first material layers.

Description

[0001] This application claims priority to Chinese patent application No. 202511181490.4, filed on August 21, 2025, the entire contents of which are incorporated herein by reference. Technical Field

[0002] This application relates to the field of semiconductor technology, and more particularly to a semiconductor device, a thinning method, and a semiconductor apparatus. Background Technology

[0003] Memory chips increase storage density and achieve higher storage capacity by stacking storage cells in three dimensions to form a multi-layer structure. To increase the number of layers in a memory chip, a relatively thick single semiconductor layer is typically used during its fabrication. However, the semiconductor layers need to be thinned during the subsequent formation of the gate metal layer and gate oxide layer. Therefore, it is crucial to control the thickness and shape of the multiple semiconductor layers after thinning. Summary of the Invention

[0004] This application discloses a semiconductor device, a thinning method, and a semiconductor apparatus to solve the problem of semiconductor layer thinning.

[0005] In a first aspect, the semiconductor device includes: one or more transport platforms and one or more thinning devices; the transport platform is used to transport a wafer to the thinning device, the wafer having multiple layers of first material stacked on it; the thinning device is used to form a conformal first modification layer on the upper and lower surfaces of each of the first material layers, and selectively remove the first modification layer to thin the multiple layers of the first material layer.

[0006] Thus, the thinning device can form a conformal first modified layer on the surface of each of the first material layers, which helps to ensure the thickness uniformity of the first modified layer on the surface of each of the first material layers in both the horizontal and vertical directions. The thinning device can selectively remove the first modified layer, which helps to reduce damage to the first material layers during the removal process and achieves uniformity in the thinning of each of the first material layers. By combining conformal modification and selective removal, it is beneficial to achieve uniformity in thinning in both the horizontal and vertical directions.

[0007] In one possible implementation, the thinning device is configured to perform multiple thinning cycles, each cycle comprising: forming a conformal first modified layer on the upper and lower surfaces of each of the first material layers and selectively removing the first modified layer.

[0008] For example, in the initial stage of thinning, the first material layer is relatively thick, and the gap between adjacent first material layers is small, limiting the processing space for modification and removal. Furthermore, removing the first modified layer may generate solid etching byproducts, increasing the thickness of the first material layer. Therefore, the amount of thinning in a single cycle is limited by the small spacing between the first material layers and may not achieve the target thinning thickness. Multiple thinning cycles are beneficial for achieving the final thinning target. By executing multiple thinning cycles, the target thinning thickness of the first material layer can be achieved.

[0009] In one possible implementation, in each thinning cycle, the thinning device forms a conformal first modification layer on the upper and lower surfaces of each of the first material layers; after the multiple thinning cycles, it is assumed that the first modification layers formed in each of the multiple thinning cycles are superimposed to form a modified portion, the modified portion satisfying: the ratio of the minimum thickness of the modified portion to the maximum thickness of the modified portion is P, P≥(T1-T2×F) / T1; where F is a coefficient reflecting the degree of contribution of the modified portion to the target thinning thickness deviation T2, where T1 is the target thinning thickness of the first material layer; T2 is the target thinning thickness deviation of the first material layer, the target thinning thickness deviation being the difference between the maximum and minimum thicknesses of the first material layer being thinned.

[0010] For example, the sharing of the target thinning thickness deviation T2 includes two parts: the target thinning thickness deviation shared by the modified part and the target thinning thickness deviation shared by the selective removal of the modified part. When the target thinning thickness deviation shared by the modified part and the target thinning thickness deviation shared by the selective removal of the modified part are the same, each shares 1 / 2, and in this case, F takes the value of 1 / 2; when the modified part shares all the target thinning thickness deviation, F takes the value of 1. The coefficient of the degree of sharing of the target thinning thickness deviation T2 by the modified part represents the coefficient of the degree of sharing of the target thinning thickness deviation T2 by multiple rounds of modification processes.

[0011] The target thickness reduction is T1, therefore the target thickness of the modified part is T1×f, where f is the ratio of the thickness of the modified part after modification to the thickness of the modified part before modification. Material changes after modification will alter the thickness. For example, if the original material is Si, and 1 nm of Si is oxidized to SiO2, the thickness will be approximately 1.84 nm, and f will be 1.84. Different methods produce SiO2 with different densities, resulting in different values ​​for f. Since the target thickness of the modified part is T1×f, and the conformability of the modified part is P, the minimum thickness of the modified part is T1×f×P. The thickness reduction deviation is T2×F, therefore the target thickness deviation of the modified part is T2×F×f. Thus, the actual thickness deviation of the modified part is T1×f - T1×f×P ≤ T2×F×f, therefore P ≥ (T1 - T2×F) / T1.

[0012] Since the target thickness of the modified part is T1×f, and the shape preservation of the modified part is P, the maximum thickness of the modified part is T1×f / P. The thickness reduction deviation is T2×F, so the target thickness deviation of the modified part is T2×F×f. Therefore, the actual thickness deviation of the modified part is T1×f / P-T1×f≤T2×F×f, and thus P≥T1 / (T1+T2×F). Since (T1-T2×F) / T1<T1 / (T1+T2×F), P≥(T1-T2×F) / T1 is sufficient.

[0013] Thus, by controlling P≥(T1-T2×F) / T1, the larger P is, the closer the minimum and maximum thickness of the modified part are, resulting in higher shape retention and thus improving the thickness uniformity of the first material layer.

[0014] In one possible implementation, in each thinning cycle, the thinning device forms a shape-preserving first modified layer on the upper and lower surfaces of each of the first material layers; after the multiple thinning cycles, it is assumed that the first modified layers formed in each of the multiple thinning cycles are superimposed to form a modified portion, wherein the modified portion satisfies: the shape preservation value of the modified portion is greater than or equal to 95% or 98%, and the shape preservation value of the modified portion is the ratio of the minimum thickness of the modified portion to the maximum thickness of the modified portion; and / or, each thinning cycle in the multiple thinning cycles satisfies that the shape preservation value of the first modified layer is greater than or equal to 95% or 98%, and the shape preservation value of the first modified layer is the ratio of the minimum thickness of the first modified layer to the maximum thickness of the first modified layer among the multiple first modified layers corresponding to the upper and lower surfaces of each of the first material layers.

[0015] For example, in a stacked structure, the thinning thickness of the first material layer ranges from 20nm to 30nm, while the target thinning thickness deviation T2 of the first material layer is 1nm to ensure the performance consistency of the semiconductor device. Modification and selective removal of the first material layer both cause channel thickness non-uniformity. Assuming modification accounts for half of the target thinning thickness deviation T2, the thickness deviation of the first material layer caused by modification needs to be less than or equal to 0.5nm. Assuming modification accounts for the entire deviation, the thickness deviation of the first material layer caused by modification needs to be less than or equal to 1nm. Taking a thickness deviation of less than or equal to 1nm as an example, when the thinning amount of the first material layer is 20nm, the conformality requirement is greater than or equal to 95% (19nm / 20nm); taking a thickness deviation of less than or equal to 0.5nm as an example, when the thinning amount of the first material layer is 30nm, the conformality requirement is greater than or equal to 98% (29.5nm / 30nm). Thus, a conformally conforming first modification layer can be formed on the surface of each first material layer, improving the thickness uniformity of the first material layer.

[0016] In one possible implementation, in the multiple thinning cycles, there are at least two thinning cycles that satisfy the condition that the thickness of the first modified layer in the preceding thinning cycle is less than the thickness of the first modified layer in the subsequent thinning cycle.

[0017] In the initial stage of thinning, the first material layer is relatively thick, and the gap between adjacent first material layers is small. At this time, the thickness of the first material layer is small due to the small space. As the thinning process proceeds, the gap between adjacent first material layers becomes larger. At this time, the amount of thinning of the first material layer in one cycle of thinning process can be increased to improve process efficiency.

[0018] In one possible implementation, the over-etching amount of the first material layer is set to be A times the target etching amount, the target thinning thickness of the first material layer is T1, the target thinning thickness deviation of the first material layer is T2, and the selective removal of the first modified layer satisfies: the etching selectivity ratio of the first modified layer to the first material layer is M, M≥A×T1 / (E×T2); where E is a coefficient reflecting the degree to which selective removal contributes to the target thinning thickness deviation T2.

[0019] Thus, the etching selection ratio M between the first modified layer and the first material layer is the ratio of the thickness removed from the first modified layer to the etching thickness of the first material layer when both layers are exposed under the same etching process conditions. A×T1 reflects the amount of over-etching, meaning that even after completely removing the thickness T1 of the top first modified layer, further etching is needed to completely remove the thickness T1 of the bottom first modified layer. After the top first modified layer is completely removed, the top first material layer is exposed under the etchant. When etching at the bottom with an amount of A×T1, the loss of the top first material layer = A×T1 / M, which is the thickness deviation of the first material layer. Therefore, A×T1 / M ≤ E×T2, and thus M ≥ A×T1 / (E×T2). By controlling M ≥ A×T1 / (E×T2), the loss of the top first material layer is minimized, thereby improving the thickness uniformity of the first material layer. The thinning device can select the etching ratio between the first modified layer and the first material layer so that the etching stops at the interface between the first modified layer and the first material layer. When the etching process of the first modified layer is completed at the bottom of the trench where the etching rate is relatively slow, the first material layer is less damaged at the top of the trench where the etching rate is relatively fast. Therefore, the etching uniformity of the first material layer at different positions in the vertical direction of the trench can be achieved.

[0020] In one possible implementation, the selective removal of the first modified layer satisfies the following condition: the etching selectivity ratio of the first modified layer to the first material layer is greater than or equal to 2.5, 20, 40, 120, or 200.

[0021] Thus, the thinning device has a high selective etching capability. The etching selection ratio of the thinning device for the first modified layer and the first material layer can make the etching stop at the interface between the first modified layer and the first material layer. When the etching process of the first modified layer is completed at the bottom of the trench where the etching rate is relatively slow, the first material layer is less damaged at the top of the trench where the etching rate is relatively fast. Therefore, the etching uniformity of the first material layer at different positions in the vertical direction of the trench can be achieved.

[0022] For example, to thoroughly remove the first modified layer, the over-etching amount is set to a minimum of A=0.3, and the minimum possible target thinning thickness of the first material layer is set to T1=15nm; all non-uniformity indicators are etched, and the maximum possible target thinning thickness deviation T2 is 2nm; then the etching selection ratio of the first modified layer to the first material layer is M=0.3×15 / 2=2.5:1. Therefore, it can be understood that M greater than 2.5 (e.g., 20, 40, 120, 200 or others) results in better process performance.

[0023] For example, to more thoroughly remove the first modified layer at the bottom of the stacked structure, over-etching by 1 to 2 times is required. The thinning range of the first material layer of the semiconductor device is, for example, 20 nm to 30 nm. Therefore, the over-etching amount is at least 20 nm to 60 nm, and the thickness uniformity deviation of the first material layer must be less than or equal to 1 nm to ensure the performance consistency of the semiconductor device. Both modification and etching will cause non-uniformity in the thickness of the first material layer. Assuming that modification and etching each account for half of the performance, the thickness deviation of the first material layer caused by modification / etching must be less than or equal to 0.5 nm. When the over-etching amount is 20 nm, the thickness uniformity deviation of the first material layer at the top is <0.5 nm, then the etching selectivity ratio of the first modified layer to the first material layer is greater than or equal to 40:1 (20 / 0.5). When the over-etching amount is 60 nm, the thickness uniformity deviation of the first material layer at the top is less than or equal to 0.5 nm, then the etching selectivity ratio of the first modified layer to the first material layer is greater than or equal to 120:1 (60 / 0.5).

[0024] In one possible implementation, the thinning device includes: at least one first modification chamber and at least one removal chamber; the first modification chamber is used to form a conformal first modification layer on the upper and lower surfaces of each of the first material layers, and the removal chamber is used to selectively remove the first modification layer.

[0025] Since the first modification chamber is a conformal surface modification process chamber, the thickness of the first modified layer formed is uniform, thereby achieving uniform thickness of the first modified layer in both the horizontal and vertical directions; since the removal chamber is a process chamber that selectively etches the first modified layer, it causes less damage to the first material layer during the removal of the first modified layer, thus achieving uniform thinning of each of the first material layers.

[0026] In one possible implementation, the first modification chamber further has a heat treatment function for driving the surface modification reaction of the first material layer, and / or for thermally decomposing the etching byproducts generated during the selective removal of the first modified layer; and / or, the removal chamber further has a heat treatment function for thermally decomposing the etching byproducts generated during the selective removal of the first modified layer.

[0027] When the first modification chamber also has a heat treatment function, the first modification chamber is used to drive the surface modification reaction of the first material layer, and / or to thermally decompose the etching byproducts generated when selectively removing the first modification layer. This is suitable for scenarios where removing the first modification layer takes longer than modification, so that the process time of the removal chamber and the first modification chamber can be comparable, the overall process time is less, and higher yield can be obtained.

[0028] When the removal chamber also has a heat treatment function, it can thermally decompose the etching byproducts produced during the removal of the first modified layer. In this case, both the etching of the first modified layer and the decomposition of the etching byproducts are performed in the removal chamber, which is suitable for scenarios where the removal of the first modified layer takes less time than the modification. This makes the process time of the removal chamber and the first modified chamber comparable, resulting in a shorter overall process time and a higher yield.

[0029] In summary, by integrating heat treatment functions into the removal chamber and / or the first modified chamber, chamber efficiency can be balanced, thereby improving equipment productivity.

[0030] In one possible implementation, the first modified chamber includes: a remote plasma source, a transport component, and a processing chamber arranged in sequence, wherein the remote plasma source is used to receive process gas and form plasma, the transport component is used to transport the plasma to the processing chamber, and the processing chamber is used to process the wafer using the plasma.

[0031] During the process, process gas flows into a remote plasma source, which uses radio frequency energy to activate the process gas. This feature allows the remote plasma oxidation / nitriding process to achieve a higher reactant concentration at the same temperature compared to other oxidation / nitriding methods. It can achieve a high concentration of reactant distribution on the wafer surface. The high concentration of reactants makes the reactant concentration distribution more uniform under high aspect ratio structures, which is beneficial to achieving a first modified layer thickness of >95% or even >98%.

[0032] In one possible implementation, the material of the inner surface of the conveying member includes at least one of quartz, silicon black quartz, silicon dioxide coating, and silicon carbide.

[0033] Thus, the free radical surface recombination coefficient on the inner surface of the transport component is low. The charged charge in the plasma decays rapidly during transport, and the neutral, highly reactive free radicals have a longer lifetime. Injected into the processing chamber through the transport component, the inner lining of the transport component has a low free radical surface recombination coefficient, resulting in less loss of free radicals during transport.

[0034] The material settings on the inner surface of the conveying component, combined with the activation of process gas by radio frequency energy using remote plasma, can achieve a higher reactant concentration. The combined effect of these two factors (more at the source and less loss in the process) can achieve a high concentration of reactant distribution on the wafer surface. The high concentration of reactants makes the reactant concentration distribution more uniform under high aspect ratio structures, which is beneficial to achieving >95% or even >98% conformability of the first modified layer.

[0035] In one possible implementation, the transport member has an axis extending along a third direction, which is parallel to the arrangement direction of the remote plasma source and the transport member; the processing chamber has an air inlet connected to the transport member, and the side wall where the air inlet of the processing chamber is located is a first side wall of the processing chamber; the processing chamber has an exhaust port near a second side wall of the processing chamber, and the second side wall and the first side wall are disposed opposite to each other in the third direction; wherein the angle between the axis of the transport member and the first side wall is in the range of 85°~90°.

[0036] In some examples, the air inlet and exhaust port of the processing chamber, which connect to the transport member, are located on adjacent sidewalls of the processing chamber. This causes the plasma to travel non-linearly within the processing chamber. In contrast, in the example of this application, the angle between the axis of the transport member and the first sidewall is approximately 90°, and the air inlet and exhaust port of the processing chamber are located on opposite sidewalls. This allows the plasma to be injected linearly into the processing chamber via the transport member, flow across the wafer surface, and finally exit through the exhaust port located near the second sidewall. The uniform airflow design achieves a uniform distribution of plasma on the wafer surface, resulting in a more uniform thickness of the first modified layer on the wafer surface.

[0037] In one possible implementation, the removal chamber is also used to remove the oxide layer from the surface of the first material layer.

[0038] Thus, the removal chamber has the function of removing the oxide layer of the first material layer, which helps to avoid the (natural) oxide layer on the surface of the first material layer from affecting the thinning process of the first material layer and ensures process quality.

[0039] In one possible implementation, the thinning apparatus further includes: one or more first heat treatment chambers; the first heat treatment chambers are used for thermally decomposing etching byproducts generated during the selective removal of the first modified layer.

[0040] Thus, when the first heat treatment chamber is used for the selective removal of etching byproducts generated during the thermal decomposition of the first modified layer, the removal of the first modified layer and the decomposition of the etching byproducts can be carried out in the removal chamber and the first heat treatment chamber, respectively, which can accelerate the removal efficiency of the first modified layer and the removal efficiency of the etching byproducts and improve the yield of the equipment.

[0041] In one possible implementation, the first heat treatment chamber is also used for surface repair of the first material layer.

[0042] Thus, surface repair helps to reduce the roughness of the first material layer and / or repair lattice defects in the first material layer, thereby improving the quality of the first material layer.

[0043] In one possible implementation, the semiconductor device includes: two transport platforms, two first modification chambers, two removal chambers, and two first heat treatment chambers; each transport platform is connected to one first modification chamber and one removal chamber, the two first heat treatment chambers are disposed between the two transport platforms, and each first heat treatment chamber is connected to the two transport platforms.

[0044] The first heat treatment chamber can be used to drive / activate the surface modification reaction, which can reduce the process time of the first modification chamber and increase its yield. The first heat treatment chamber can also be used to thermally decompose etching byproducts, which can reduce the process time of the removal chamber and increase its yield. By using the first heat treatment chamber to share the process time of the bottleneck chamber, the yields among the different chambers can be effectively balanced.

[0045] Because the first heat treatment chamber has a wide range of functions, it is positioned in the middle so that the wafer can achieve its process purpose when passing through this process chamber during the transfer between the two transfer platforms. Therefore, each transfer is an effective transfer, which can maximize the yield.

[0046] In addition, in this embodiment, the transfer platform only needs to transfer wafers between its corresponding first modification chamber, removal chamber, and first heat treatment chamber, resulting in fewer transfer locations and higher yield.

[0047] In one possible implementation, the thinning device includes: a second modification chamber, a second heat treatment chamber, and a removal chamber; the second modification chamber is used to adsorb surface-modifying gases into the first material layer, the second heat treatment chamber is used to activate the surface modification reaction of the first material layer; the removal chamber is used to selectively remove the first modified layer, and / or to remove an oxide layer from the surface of the first material layer.

[0048] Thus, the second heat treatment chamber is used to activate the surface modification reaction of the first material layer, which can reduce the process time of the second modification chamber and increase the yield of the second modification chamber. The removal chamber has the function of removing the oxide layer of the first material layer, which helps to avoid the (natural) oxide layer on the surface of the first material layer from affecting the thinning process of the first material layer and ensure process quality.

[0049] In one possible implementation, the second heat treatment chamber is also used for thermally decomposing etching byproducts generated during the selective removal of the first modified layer.

[0050] Thus, the second heat treatment chamber is used to activate the surface modification reaction of the first material layer, which can reduce the process time of the second modification chamber and increase its yield; the second heat treatment chamber is used for thermal decomposition of etching byproducts, which can reduce the process time of the removal chamber and increase its yield. By using the second heat treatment chamber to share the process time of the second modification chamber and the removal chamber, the yields among the various chambers can be effectively balanced.

[0051] In one possible implementation, the thinning device includes: a process chamber and a gas distribution plate, a support, and a heater disposed in the process chamber; a first gas source, a second gas source, and a third gas source are respectively connected to the gas distribution plate via valves; the support is used to support the wafer, and the heater is used to heat the wafer; a first gas supplied by the first gas source to the process chamber is used to form a conformal first modified layer on the surface of the first material layer; a second gas supplied by the second gas source to the process chamber is used to remove the first gas and / or remove byproducts generated during the removal of the first modified layer; and a third gas supplied by the third gas source to the process chamber is used to remove the first modified layer from the surface of the first material layer.

[0052] Thus, an integrated process chamber is provided to modify and remove the first material layer, thereby achieving thinning of the first material layer. The integrated process chamber has a small footprint, reducing transport time and increasing equipment yield. In some embodiments, the second gas supplied to the process chamber by the second gas source can be used to purge the first gas, preventing unintended reactions between residual modified gas and the third gas that could lead to uneven thinning of the first material layer. In some embodiments, the second gas can purge and remove gaseous byproducts generated during the first modification process to ensure process quality.

[0053] In one possible implementation, the thinning device includes: a process chamber and a gas distribution plate, a support, and a heater disposed in the process chamber; a first gas source and a fourth gas source are respectively connected to the gas distribution plate via valves; the support is used to support the wafer, and the heater is used to heat the wafer; a first gas supplied by the first gas source to the process chamber is used to form a conformal first modified layer on the surface of the first material layer, and a fourth gas supplied by the fourth gas source to the process chamber is used to remove gaseous byproducts generated during the thermal decomposition of the first modified layer.

[0054] Thus, another integrated process chamber is provided to modify and remove the first material layer, thereby achieving thinning of the first material layer.

[0055] In one possible implementation, the semiconductor device further includes a pre-cleaning chamber for removing an oxide layer from the surface of the first material layer.

[0056] Thus, the pre-cleaning chamber has the function of removing the oxide layer on the surface of the first material layer, enabling the modification and removal of the first material layer to be carried out, thereby achieving the thinning of the first material layer.

[0057] In one possible implementation, the semiconductor device further includes a surface repair chamber for surface repair of the first material layer.

[0058] This is used to reduce the roughness of the first material layer and / or repair lattice defects in the first material layer.

[0059] Secondly, this application provides a thinning method, which is performed using a semiconductor device as described in any of the above embodiments; including: performing one or more thinning cycles on a wafer, the wafer having multiple layers of first material layers and gaps between the multiple layers of first material layers; each thinning cycle includes: forming a conformal first modification layer on the surface of each of the first material layers, and selectively removing the first modification layer to thin the multiple layers of the first material layers.

[0060] Thus, the modification and removal of the first material layer are repeated until the target thickness reduction of the first material layer is achieved.

[0061] Thirdly, this application provides a semiconductor device, the semiconductor device comprising: a first material layer thinned by the thinning method described in any of the above embodiments.

[0062] The first material layer of the semiconductor device is formed through a high-conformity thinning process, which can improve the consistency of semiconductor device performance. Attached Figure Description

[0063] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0064] Figure 1 This is a structural diagram of the semiconductor structure according to an embodiment of this application; Figure 2 This is a structural diagram of the stacked structure according to an embodiment of this application; Figure 3 This is another structural diagram of the stacked structure according to an embodiment of this application; Figure 4 This is another structural diagram of the stacked structure according to an embodiment of this application; Figure 5 This is a structural diagram corresponding to the semiconductor structure fabrication process in the embodiments of this application; Figure 6 These are structural diagrams of semiconductor structures from some embodiments; Figure 7 This is a flowchart of a semiconductor layer thinning method according to an embodiment of this application; Figure 8 The diagram shows the structure of each step in the semiconductor layer thinning method according to the embodiments of this application. Figure 9 This is another structural diagram corresponding to each step of the semiconductor layer thinning method in this application embodiment; Figure 10 This is another structural diagram corresponding to each step of the semiconductor layer thinning method in this application embodiment; Figure 11 This is a flowchart of a thinning method according to an embodiment of this application; Figure 12 This is a structural diagram showing the steps corresponding to the thinning method in this application embodiment; Figure 13 This is another structural diagram corresponding to each step of the thinning method in this application embodiment; Figure 14 This is another structural diagram corresponding to each step of the thinning method in this application embodiment; Figure 15 This is another structural diagram corresponding to each step of the thinning method in this application embodiment; Figure 16 This is a structural diagram of the modification step corresponding to the thinning method in an embodiment of this application; Figure 17 This is a structural diagram of a semiconductor device according to an embodiment of this application; Figure 18 This is another structural diagram of the semiconductor device according to an embodiment of this application; Figure 19 This is another structural diagram of a semiconductor device according to an embodiment of this application; Figure 20 This is a structural diagram of the modified part according to an embodiment of this application; Figure 21 This is another structural diagram of a semiconductor device according to an embodiment of this application; Figure 22 This is a step diagram of a thinning method according to an embodiment of this application; Figure 23 This is another step diagram of the thinning method according to an embodiment of this application; Figure 24 This is another step diagram of the thinning method according to an embodiment of this application; Figure 25 This is another step diagram of the thinning method according to an embodiment of this application; Figure 26 This is another step diagram of the thinning method according to an embodiment of this application; Figure 27 This is a top view of a first modified chamber according to an embodiment of this application; Figure 28 This is a side view of a first modified chamber according to an embodiment of this application; Figure 29This is another step diagram of the thinning method according to an embodiment of this application; Figure 30 This is another step diagram of the thinning method according to an embodiment of this application; Figure 31 This is another step diagram of the thinning method according to an embodiment of this application; Figure 32 This is another step diagram of the thinning method according to an embodiment of this application; Figure 33 This is a structural diagram of a thinning device according to an embodiment of this application; Figure 34 This is another structural diagram of the thinning device according to an embodiment of this application; Figure 35 This is a timing diagram of the thinning process in an embodiment of this application; Figure 36 This is another timing diagram of the thinning process in an embodiment of this application.

[0065] Explanation of reference numerals in the attached figures: 101-Semiconductor structure, 102-Memory cell string, 103-Transistor, 104-Capacitor, 105-First electrode plate, 106-Second electrode plate, 107-First dielectric layer, 108-Channel region, 109-Gate metal layer, 110-Gate oxide layer, 111-Stacked structure, 112-Substrate, 113-Semiconductor layer, 1130-First material layer, 114-Sacrificial layer, 1140-Second material layer, 115-Trench, 116-Insulating layer, 117-Protrusion, 117a-Partial; 118-Modified portion; 200 - Semiconductor devices; 300-Semiconductor equipment, 301-Transmission platform, 3011-Cooling module, 302-Thinning device, 3021-First modification chamber, 3022-Removal chamber, 3211-Remote plasma source, 3212-Conveying component, 3213-Processing chamber, 3023-First heat treatment chamber, 3024-Process chamber, 3025-First gas source, 3026-Second gas source, 3027-Third gas source, 3028-Second modification chamber, 3029-Second heat treatment chamber, 3030-Fourth gas source, 30241-Gas distribution plate, 30242-Support component, 30243-Heater, 30244-Exhaust guide plate, 30245-Exhaust port, 303-Pre-cleaning chamber, 304-Surface repair chamber; 401 / 4011 / 4012 / 4013 / 4014 / 4015 - First modified layer; 402 - Second modified layer. Detailed Implementation

[0066] Example 1 This application provides a memory, which includes a semiconductor structure 101, and the semiconductor structure 101 includes an array of multiple memory cell strings 102 arranged in an array.

[0067] For example, the memory also includes peripheral devices (not shown in the figure), which may be, for example, peripheral devices in the memory used to control and detect the states of each switch to realize the storage and retrieval of data.

[0068] In some examples, such as Figure 1 As shown, the storage cell string 102 includes a transistor 103 and a capacitor 104.

[0069] For example, the storage cell string 102 in the embodiment of this application is a 1T1C structure, where "T" represents a transistor, the number before "T" represents the number of transistors, and "C" represents a capacitor, the number before "C" represents the number of capacitors. For example, "1T1C" represents 1 transistor and 1 capacitor.

[0070] For example, capacitor 104 includes a first electrode 105 and a second electrode 106, and semiconductor structure 101 further includes a first dielectric layer 107 located between the first electrode 105 and the second electrode 106, wherein the material of the first dielectric layer 107 may be a high dielectric constant dielectric layer.

[0071] For example, transistor 103 includes: a channel region 108, a gate metal layer 109, and a gate oxide layer 110 located between the channel region 108 and the gate metal layer 109.

[0072] like Figure 1 and Figure 2 As shown, in the process of forming the memory cell string 102, a stacked structure 111 needs to be formed on one side of the substrate 112 first. The stacked structure 111 includes: an alternately arranged semiconductor layer 113 and a sacrificial layer 114.

[0073] In subsequent steps, the sacrificial layer 114 is replaced with the insulating layer 116 (e.g., Figure 5 As shown), for example, the material of the insulating layer 116 is aluminum oxide; the semiconductor layer 113 is used to form the channel region 108 of the transistor 103.

[0074] For example, the semiconductor layer 113 is made of Si, and the sacrificial layer 114 is made of SiGe.

[0075] When forming the stacked structure 111, the thickness d1 of the semiconductor layer 113 and the thickness d2 of the sacrificial layer 114 have a significant impact on the thickness of the stacked structure 111 that can be formed, as well as the structure and performance of the semiconductor structure 101.

[0076] like Figure 2As shown, the thickness d2 of the sacrificial layer 114 ranges from 50 nm to 70 nm, and the thickness d1 of the semiconductor layer 113 ranges from 10 nm to 15 nm. However, due to the stress of the semiconductor epitaxy, it is impossible to realize a multi-layer structure, for example, with more than 100 layers.

[0077] like Figure 3 As shown, the thickness d2 of the sacrificial layer 114 ranges from 10 nm to 15 nm, and the thickness d1 of the semiconductor layer 113 ranges from 50 nm to 70 nm. Figure 4 As shown, the sacrificial layer 114, semiconductor layer 113, and the semiconductor layer 113 are stacked sequentially, with thicknesses ranging from 10nm to 15nm, 10nm to 20nm, 10nm to 15nm, and 20nm to 40nm, respectively. In these two examples, the thickness d2 of the sacrificial layer 114 is relatively thin, while the thickness d1 of the semiconductor layer 113 is relatively thick. This effectively addresses the stress effect of semiconductor epitaxy, resulting in a stacked structure 111 with a larger number of layers.

[0078] However, as Figure 1 and Figure 5 As shown, during the fabrication of the semiconductor structure 101, a trench 115 is formed that penetrates the stacked structure 111. The portion of the semiconductor layer 113 located in the trench 115 is used to form the channel region 108 of the transistor 103. A gate metal layer 109 and a gate oxide layer 110 are fabricated on both the upper and lower sides of the channel region 108.

[0079] When the thickness d1 of the semiconductor layer 113 is relatively thick, the space of the trench 115 is small, which does not meet the requirements for the subsequent fabrication of the gate metal layer 109 and the gate oxide layer 110. For example, in the final semiconductor structure 101, the thickness d1 of the semiconductor layer 113 is generally around 10 nm. Therefore, it is necessary to reduce the thickness d1 of the semiconductor layer 113.

[0080] However, as Figure 6 As shown, with the increase of the stacked structure 111, the aspect ratio of the trench 115 increases. During the thinning process of the semiconductor layer 113, the thinning thickness of the semiconductor layer 113 at different depths in the trench 115 cannot be consistent. For example, the semiconductor layer 113 at a shallower depth in the trench 115 has a larger thinning thickness, while the semiconductor layer 113 at a deeper depth in the trench 115 has a smaller thinning thickness. Alternatively, the thickness of a single semiconductor layer 113 after thinning is inconsistent. For example, the thickness of the semiconductor layer 113 is smaller closer to the axial center O1 of the trench 115, and the thickness of the semiconductor layer 113 gradually increases along the direction away from the axial center O1 of the trench 115. That is, the conformal performance of the semiconductor layer 113 is poor. Therefore, the thinning process of the semiconductor layer 113 is a key process in the fabrication of the semiconductor structure 101.

[0081] Based on this, embodiments of this application provide a method for thinning a semiconductor layer, such as... Figure 7 and Figure 8 As shown, the method for thinning the semiconductor layer includes the following steps R1 to R3.

[0082] R1. A stacked structure 111 is provided, which is located on one side of the substrate 112. The stacked structure 111 includes: an insulating layer 116 and a semiconductor layer 113 alternately disposed, and a plurality of trenches 115 penetrating the stacked structure 111; the semiconductor layer 113 has a first thickness d3; wherein, in a first direction Y, the insulating layer 116 is located inside the semiconductor layer 113, and in the trenches 115, the boundary L2 of the insulating layer 116 and the boundary L1 of the semiconductor layer 113 have a first distance d4 in the second direction X; the first direction Y is perpendicular to the substrate 112, and the second direction X intersects the first direction Y.

[0083] For example, the method of providing the stacked structure 111 specifically includes the steps R11 to R13.

[0084] R11, A stacked structure 111 is formed on one side of the substrate 112. The stacked structure 111 includes: an alternately arranged sacrificial layer 114 and a semiconductor layer 113; the semiconductor layer 113 has a first thickness d3.

[0085] For example, the first thickness d3 of the semiconductor layer 113 is greater than the thickness d2 of the sacrificial layer 114. This thickness setting can result in a stacked structure 111 with a large number of stacked layers.

[0086] For example, the first thickness d3 is greater than 20 nm and less than or equal to 100 nm.

[0087] For example, the material of semiconductor layer 113 includes at least one of Si, poly-SiGe, Ge, SiN, and indium gallium zinc oxide. Poly-SiGe refers to polycrystalline silicon germanium.

[0088] R12, forming multiple trenches 115 that penetrate the stacked structure 111.

[0089] For example, an array of trenches 115 are formed by an etching process.

[0090] R13. Replace the sacrificial layer 114 with the insulating layer 116.

[0091] For example, in trench 115, insulating layer 116 is recessed relative to semiconductor layer 113 into stacked structure 111 formed by insulating layer 116 and semiconductor layer 113.

[0092] R2. In the trench 115, the portion of the semiconductor layer 113 that does not overlap with the insulating layer 116 in the first direction Y is a protrusion 117; a modified layer is formed on the portion 117a of the protrusion 117 facing the trench 115. For example, the thickness of the modified layer is consistent in different directions.

[0093] For example, the etching selectivity ratio of the modified layer to the semiconductor layer 113 is greater than or equal to 20, where the etching selectivity ratio refers to the ratio of the removal rates of different materials during the etching process. An etching selectivity ratio of greater than or equal to 20 for the modified layer to the semiconductor layer 113 is beneficial for the removal of the modified layer.

[0094] For example, the thickness of the modified layer formed on the protrusions 117 at different depths of the trench 115 is consistent.

[0095] For example, by oxidizing, nitriding, ammonitizing or hydrogenating the portion 117a of the protrusion 117 facing the groove 115, the material properties of the portion 117a of the protrusion 117 facing the groove 115 are changed to obtain a modified layer. The oxidation, nitriding, ammonitizing or hydrogenation treatment is a self-limiting treatment method, and the depth of oxidation, nitriding, ammonitizing or hydrogenation treatment can be consistent along each direction of the protrusion 117.

[0096] For details regarding the oxidation, nitriding, ammonium salting, or hydrogenation treatment of the portion 117a of the protrusion 117 facing the groove 115, please refer to the subsequent description; it will not be elaborated here.

[0097] R3. Remove the modified layer of the protrusion 117 to obtain the protrusion 117 with a second thickness d5, where the second thickness d5 is less than the first thickness d3.

[0098] For example, removing the modified layer of the protrusion 117 means removing the portion 117a of the protrusion 117 that has undergone oxidation, nitriding, ammoniation, or hydrogenation treatment. Oxidation, nitriding, ammoniation, or hydrogenation treatment can remove several atomic layers from the protrusion 117 at a time, thereby allowing precise control over the etching rate and morphology of the protrusion 117.

[0099] For example, the second thickness d5 ranges from 5nm to 20nm. For instance, the second thickness d5 can be 5nm, 8nm, 9nm, 10nm, 12nm, 14nm, 15nm, 17nm, or 20nm, etc., and there is no limitation here.

[0100] For example, after removing the modified layer of the protrusion 117, the boundary L1 of the insulating layer 116 and the boundary L2 of the semiconductor layer 113 have a second spacing d6 in the second direction X; wherein, the difference between the first spacing d4 and the second spacing d6 is equal to half of the difference between the first thickness d3 and the second thickness d5, that is, d4-d6=(d3-d5) / 2. In other words, the thickness of the portion 117a removed from the protrusion 117 is consistent along each direction of the protrusion 117. After the semiconductor layer 113 is thinned, the size changes, but the structure at the corner of the semiconductor layer 113 remains unchanged, for example, it is still a right angle.

[0101] Furthermore, by first forming a modified layer on the portion 117a of the protrusion 117 facing the trench 115 and then removing the modified layer, the semiconductor layer 113 is thinned through a two-step process, so that the thinning thickness of the semiconductor layer 113 at different depths in the trench 115 is consistent.

[0102] Therefore, in the embodiments of this application, the modified layer of the protrusion 117 is removed through the above steps R1 to R3 to reduce the thickness of the protrusion 117 and increase the space of the groove 115, thereby reserving sufficient operating space for subsequent processes in the groove 115.

[0103] In some embodiments, such as Figure 8 As shown, the portion 117a of the protrusion 117 facing the groove 115 is oxidized by gas oxidation or liquid oxidation.

[0104] For example, the gas oxidation method includes forming an oxide or nitrogen oxide on the portion 117a of the protrusion 117 facing the groove 115 using any one of oxygen plasma, oxygen free radical, ultraviolet light, oxygen, ozone and HNO3 gas.

[0105] For example, oxygen plasma or oxygen free radicals can be provided using inductively coupled plasma technology, capacitively coupled plasma technology, remote plasma source technology, remote plasma unit technology, or in-situ steam generation oxidation technology.

[0106] For example, the semiconductor layer 113 is made of Si, and after oxidation treatment, the portion 117a of the protrusion 117 facing the trench 115 is formed of silicon oxide or silicon oxynitride.

[0107] For example, before oxidizing, nitriding, ammoniting, or hydrogenating the portion 117a of the protrusion 117 facing the groove 115, the method further includes placing the stacked structure 111 into a cavity of the cavity device, the cavity having a showerhead configured to divert gas. For example, the distance between the stacked structure 111 and the showerhead ranges from 100 mil to 4000 mil.

[0108] For example, the cavity device can be a single-cavity device or a dual-cavity device.

[0109] For example, oxygen plasma is used to form oxides or oxynitrides on the portion 117a of the protrusion 117 facing the trench 115, satisfying the following conditions: the power range of the cavity device is 1500W~2000W. For example, the gas pressure is 1.5 torr, the temperature is 250°C, and the thickness of the formed modified layer is about 1.8nm.

[0110] For example, oxygen free radicals are used to form oxides or oxynitrides on the portion 117a of the protrusion 117 facing the trench 115, satisfying the following conditions: the gas pressure range is 1 torr to 5 torr, and the substrate temperature range is 250°C to 600°C.

[0111] For example, in the cavity of the cavity device, the gas flow rate ranges from 2 sccm to 200 sccm, and the oxidation treatment time ranges from 30 s to 500 s.

[0112] For example, oxygen plasma, oxygen radicals, oxygen, ozone, or HNO3 gas are loaded by a carrier gas, which includes at least one of Ar and He.

[0113] Oxides or nitrogen oxides are formed on the portion 117a of the protrusion 117 facing the trench 115 by oxygen plasma, oxygen free radicals, oxygen, ultraviolet light, ozone or HNO3 gas, so that the portion 117a can be removed in the subsequent removal step. The uniformity and thickness of the oxidation of the protrusion 117 in the trench 115 can be controlled by temperature, gas pressure, gas flow rate, spacing between the stack structure 111 and the shower head, power, processing time and carrier gas selection. In conjunction with the subsequent removal step of the portion 117a of the protrusion 117 facing the trench 115, the conformal thinning of the protrusion 117 of the semiconductor layer 113 can be achieved.

[0114] In some embodiments, such as Figure 8 As shown, the liquid oxidation method includes: using HNO3 solution, H2SO4 solution, ozone water or H2O2 to form oxides or nitrogen oxides on the portion of the protrusion 117 facing the groove 115.

[0115] For example, the concentration ranges of HNO3 solution, H2SO4 solution, ozone water, and H2O2 are 1% to 50%, respectively; and the temperature ranges are 0℃ to 100℃.

[0116] By using HNO3 solution, H2SO4 solution, ozone water, or H2O2 to form oxides or nitrogen oxides on the portion of the protrusion 117 facing the trench 115, the subsequent removal step can remove this portion 117a. The uniformity and thickness of the oxidation of the protrusion 117 in the trench 115 can be controlled by selecting the solution concentration and temperature. Combined with the subsequent removal step of the portion 117a of the protrusion 117 facing the trench 115, conformal thinning of the protrusion 117 of the semiconductor layer 113 can be achieved.

[0117] In some embodiments, such as Figure 9 As shown, the portion 117a of the protrusion 117 facing the groove 115 is nitrided, including nitriding the portion 117a of the protrusion 117 facing the groove 115 using nitrogen plasma or nitrogen free radicals.

[0118] For example, nitrogen plasma or nitrogen radicals can be provided through inductively coupled plasma technology, capacitively coupled plasma technology, remote plasma source technology, remote plasma unit technology, or decoupled plasma nitriding technology.

[0119] For example, a nitride layer having nitrogen plasma, nitrogen free radicals or nitrogen dangling bonds is formed on the portion 117a of the protrusion 117 facing the trench 115 by nitrogen plasma or nitrogen free radicals.

[0120] For example, the gas pressure range for nitriding the portion 117a of the protrusion 117 facing the groove 115 is 1 torr to 20 torr; the processing time ranges from 10s to 500s; and the power of the cavity device ranges from 200W to 3000W.

[0121] By nitriding the portion 117a of the protrusion 117 facing the trench 115 using nitrogen plasma or nitrogen free radicals, the portion 117a can be removed in subsequent removal steps. The uniformity and thickness of the oxidation of the protrusion 117 in the trench 115 can be controlled by selecting the gas pressure, processing time and power. Combined with the subsequent removal step of the portion 117a of the protrusion 117 facing the trench 115, conformal thinning of the protrusion 117 of the semiconductor layer 113 can be achieved.

[0122] In some embodiments, such as Figure 10 As shown, the portion 117a of the protrusion 117 facing the groove 115 is hydrogenated, including: hydrogenating the portion 117a of the protrusion 117 facing the groove 115 with hydrogen plasma.

[0123] For example, hydrogen plasma is used to hydrogenate the portion 117a of the protrusion 117 facing the groove 115, satisfying the following conditions: gas pressure range of 1 torr to 30 torr; processing time range of 5s to 100s; cavity device power range of 20W to 1000W.

[0124] For example, in the cavity of the cavity device, the gas pressure ranges from 1 to 5 torr, the hydrogenation treatment time is from 20 to 45 seconds, and the cavity device power is from 50W to 100W.

[0125] By using hydrogen plasma to hydrogenate the portion 117a of the protrusion 117 facing the trench 115, the portion 117a can be removed in the subsequent removal step. The uniformity and thickness of the oxidation of the protrusion 117 in the trench 115 can be controlled by selecting the gas pressure, processing time and power. Combined with the subsequent removal step of the portion 117a of the protrusion 117 facing the trench 115, the conformal thinning of the protrusion 117 of the semiconductor layer 113 can be achieved.

[0126] In some embodiments, such as Figures 8-10 As shown, the removal of the denatured layer includes: removing the denatured layer using HF vapor, satisfying the following conditions: gas pressure range of 10 mtorr to 20 torr; gas flow rate range of 2 sccm to 500 sccm; temperature range of -40℃ to 200℃.

[0127] By selecting the ratio of water volume to HF volume, gas pressure, gas flow rate, and temperature, the portion 117a of the protrusion 117 that has undergone oxidation, nitriding, or hydrogenation treatment can be removed to obtain a semiconductor layer 113 with uniformly reduced thickness, thereby achieving conformal thinning of the protrusion 117 of the semiconductor layer 113.

[0128] In some embodiments, such as Figure 10 As shown, a modified layer is formed on the portion 117a of the protrusion 117 facing the groove 115, and the modified layer is removed by: hydrogenating and removing the portion 117a of the protrusion 117 facing the groove 115 using at least one of the following gas compositions: NF3 and He, NF3 and Ar, NF3, NH3 and He, NF3, NH3 and Ar, NF3+H2+He, NF3+H2+Ar.

[0129] In other words, the hydrogenation and removal of the portion 117a of the protrusion 117 facing the groove 115 can be completed simultaneously, and the portion 117a of the protrusion 117 facing the groove 115 is removed at the same time as hydrogenation.

[0130] By using at least one of the following compositions: NF3 and He, NF3 and Ar, NF3, NH3 and He, NF3, NH3 and Ar, NF3+H2+He, NF3+H2+Ar, the portion 117a of the protrusion 117 facing the trench 115 can be hydrogenated and the hydrogenated portion can be removed at the same time to obtain a semiconductor layer 113 with uniformly reduced thickness.

[0131] In some embodiments, such as Figure 8 As shown, a modified layer is formed on the portion 117a of the protrusion 117 facing the groove 115, and the modified layer is removed by means of physical bombardment. The physical bombardment method meets the following conditions: the gas used includes any one of Ar ions, He ions, N ions, and O ions, the power range is 50W to 5000W, and the bias voltage range is 0V to 1000V.

[0132] The portion 117a of the protrusion 117 facing the groove 115 is removed by physical bombardment.

[0133] In some embodiments, such as Figure 9 As shown, the ammonium salt treatment of the portion 117a of the protrusion 117 facing the groove 115 includes: forming a nitride on the portion 117a of the protrusion 117 facing the groove 115 using nitrogen plasma or nitrogen free radicals, performing ammonium salt treatment on the portion 117a of the protrusion 117 that has formed the nitride, and forming an ammonium salt on the portion 117a of the protrusion 117 facing the groove 115.

[0134] For example, the gases used for ammonium salting treatment of the portion 117a of the protrusion 117 that forms a nitride include: NF3 and NH3, NF3, NH3 and Ar, NF3, NH3 and He, CH2F2, or CHF3.

[0135] By forming a nitride on the portion 117a of the protrusion 117 facing the groove 115, and then subjecting the nitride-formed portion 117a of the protrusion 117 to ammonium salt treatment, the portion 117a of the protrusion 117 facing the groove 115 is formed into an ammonium salt, so that the portion 117a can be removed in subsequent removal steps.

[0136] In some embodiments, such as Figure 9 As shown, removing the ammonium-treated portion 117a of the protrusion 117 includes: removing the ammonium-treated portion 117a of the protrusion 117 using a temperature sublimation process; the temperature range for removing the ammonium-treated portion 117a of the protrusion 117 using the temperature sublimation process is 160℃~300℃.

[0137] For example, the temperature at which the ammonium salt portion 117a of the protrusion 117 is removed by the sublimation process is 160℃, 170℃, 180℃, 190℃, 200℃, 210℃, 220℃, 230℃, 240℃, 250℃, 260℃, 270℃, 280℃, 290℃ or 300℃, etc., and there is no limit here.

[0138] The portion 117a of the protrusion 117 that has undergone ammonium salting can be removed by a temperature-heating sublimation process, resulting in a semiconductor layer 113 with uniformly reduced thickness.

[0139] In other embodiments, by changing the process parameters for oxidizing, nitriding, ammonitizing, or hydrogenating the portion 117a of the protrusion 117 facing the trench 115, and the process parameters for removing the portion 117a of the protrusion 117 that has undergone oxidation, nitriding, ammonitizing, or hydrogenation, the semiconductor layer 113 located in the same trench 115 can have different second thicknesses d5.

[0140] For example, in the same trench 115, the second thickness d5 of the semiconductor layer 113 gradually increases as the depth of the trench 115 increases. Or, in the same trench 115, the second thickness d5 of the semiconductor layer 113 gradually decreases as the depth of the trench 115 increases.

[0141] In some embodiments, such as Figure 9 As shown, after removing the portion 117a of the protrusion 117 that has undergone oxidation, nitriding, ammonium salting, or hydrogenation treatment, the method further includes passivating the surface of the protrusion 117 using SiCl4 or C4F8.

[0142] For example, by oxidizing, nitriding, ammonium salting, or hydrogenating the portion 117a of the protrusion 117 facing the trench 115, and removing the portion 117a of the protrusion 117 that has undergone oxidation, nitriding, ammonium salting, or hydrogenation, a situation occurs where the thinning is faster at the corner of the portion 117a of the protrusion 117 facing the trench 115. Alternatively, the semiconductor layer 113 is located near the opening of the trench 115 (i.e., the opening of the trench 115 on the side away from the substrate 112), where the semiconductor layer 113 thins faster. The semiconductor layer 113 that thins faster can be passivated by treating it with SiCl4 or C4F8, which is beneficial for achieving conformal thinning of the semiconductor layer 113.

[0143] Embodiments of this application also provide an electronic device for performing the semiconductor layer thinning method as described in any of the above embodiments.

[0144] For example, the electronic device is a pre-processing device and an etching device. The pre-processing device is used to form a modified layer on the portion 117a of the protrusion 117 of the semiconductor layer 113 facing the trench 115, and the etching device is used to remove the modified layer.

[0145] Example 2 In the above embodiment one, as Figure 1 and Figure 2 As shown, a stacked structure 111 is first formed on one side of the substrate 112. The stacked structure 111 includes alternating semiconductor layers 113 and sacrificial layers 114. Then, as... Figure 5 As shown, the sacrificial layer 114 is replaced with an insulating layer 116, and then a thinning method is performed on the stacked structure 111, which includes alternating insulating layers 116 and semiconductor layers 113. Finally, a gate metal layer 109 and a gate oxide layer 110 are fabricated in the thinned stacked structure 111.

[0146] In other embodiments, a thinning method may also be performed on a stacked structure comprising two alternating material layers (e.g., a semiconductor layer and a sacrificial layer). After the thinning method is completed, the sacrificial layer is replaced with an insulating layer to fabricate a memory cell string. Embodiment 2 will cover this situation, and similarities can be found in the relevant content of Embodiment 1.

[0147] It should be understood that the target of thinning can be set as needed. This application can be used not only for the fabrication of memory cell strings, but also for the fabrication of other semiconductor devices (such as logic chips). Wherever there is a need for thinning, the thinning method provided in this application can be applied.

[0148] like Figure 11 As shown, an embodiment of this application provides a thinning method, which includes step S: forming a conformal first modified layer 401 on the upper and lower surfaces of each first material layer 1130, and selectively removing the first modified layer 401 to thin the multiple first material layers 1130. The implementation and effects of this thinning method can be found in the relevant description of Embodiment 3; the similarities will not be repeated here. Figure 12 As shown, Figure 11 The thinning method shown may include the following steps S1 to S3.

[0149] S1. A stacked structure 111 is provided. The stacked structure 111 is located on one side of the substrate 112, and the stacked structure 111 includes multiple layers of first material layers 1130 stacked together.

[0150] As some implementations, the stacked structure 111 may include alternating first material layers 1130 and second material layers 1140. The first material layer 1130 may be, for example, the semiconductor layer 113 described in Embodiment 1, or other material layers requiring thinning. The material, thickness, and function of the first material layer 1130 can be referred to the description of the semiconductor layer 113 in Embodiment 1. The second material layer 1140 may be the insulating layer 116 described in Embodiment 1, or it may be a semiconductor layer (e.g., a silicon-germanium layer). When the second material layer 1140 is a semiconductor layer, it can be replaced with an insulating layer after the thinning method is completed to fabricate semiconductor devices such as memory cell strings. The thickness of the second material layer 1140 can be referred to the description of the insulating layer 116 in Embodiment 1.

[0151] As one implementation, gaps exist between the individual first material layers 1130. For example, in addition to alternating first material layers 1130 and second material layers 1140, the stacked structure 111 also includes one or more trenches 115 extending through the stacked structure 111. Figure 12 As shown in Figure S1, a trench 115 is illustrated. The trench 115 not only penetrates the stacked structure 111 but also extends along the sidewalls of each of the first material layers 1130. This prevents the portions of the multiple first material layers 1130 facing the trench 115 from contacting each other, i.e., there are gaps between the multiple first material layers 1130. Each first material layer 1130 has a first thickness d3; in orthographic projection onto the substrate 112, the first material layer 1130 can cover the second material layer 1140. In the trench 115, the boundary L2 of the second material layer 1140 and the boundary L1 of the first material layer 1130 have a first spacing d4 in the second direction X. The second direction X is perpendicular to the first direction Y, which is perpendicular to the substrate.

[0152] For example, such as Figure 12 As shown in S1, the first thickness d3 of the first material layer 1130 is greater than the thickness d2 of the second material layer 1140. This thickness setting can result in a stacked structure 111 with a large number of stacked layers.

[0153] For example, the first thickness d3 of the first material layer 1130 is greater than or equal to 20 nm and less than or equal to 100 nm.

[0154] For example, the material of the first material layer 1130 includes at least one of Si, poly-SiGe, Ge, SiN, and indium gallium zinc oxide. Poly-SiGe refers to polycrystalline silicon germanium.

[0155] S2. A modified layer is formed on the portion 117a of the protrusion 117 facing the trench 115. Here, the protrusion 117 is the portion of the first material layer 1130 that does not overlap with the second material layer 1140 in the first direction Y, that is, the portion of the first material layer 1130 that protrudes relative to the second material layer 1140. In the orthographic projection onto the substrate 112, the protrusion 117 is located outside the second material layer 1140. The portion 117a of the protrusion 117 facing the trench 115 may be the portion of the protrusion 117 adjacent to the trench 115, that is, the portion of the first material layer 1130 exposed in the trench 115.

[0156] Since the portion 117a of the protrusion 117 facing the groove 115 forms a modified layer, the structure represented by the portion 117a of the protrusion 117 facing the groove 115 can be understood as a modified layer.

[0157] like Figure 16 As shown, the modified layer may include a first modified layer 401 and a second modified layer 402. The first modified layer 401 is a modified layer located on the upper and lower surfaces of the first material layer 1130, and the second modified layer 402 is a modified layer located on the sidewall of the first material layer 1130. It should be understood that when the modified layer is formed, the first modified layer 401 and the second modified layer 402 are continuous, and the first modified layers 401 and the second modified layers 402 on each surface of the first material layer 1130 are interconnected to form a continuous modified layer.

[0158] For example, the modified layer on the surface of each first material layer 1130 has conformal properties, which means that the first modified layer 401 located on the upper and lower surfaces of each first material layer 1130 has conformal properties. The definition of conformal properties can be found in the relevant introduction on conformal properties in Embodiment 3.

[0159] For example, the modified layers have the same thickness in different directions, that is, the first modified layer 401 and the second modified layer 402 have the same thickness. For example, the first modified layer 401 and the second modified layer 402 may have different thicknesses.

[0160] For example, the thickness of the first modified layer 401 formed on the protrusions 117 at different depths of the trench 115 is consistent.

[0161] For example, the modified layers formed on the protrusions 117 at different depths of the trench 115 have the same thickness. For instance, the first modified layer 401 and the second modified layer 402 formed on the protrusions 117 at different depths of the trench 115 have the same thickness.

[0162] For example, by oxidizing, nitriding, ammonitizing, or hydrogenating the portion 117a of the protrusion 117 facing the trench 115, the material properties of the portion 117a of the protrusion 117 facing the trench 115 are changed to obtain a modified layer. Oxidation, nitriding, ammonitizing, or hydrogenation are self-limiting processing methods, which facilitates achieving uniform modification thickness of the first modified layer 401 in both the horizontal and vertical directions. In some embodiments, the depth to which oxidation, nitriding, ammonitizing, or hydrogenation can be performed along each direction of the protrusion 117 is uniform. Achieving uniform modification thickness of the first modified layer 401 in the horizontal direction means that each of the first modified layers 401 has a uniform thickness in the horizontal direction; uniform modification thickness of the first modified layer 401 in the vertical direction means that the thickness of the first modified layer 401 at different depths in the trench 115 is uniform.

[0163] For details regarding the oxidation, nitriding, ammonium salting, or hydrogenation treatment of the portion 117a of the protrusion 117 facing the groove 115, please refer to the subsequent description; it will not be elaborated here.

[0164] S3. Selectively remove the first modified layer 401 of the protrusion 117 to obtain a protrusion 117 with a second thickness d5, where the second thickness d5 is less than the first thickness d3. Here, selectively removing the first modified layer 401 means minimizing damage to the first material layer 1130 during the removal of the first modified layer 401. In some embodiments, during the selective removal of the first modified layer 401 on the upper and lower surfaces of the first material layer 1130, the second modified layer 402 located on the sidewall of the first material layer 1130 is also removed.

[0165] For example, the etching selectivity ratio of the first modified layer 401 to the first material layer 1130 is greater than or equal to 20, where the etching selectivity ratio refers to the ratio of the removal rates of different materials during the etching process. An etching selectivity ratio of 20 to 20 is beneficial for the removal of the first modified layer 401 and causes less damage to the first material layer during the removal of the first modified layer 401.

[0166] For example, removing the first modified layer 401 of the protrusion 117 is equivalent to removing the portion 117a of the protrusion 117 that has undergone oxidation, nitriding, ammoniation, or hydrogenation treatment. Oxidation, nitriding, ammoniation, or hydrogenation treatment can fix the peeling of several atomic layers of the protrusion 117 each time, thereby allowing precise control over the etching rate and morphology of the protrusion 117.

[0167] For example, the method for removing the first modified layer 401 of the protrusion 117 includes wet removal. For example, wet removal includes removing the first modified layer 401 using one or more of dilute hydrofluoric acid (DHF), a mixture of hydrofluoric acid and ammonium fluoride (Buffered Oxide Etch, BOE), and hot phosphoric acid.

[0168] For example, the method for removing the first modified layer 401 of the protrusion 117 includes dry removal. For example, dry removal includes removing the first modified layer 401 using one or more of nitrogen trifluoride (NF3), ammonia (NH3), nitrogen (N2), argon (Ar), hydrogen fluoride (HF), fluorine (F2), and helium (He).

[0169] For example, the second thickness d5 ranges from 5nm to 20nm. For instance, the second thickness d5 can be 5nm, 8nm, 9nm, 10nm, 12nm, 14nm, 15nm, 17nm, or 20nm, etc., and there is no limitation here.

[0170] For example, after removing the first modified layer 401 of the protrusion 117, the boundary L2 of the second material layer 1140 and the boundary L1 of the first material layer 1130 have a second spacing d6 in the second direction X; wherein, the difference between the first spacing d4 and the second spacing d6 is equal to half the difference between the first thickness d3 and the second thickness d5, that is, d4-d6=(d3-d5) / 2, that is, the thickness of the portion 117a removed from the protrusion 117 is consistent along all directions of the protrusion 117. After the first material layer 1130 is thinned, the size changes, but the structure at the corner of the first material layer 1130 remains unchanged, for example, it is still a right angle.

[0171] After the first modified layer 401 is removed, in the trench 115, the boundary L2 of the second material layer 1140 and the boundary L1 of the first material layer 1130 have a second spacing d6 in the second direction X; wherein, the difference between the first spacing d4 and the second spacing d6 is equal to half of the difference between the first thickness d3 and the second thickness d5.

[0172] Furthermore, by first forming a first modified layer 401 on the portion 117a of the protrusion 117 facing the groove 115, and then removing the first modified layer 401, the first material layer 1130 is thinned through a two-step process, so that the thinning thickness of the first material layer 1130 at different depths in the groove 115 is consistent.

[0173] Therefore, in the embodiments of this application, the first modified layer 401 of the protrusion 117 is removed through the above steps S1~S3 to reduce the thickness of the protrusion 117, thereby increasing the space of the groove 115 and thus reserving sufficient operating space for subsequent processes in the groove 115.

[0174] In some embodiments, such as Figure 12 As shown, the portion 117a of the protrusion 117 facing the groove 115 is oxidized by gas oxidation or liquid oxidation.

[0175] For example, the gas oxidation method includes forming an oxide or nitrogen oxide on the portion 117a of the protrusion 117 facing the groove 115 using any one of oxygen plasma, oxygen free radical, ultraviolet light, oxygen, ozone and HNO3 gas.

[0176] For example, oxygen plasma or oxygen free radicals can be provided using inductively coupled plasma technology, capacitively coupled plasma technology, remote plasma source technology, remote plasma unit technology, or in-situ steam generation oxidation technology.

[0177] For example, the material of the first material layer 1130 is Si. After oxidation treatment, the portion 117a of the protrusion 117 facing the trench 115 is formed of silicon oxide or silicon oxynitride.

[0178] For example, before oxidizing, nitriding, ammoniting, or hydrogenating the portion 117a of the protrusion 117 facing the groove 115, the method further includes placing the stacked structure 111 into a cavity of the cavity device, the cavity having a showerhead configured to divert gas. For example, the distance between the stacked structure 111 and the showerhead ranges from 100 mil to 4000 mil.

[0179] For example, the cavity device can be a single-cavity device or a dual-cavity device.

[0180] For example, oxygen plasma is used to form oxides or oxynitrides on the portion 117a of the protrusion 117 facing the trench 115, satisfying the following conditions: the power range of the cavity device is 1500W~2000W. For example, the gas pressure is 1.5 torr and the temperature is 250°C, and the thickness of the first modified layer 401 formed is about 1.8nm.

[0181] For example, oxygen free radicals are used to form oxides or oxynitrides on the portion 117a of the protrusion 117 facing the trench 115, satisfying the following conditions: the gas pressure range is 1 torr to 5 torr, and the substrate temperature range is 250°C to 600°C.

[0182] For example, in the cavity of the cavity device, the gas flow rate ranges from 2 sccm to 200 sccm, and the oxidation treatment time ranges from 30 s to 500 s.

[0183] For example, oxygen plasma, oxygen radicals, oxygen, ozone, or HNO3 gas are loaded by a carrier gas, which includes at least one of Ar and He.

[0184] Oxides or nitrogen oxides are formed on the portion 117a of the protrusion 117 facing the groove 115 by oxygen plasma, oxygen free radicals, oxygen, ultraviolet light, ozone or HNO3 gas, so that the portion 117a can be removed in the subsequent removal step. The uniformity and thickness of oxidation of the protrusion 117 (mainly the upper and lower surfaces of the protrusion 117) in the groove 115 can be controlled by temperature, gas pressure, gas flow rate, spacing between the stacked structure 111 and the shower head, power, processing time and carrier gas selection. In conjunction with the subsequent removal step of the portion 117a of the protrusion 117 facing the groove 115, the shape-preserving thinning of the protrusion 117 of the first material layer 1130 is achieved.

[0185] In some embodiments, such as Figure 12 As shown, the liquid oxidation method includes: using HNO3 solution, H2SO4 solution, ozone water or H2O2 to form oxides or nitrogen oxides on the portion of the protrusion 117 facing the groove 115.

[0186] For example, the concentration ranges of HNO3 solution, H2SO4 solution, ozone water, and H2O2 are 1% to 50%, respectively; and the temperature ranges are 0℃ to 100℃.

[0187] By using HNO3 solution, H2SO4 solution, ozone water, or H2O2 to form oxides or nitrogen oxides on the portion of the protrusion 117 facing the groove 115, the subsequent removal step can remove this portion 117a. The uniformity and thickness of the oxidation of the protrusion 117 (mainly the upper and lower surfaces of the protrusion 117) in the groove 115 can be controlled by selecting the solution concentration and temperature. Combined with the subsequent removal step of the portion 117a of the protrusion 117 facing the groove 115, the shape-preserving thinning of the protrusion 117 of the first material layer 1130 can be achieved.

[0188] In some embodiments, such as Figure 13 As shown, the portion 117a of the protrusion 117 facing the groove 115 is nitrided, including nitriding the portion 117a of the protrusion 117 facing the groove 115 using nitrogen plasma or nitrogen free radicals.

[0189] For example, nitrogen plasma or nitrogen radicals can be provided through inductively coupled plasma technology, capacitively coupled plasma technology, remote plasma source technology, remote plasma unit technology, or decoupled plasma nitriding technology.

[0190] For example, a nitride layer having nitrogen plasma, nitrogen free radicals or nitrogen dangling bonds is formed on the portion 117a of the protrusion 117 facing the trench 115 by nitrogen plasma or nitrogen free radicals.

[0191] For example, the gas pressure range for nitriding the portion 117a of the protrusion 117 facing the groove 115 is 1 torr to 20 torr; the processing time ranges from 10s to 500s; and the power of the cavity device ranges from 200W to 3000W.

[0192] By nitriding the portion 117a of the protrusion 117 facing the groove 115 using nitrogen plasma or nitrogen free radicals, the portion 117a can be removed in subsequent removal steps. The uniformity and thickness of the oxidation of the protrusion 117 in the groove 115 can be controlled by selecting the gas pressure, treatment time and power. Combined with the subsequent removal step of the portion 117a of the protrusion 117 facing the groove 115, the shape-preserving thinning of the protrusion 117 of the first material layer 1130 can be achieved.

[0193] In some embodiments, such as Figure 14 As shown, the portion 117a of the protrusion 117 facing the groove 115 is hydrogenated, including: hydrogenating the portion 117a of the protrusion 117 facing the groove 115 with hydrogen plasma.

[0194] For example, hydrogen plasma is used to hydrogenate the portion 117a of the protrusion 117 facing the groove 115, satisfying the following conditions: gas pressure range of 1 torr to 30 torr; processing time range of 5s to 100s; cavity device power range of 20W to 1000W.

[0195] For example, in the cavity of the cavity device, the gas pressure ranges from 1 to 5 torr, the hydrogenation treatment time is from 20 to 45 seconds, and the cavity device power is from 50W to 100W.

[0196] By using hydrogen plasma to hydrogenate the portion 117a of the protrusion 117 facing the trench 115, the portion 117a can be removed in the subsequent removal step. The uniformity and thickness of the oxidation of the protrusion 117 in the trench 115 can be controlled by selecting the gas pressure, processing time and power. Combined with the subsequent removal step of the portion 117a of the protrusion 117 facing the trench 115, the shape-preserving thinning of the protrusion 117 of the first material layer 1130 can be achieved.

[0197] In some embodiments, such as Figures 12-14As shown, removing the first modified layer 401 includes: removing the first modified layer 401 using HF vapor, satisfying the following conditions: gas pressure range of 10 mtorr to 20 torr; gas flow rate range of 2 sccm to 500 sccm; temperature range of -40℃ to 200℃.

[0198] By selecting the ratio of water volume to HF volume, gas pressure, gas flow rate, and temperature, the portion 117a of the protrusion 117 that has undergone oxidation, nitriding, or hydrogenation treatment can be removed to obtain a first material layer 1130 with uniformly reduced thickness, thereby achieving shape-preserving thinning of the protrusion 117 of the first material layer 1130.

[0199] In some embodiments, such as Figure 14 As shown, a first modified layer 401 is formed on the portion 117a of the protrusion 117 facing the groove 115. Removing the first modified layer 401 includes: hydrogenating and removing the portion 117a of the protrusion 117 facing the groove 115 using at least one of the following gas compositions: NF3 and He, NF3 and Ar, NF3, NH3 and He, NF3, NH3 and Ar, NF3+H2+He, NF3+H2+Ar.

[0200] In other words, the hydrogenation and removal of the portion 117a of the protrusion 117 facing the groove 115 can be completed simultaneously, and the portion 117a of the protrusion 117 facing the groove 115 is removed at the same time as hydrogenation.

[0201] By using at least one of the following compositions: NF3 and He, NF3 and Ar, NF3, NH3 and He, NF3, NH3 and Ar, NF3+H2+He, NF3+H2+Ar, the portion 117a of the protrusion 117 facing the groove 115 can be hydrogenated and the hydrogenated portion can be removed at the same time to obtain a first material layer 1130 with uniformly reduced thickness.

[0202] In some embodiments, such as Figure 12 As shown, a first modified layer 401 is formed on the portion 117a of the protrusion 117 facing the groove 115. Removing the first modified layer 401 includes using a physical bombardment method. The physical bombardment method satisfies the following conditions: the gas used includes any one of Ar ions, He ions, N ions, and O ions; the power range is 50W to 5000W; and the bias voltage range is 0V to 1000V.

[0203] The portion 117a of the protrusion 117 facing the groove 115 is removed by physical bombardment.

[0204] In some embodiments, such as Figure 13As shown, the ammonium salt treatment of the portion 117a of the protrusion 117 facing the groove 115 includes: forming a nitride on the portion 117a of the protrusion 117 facing the groove 115 using nitrogen plasma or nitrogen free radicals, performing ammonium salt treatment on the portion 117a of the protrusion 117 that has formed the nitride, and forming an ammonium salt on the portion 117a of the protrusion 117 facing the groove 115.

[0205] For example, the gases used for ammonium salting treatment of the portion 117a of the protrusion 117 that forms a nitride include: NF3 and NH3, NF3, NH3 and Ar, NF3, NH3 and He, CH2F2, or CHF3.

[0206] By forming a nitride on the portion 117a of the protrusion 117 facing the groove 115, and then subjecting the nitride-formed portion 117a of the protrusion 117 to ammonium salt treatment, the portion 117a of the protrusion 117 facing the groove 115 is formed into an ammonium salt, so that the portion 117a can be removed in subsequent removal steps.

[0207] In some embodiments, such as Figure 13 As shown, removing the ammonium-treated portion 117a of the protrusion 117 includes: removing the ammonium-treated portion 117a of the protrusion 117 using a temperature sublimation process; the temperature range for removing the ammonium-treated portion 117a of the protrusion 117 using the temperature sublimation process is 160℃~300℃.

[0208] For example, the temperature at which the ammonium salt portion 117a of the protrusion 117 is removed by the sublimation process is 160℃, 170℃, 180℃, 190℃, 200℃, 210℃, 220℃, 230℃, 240℃, 250℃, 260℃, 270℃, 280℃, 290℃ or 300℃, etc., and there is no limit here.

[0209] The portion 117a of the protrusion 117 that has undergone ammonium salting can be removed by a temperature sublimation process, resulting in a first material layer 1130 with uniformly reduced thickness.

[0210] In other embodiments, by changing the process parameters for oxidizing, nitriding, ammonitizing, or hydrogenating the portion 117a of the protrusion 117 facing the trench 115, and the process parameters for removing the portion 117a of the protrusion 117 that has undergone oxidation, nitriding, ammonitizing, or hydrogenation, the first material layer 1130 located in the same trench 115 can have different second thicknesses d5.

[0211] For example, in the same trench 115, the second thickness d5 of the first material layer 1130 gradually increases as the depth of the trench 115 increases. Alternatively, in the same trench 115, the second thickness d5 of the first material layer 1130 gradually decreases as the depth of the trench 115 increases.

[0212] In some embodiments, such as Figure 13 As shown, after removing the portion 117a of the protrusion 117 that has undergone oxidation, nitriding, ammonium salting, or hydrogenation treatment, the method further includes passivating the surface of the protrusion 117 using SiCl4 or C4F8.

[0213] For example, by oxidizing, nitriding, ammonitizing or hydrogenating the portion 117a of the protrusion 117 facing the trench 115, and removing the portion 117a of the protrusion 117 that has undergone oxidation, nitriding, ammonitizing or hydrogenation, a situation occurs where the thinning is faster at the corner of the portion 117a of the protrusion 117 facing the trench 115. Alternatively, the first material layer 1130 is located near the opening of the trench 115 (i.e., the opening of the trench 115 on the side away from the substrate 112), where the first material layer 1130 thins faster. The first material layer 1130 that thins faster can be passivated by treating it with SiCl4 or C4F8, which is beneficial for achieving conformal thinning of the first material layer 1130.

[0214] In some embodiments, such as Figure 12 As shown, the stacked structure 111 includes: an alternately arranged first material layer 1130 and a second material layer 1140, and a plurality of trenches 115 penetrating the stacked structure 111; the first material layer 1130 has a first thickness d3; wherein, in a positive projection onto the substrate 112, the first material layer 1130 covers the second material layer 1140, and in the trenches 115, the boundary L2 of the second material layer 1140 and the boundary L1 of the first material layer 1130 have a first spacing d4 in the second direction X; the second direction X is perpendicular to the first direction Y.

[0215] In some embodiments, multiple thinning cycles are performed, each thinning cycle including: forming a conformal first modified layer 401 on the upper and lower surfaces of each first material layer 1130 and selectively removing the first modified layer 401.

[0216] The following will introduce some examples of parameter settings for shape preservation and selectivity in thinning methods. The specific effects will be described in detail in Example 3. Please refer to the relevant description in Example 3.

[0217] In some embodiments, in each thinning cycle, a conformal first modified layer 401 is formed on the upper and lower surfaces of each first material layer 1130. After multiple thinning cycles, it is assumed that the first modified layers 401 formed in each of the multiple thinning cycles are superimposed to form a modified portion 118. The modified portion 118 satisfies the following: the ratio of the minimum thickness of the modified portion 118 to the maximum thickness of the modified portion 118 is P, P≥(T1-T2×F) / T1; where F is a coefficient reflecting the degree of contribution of the modified portion 118 to the target thinning thickness deviation T2, where T1 is the target thinning thickness of the first material layer 1130; T2 is the target thinning thickness deviation of the first material layer 1130, and the target thinning thickness deviation T2 is the difference requirement between the maximum and minimum thickness of the first material layer 1130 that has been thinned.

[0218] In some embodiments, in each thinning cycle, a conformal first modified layer 401 is formed on the upper and lower surfaces of each first material layer 1130. After multiple thinning cycles, it is assumed that the first modified layers 401 formed in each of the multiple thinning cycles are superimposed to form a modified portion 118, wherein the modified portion 118 satisfies the following: the conformal conformance of the modified portion 118 is greater than or equal to 95% or 98%. The conformal conformance value of the modified portion 118 is the ratio of the minimum thickness of the modified portion 118 to the maximum thickness of the modified portion 118. In some embodiments, each thinning cycle in the multiple thinning cycles satisfies that the conformal conformance of the first modified layer 401 is greater than or equal to 95% or 98%, and the conformal conformance value of the first modified layer 401 is the ratio of the minimum thickness of the first modified layer 401 among the plurality of first modified layers 401 to the maximum thickness of the first modified layer 401.

[0219] In some embodiments, the over-etching amount of the first material layer 1130 is set to be A times the target etching amount, the target thinning thickness of the first material layer 1130 is T1, the target thinning thickness deviation of the first material layer 1130 is T2, and the selective removal of the first modified layer 401 satisfies: the etching selectivity ratio of the first modified layer 401 to the first material layer 1130 is M, M≥A×T1 / (E×T2); where E is a coefficient reflecting the degree of contribution of selective removal to the target thinning thickness deviation T2.

[0220] In some embodiments, selective removal of the first modified layer 401 satisfies the following condition: the etching selectivity ratio of the first modified layer 401 to the first material layer 1130 is greater than or equal to 2.5, 20, 40, 120 or 200.

[0221] Example 3 like Figure 17 , Figure 18 and Figure 19As shown, this application embodiment also provides a semiconductor device 300, which includes one or more transfer platforms 301 and one or more thinning devices 302. The transfer platform 301 is used to transfer wafers to the thinning devices 302. Figure 15 As shown, the wafer has multiple layers of first material 1130 stacked on top of each other. The thinning apparatus 302 is used to form conformal first modification layers 401 on the upper and lower surfaces of each of the first material layers 1130, and selectively remove the first modification layers 401 to thin the multiple layers of first material 1130. The semiconductor device 300 in Embodiment 3 can be used to perform the thinning methods in Embodiments 1 and 2; therefore, relevant details can be referred to in the relevant descriptions of Embodiments 1 and 2.

[0222] In this context, the wafer can be understood as the substrate 112 in the above embodiment 1.

[0223] The transfer platform 301 may include a robotic arm, which transfers the wafer to the thinning device 302 for processing.

[0224] For example, semiconductor device 200 includes a wafer and a stacked structure 111 disposed on the wafer. The stacked structure 111 includes a first material layer 1130 and a second material layer 1140 stacked together. The first material layer 1130 can be a semiconductor layer 113, such as a silicon layer. The second material layer 1140 can be a semiconductor layer or an insulating layer 116. The second material layer 1140 can be used as a sacrificial layer 114, that is, the second material layer 1140 can be the sacrificial layer 114 described in Embodiment 1 above, with a material such as SiGe. A trench 115 penetrating the stacked structure 111 is provided on the stacked structure 111. The portion of the first material layer 1130 located in the trench 115 is used to form a channel region of a transistor. A gate metal layer 109 and a gate oxide layer 110 can be fabricated around the channel region.

[0225] like Figure 16As shown, conformality, also known as shape retention, refers to the ratio of the minimum thickness to the maximum thickness of the multiple first modified layers 401 (for example, the multiple first modified layers 401 are respectively represented as first modified layer 4011, first modified layer 4012, first modified layer 4013, first modified layer 4014 and first modified layer 4015) corresponding to the upper and lower surfaces of each first material layer 1130, which is as close as possible to 1 (for example, greater than or equal to 70%, 80%, 90%, 95%, 98%, etc.). A single first modified layer 401 (e.g., first modified layer 4011) may be uneven, resulting in inconsistent thickness measurements at different locations. The thicknesses of multiple first modified layers 401 may also differ; for example, the thicknesses of first modified layers 4011, 4012, 4013, 4014, and 4015 may also be different. By ensuring the conformability value of the first modified layer 401 is as close to 1 as possible, it is beneficial to guarantee thickness consistency at different locations within the first modified layer 401 itself (i.e., horizontal thickness consistency) and thickness consistency among multiple first modified layers 401 (i.e., vertical thickness consistency). The conformability will be further explained below in conjunction with the conformability values ​​of the modified portion and the first modified layer 401.

[0226] Selective removal refers to minimizing damage to the first material layer 1130 during the removal of the first modified layer 401. The requirements for etching selectivity will be described later with reference to specific embodiments.

[0227] In the above embodiments, the thinning device 302 can form a conformal first modified layer 401 on the upper and lower surfaces of each first material layer 1130, which helps to ensure the thickness consistency of the first modified layer 401 on the upper and lower surfaces of each first material layer 1130 in both the horizontal and vertical directions. The thinning device 302 can selectively remove the first modified layer 401, which helps to reduce damage to the first material layer 1130 during the removal of the first modified layer 401, and can achieve uniformity in the thinning of each first material layer 1130. By combining conformal modification and selective removal, it is beneficial to achieve uniformity in thinning in both the horizontal and vertical directions.

[0228] In some embodiments, such as Figure 17 , Figure 18 and Figure 19 As shown, the thinning device 302 is configured to perform multiple thinning cycles, each of which includes: forming a shape-preserving first modified layer 401 on the upper and lower surfaces of each first material layer 1130 and selectively removing the first modified layer 401.

[0229] For example, in the initial stage of thinning, the first material layer 1130 is relatively thick, the gap between adjacent first material layers 1130 is small, the process space for modification and removal is limited, and the removal of the first modified layer 401 may generate solid etching byproducts, which may increase the thickness of the first material layer 1130. Therefore, the amount of thinning in a single cycle may not be able to achieve the target thinning thickness of the first material layer 1130. By executing multiple thinning cycles, it is beneficial to achieve the target thinning thickness of the first material layer 1130.

[0230] In some embodiments, such as Figure 20 As shown, in each thinning cycle, the thinning device 302 forms a conformal first modified layer 401 on the upper and lower surfaces of each first material layer 1130. After multiple thinning cycles, it is assumed that the first modified layers 401 formed in each of the multiple thinning cycles are superimposed to form a modified portion 118. It should be understood that since the modified layer is removed, the previous first modified layer 401 has been removed before the next first modified layer 401 is formed. Therefore, multiple first modified layers 401 do not actually superimpose to form a modified portion 118. That is, the modified portion 118 is not a real entity, but a virtual concept used to reflect the combined effect of multiple rounds of modification in the multiple thinning cycles. The ratio of the minimum thickness h1 to the maximum thickness h2 of the modified portion 118 is the conformal value P of the modified portion 118. The following is a method for calculating the shape retention value P of the modified part 118. For example, if the minimum thickness of the modified part 118 is 9 nm and the maximum thickness of the modified part 118 is 10 nm, then the shape retention value P of the modified part 118 is 90%.

[0231] In some implementations, the modified part 118 satisfies: P ≥ (T1 - T2 × F) / T1. Here, F is a coefficient reflecting the degree to which the modified part 118 contributes to the target thinning thickness deviation T2. ​​T1 is the target thinning thickness of the first material layer 1130. T2 is the target thinning thickness deviation of the first material layer 1130, and the target thinning thickness deviation T2 is the required difference between the maximum and minimum values ​​of the thinned thickness of the first material layer 1130.

[0232] For example, the sharing of the target thinning thickness deviation T2 includes two parts: the target thinning thickness deviation shared by the modification section 118 and the target thinning thickness deviation shared by the selective removal of the modification section 118. When the target thinning thickness deviation shared by the modification section 118 and the target thinning thickness deviation shared by the selective removal of the modification section 118 are the same, each shares 1 / 2, and in this case, the value of F is 1 / 2. When the modification section 118 shares all the target thinning thickness deviation, the value of F is 1. The coefficient F of the degree of sharing of the target thinning thickness deviation T2 by the modification section 118 represents the coefficient of the degree of sharing of the target thinning thickness deviation T2 by the multiple rounds of modification processes.

[0233] The target thickness reduction is T1, therefore the target thickness of the modified part 118 is T1 × f, where f is the ratio of the thickness of the modified part 118 after modification to the thickness of the modified part 118 before modification. Changes in the material after modification will alter the thickness. For example, if the original material is silicon (Si), and 1 nm of Si is oxidized to silicon dioxide (SiO2), the thickness will be approximately 1.84 nm, and f will be 1.84. Different methods produce SiO2 with different densities, thus affecting the value of f. Since the target thickness of the modified part 118 is T1×f, and the shape preservation value of the modified part 118 is P, the minimum thickness of the modified part 118 is T1×f×P; the target thinning thickness deviation shared by the modified part 118 is T2×F, so the target thickness deviation of the modified part 118 is T2×F×f. Therefore, the actual thickness deviation of the modified part 118, T1×f-T1×f×P, is less than or equal to T2×F×f. Thus, P≥(T1-T2×F) / T1.

[0234] Since the target thickness of the modified part 118 is T1×f, and the shape preservation value of the modified part 118 is P, the maximum thickness of the modified part 118 is T1×f / P; the thickness reduction deviation is T2×F, therefore the target thickness deviation of the modified part 118 is T2×F×f. Thus, the actual thickness deviation of the modified part 118, T1×f / P-T1×f, is less than or equal to T2×F×f, therefore P≥T1 / (T1+T2×F). Since (T1-T2×F) / T1<T1 / (T1+T2×F), P≥(T1-T2×F) / T1 is sufficient.

[0235] In the above embodiment, by controlling P≥(T1-T2×F) / T1, the larger P is, the closer the minimum and maximum thickness of the modified part 118 are, and the higher the conformity, thereby improving the thickness uniformity of the first material layer 1130.

[0236] In some embodiments, in each thinning cycle, the thinning device 302 forms a shape-preserving first modified layer 401 on the upper and lower surfaces of each first material layer 1130. After multiple thinning cycles, it is assumed that the first modified layers 401 formed in each of the multiple thinning cycles are superimposed to form a modified portion 118, which satisfies the following condition: the shape preservation value of the modified portion 118 is greater than or equal to 95% or 98%. The shape preservation value of the modified portion 118 is the ratio of the minimum thickness of the modified portion 118 to the maximum thickness of the modified portion 118.

[0237] For example, in the stacked structure 111, the thinning thickness of the first material layer 1130 ranges from 20nm to 30nm, and the target thinning thickness deviation T2 of the first material layer 1130 is 1nm to ensure the performance consistency of the semiconductor device 200. Modification and selective removal of the first material layer 1130 will both cause uneven channel thickness. Assuming that modification accounts for half of the target thinning thickness deviation T2, the thickness deviation of the first material layer 1130 caused by modification needs to be less than or equal to 0.5nm. Assuming that modification accounts for the entire deviation, the thickness deviation of the first material layer 1130 caused by modification needs to be less than or equal to 1nm. Taking the requirement that the target thinning thickness deviation T2 of the first material layer 1130 needs to be less than or equal to 1nm as an example, when the target thinning thickness T1 of the first material layer 1130 is 20nm, the conformality of the modified portion is greater than or equal to 95% (19nm / 20nm). Taking the target thinning thickness deviation T2 of the first material layer 1130 as an example, when the target thinning thickness T1 of the first material layer 1130 is 30nm, the conformability of the modified part 118 is greater than or equal to 98% (29.5nm / 30nm).

[0238] In some embodiments, each thinning cycle in the multi-round thinning cycle satisfies that the conformability of the first modified layer 401 is greater than or equal to 95% or 98%, and the conformability of the first modified layer 401 is the ratio of the minimum thickness of the first modified layer 401 among the multiple first modified layers 401 to the maximum thickness of the first modified layer 401. Forming a highly conformable first modified layer 401 in each thinning cycle is beneficial for further improving thinning uniformity. The following describes a method for calculating the conformability of the first modified layer 401. For example, the thickness of the first modified layer 401 on the upper and lower surfaces of each first material layer 1130 is inconsistent, and the thickness of the first modified layer 401 on the upper and lower surfaces of a single first material layer 1130 is also inconsistent at different locations. If the minimum thickness of the first modified layer 401 among the multiple first modified layers 401 is 9.5 nm and the maximum thickness of the first modified layer 401 is 10 nm, then the conformability of the first modified layer 401 is 95%. It should be understood that the conformability value of the modified section mentioned above can reflect the comprehensive effect of multiple rounds of modification in multiple thinning cycles. Here, the conformability value of the first modified layer 401 can reflect the modification effect of a single thinning cycle.

[0239] In some embodiments, in the multi-round thinning process, there are at least two thinning cycles that satisfy the condition that the thickness of the first modified layer 401 in the preceding thinning cycle is less than the thickness of the first modified layer 401 in the subsequent thinning cycle.

[0240] In the initial stage of thinning, the first material layer 1130 is relatively thick, and the gap between adjacent first material layers 1130 is small. At this time, due to the small space, the thickness of the first material layer 1130 is small. As the thinning process proceeds, the gap between adjacent first material layers 1130 becomes larger. At this time, the amount of thinning of the first material layer 1130 in one cycle of thinning process can be increased to improve process efficiency.

[0241] In some embodiments, the over-etching amount of the first material layer 1130 is set to be A times the target etching amount (for example, A is 0.3), the target thinning thickness of the first material layer 1130 is T1, and the target thinning thickness deviation of the first material layer 1130 is T2. The selective removal of the first modified layer 401 satisfies the following: the etching selectivity ratio between the first modified layer 401 and the first material layer 1130 is M, where M ≥ A × T1 / (E × T2). Here, E is a coefficient reflecting the degree to which selective removal contributes to the target thinning thickness deviation T2.

[0242] For example, the target thinning thickness deviation T2 is comprised of two parts: the target thinning thickness deviation shared by the first modified layer 401 and the target thinning thickness deviation shared by the selective removal of the first modified layer 401. When the modification does not introduce any inhomogeneity and the thinning inhomogeneity is completely shared by the selective removal, E is 1; when the modification and selective removal each share half of the inhomogeneity, E is 1 / 2.

[0243] For example, in the i-th round of modification, the first modified layer 401 has a thickness morphology T. i Thickness morphology refers to the distribution of thickness at different locations. The thickness morphology of the modified part 118 is ∑T i That is, multiple modified thickness morphology superposition; i=1, 2, 3...n, n is a positive integer, n represents the number of thinning cycles.

[0244] Because multi-layered first material structures with stacked configurations tend to form high aspect ratio structures, and these structures exhibit inconsistent etching rates in the vertical direction, with the top etching rate being higher than the bottom etching rate. By setting an over-etching level, the etching effect at the deeper bottom can be ensured.

[0245] like Figure 15 The diagram illustrates the removal of the first modified layer 401 in the (m-1)th round and the removal of the first modified layer 401 in the mth round. Taking the removal of the first modified layer 401 in the mth round as an example, the thickness of the first modified layer 401 removed is denoted as Tm. Because high aspect ratio structures have different etching rates in the vertical direction, when the top first modified layer 401 is completely removed, there is still a residual thickness Tmx of the first modified layer 401 at the bottom. To ensure that the bottom first modified layer 401 is removed more thoroughly, further etching is required. The ratio of the over-etching amount to the target etching amount is A≈Tmx / (Tm-Tmx).

[0246] The etching selectivity ratio M between the first modified layer 401 and the first material layer 1130 is the ratio of the thickness removed from the first modified layer 401 to the etching thickness of the first material layer 1130 when both layers are exposed under the same etching process conditions. A×T1 reflects the amount of over-etching; that is, when the thickness T1 of the top first modified layer 401 is just completely removed, continuing with the same etching amount will completely remove the thickness T1 of the bottom first modified layer 401. After the top first modified layer 401 is completely removed, the top first material layer 1130 is exposed under the etchant. When the etching amount A×T1 is continued at the bottom, the loss of the top first material layer 1130 is A×T1 / M, which is the thickness deviation of the first material layer 1130. Therefore, A×T1 / M≤E×T2, and thus M≥A×T1 / (E×T2). Thus, by controlling M≥A×T1 / (E×T2), the loss of the first material layer at the top is reduced, thereby improving the thickness uniformity of the first material layer. The etching selectivity ratio of the thinning device 302 for the first modified layer 401 and the first material layer 1130 can allow the etching to stop at the interface between the first modified layer 401 and the first material layer 1130. When the etching process of the first modified layer 401 is completed at the bottom of the trench 115 where the etching rate is relatively slow, the damage to the first material layer 1130 is less at the top of the trench 115 where the etching rate is relatively fast. Therefore, the etching uniformity of the first material layer 1130 at different positions in the vertical direction of the trench 115 can be achieved.

[0247] In some embodiments, the selective removal of the first modified layer 401 satisfies the following condition: the etching selectivity ratio of the first modified layer 401 to the first material layer 1130 is greater than or equal to 2.5, 20, 40, 120 or 200.

[0248] Thus, the thinning device 302 has a high selective etching capability. The etching selectivity of the thinning device 302 for the first modified layer 401 and the first material layer 1130 can stop the etching at the interface between the first modified layer 401 and the first material layer 1130. When the etching process of the first modified layer 401 is completed at the bottom of the trench 115 where the etching rate is relatively slow, the first material layer 1130 is less damaged at the top of the trench 115 where the etching rate is relatively fast. Therefore, the etching uniformity of the first material layer 1130 at different positions in the vertical direction of the trench 115 can be achieved.

[0249] For example, to thoroughly remove the first modified layer 401, the over-etching amount is set to a minimum of A=0.3, and the minimum possible target thinning thickness of the first material layer 1130 is set to T1=15nm; all non-uniformity indicators are etched, and the maximum possible target thinning thickness deviation T2 is 2nm; then the etching selection ratio of the first modified layer 401 to the first material layer 1130 is M=0.3×15 / 2=2.5:1. M greater than 2.5 (e.g., 20, 40, 120, 200 or others) can result in better process performance.

[0250] For example, in order to more thoroughly remove the first modified layer 401 at the bottom of the stacked structure 111, it is necessary to over-etch by 1 to 2 times. The thinning range of the first material layer 1130 of the semiconductor device is, for example, 20 nm to 30 nm. Therefore, the over-etching amount is at least 20 nm to 60 nm, and the target thinning thickness deviation T2 of the first material layer 1130 must be less than or equal to 1 nm to ensure the performance consistency of the semiconductor device. Both modification and etching will cause unevenness in the thickness of the first material layer 1130. Assuming that modification and etching each account for half of the index, the thickness deviation of the first material layer 1130 caused by modification / etching must be less than or equal to 0.5 nm. When the over-etching amount is 20nm, the thickness uniformity deviation of the first material layer 1130 at the top is less than or equal to 0.5nm, then the etching selectivity ratio of the first modified layer 401 to the first material layer 1130 is greater than or equal to 40:1 (20 / 0.5). When the over-etching amount is 60nm, the thickness uniformity deviation of the first material layer 1130 at the top is less than or equal to 0.5nm, then the etching selectivity ratio of the first modified layer 401 to the first material layer 1130 is greater than or equal to 120:1 (60 / 0.5).

[0251] In some embodiments, the thickness of the first modified layer 401 is less than or equal to 20 nm.

[0252] The thickness of the first modified layer 401 can be adjusted within a range of less than or equal to 20nm. The target thickness of the first modified layer 401 can be set according to the requirements, and the etching amount of the first material layer 1130 can be precisely controlled to improve the average etching amount per pass and increase the yield of the semiconductor device 300.

[0253] The following describes an example of how the thinning device 302 is implemented using a combination of multiple chambers, with reference to some embodiments.

[0254] In some embodiments, such as Figure 17 and Figure 19As shown, the thinning device 302 includes at least one first modification chamber 3021 and at least one removal chamber 3022; the first modification chamber 3021 is used to form a conformal first modification layer 401 on the upper and lower surfaces of each first material layer 1130, and the removal chamber 3022 is used to selectively remove the first modification layer 401.

[0255] The first modification chamber 3021 can be a chamber with conformal surface modification capabilities, used to perform modification processes on the first material layer 1130, and the removal chamber 3022 can be configured as a chamber with high selectivity etching capability.

[0256] The process is as follows: The wafer is transferred to the first modification chamber 3021 via the transfer platform 301 for conformal modification. After the surface modification of the first material layer 1130 on the wafer is completed, the transfer platform 301 transfers the wafer to the removal chamber 3022 to remove the first modified layer 401. The modification and removal of the first material layer 1130 can be performed cyclically by using multiple sets of first modification chambers 3021 and removal chambers 3022, or by cyclically transferring the wafer between the first modification chambers 3021 and removal chambers 3022, until the target thinning thickness of the first material layer 1130 is achieved.

[0257] Since the first modification chamber 3021 is a conformal surface modification process chamber, the resulting first modified layer 401 has a uniform thickness, thus achieving thickness consistency in both the horizontal and vertical directions. Because the removal chamber 3022 is a process chamber that selectively etches the first modified layer 401, it causes less damage to the first material layer 1130 during the removal of the first modified layer 401, ensuring thickness consistency in the vertical direction. In summary, uniform thinning of each first material layer 1130 can be achieved.

[0258] It should be noted that, in Figure 17 , Figure 18 and Figure 19 The location and number of chambers can be set as needed. These diagrams are only examples, and the actual chamber locations in the equipment configuration may differ from those shown. The transmission platform 301 is also just an example, and there is no limit to the number of chambers or the transmission platform 301.

[0259] The functions of the first modified chamber 3021 and the removed chamber 3022, as well as the operation of the semiconductor device, are described below with reference to some embodiments.

[0260] In some embodiments, such as Figure 17 and Figure 22 As shown, the transfer platform 301 transfers the wafer to the first modification chamber 3021 for a conformal modification process. It should be understood that... Figures 22 to 26 and Figures 29 to 32 All steps involving the formation of the modified layer can employ conformal modification processes, ensuring that the conformal values ​​of the first modified layer on both the upper and lower surfaces of the first material layer are close to 1. After the surface modification process of the first material layer 1130 on the wafer is completed, the transfer platform 301 then transfers the wafer to the removal chamber 3022 to remove the first modified layer 401. It is then determined whether the target thinning thickness has been achieved; if yes, the process ends; otherwise, it returns to the modification steps. Figure 22 In the phrase "modifying a portion of the first material layer into a modified layer", "a portion" can refer to the part of the first material layer exposed in the trench.

[0261] In some embodiments, such as Figure 17 and Figure 19 As shown, the first modified chamber 3021 also has a heat treatment function for driving the surface modification reaction of the first material layer 1130.

[0262] In some embodiments, Figure 17 and Figure 19 As shown, the first modified chamber 3021 is used for the selective removal of etching byproducts generated during the thermal decomposition of the first modified layer 401.

[0263] In the above embodiments, the first modified chamber 3021 also has a heat treatment function, which is suitable for scenarios where removing the first modified layer 401 takes longer than the modification, so that the process time for removing the chamber 3022 and the first modified chamber 3021 is comparable, the overall process time is less, and a higher yield can be obtained.

[0264] like Figure 23 As shown, the process of heat treatment in the first modification chamber 3021 is as follows: Process begins; the wafer is transferred into the first modification chamber 3021, and the etching by-products are decomposed by heating (this step is not required for the first entry), and it is determined whether the target thinning thickness has been achieved; if yes, the process ends. If not, a portion of the first material layer 1130 is modified into the first modified layer 401; the wafer is then transferred into the removal chamber 3022, the first modified layer 401 is etched away, and the modification step is performed again. The "this step" in "this step is not required for the first entry" refers to the step of "decomposing the etching by-products by heating." Because the etching removal process has not yet been performed when the wafer first enters the first modification chamber 3021 for modification, no etching by-products have been generated.

[0265] In some embodiments, the removal chamber 3022 also has a heat treatment function for thermally decomposing and selectively removing etching byproducts generated during the removal of the first modified layer 401. This allows for in-situ removal of etching byproducts after the removal of the first modified layer 401, which helps to avoid contaminating the transport platform or other chambers.

[0266] When the removal chamber 3022 also has a heat treatment function, it can thermally decompose the etching byproducts produced during the removal of the first modified layer 401. In this case, both the removal of the first modified layer 401 and the decomposition of the etching byproducts are performed in the removal chamber 3022, which is suitable for scenarios where the removal of the first modified layer 401 takes less time than the modification.

[0267] like Figure 24 As shown, the process of removing the heat treatment function of the removal chamber 3022 is as follows: process starts; the wafer is transferred into the first modification chamber 3021, and a portion of the first material layer 1130 is modified into the first modification layer 401; the wafer is transferred into the removal chamber 3022, the first modification layer 401 is etched away, and the etching byproducts are thermally decomposed in situ; it is determined whether the target thinning thickness has been achieved; if yes, the process ends; if no, the process returns to the modification step.

[0268] Furthermore, by removing the heat treatment function integrated into the chamber 3022 and / or the first modified chamber 3021, the chamber efficiency can be balanced and the equipment yield can be improved.

[0269] In some embodiments, such as Figure 17 , Figure 18 and Figure 19 As shown, the transfer platform is equipped with a cooling module 3011. After the wafer completes the modification process in the first modification chamber, the robot arm transfers the wafer to the cooling module 3011 for cooling. After cooling, the robot arm transfers the wafer to the removal chamber to remove the first modified layer 401. The cooling module 3011 is suitable for scenarios where the modification process is a high-temperature process, while the removal process is a low-temperature process, and in-situ cooling in the removal chamber takes longer. By using or not using the cooling module 3011, the process time in the removal chamber can be adjusted, thereby improving equipment yield.

[0270] like Figure 25 As shown, the process using cooling module 3011 is as follows: Process begins; the wafer is transferred into the first modification chamber 3021, and a portion of the first material layer 1130 is modified into the first modified layer 401; the wafer is transferred into cooling module 3011, and after cooling is completed, the wafer is transferred into the removal chamber to remove the first modified layer 401. It is then determined whether the target thinning thickness has been achieved; if yes, the process ends; if not, the process returns to the modification step.

[0271] It should be noted that the cooling module 3011 is used to cool the wafer. Whether or not to use the cooling module 3011 depends on whether the process requires wafer cooling, and whether in-situ cooling of the wafer within the process chamber would significantly extend the process time, making the corresponding process chamber a yield bottleneck. This is not limited to the above scenarios.

[0272] In some embodiments, such as Figure 15 , Figure 17 and Figure 19 As shown, at least one first modified chamber 3021 includes at least one of a remote plasma oxidation chamber, a remote plasma nitriding chamber, a decoupled plasma oxidation chamber, and a decoupled plasma nitriding chamber.

[0273] By setting specific chamber types, the shape-preserving thinning of the first material layer 1130 can be achieved.

[0274] The structure of the first modified chamber 3021 is described below with reference to some embodiments.

[0275] In some embodiments, such as Figure 27 and Figure 28 As shown, the first modified chamber 3021 includes: a remote plasma source 3211, a conveying component 3212 and a processing chamber 3213 arranged in sequence. The remote plasma source 3211 is used to receive process gas and form plasma. The conveying component 3212 is used to transmit plasma to the processing chamber 3213. The processing chamber 3213 is used to process the wafer using plasma.

[0276] A remote plasma source 3211 is connected to a processing chamber 3213 via a transport component 3212. The inlet of the transport component 3212 is connected to the outlet of the remote plasma source 3211, and the outlet of the transport component 3212 is connected to the air inlet K1 of the processing chamber 3213. The inner surface of the processing chamber 3213 defines a wafer processing area S1. The processing chamber 3213 is also provided with a transfer port K2, which is positioned opposite to the air inlet K1 of the processing chamber 3213. The transfer port K2 of the processing chamber 3213 is connected to a transfer platform 301. The wafer is transferred between the processing chamber 3213 and the transfer platform 301 through the transfer port K2.

[0277] During the process, process gas flows into remote plasma source 3211. The remote plasma activates the process gas using radio frequency energy. This feature allows the remote plasma oxidation / nitriding process to achieve a higher reactant concentration at the same temperature compared to other oxidation / nitriding methods. It can achieve a high concentration of reactant distribution on the wafer surface. The high concentration of reactants makes the reactant concentration distribution more uniform under high aspect ratio structures, which is beneficial to achieving a first modified layer 401 thickness of greater than or equal to 95%, or even greater than or equal to 98%.

[0278] In some embodiments, such as Figure 27 and Figure 28 As shown, the material of the inner surface of the conveying member 3212 includes at least one of quartz, silicon black quartz, silicon dioxide (SiO2) coating and silicon carbide.

[0279] For example, the conveying member 3212 may be a single-piece structure. In this case, the material of the conveying member 3212 is the aforementioned material, ensuring that the material of the inner surface of the conveying member 3212 meets the requirements. Alternatively, the conveying member 3212 may include a base and an inner liner located inside the base. The base provides the basic structure for the conveying member 3212 to perform gas transport, and the material of the inner liner is the aforementioned material, ensuring that the material of the inner surface of the conveying member 3212 meets the requirements. The conveying member 3212 may also have other structures; no limitations are set here.

[0280] The aforementioned material configuration results in a low free radical surface recombination coefficient on the inner surface of the transport component 3212. The charged charge in the plasma decays rapidly during transport, and neutral, highly reactive free radicals have a longer lifetime. Injected into the processing chamber 3213 via the transport component 3212, the lining of the transport component 3212 has a low free radical surface recombination coefficient, minimizing free radical loss during transport.

[0281] The material settings of the inner surface of the conveying component 3212, combined with the activation of process gas by radio frequency energy using remote plasma, can achieve a higher reactant concentration. The two work together (more at the source and less loss in the process) to obtain a high concentration of reactant distribution on the wafer surface. The high concentration of reactants makes the reactant concentration distribution more uniform under a high aspect ratio structure, which is conducive to achieving a first modified layer 401 with a conformability of greater than or equal to 95%, or even greater than or equal to 98%.

[0282] In some embodiments, such as Figure 27 and Figure 28 As shown, the conveying member 3212 has an axis V1 extending along a third direction Z, which is parallel to the arrangement direction of the remote plasma source 3211 and the conveying member 3212; the processing chamber 3213 has an air inlet K1 connected to the conveying member 3212, and the side wall where the air inlet K1 of the processing chamber 3213 is located is the first side wall M1 of the processing chamber 3213; the processing chamber 3213 has an exhaust port K3, which is close to the second side wall M2 of the processing chamber 3213, and the second side wall M2 and the first side wall M1 are arranged opposite to each other in the third direction Z; wherein, the included angle α between the axis V1 of the conveying member 3212 and the first side wall M1 is in the range of 85°~90°.

[0283] The included angle α between the axis V1 of the conveying member 3212 and the first side wall M1 refers to the smaller included angle between the axis V1 of the conveying member 3212 and the first side wall M1.

[0284] In some examples, the air inlet K1 connecting the processing chamber 3213 to the transport member 3212 and the exhaust port K3 of the processing chamber 3213 are located on adjacent sidewalls of the processing chamber 3213. This causes the plasma to travel non-linearly within the processing chamber 3213, resulting in poor airflow uniformity. In contrast, in the example of this application, the angle between the axis V1 of the transport member 3212 and the first sidewall M1 is approximately 90°, and the air inlet K1 connecting the processing chamber 3213 to the transport member 3212 and the exhaust port K3 of the processing chamber 3213 are located on opposite sidewalls. This allows the plasma to be injected linearly into the processing chamber 3213 via the transport member 3212, flow across the wafer surface, and finally exit through the exhaust port K3 located near the second sidewall M2. The uniform airflow design achieves a uniform distribution of plasma on the wafer surface, thereby resulting in a more uniform film thickness of the first modified layer 401.

[0285] In some embodiments, such as Figure 17 and Figure 19 As shown, the removal chamber 3022 is also used to remove the oxide layer on the surface of the first material layer 1130.

[0286] For example, surface modification involves nitriding the surface of the first material layer 1130. The native oxide layer on the surface of the first material layer 1130 may prevent nitriding or affect the nitriding quality. In non-integrated oxide cleaning operations, the native oxide layer will be regenerated during the process of transferring the wafer to this semiconductor device 300 after the native oxide layer has been removed using other semiconductor equipment.

[0287] The removal chamber 3022 has the function of removing the oxide layer on the surface of the first material layer 1130, which helps to avoid the (natural) oxide layer on the surface of the first material layer 1130 from affecting the thinning process of the first material layer 1130 and ensures the process quality.

[0288] like Figure 26 As shown, the process of removing oxides simultaneously in the removal chamber is as follows: Process begins; the wafer is transferred into the removal chamber 3022, and the oxide layer is etched away; after removing the oxide layer, the wafer is transferred into the first modification chamber 3021, where a portion of the first material layer 1130 is modified into a first modified layer 401; after modification, the wafer is transferred into the removal chamber to remove the first modified layer 401. It is then determined whether the target thinning thickness has been achieved; if yes, the process ends; if not, the process returns to the modification step.

[0289] In some embodiments, such as Figure 17 and Figure 19As shown, the thinning apparatus 302 includes a first modification chamber and a removal chamber 3022, as well as one or more first heat treatment chambers 3023. The first heat treatment chambers 3023 are used for the thermal decomposition and selective removal of etching byproducts generated during the removal of the first modified layer 401. For example, the first heat treatment chambers 3023 can heat the wafer to 150°C to 1100°C.

[0290] In the above embodiments, when the first heat treatment chamber 3023 is used for the selective removal of etching byproducts generated during the thermal decomposition of the first modified layer 401, the removal of the first modified layer 401 and the decomposition of the etching byproducts can be carried out in the removal chamber 3022 and the first heat treatment chamber 3023, respectively, which can accelerate the removal efficiency of the first modified layer 401 and the removal efficiency of the etching byproducts, and improve the yield of the equipment.

[0291] In some embodiments, such as Figure 17 and Figure 19 As shown, the first heat treatment chamber 3023 is also used for surface repair of the first material layer 1130.

[0292] For example, the first heat treatment chamber 3023 achieves surface repair of the first material layer 1130 through heat treatment or gas treatment. The first heat treatment chamber 3023 can perform surface repair of the first material layer 1130 after multiple thinning cycles.

[0293] In the above embodiments, surface repair helps to reduce the roughness of the first material layer 1130 and / or repair lattice defects in the first material layer 1130, thereby improving the quality of the first material layer 1130.

[0294] In some embodiments, such as Figure 17 and Figure 19 As shown, the transmission platform 301 also has a cooling function for cooling the wafer.

[0295] For example, the transmission platform 301 is provided with a cooling module 3011.

[0296] For example, the modification process of the first modified chamber 3021 is a high-temperature process, while the removal process of the removal chamber 3022 is a low-temperature etching process. The wafer in the first modified chamber 3021 can be transferred to the cooling module 3011 for rapid cooling by a robotic arm. After reaching the low-temperature etching temperature window required by the removal chamber 3022, it is transferred to the removal chamber 3022. This can quickly reach the temperature window required for low-temperature etching, which is more efficient than in-situ cooling of the etching chamber, thereby improving the equipment yield.

[0297] In some embodiments, such as Figure 19As shown, the semiconductor device 300 includes: two transfer platforms 301, two first modification chambers 3021, two removal chambers 3022, and two first heat treatment chambers 3023. Each transfer platform 301 is connected to one first modification chamber 3021 and one removal chamber 3022. The two first heat treatment chambers 3023 are disposed between the two transfer platforms 301, and each first heat treatment chamber 3023 is connected to both transfer platforms 301. It should be understood that the semiconductor device 300 may also include a greater number of transfer platforms 301, first modification chambers 3021, removal chambers 3022, and first heat treatment chambers 3023.

[0298] The first heat treatment chamber 3023 is used for heat treatment. Specifically, the first heat treatment chamber 3023 can be used to drive / activate surface modification reactions, which can reduce the process time of the first modification chamber 3021 and improve the yield of the first modification chamber 3021. The first heat treatment chamber 3023 can be used for thermal decomposition of etching byproducts, which can reduce the process time of the removal chamber 3022 and improve the yield of the removal chamber 3022. The first heat treatment chamber 3023 can be used for surface repair of the first material layer to improve the quality of the first material layer 1130. By using the first heat treatment chamber 3023 to share the process time of the bottleneck chamber, the yield among the various chambers can be effectively balanced. Since the first heat treatment chamber 3023 has a wide range of functions, it is positioned in the middle so that the wafer can achieve its process purpose when passing through this process chamber during the transfer between the two transfer platforms 301. Therefore, each transfer is an effective transfer, maximizing the yield.

[0299] In addition, in this embodiment, the transfer platform 301 only needs to transfer wafers between its corresponding first modification chamber 3021, removal chamber 3022, and first heat treatment chamber 3023, resulting in fewer transfer locations and higher yield.

[0300] Specifically, such as Figure 19As shown, the wafer transfer sequence during the process is as follows: the robot arm of the first transfer platform 301 transfers the wafer into the first modification chamber 3021 located on the first transfer platform 301; after the modification process is completed, the robot arm of the first transfer platform 301 transfers the wafer into the removal chamber 3022 located on the first transfer platform 301; after the removal process is completed, the robot arm of the first transfer platform 301 transfers the wafer into the first heat treatment chamber 3023 located between the two transfer platforms 301, for example, the first heat treatment chamber 3023 located on the left, where the thermal decomposition etching of by-products can be completed. After the thermal decomposition etching of byproducts is completed, the robot arm of the second transfer platform 301 transfers the wafer into the first modification chamber 3021 located on the second transfer platform 301. After the modification process is completed, the robot arm of the second transfer platform 301 transfers the wafer into the removal chamber 3022 located on the second transfer platform 301. After the removal process is completed, the robot arm of the second transfer platform 301 transfers the wafer into another first heat treatment chamber 3023 located between the two transfer platforms 301, for example, the first heat treatment chamber 3023 located on the right. After the thermal decomposition etching of byproducts is completed, the robot arm of the first transfer platform 301 transfers the wafer into the first modification chamber 3021 located on the first transfer platform 301, and so on, repeating the above process. During the process, at least six wafers circulate simultaneously in semiconductor equipment 300. Each transfer platform's robotic arm handles the transfer between three process chambers, reducing the total transfer time of a single transfer platform's robotic arm and balancing the processing times of the three chambers. Furthermore, the second heat treatment chamber, located between two transfer platforms, does not increase the total footprint of the equipment. Thus, maximum yield per unit area can be achieved.

[0301] The first heat treatment chamber 3023 is used for the thermal decomposition of etching byproducts. In the process flow, the first heat treatment chamber 3023 is located after the removal chamber 3022. Without a cooling step, such as... Figure 17 , Figure 19 and Figure 29 As shown, the process is as follows: process begins; the wafer is transferred into the first modification chamber 3021, and a portion of the first material layer 1130 is modified into the first modified layer 401; the wafer is transferred into the removal chamber 3022, and the first modified layer 401 is etched away; the wafer is transferred into the first heat treatment chamber 3023, and the etching byproducts are thermally decomposed; it is determined whether the target thinning thickness has been achieved; if yes, the process ends; if no, the process returns to the modification step.

[0302] The first heat treatment chamber 3023 is used for the thermal decomposition of etching byproducts. In the process flow, the first heat treatment chamber 3023 is located after the removal chamber 3022. When a cooling step is included, for example... Figure 17 , Figure 19 and Figure 30 As shown, the process is as follows: Process begins; the wafer is transferred into the first modification chamber 3021, and a portion of the first material layer 1130 is modified into the first modified layer 401; the wafer is transferred into the cooling module 3011 to cool the wafer; the wafer is transferred into the removal chamber 3022 to etch and remove the first modified layer 401; the wafer is transferred into the first heat treatment chamber 3023 to thermally decompose the etching byproducts; it is determined whether the target thinning thickness has been achieved; if yes, the process ends; if no, the process returns to the modification step.

[0303] When the first heat treatment chamber 3023 is used for surface repair of the first material layer 1130, after the thinning target is achieved, the wafer is transferred into the first heat treatment chamber 3023 for surface repair of the first material layer 1130. After the repair is completed, the wafer is transferred out of the chamber, thus completing the process.

[0304] In some embodiments, such as Figure 17 , Figure 18 and Figure 19 As shown, the yield of semiconductor device 300 can be simplified by evaluating the minimum yield of each chamber and transfer platform 301. The minimum yield of a single chamber or transfer platform 301 can be simplified to the following formula: WPH = 3600 / (time consumed by a single wafer to complete the process in the corresponding chamber or transfer platform 301). For the process chamber, the time consumed by a single wafer = (process time + transfer time) × number of cycles. For the transfer platform 301, the time consumed by a single wafer = (sum of transfer times of each chamber) × number of cycles.

[0305] The optimal yield configuration can be obtained by adjusting the process time and transport time of each chamber, as well as the number of cycles, to balance the maximum yield of each chamber and the transport platform 301. As thinning continues, the spacing of the first material layer 1130 increases, so the thickness of the first modified layer 401 can be increased to the limit of the spacing of the first material layer 1130 at that time in each cycle, thereby reducing the overall number of cycles. The process time and transport time can be balanced by planning the path through equipment integration.

[0306] Specifically, such as Figure 19 As shown, this scheme is a double hexagonal transfer platform 301. Each transfer platform 301 is equipped with an independent robotic arm. Therefore, a single robotic arm needs to transfer between the first modification chamber 3021, the removal chamber 3022, and the first heat treatment chamber 3023 corresponding to its respective transfer platform 301; or between the first modification chamber 3021, the removal chamber 3022, the first heat treatment chamber 3023, and the cooling module 3011 corresponding to its respective transfer platform 301.

[0307] For the transmission platform 301, the fewer transmission positions, the higher the output. The output of the transmission platform 301 can be adjusted by using or not using the cooling module 3011.

[0308] In some embodiments, such as Figure 17 and Figure 19 As shown, the first modified chamber 3021 is connected to the transmission platform 301 via a slit valve; and / or, the removal chamber 3022 is connected to the transmission platform 301 via a slit valve.

[0309] The slit valve can be used to remove the sealed connection between the chamber 3022 and the transmission platform 301; the slit valve can also be used to achieve a sealed connection between the first modified chamber 3021 and the transmission platform 301.

[0310] The following describes some other examples of the thinning device 302. In these embodiments, the thinning device 302 may include a second modified chamber 3028, which is different from the first modified chamber 3021 in the foregoing embodiments.

[0311] In some embodiments, such as Figure 21 As shown, the thinning device 302 includes a second modification chamber 3028, a second heat treatment chamber 3029, and a removal chamber 3022. The second modification chamber 3028 is used to adsorb surface-modifying gases onto the first material layer 1130, and the second heat treatment chamber 3029 is used to activate the surface modification reaction of the first material layer 1130. The removal chamber 3022 is used to selectively remove the first modified layer 401.

[0312] In the above embodiments, the second modification chamber 3028 is used to adsorb surface-modifying gases onto the first material layer 1130, and the second heat treatment chamber 3029 is used to activate the surface modification reaction of the first material layer 1130. Therefore, the surface process is jointly completed by the second modification chamber 3028 and the second heat treatment chamber 3029, which can reduce the process time of the second modification chamber 3028 and increase its yield.

[0313] The second heat treatment chamber 3029 is used to activate the surface modification reaction. In the process flow, the second heat treatment chamber 3029 is located after the second modification chamber 3028, such as... Figure 15 , Figure 17 , Figure 19 and Figure 31 As shown, the process is as follows: process begins; the wafer is transferred into the second modification chamber 3028, and a certain amount of modified gas is adsorbed on the surface of the first material layer 1130; the wafer is transferred into the first heat treatment chamber 3023, and the modification reaction is thermally activated; the wafer is transferred into the removal chamber 3022, and the first modified layer 401 is etched away; it is determined whether the target thinning thickness has been achieved; if yes, the process ends; if no, the process returns to the modification step.

[0314] Other functions of the removal chamber 3022 can be found in the preceding description. For example, in some embodiments, the removal chamber 3022 can be used to remove the oxide layer on the surface of the first material layer 1130. The removal chamber 3022's function of removing the oxide layer of the first material layer 1130 helps to prevent the (natural) oxide layer on the surface of the first material layer 1130 from affecting the thinning process of the first material layer 1130, thus ensuring process quality.

[0315] In some embodiments, the removal chamber 3022 may have a heat treatment function for thermally decomposing the etching byproducts generated during the selective removal of the first modified layer 401.

[0316] When the second heat treatment chamber 3029 is used simultaneously to activate the surface modification reaction and thermally decompose and remove etching byproducts, in the process flow, such as Figure 15 , Figure 17 , Figure 19 and Figure 32 As shown, the process is as follows: Process begins; the wafer is transferred into the second modification chamber 3028, where a certain amount of modifying gas is adsorbed on the surface of the first material layer 1130; the wafer is transferred into the second heat treatment chamber 3029, where the modification reaction is thermally activated; the wafer is transferred into the removal chamber 3022, where the first modified layer 401 is etched; the wafer is transferred into the second heat treatment chamber 3029, where the etching byproducts are thermally decomposed. It is then determined whether the target thinning thickness has been achieved; if yes, the process ends; if not, the process returns to the modification steps.

[0317] In addition to activating the surface modification reaction of the first material layer 1130, the second heat treatment chamber 3029 may also have the same function as the first heat treatment chamber 3023.

[0318] For example, in some embodiments, the second heat treatment chamber 3029 is also used for the thermal decomposition and selective removal of etching byproducts generated during the removal of the first modified layer 401. This reduces the process time of the removal chamber 3022 and increases its yield. By sharing the process time of at least one of the second modified chamber 3028 and the removal chamber 3022 with the second heat treatment chamber 3029, the yields among the chambers can be effectively balanced.

[0319] For example, the second heat treatment chamber 3029 can also be used for surface repair of the first material layer.

[0320] In some embodiments, when the thinning device 302 includes a first modification chamber 3021, a removal chamber 3022, and a first heat treatment chamber 3023, its layout architecture is not limited to... Figures 17-19 The architecture shown can also be adopted Figure 21The architecture shown is not limited to the layout of the thinning device 302, which includes a second modification chamber 3028, a second heat treatment chamber 3029, and a removal chamber 3022. Figure 21 The architecture shown can also be adopted Figures 17-19 The layout architecture is shown. For example, in the case where the thinning device 302 includes a second modification chamber 3028, a second heat treatment chamber 3029, and a removal chamber 3022, it can adopt... Figure 19 In the dual-transfer platform scheme shown, the position of the second modified chamber 3028 can be set with reference to the position of the first modified chamber 3021, and the position of the second heat treatment chamber 3029 can be set with reference to the position of the first heat treatment chamber 3023. Other layout schemes can also be set with reference to this.

[0321] The following is combined Figure 33 , Figure 35 and Figure 36 This section introduces an example of a thinning device 302 as an integrated process chamber.

[0322] In some embodiments, such as Figure 33 As shown, the thinning device 302 includes: a process chamber 3024, a gas distribution plate 30241, a support member 30242, and a heater 30243 disposed within the process chamber 3024. A first gas source 3025, a second gas source 3026, and a third gas source 3027 are respectively connected to the gas distribution plate 30241 via valves. The support member 30242 is used to support the wafer, and the heater 30243 is used to heat the wafer. The first gas supplied by the first gas source 3025 to the process chamber 3024 is used to form a conformal first modified layer 401 on the surface of the first material layer 1130. The second gas supplied by the second gas source 3026 to the process chamber 3024 is used to remove the first gas and / or remove (gaseous) byproducts generated during the removal of the first modified layer 401. The third gas supplied by the third gas source 3027 to the process chamber 3024 is used to remove the first modified layer 401 of the first material layer 1130.

[0323] The support member 30242 and the gas distribution disk 30241 can be disposed opposite to each other in the process chamber 3024. The area on the support member 30242 is the wafer processing area S2, and the gas distribution disk 30241 is disposed on top of the wafer processing area S2. The first gas is, for example, at least one of oxygen (O2), nitrogen (N2), ammonia (NH3), and chlorine (Cl2). The second gas can be an inert gas. The third gas is, for example, at least one of NF3, NH3, HF, and H2O. The heater 30243 can be integrated onto the support member 30242.

[0324] The first gas, the second gas, and the third gas can flow into the wafer processing area S2 sequentially. The heater 30243 controls the wafer to a suitable temperature when the first gas, the second gas, and the third gas flow in, respectively. The suitable temperature can be set according to process requirements.

[0325] In some embodiments, the process chamber 3024 is further provided with an exhaust guide plate 30244 and an exhaust port 30245. The exhaust guide plate 30244 is located in the wafer processing area S2, and the exhaust port 30245 is located at the bottom of the process chamber 3024. The airflow flows through the exhaust guide plate 30244 and then into the exhaust port 30245 for discharge.

[0326] Figure 35 The horizontal axis represents time, and the vertical axis reflects temperature or gas type according to the meaning of the indicator lines. Figure 36 That's also true. Figure 35 As shown, the thinning process of the thinning device 302 for thinning the first material layer 1130 is as follows: The wafer is placed on the support 30242, the heater 30243 controls the wafer to a first temperature, and a first gas is introduced. The first gas adsorbs on the first material layer 1130 on the wafer surface to form a polymer layer (i.e., the first modified layer 401). Then, a second gas is introduced to purge the residual first gas in the process chamber 3024. Then, a third gas is introduced, and the wafer temperature is raised to a second temperature by the heater 30243. As the wafer temperature rises, the polymer formed by the adsorption of the first gas on the wafer surface reacts with the third gas to generate gaseous byproducts which are discharged. After the surface polymer is completely decomposed, the wafer temperature is controlled to the first temperature, at which point the first material layer 1130 is thinned to a certain thickness. This process is then repeated until the first material layer 1130 is thinned to the target thickness.

[0327] This embodiment provides an integrated process chamber 3024 for modifying and removing a first material layer 1130, thereby achieving thinning of the first material layer 1130. The integrated process chamber 3024 has a small footprint, reducing transport time and increasing equipment yield. In some embodiments, the second gas supplied to the process chamber 3024 by the second gas source 3026 can be used to purge the first gas, preventing unintended reactions between residual modified gas and the third gas that could lead to uneven thinning of the first material layer 1130. In some embodiments, the second gas can purge gaseous byproducts to ensure process quality.

[0328] In some embodiments, such as Figure 34As shown, the thinning device 302 includes: a gas distribution plate 30241, a support member 30242, and a heater 30243 disposed in the process chamber 3024. A first gas source 3025 and a fourth gas source 3030 are respectively connected to the gas distribution plate 30241 through valves; the support member 30242 is used to support the wafer, and the heater 30243 is used to heat the wafer. The first gas supplied by the first gas source 3025 to the process chamber 3024 is used to form a conformal first modified layer 401 on the upper and lower surfaces of the first material layer 1130, and the fourth gas supplied by the fourth gas source 3030 to the process chamber 3024 is used to remove gaseous byproducts generated during the thermal decomposition of the first modified layer 401.

[0329] The thinning process of the thinning device 302 for the first material layer 1130 is as follows: The wafer is placed on the support 30242, the heater 30243 controls the wafer to a first temperature, and a first gas is introduced. After the first material layer 1130 on the wafer surface is adsorbed, a polymer layer (i.e., the first modified layer 401) is formed. Then, a fourth gas is introduced to purge the residual first gas in the chamber, and at the same time, the temperature of the wafer is raised to the fourth temperature by the heater 30243. As the wafer temperature rises, the polymer formed by the adsorption of the first gas on the wafer surface decomposes into gaseous byproducts and is discharged. After the surface polymer is completely decomposed, the wafer temperature is controlled back to the first temperature. At this time, the first material layer 1130 is thinned to a certain thickness. Then, this process is repeated until the first material layer 1130 is thinned to the target thickness.

[0330] This embodiment provides another integrated process chamber 3024 to modify and remove the first material layer 1130, thereby achieving thinning of the first material layer 1130.

[0331] In some embodiments, the semiconductor device 300 may include other chambers in addition to the thinning device 302. The following describes some other chambers that the semiconductor device 300 may include, in conjunction with certain embodiments.

[0332] In some embodiments, such as Figure 17 and Figure 18 As shown, the semiconductor device 300 further includes a pre-cleaning chamber 303, which is used to remove the oxide layer on the surface of the first material layer 1130.

[0333] The pre-cleaning chamber 303 has the function of removing the oxide layer on the surface of the first material layer 1130, so that the modification and removal scheme of the first material layer 1130 can be carried out, and the thinning of the first material layer 1130 can be achieved.

[0334] In some embodiments, such as Figure 17 and Figure 18As shown, the semiconductor device 300 also includes a surface repair chamber 304, which is used for surface repair of the first material layer 1130.

[0335] For example, the surface repair chamber 304 achieves surface repair of the first material layer 1130 through heat treatment or gas treatment. Specifically, the surface repair chamber 304 can perform surface repair of the first material layer 1130 after multiple thinning cycles.

[0336] Thus, it is used to reduce the roughness of the first material layer 1130 and / or repair lattice defects in the first material layer 1130.

[0337] This application also provides a thinning method, which can be performed using the semiconductor device 300 as described in any of the above embodiments. The thinning method includes performing one or more thinning cycles on a wafer having multiple layers of first material layers 1130 stacked on the wafer; each thinning cycle includes forming a conformal first modification layer 401 on the upper and lower surfaces of each of the first material layers 1130, and selectively removing the first modification layer 401 to thin the multiple layers of first material layers 1130.

[0338] like Figure 15 As shown, this application provides a semiconductor device 200, which includes a first material layer 1130 thinned by the thinning method described in any of the above embodiments.

[0339] For example, semiconductor device 200 is a logic chip or memory.

[0340] The first material layer 1130 of the semiconductor device 200 is formed by a high conformal thinning process, which can improve the consistency of the performance of the semiconductor device 200.

[0341] The above embodiments further illustrate the purpose, technical solution, and advantages of this application. It should be understood that the above descriptions are merely embodiments of this application and are not intended to limit this application. Any modifications, equivalent substitutions, improvements, etc., made within the scope of this application and its principles should be included within the protection scope of this application.

Claims

1. A semiconductor device, characterized in that, include: One or more transmission platforms and one or more thinning devices; The transmission platform is used to transmit a wafer to the thinning device, the wafer having multiple layers of first material stacked on it; The thinning device is used to form a shape-conserving first modified layer on the upper and lower surfaces of each of the first material layers, and to selectively remove the first modified layer to thin multiple layers of the first material layer.

2. The semiconductor device according to claim 1, characterized in that, The thinning device is configured to perform multiple thinning cycles, each cycle including: forming a shape-conserving first modified layer on the upper and lower surfaces of each of the first material layers and selectively removing the first modified layer.

3. The semiconductor device according to claim 2, characterized in that, In each thinning cycle, the thinning device forms a conformal first modification layer on the upper and lower surfaces of each of the first material layers; after multiple thinning cycles, assuming that the first modification layers formed in each of the multiple thinning cycles are superimposed to form a modified portion, the modified portion satisfies: The ratio of the minimum thickness of the modified part to the maximum thickness of the modified part is P, P≥(T1-T2×F) / T1; where F is a coefficient reflecting the degree to which the modified part contributes to the target thinning thickness deviation T2, where T1 is the target thinning thickness of the first material layer; T2 is the target thinning thickness deviation of the first material layer, and the target thinning thickness deviation is the difference between the maximum and minimum thickness of the first material layer that is thinned.

4. The semiconductor device according to claim 2 or 3, characterized in that, In each thinning cycle, the thinning device forms a shape-preserving first modification layer on the upper and lower surfaces of each first material layer; after multiple thinning cycles, it is assumed that the first modification layers formed in each of the multiple thinning cycles are superimposed to form a modified part, wherein the modified part satisfies the following: the shape preservation value of the modified part is greater than or equal to 95% or 98%, and the shape preservation value of the modified part is the ratio of the minimum thickness of the modified part to the maximum thickness of the modified part; And / or, In each of the multiple thinning cycles, the shape preservation value of the first modified layer is greater than or equal to 95% or 98%. The shape preservation value of the first modified layer is the ratio of the minimum thickness of the first modified layer to the maximum thickness of the first modified layer among the multiple first modified layers corresponding to the upper and lower surfaces of each first material layer.

5. The semiconductor device according to any one of claims 2 to 4, characterized in that, In the multiple thinning cycles, there are at least two thinning cycles that satisfy the condition that the thickness of the first modified layer in the preceding thinning cycle is less than the thickness of the first modified layer in the subsequent thinning cycle.

6. The semiconductor device according to any one of claims 1 to 5, characterized in that, The over-etching amount of the first material layer is set to be A times the target etching amount, the target thinning thickness of the first material layer is T1, the target thinning thickness deviation of the first material layer is T2, and the selective removal of the first modified layer satisfies: The etching selectivity ratio between the first modified layer and the first material layer is M, where M ≥ A × T1 / (E × T2); and E is a coefficient reflecting the degree to which selective removal contributes to the target thinning thickness deviation T2.

7. The semiconductor device according to any one of claims 1 to 6, characterized in that, The selective removal of the first modified layer satisfies the following condition: the etching selectivity ratio of the first modified layer to the first material layer is greater than or equal to 2.5, 20, 40, 120 or 200.

8. The semiconductor device according to any one of claims 1 to 7, characterized in that, The thinning device includes: at least one first modification chamber and at least one removal chamber; The first modification chamber is used to form a conformal first modification layer on the upper and lower surfaces of each of the first material layers, and the removal chamber is used to selectively remove the first modification layer.

9. The semiconductor device according to claim 8, characterized in that, The first modified chamber also has a heat treatment function for driving the surface modification reaction of the first material layer, and / or for thermally decomposing and selectively removing etching byproducts generated during the removal of the first modified layer; and / or, The removal chamber also has a heat treatment function for thermally decomposing the etching byproducts generated during the selective removal of the first modified layer.

10. The semiconductor device according to claim 8 or 9, characterized in that, The first modified chamber includes: a remote plasma source, a transport component, and a processing chamber arranged in sequence. The remote plasma source is used to receive process gas and form plasma. The transport component is used to transport the plasma to the processing chamber. The processing chamber is used to process the wafer using the plasma.

11. The semiconductor device according to claim 10, characterized in that, The material of the inner surface of the conveying component includes at least one of quartz, silicon black quartz, silicon dioxide coating, and silicon carbide.

12. The semiconductor device according to claim 10 or 11, characterized in that, The transport member has an axis extending along a first direction, which is parallel to the arrangement direction of the remote plasma source and the transport member. The processing chamber has an air inlet connected to the conveying member, and the side wall where the air inlet of the processing chamber is located is the first side wall of the processing chamber; the processing chamber has an exhaust port, and the exhaust port is close to the second side wall of the processing chamber, and the second side wall and the first side wall are arranged opposite to each other in the first direction; The angle between the axis of the conveying component and the first sidewall is in the range of 85° to 90°.

13. The semiconductor device according to any one of claims 8 to 12, characterized in that, The removal chamber is also used to remove the oxide layer on the surface of the first material layer.

14. The semiconductor device according to any one of claims 8 to 13, characterized in that, The thinning device further includes: one or more first heat treatment chambers; The first heat treatment chamber is used for the selective removal of etching byproducts generated during the thermal decomposition of the first modified layer.

15. The semiconductor device according to claim 14, characterized in that, The first heat treatment chamber is also used for surface repair of the first material layer.

16. The semiconductor device according to claim 14 or 15, characterized in that, include: Two of the aforementioned transmission platforms, two of the first modification chambers, two of the aforementioned removal chambers, and two of the first heat treatment chambers; Each of the transfer platforms is connected to one of the first modification chambers and one of the removal chambers, and two of the first heat treatment chambers are disposed between the two transfer platforms, with each of the first heat treatment chambers connected to both of the transfer platforms.

17. The semiconductor device according to any one of claims 1 to 7, characterized in that, The thinning device includes: a second modification chamber, a second heat treatment chamber, and a removal chamber; The second modification chamber is used to adsorb surface-modifying gas into the first material layer, and the second heat treatment chamber is used to activate the surface modification reaction of the first material layer; the removal chamber is used to selectively remove the first modified layer, and / or to remove the oxide layer on the surface of the first material layer.

18. The semiconductor device according to claim 17, characterized in that, The second heat treatment chamber is also used for the thermal decomposition of etching byproducts generated during the selective removal of the first modified layer.

19. The semiconductor device according to any one of claims 1 to 7, characterized in that, The thinning device includes: a process chamber and a gas distribution plate, a support, and a heater disposed in the process chamber; a first gas source, a second gas source, and a third gas source are respectively connected to the gas distribution plate through valves; the support is used to support the wafer, and the heater is used to heat the wafer; The first gas supplied by the first gas source to the process chamber is used to form a first shape-conserving modified layer on the surface of the first material layer. The second gas supplied by the second gas source to the process chamber is used to remove the first gas and / or remove byproducts generated during the removal of the first modified layer. The third gas supplied by the third gas source to the process chamber is used to remove the first modified layer from the surface of the first material layer.

20. The semiconductor device according to any one of claims 1 to 7, characterized in that, The thinning device includes: a process chamber and a gas equalization plate, a support member, and a heater disposed in the process chamber; a first gas source and a fourth gas source are respectively connected to the gas equalization plate through valves; the support member is used to support the wafer, and the heater is used to heat the wafer; The first gas supplied by the first gas source to the process chamber is used to form a first shape-conserving modified layer on the surface of the first material layer, and the fourth gas supplied by the fourth gas source to the process chamber is used to remove gaseous byproducts generated during the thermal decomposition of the first modified layer.

21. The semiconductor device according to any one of claims 1 to 20, characterized in that, Also includes: A pre-cleaning chamber for removing the oxide layer from the surface of the first material layer.

22. The semiconductor device according to any one of claims 1 to 21, characterized in that, Also includes: A surface repair chamber for surface repair of the first material layer.

23. A thinning method, characterized in that, The thinning method is performed using a semiconductor device as described in any one of claims 1 to 22; comprising: performing one or more thinning cycles on a wafer having multiple layers of first material layers and gaps between the multiple layers of first material layers; each thinning cycle comprising: forming a conformal first modification layer on the surface of each of the first material layers and selectively removing the first modification layer to thin the multiple layers of the first material layers.

24. A semiconductor device, characterized in that, include: The first material layer after thinning by the thinning method as described in claim 23.

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