Electrostatic chuck assembly, charged particle beam device and wafer processing method

Abstract

The application discloses an electrostatic chuck assembly, a charged particle beam device and a wafer processing method. The electrostatic chuck assembly comprises an electrostatic chuck, a plurality of bosses arranged on the electrostatic chuck and used for bearing a wafer, a ring electrode arranged around the electrostatic chuck, the ring electrode being used for being connected with a compensation voltage source to reduce electric field distortion near the edge of the wafer, and a conductive layer arranged on the surface of at least part of the bosses. The electrostatic chuck assembly provided by the application is provided with the conductive layer on at least part of the bosses, a deceleration voltage is applied to the wafer through the conductive layer, the energy of a main electron beam reaching the wafer surface can be reduced, the imaging resolution and contrast can be optimized, and a clearer image can be obtained.

Description

Technical Field

[0001] This invention belongs to the field of semiconductor observation, and specifically relates to an electrostatic chuck assembly, a charged particle beam device, and a wafer processing method. Background Technology

[0002] In recent years, scanning electron microscopy (SEM) has been widely used to observe wafer surfaces. SEM emits a main electron beam onto the wafer surface, which reflects signal electrons (including secondary electrons and backscattered electrons) to a detector located above the sample. Since these signal electrons can reflect surface information of the wafer (such as morphology, elemental composition, or potential), wafer observation, measurement, or analysis can be performed based on the detection of these signal electrons.

[0003] Research has found that the energy of the main electron beam when it reaches the wafer surface affects signal strength and resolution. Higher energy electron beams reaching the wafer surface can achieve higher resolution; however, high-energy electron beams can damage the wafer.

[0004] The statements herein provide only background information in relation to the present invention and do not necessarily constitute prior art. Summary of the Invention

[0005] The purpose of this invention is to provide an electrostatic chuck assembly, a charged particle beam device, and a wafer processing method to reduce particle contamination of the cavity, improve the stability of the applied voltage and the uniformity of voltage distribution on the wafer, thereby optimizing imaging resolution and contrast, improving signal-to-noise ratio and measurement sensitivity, and obtaining clearer images.

[0006] To achieve the above objectives, the present invention provides an electrostatic chuck assembly, comprising: an electrostatic chuck having a plurality of protrusions for supporting a wafer; an annular electrode surrounding the electrostatic chuck, the annular electrode being connected to a compensation voltage source to reduce electric field distortion near the edge of the wafer; wherein at least a portion of the protrusions have a conductive layer on their surfaces.

[0007] For example, the electrostatic chuck assembly is used in a charged particle beam device, with the conductive layer connected to a deceleration voltage source.

[0008] For example, the conductive layer is also electrically connected to the wafer, and a deceleration voltage source provides a deceleration voltage to the wafer to reduce the velocity of the charged particle beam incident on the wafer.

[0009] For example, the boss with the conductive layer is the first boss, and the boss without the conductive layer is the second boss. The top surface of the conductive layer located on top of the first boss is flush with the top surface of the second boss.

[0010] For example, the shape of the conductive layer includes one or more of the following: ring, sector, strip, circle, ellipse, and arbitrary polygon, as well as array combinations of these shapes.

[0011] For example, the surfaces of all bosses on the electrostatic chuck are provided with a conductive layer.

[0012] The present invention also provides a charged particle beam device, comprising: a main chamber including a wafer loading position and a wafer observation position; a sample stage disposed within the main chamber and capable of moving along a movement trajectory from the wafer loading position to the wafer observation position; an electrostatic chuck assembly as described above disposed on the sample stage; a particle beam irradiation device located in the main chamber and above the wafer observation position; a wafer transport system communicating with the main chamber for transporting the wafer to the electrostatic chuck assembly; and a laser generator disposed within the main chamber and / or the wafer transport system for removing the oxide layer in a portion of the back side of the wafer before the electrostatic chuck assembly adsorbs the wafer, thereby forming an oxide layer removal area.

[0013] For example, the shape of the oxide removal region located on the back side of the wafer includes one or more of circles, ellipses, and arbitrary polygons, as well as arrays of these shapes.

[0014] For example, the wafer transport system includes one or more of a wafer loading module, a device front-end module, a load locking cavity module, and a transport cavity module, and the laser generator is disposed within one or more modules of the wafer transport system.

[0015] For example, the conductive layer is connected to a speed-reducing voltage source.

[0016] For example, when the wafer is adsorbed, the conductive layer is at least partially in contact with the oxide layer removal area on the back side of the wafer, and the deceleration voltage source provides a deceleration voltage to the wafer.

[0017] For example, the electrostatic chuck is further provided with a plurality of pins, which are disposed through the electrostatic chuck and are opposite to at least a portion of the oxide layer removal area on the back side of the wafer.

[0018] For example, the charged particle beam device further includes: a first voltage source connected to the conductive layer; a second voltage source connected to the ejector pin; when the wafer is adsorbed, the conductive layer and the ejector pin respectively make at least partial contact with the corresponding oxide layer removal area on the back side of the wafer; the first voltage source provides a first voltage to the wafer, the second voltage source provides a second voltage to the wafer, and the first voltage and the second voltage are equal.

[0019] For example, the laser generator emits a laser pulse with a number of pulses greater than or equal to 1, and the diameter of each laser pulse spot is less than or equal to 10 micrometers.

[0020] The present invention also provides a wafer processing method, which is implemented using the charged particle beam device as described above, comprising: before the wafer is adsorbed by the electrostatic chuck assembly, removing the oxide layer in a portion of the back side of the wafer by means of a laser generator located in the main chamber and / or the wafer transport system, forming an oxide layer removal area; the electrostatic chuck assembly adsorbs the wafer, so that the conductive layer and the oxide layer removal area are at least partially in contact and connected, and performing subsequent wafer inspection.

[0021] Compared with the prior art, the technical solution of the present invention has at least the following beneficial effects:

[0022] (1) The electrostatic chuck assembly provided by the present invention reduces the energy of the main electron beam when it reaches the wafer surface by setting a conductive layer on at least some of the protrusions and applying a deceleration voltage to the wafer through the conductive layer, thereby optimizing the imaging resolution and contrast and obtaining a clearer image.

[0023] (2) The contact area between the conductive layer and the oxide layer removal area on the back of the wafer is large, which can improve the stability of the applied deceleration voltage.

[0024] (3) By adjusting the shape of the conductive layer and the shape and position distribution of the oxide layer removal area on the back of the wafer, the uniformity of the deceleration voltage distribution on the wafer can be improved.

[0025] (4) Laser is used to remove the oxide layer on the back of the wafer, which avoids the particle contamination of the main chamber caused by piercing the oxide layer on the back of the wafer with a pin, and also reduces the impact of particulate contaminants on imaging quality and measurement accuracy. Attached Figure Description

[0026] Figure 1 This is a schematic diagram of the structure of an electrostatic chuck assembly;

[0027] Figure 2 This is a schematic diagram of the electrostatic chuck assembly in one embodiment of the present invention;

[0028] Figure 3 for Figure 2 A partially enlarged schematic diagram of the electrostatic chuck assembly shown;

[0029] Figure 4 This is a top view schematic diagram of an electrostatic chuck assembly according to an embodiment of the present invention;

[0030] Figure 5 This is a top view schematic diagram of an electrostatic chuck assembly according to another embodiment of the present invention;

[0031] Figure 6 This is a top view schematic diagram of the electrostatic chuck assembly in another embodiment of the present invention;

[0032] Figure 7 This is a top view schematic diagram of an electrostatic chuck assembly in another embodiment of the present invention;

[0033] Figure 8 This is a schematic diagram of the structure of a charged particle beam device in one embodiment of the present invention;

[0034] Figure 9 This is a schematic diagram of the electrostatic chuck assembly in one embodiment of the present invention;

[0035] Explanation of icon numbers:

[0036] 10-Electrostatic chuck; 20-Ejector pin; 30-Ring electrode; 40, 202-Sample stage; W-Wafer; 11-Boss; 12-Conductive layer; 13-Ejector pin; 111-First boss; 112-Second boss; 121-First conductive layer; 122-Second conductive layer; 123-First voltage source; 131-Second voltage source; 51-Oxide removal area; 200-Charged particle beam device; 201-Main chamber; 203-Particle beam irradiation device; 211-Wafer loading position; 212-Wafer observation position; 204-Wafer transport system; 205-Laser generator; 241-Wafer loading module; 242-Equipment front-end module; 243-Load locking cavity module; 244-Transfer cavity module. Detailed Implementation

[0037] The following detailed description, in conjunction with the accompanying drawings and specific embodiments, provides a further detailed explanation of the electrostatic chuck assembly, charged particle beam device, and wafer processing method proposed in this invention. The advantages and features of this invention will become clearer from the following description. It should be noted that the drawings are in a very simplified form and use non-precise proportions, used only to facilitate and clearly illustrate the embodiments of this invention. Please refer to the drawings to make the objectives, features, and advantages of this invention more apparent and understandable. It should be understood that the structures, proportions, sizes, etc., depicted in the accompanying drawings are only for illustrative purposes to aid those skilled in the art and are not intended to limit the implementation conditions of this invention. Therefore, they have no substantial technical significance. Any modifications to the structure, changes in proportions, or adjustments to the size, without affecting the effects and objectives achieved by this invention, should still fall within the scope of the technical content disclosed in this invention.

[0038] As described in the background section, while high-energy particle beams can achieve high resolution, they can also damage the wafer. To address this issue, a common industry practice is to use a probe to pierce the oxide layer on the back side of the wafer and connect the probe to a deceleration voltage source to provide a deceleration voltage to the wafer, thereby reducing the velocity of the particle beam reaching the wafer surface. Please refer to [reference needed]. Figure 1 Taking wafer W as an example, wafer W is placed on the upper surface of electrostatic chuck 10, which is fixedly mounted on sample stage 40. Electrostatic chuck 10 contains at least three pins 20, each connected to a deceleration voltage source. High-voltage pulses are applied to the oxide layer on the back side of wafer W through the pins 20 to puncture it, forming an oxide layer removal area on the back side of wafer W. The pins 20 are electrically connected to the oxide layer removal area, and a deceleration voltage is applied to the wafer, thereby decelerating the particle beam. When measuring wafer W using SEM, when the main electron beam irradiates the surface of wafer W, by applying a deceleration voltage to the pins 20 and conducting the voltage to the wafer W through the oxide layer removal area, the energy of the main electron beam reaching the surface of wafer W can be adjusted, optimizing imaging resolution and contrast, and obtaining a clearer image. Since the main electron beam carries a negative charge, the deceleration voltage applied to the wafer by the deceleration voltage source is a negative voltage.

[0039] Signal electrons also carry a negative charge. The deceleration voltage applied to the wafer can adjust the emission efficiency of signal electrons, enhance the detection signal, and improve the signal-to-noise ratio and measurement sensitivity. However, during the process of applying voltage to wafer W, the oxide layer on the back of wafer W needs to be pierced by the probe 20, which generates particulate contaminants that contaminate the cavity and reduce imaging accuracy.

[0040] Furthermore, since the contact area between the pin 20 and the oxide layer removal area on the back of the wafer W is small, there is a risk of poor contact and unstable contact resistance, which in turn causes uneven voltage distribution. On the one hand, this will lead to large fluctuations in signal electron emission efficiency, reducing the signal-to-noise ratio and measurement sensitivity; on the other hand, it will cause the charge transmitted by the main electron beam to the surface of the wafer W to be unable to be released in time, resulting in charge accumulation, which will cause potential drift and blurring of the image.

[0041] To address this technical problem, embodiments of the present invention provide a wafer processing method and an electrostatic chuck assembly. The wafer processing method involves removing a portion of the oxide layer on the back side of wafer W using a laser before the electrostatic chuck assembly picks up the wafer W, creating an oxide layer removal area. Then, the electrostatic chuck assembly applies a deceleration voltage to this oxide layer removal area on the back side of wafer W, thereby slowing down the electron beam. Since laser removal of the oxide layer produces very little particulate contamination, it reduces contamination of the cavity and improves imaging accuracy.

[0042] In addition, to solve the problems of poor contact and unstable resistance, such as Figure 2 As shown, the electrostatic chuck assembly includes: an electrostatic chuck 10 with a plurality of protrusions 11 for supporting a wafer W, wherein the diameter of the electrostatic chuck 10 is smaller than the diameter of the wafer W; an annular electrode 30 surrounding the electrostatic chuck 10, wherein the annular electrode 30 may be a voltage compensation electrode connected to a compensation voltage source to provide a compensation voltage to reduce electric field distortion near the edge of the wafer W during wafer W inspection, wherein the diameter of the wafer W is smaller than the inner wall diameter of the annular electrode 30; at least a portion of the surface of the protrusions 11 is provided with a conductive layer 12, and the conductive layer 12 is opposite to the oxide layer removal area on the back side of the wafer W. When the wafer W is adsorbed onto the electrostatic chuck 10, the wafer W presses against the protrusions 11 of the electrostatic chuck 10, so that the conductive layer 12 is at least partially in contact with the oxide layer removal area on the back side of the wafer W to form a conductive path.

[0043] For example, an electrostatic chuck assembly is used in a charged particle beam device, with the conductive layer 12 connected to a deceleration voltage source. The conductive layer 12 is also electrically connected to the wafer W, which provides a deceleration voltage to the wafer W to reduce the velocity of the charged particle beam incident on the wafer W. In this embodiment, by providing the conductive layer 12 on the surface of a portion of the protrusion 11, the conductive layer 12 forms a planar contact with the wafer W, increasing the contact area for applying the deceleration voltage, thereby reducing contact resistance and lowering the possibility of poor contact.

[0044] Furthermore, the shape of the conductive layer and the shape and position distribution of the oxide removal area on the back of the wafer can be flexibly adjusted to improve the uniformity of the deceleration voltage distribution on the wafer, thereby better adjusting the emission efficiency of signal electrons, enhancing the detection signal, and improving the signal-to-noise ratio and measurement sensitivity.

[0045] like Figure 3As shown, in this embodiment, the protrusion with the conductive layer 12 is designated as the first protrusion 111, and the protrusion without the conductive layer is designated as the second protrusion 112. The top surface of the conductive layer 12 on top of the first protrusion 111 is flush with the top surface of the second protrusion 112 to ensure that each conductive layer 12 can contact the corresponding oxide layer removal area on the back side of the wafer W when the wafer W is adsorbed by the electrostatic chuck 10. Furthermore, by keeping the top surface of the conductive layer 12 flush with the top surface of the second protrusion 112, the horizontality of the wafer W when adsorbed can be improved, thereby reducing electric field distribution distortion and improving signal electron emission efficiency. Specifically, if the height of the conductive layer 12 and the first protrusion 111 in the middle region is greater than the height of the second protrusion 112 in the peripheral region, the wafer W will tilt when it is attracted by the electrostatic chuck 10. The tilt of the wafer W will cause the angle between the main electron beam and the surface of the wafer W to change, thereby causing the signal electron emission direction to deviate from the optimal receiving angle of the detector, thus reducing the signal electron generation efficiency. At the same time, the slope of the peripheral region will cause the scattering angle of the main electron beam to increase, resulting in blurred imaging edges and reduced imaging resolution.

[0046] In some embodiments, such as Figures 4-7 As shown, the conductive layer 12 has a shape including one or more of the following: annular, fan-shaped, strip-shaped, circular, elliptical, and arbitrary polygonal shapes, as well as array combinations of these shapes. Similarly, the oxide removal area on the back side of the wafer W has a shape including one or more of the following: circular, elliptical, and arbitrary polygonal shapes, as well as array combinations of these shapes. By adjusting the shapes of the conductive layer 12 and the oxide removal area on the back side of the wafer according to actual conditions, the contact area between the conductive layer 12 and the oxide removal area on the back side of the wafer W can be adjusted, improving the contact stability between the two, ensuring the continuity of the conductive path, and enabling the voltage applied through the conductive layer 12 to be continuously and uniformly distributed on the surface of the wafer W, thereby improving the imaging quality.

[0047] Specifically, such as Figure 4As shown, the conductive layer 12 in the electrostatic chuck assembly of this embodiment includes a first conductive layer 121 and a second conductive layer 122. The first conductive layer 121 is annular in shape, and the second conductive layer 122 is arc-shaped. Several oxide removal regions 51 located on the back side of the wafer W are circular in shape (only one is shown in the figure). By setting the first conductive layer 121 as annular, a continuous conductive path can be provided, allowing the current to be evenly distributed in the oxide removal region 51 on the back side of the wafer W, reducing the problem of local overheating or electric field concentration, thereby improving the stability and reliability of conductivity. At the same time, the annular first conductive layer 121 provides a large contact area, reducing the possibility of contact resistance and poor contact. In addition, segmenting the annular first conductive layer 121 forms the arc-shaped second conductive layer 122, so that each arc-shaped second conductive layer 122 can be independently voltage controlled, thereby ensuring the consistency and uniformity of the voltage distribution on the wafer W, thereby improving imaging resolution and contrast, and obtaining a clearer image.

[0048] In another embodiment, such as Figure 5 As shown, the conductive layer 12 in the electrostatic chuck assembly of this embodiment is fan-shaped, and the oxide removal areas 51 located on the back side of the wafer W are rectangular (only one is shown in the figure). By adjusting the angle of the fan-shaped conductive layer 12, the distribution range of the conductive layer 12 in the vertical projection on the back side of the wafer W can be adjusted to improve the contact efficiency with the oxide removal areas 51. Furthermore, in conjunction with the distribution of the oxide removal areas 51, voltage can be applied to the corresponding positions on the wafer W, improving the voltage distribution uniformity of the wafer W, thereby improving imaging quality and measurement accuracy.

[0049] In yet another embodiment, such as Figure 6 As shown, the conductive layer 12 in the electrostatic chuck assembly of this embodiment is strip-shaped, and the oxide removal regions 51 located on the back side of the wafer W are hexagonal (only one is shown in the figure). By adjusting the width of the strip-shaped conductive layer 12, the distribution range of the conductive layer 12 in the vertical projection on the back side of the wafer W can be adjusted to improve the contact efficiency with the oxide removal regions 51. Furthermore, by adjusting the position and size of the oxide removal regions 51, voltage can be applied to the corresponding positions on the wafer W, improving the voltage distribution uniformity of the wafer W, thereby improving imaging quality and measurement accuracy.

[0050] In yet another embodiment, such as Figure 7As shown, the conductive layer 12 in the electrostatic chuck assembly of this embodiment is elliptical in shape and is arranged in a circumferential array along the electrostatic chuck 10. The oxide layer removal area 51 located on the back side of the wafer W is polygonal in shape (rectangular and hexagonal in this embodiment) and is arranged in an array along any direction of the wafer W. By adjusting the ratio of the major and minor axes of the elliptical conductive layer 12 and the number of arrays, a larger contact area can be provided in a limited space, increasing the coverage ratio of the conductive layer 12 on the oxide layer removal area 51. Voltage is then applied to the corresponding position of the wafer W through the corresponding oxide layer removal area 51, improving the voltage distribution uniformity of the wafer W, thereby improving imaging quality and measurement accuracy.

[0051] In some embodiments, a conductive layer 12 is provided on the surface of all the bosses 11 on the electrostatic chuck 10. With this configuration, stable conductivity can be achieved regardless of where the laser forms the oxide removal region 51 on the back side of the wafer.

[0052] Please refer to Figure 8 The present invention also discloses a charged particle beam device 200, comprising: a main chamber 201, the main chamber 201 including a wafer loading position 211 and a wafer observation position 212; a sample stage 202 disposed within the main chamber 201 and capable of moving along a movement trajectory from the wafer loading position 211 to the wafer observation position 212; an electrostatic chuck assembly as described in any of the above embodiments being disposed on the sample stage 202; a particle beam irradiation device 203 located within the main chamber 201 and above the wafer observation position 212; a wafer transport system 204 connected to the main chamber 201 for transporting a wafer W to the electrostatic chuck assembly; and a laser generator 205 disposed within the wafer transport system 204 for removing an oxide layer in a portion of the back side of the wafer W before the electrostatic chuck assembly adsorbs the wafer W, thereby forming an oxide layer removal area 51.

[0053] like Figure 8 As shown, the shape of the oxide layer removal region 51 includes one or more of circles, ellipses, and arbitrary polygons, as well as array combinations of these shapes.

[0054] like Figure 8As shown, the wafer transport system 204 includes a wafer loading module 241, a device front-end module 242, a load locking cavity module 243, and a transport cavity module 244 connected in sequence. The laser generator 205 is disposed in one or more modules within the wafer transport system. The wafer W enters the main cavity 201 from the transport cavity module 244, and the wafer loading position 211 is adjacent to the transport cavity module 244. In this embodiment, the laser generator 205 is disposed within the load locking cavity module 243. By disposing of the laser generator 205 within the wafer transport system 204, an oxide layer removal area 51 is formed on the back side of the wafer W before it is transported to the main cavity 201. This avoids particle contamination of the main cavity 201 caused by laser removal of the oxide layer on the back side of the wafer, ensuring the cleanliness of the main cavity 201. This is beneficial for optimizing imaging resolution and contrast, thereby improving imaging quality. Simultaneously, it reduces the impact of particulate contaminants on signal electronics, thereby enhancing the detection signal and improving measurement accuracy. In other embodiments, the laser generator 205 may also be disposed within the main cavity 201 to prevent oxidation of the oxide layer removal area 51 on the back side of the wafer W, maintain the high conductivity of the oxide layer removal area 51, thereby improving voltage transmission efficiency, ensuring uniform voltage distribution on the wafer W, and improving imaging quality. Preferably, the laser generator 205 is disposed within the main cavity 201 in a region far from the wafer observation position 212, and the region used to perform laser oxide layer removal is also as far away from the wafer observation position 212 as possible. Simultaneously, by controlling the laser power density, particulate contamination can be effectively avoided, thereby reducing the impact of particulate contaminants on imaging quality and measurement accuracy.

[0055] In some embodiments, the wafer transport system 204 includes one or more of a wafer loading module 241, a device front-end module 242, a load-locking cavity module 243, and a transport cavity module 244, and a laser generator 205 is disposed within one or more modules of the wafer transport system 204. For example, in some embodiments, the wafer transport system 204 includes a wafer loading module 241, a device front-end module 242, and a load-locking cavity module 243, with the wafer W entering the main chamber 201 from the load-locking cavity module 243, and the laser generator 205 disposed in the load-locking cavity module 243.

[0056] The laser generator 205 emits a laser pulse with a pulse number greater than or equal to 1, and the diameter of each laser pulse spot is less than or equal to 10 micrometers. By controlling the number of laser pulses, the efficiency of laser removal of the oxide layer can be improved, thereby increasing the wafer measurement throughput of the charged particle beam device and improving observation efficiency. Simultaneously, limiting the diameter of the laser pulse spot to within 10 micrometers reduces laser damage to the wafer W while ensuring the formation of an effective oxide layer removal area. It should be noted that laser removal of the oxide layer can be achieved using different mechanisms such as laser thermal ablation, thermal stress, or plasma shock waves. In a specific embodiment, the laser generator 205 emits a laser with a wavelength of 1064 nm, a laser pulse duration of 6–7 ns, and a laser energy density of approximately 300 mJ. This invention does not limit the laser parameters or mechanisms; the above are merely specific parameters for removing the oxide layer on the back side of the wafer W. The parameters of the laser generator can be adjusted according to the thickness of the oxide layer on the back side of the wafer.

[0057] Furthermore, in this embodiment, the conductive layer 12 is connected to a deceleration voltage source (not shown) via a wire. When the wafer W is adsorbed, the conductive layer 12 makes at least partial contact with the oxide layer removal area 51 on the back of the wafer W, forming a conductive path. The deceleration voltage source provides a deceleration voltage to the wafer W through the conductive layer 12 to adjust the energy of the main electron beam when it reaches the surface of the wafer W, optimize the imaging resolution and contrast, obtain a clearer image, and at the same time adjust the emission efficiency of the signal electrons, enhance the detection signal, and improve the signal-to-noise ratio and measurement sensitivity.

[0058] For example, the deceleration voltage source has a grounding branch, which can promptly conduct away the charge accumulated on the wafer surface through the grounding branch. In addition, in conventional solutions, the contact area between the ejector pin 20 and the oxide layer removal area 51 is small, while the conductive layer 12 and the oxide layer removal area 51 can have a larger contact area. Therefore, the charge accumulated on the wafer surface can be conducted away more quickly, avoiding potential drift caused by charge accumulation, which leads to image blurring.

[0059] In other embodiments, such as Figure 9As shown, the electrostatic chuck 10 is further provided with a plurality of pins 13, which penetrate the electrostatic chuck 10 and are positioned opposite at least a portion of the oxide layer removal area on the back side of the wafer W. When the pins 13 contact the oxide layer removal area, they serve as a supplementary or backup conductive path for applying voltage to the wafer W. Specifically, the conductive layer 12 is connected to a first voltage source 123, and the pins 13 are connected to a second voltage source 131. When the wafer W is attracted, the conductive layer 12 and the pins 13 respectively make at least partial contact with the corresponding oxide layer removal area on the back side of the wafer W, thus establishing conductivity. The first voltage source 123 provides a first voltage to the wafer W, and the second voltage source 131 provides a second voltage to the wafer W. Both the first and second voltages are decelerating voltages, and the first and second voltages are equal to ensure uniform voltage distribution across the wafer W.

[0060] In some embodiments, the first voltage source 123 has a ground branch. In some other embodiments, both the first voltage source 123 and the second voltage source 131 have ground branches. Based on the charged particle beam device 200 of any of the above embodiments, the present invention also discloses a wafer processing method, which includes:

[0061] Step S10: Before the electrostatic chuck assembly adsorbs the wafer W, the oxide layer in a portion of the back side of the wafer W is removed by the laser generator 205 located in the main chamber 201 and / or the wafer transport system 204, forming an oxide layer removal area 51.

[0062] Step S20: The electrostatic chuck assembly adsorbs the wafer W, making the conductive layer 12 at least partially contact and conduct with the oxide layer removal area 51, and performing subsequent wafer inspection.

[0063] In step S10, "before the electrostatic chuck assembly adsorbs the wafer W" can refer to the wafer W being sent into the main chamber 201 but not yet placed in the electrostatic chuck 10, or it can refer to the wafer W being in any of the following modules: wafer loading module 241, device front-end module 242, load locking cavity module 243, and transfer cavity module 244. It should be noted that the oxide layer on the back side of the wafer W can be removed completely in one step or in multiple steps. For example, the oxide layer can be partially removed in one or more modules of the wafer transfer system 204 before the wafer is sent into the main chamber 201. The remaining oxide layer is then completely removed by the laser generator in the main chamber 201, exposing the bottom surface of the wafer W and reducing oxidation of the wafer W. This invention does not specifically limit the number of times or the location of oxide layer removal on the back side of the wafer W; adjustments can be made according to actual needs.

[0064] In step S20, "the conductive layer 12 and the oxide layer removal area 51 are at least partially in contact and conducting" can mean that the conductive layer 12 and the oxide layer removal area 51 partially overlap in physical contact area to form electrical conduction (e.g., the contact area accounts for 50% of the oxide layer removal area). It can also mean that the conductive layer 12 completely covers the oxide layer removal area 51 and achieves full conduction, that is, the contact area covers 100% of the oxide layer removal area, ensuring the stability of the voltage applied to the wafer W, thereby adjusting the energy of the main electron beam when it reaches the surface of the wafer W, optimizing the imaging resolution and contrast, obtaining a clearer image, and adjusting the emission efficiency of the signal electrons to enhance the detection signal, improve the signal-to-noise ratio and measurement sensitivity.

[0065] It should be noted that, in this document, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Unless otherwise specified, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0066] In the description of this invention, it should be understood that the terms "center," "height," "thickness," "upper," "lower," "vertical," "horizontal," "top," "bottom," "inner," "outer," "axial," "radial," and "circumferential," etc., indicating orientation or positional relationships, are based on the orientation or positional relationships shown in the accompanying drawings and are only for the convenience of describing the invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of the invention. In the description of this invention, unless otherwise stated, "a plurality of" means two or more.

[0067] In the description of this invention, unless otherwise explicitly specified and limited, the terms "installation," "connection," "linking," and "fixing" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this invention according to the specific circumstances.

[0068] In this invention, unless otherwise explicitly specified and limited, "above" or "below" the second feature can include direct contact between the first and second features, or contact between the first and second features through another feature between them. Furthermore, "above," "over," and "on top" of the second feature includes the first feature directly above or diagonally above the second feature, or simply indicates that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "under" the second feature includes the first feature directly below or diagonally below the second feature, or simply indicates that the first feature is at a lower horizontal level than the second feature.

[0069] Although the present invention has been described in detail through the preferred embodiments above, it should be understood that the above description should not be considered as a limitation of the present invention. Various modifications and substitutions to the present invention will be apparent to those skilled in the art after reading the above description. Therefore, the scope of protection of the present invention should be defined by the appended claims.

Claims

1. An electrostatic chuck assembly, characterized in that, include: An electrostatic chuck has several protrusions on it to support the wafer; A ring electrode is disposed around the electrostatic chuck, and the ring electrode is used to connect to a compensation voltage source to reduce electric field distortion near the edge of the wafer; At least a portion of the surface of the boss is provided with a conductive layer.

2. The electrostatic chuck assembly as described in claim 1, characterized in that, The electrostatic chuck assembly is used in a charged particle beam device, and the conductive layer is connected to a deceleration voltage source.

3. The electrostatic chuck assembly as described in claim 2, characterized in that, The conductive layer is also electrically connected to the wafer; the deceleration voltage source provides a deceleration voltage to the wafer to reduce the velocity of the charged particle beam incident on the wafer.

4. The electrostatic chuck assembly as described in claim 1, characterized in that, The protrusion with the conductive layer is the first protrusion, and the protrusion without the conductive layer is the second protrusion. The top surface of the conductive layer located on top of the first protrusion is flush with the top surface of the second protrusion.

5. The electrostatic chuck assembly as described in claim 1, characterized in that, The conductive layer has a shape that includes one or more of the following: ring, fan, strip, circle, ellipse, and arbitrary polygon, as well as an array combination of these shapes.

6. The electrostatic chuck assembly as described in claim 1, characterized in that, The conductive layer is provided on the surface of all the bosses on the electrostatic chuck.

7. A charged particle beam device, characterized in that, include: The main chamber includes a wafer loading position and a wafer observation position; A sample stage is disposed within the main chamber and is capable of moving along a trajectory from the wafer loading position to the wafer observation position. The sample stage is provided with an electrostatic chuck assembly as described in any one of claims 1 to 6; A particle beam irradiation device is located in the main chamber and above the wafer observation position; A wafer transfer system, which is connected to the main chamber, is used to transfer wafers to the electrostatic chuck assembly; A laser generator, disposed within the main chamber and / or the wafer transport system, is used to remove the oxide layer in a portion of the back side of the wafer before the electrostatic chuck assembly adsorbs the wafer, thereby forming an oxide layer removal area.

8. The charged particle beam device as described in claim 7, characterized in that, The shape of the oxide layer removal area includes one or more of circles, ellipses, and arbitrary polygons, as well as arrays of these shapes.

9. The charged particle beam device as described in claim 7, characterized in that, The wafer transport system includes one or more of a wafer loading module, a device front-end module, a load locking cavity module, and a transport cavity module, and the laser generator is disposed in one or more modules within the wafer transport system.

10. The charged particle beam device as claimed in claim 7, characterized in that, The conductive layer is connected to the deceleration voltage source.

11. The charged particle beam device as claimed in claim 10, characterized in that, When the wafer is adsorbed, the conductive layer makes at least partial contact with the oxide layer removal area on the back of the wafer, and the deceleration voltage source provides a deceleration voltage to the wafer.

12. The charged particle beam device as claimed in claim 11, characterized in that, The electrostatic chuck is further provided with a plurality of pins, which are disposed through the electrostatic chuck and are opposite to at least a portion of the oxide layer removal area on the back side of the wafer.

13. The charged particle beam device as claimed in claim 12, characterized in that, Also includes: A first voltage source is connected to the conductive layer; A second voltage source is connected to the ejector pin; When the wafer is adsorbed, the conductive layer and the ejector pin respectively make at least partial contact with the corresponding oxide layer removal area on the back side of the wafer to conduct electricity; The first voltage source provides a first voltage to the wafer, and the second voltage source provides a second voltage to the wafer, wherein the first voltage and the second voltage are equal.

14. The charged particle beam device as claimed in claim 7, characterized in that, The laser generator emits a laser pulse with a number of pulses greater than or equal to 1, and the diameter of each laser pulse spot is less than or equal to 10 micrometers.

15. A wafer processing method, characterized in that, Implemented using the charged particle beam device as described in any one of claims 7-14, comprising: Before the electrostatic chuck assembly picks up the wafer, a laser generator located in the main chamber and / or wafer transport system removes the oxide layer in a portion of the back side of the wafer, forming an oxide layer removal area. The electrostatic chuck assembly adsorbs the wafer, making the conductive layer at least partially contact and conduct electricity with the oxide layer removal area, thus enabling subsequent wafer inspection.

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