Wafer probing structure and wafer probing equipment
By setting up an FPGA module on the mounting plate of the wafer needle test structure, the problem of inconvenient adjustment of test parameters in the prior art is solved, and more efficient bare crystal test parameter adjustment and program control are achieved.
Patent Information
- Application Number
- CN202420636636.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-03-28
- Publication Date
- 2024-12-10
- Estimated Expiration
- 2034-03-28
AI Technical Summary
In the existing flash wafer needle test structure, the test program is subject to the original control chip factory, which makes it inconvenient to adjust the test parameters.
The FPGA module is set up on the mounting board of the wafer needle test structure, and the digital programming capability is realized through the FPGA module, allowing testers to adjust the test program parameters according to their needs.
It improves the convenience of adjusting bare crystal test parameters and enhances the controllability and flexibility of the test program.
Smart Images
Figure CN222145171U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the technical field of wafer testing, in particular to a wafer needle testing structure and a wafer needle testing device. Background Art
[0002] A bare crystal, also known as a bare chip or die, is a small piece of integrated circuit body made of semiconductor material that has not been packaged. The intended function of the integrated circuit is realized on this small piece of semiconductor.
[0003] The bare wafer needs to be tested before it is put into use. The current flash memory wafer probe test structure uses the flash memory control chip as the main control end, and is combined with a wafer probe probe card to achieve the purpose of flash memory wafer probe test; however, under such a combined structure, in addition to the flash memory control chip, the test program is subject to the control chip original factory, which is not conducive to the adjustment of test parameters. Utility Model Content
[0004] The main purpose of the utility model is to provide a wafer probe structure and a wafer probe device, aiming to improve the convenience of adjusting bare wafer test parameters.
[0005] To achieve the above-mentioned purpose, the utility model proposes a wafer probe test structure, which includes a probe card and a mounting plate, wherein the probe card is used to be electrically connected to the wafer; the mounting plate is connected to the probe card, the mounting plate is used to transmit test information, the mounting plate is provided with an FPGA module, and the mounting plate, the probe card and the FPGA module are electrically connected.
[0006] In one embodiment of the utility model, the mounting board is provided with a mounting surface, the FPGA module is arranged on the mounting surface, the probe card is connected to the mounting board at an angle and is located on the same side of the mounting board as the FPGA module, and the side of the mounting board facing away from the mounting surface is used for connecting a driving component.
[0007] In an embodiment of the present invention, at least a portion of the mounting plate is a PCB board.
[0008] In one embodiment of the present invention, the wafer probe structure further includes a connector, one end of the connector is connected to the mounting board, the other end of the connector is connected to the probe card, and the mounting board, the connector and the probe card are electrically connected.
[0009] In one embodiment of the present invention, the connector includes a test board, a loading board and a probe seat, the test board is connected to the mounting board, the loading board is connected to the test board, the probe seat is connected to the loading board, and the probe card is installed on the probe seat.
[0010] In an embodiment of the present invention, the connector is a high frequency bandwidth connector; and / or the probe card is a high frequency bandwidth probe card.
[0011] The utility model also provides a wafer probe device, which includes a machine platform, a driving mechanism and the wafer probe structure as described above, wherein the driving mechanism is connected to the machine platform, and the mounting plate of the wafer probe structure is connected to the output end of the driving mechanism.
[0012] In one embodiment of the utility model, the driving mechanism includes a sensor and a stepper motor, the machine is provided with a test position, the test position is used to place the wafer to be tested, the stepper motor is connected to the machine, the wafer probe structure is connected to the output end of the stepper motor, and the sensor is arranged on the wafer probe structure corresponding to the test position.
[0013] In an embodiment of the present invention, the wafer probe device further comprises a fixing seat, which is detachably disposed at the testing position of the machine platform and is used to fix the wafer to be tested.
[0014] The utility model provides a FPGA module on the mounting plate of the wafer probe structure, and the FPGA module enables the wafer probe structure to have digital programming capabilities. Through the FPGA module, the tester can change the test program parameters according to the test requirements, thus improving the convenience of adjusting the bare die test parameters. BRIEF DESCRIPTION OF THE DRAWINGS
[0015] In order to more clearly illustrate the embodiments of the utility model or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the utility model. For ordinary technicians in this field, other drawings can be obtained based on the structures shown in these drawings without paying creative work.
[0016] Figure 1 It is a structural schematic diagram of a wafer probe structure in one embodiment of the utility model;
[0017] Figure 2 It is a schematic diagram of the cross-sectional structure of a wafer probe structure in one embodiment of the utility model.
[0018] Description of Figure Numbers:
[0019] Label name Label name 100 Wafer probe structure 31 Test Board 1 Mounting Plate 32 Loading plate 11 Mounting surface 33 Probe holder 2 FPGA Module 4 Probe Card 3 Connectors
[0020] The realization of the purpose, functional features and advantages of the utility model will be further explained in conjunction with embodiments and with reference to the accompanying drawings. DETAILED DESCRIPTION
[0021] The following will be combined with the drawings in the embodiments of the utility model to clearly and completely describe the technical solutions in the embodiments of the utility model. Obviously, the described embodiments are only part of the embodiments of the utility model, not all of the embodiments. Based on the embodiments of the utility model, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the utility model.
[0022] It should be noted that all directional indications in the embodiments of the present invention (such as up, down, left, right, front, back...) are only used to explain the relative position relationship, movement status, etc. between the components under a certain specific posture (as shown in the accompanying drawings). If the specific posture changes, the directional indication will also change accordingly.
[0023] In the present invention, unless otherwise clearly specified and limited, the terms "connection", "fixation", etc. should be understood in a broad sense. For example, "fixation" can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements, unless otherwise clearly defined. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.
[0024] In addition, in the present utility model, descriptions such as "first", "second", etc. are only used for descriptive purposes and cannot be understood as indicating or implying their relative importance or implicitly indicating the number of technical features indicated. Therefore, the features defined as "first" and "second" may explicitly or implicitly include at least one of the features. In addition, the meaning of "and / or" appearing in the full text is to include three parallel solutions. Taking "A and / or B as an example", it includes solution A, or solution B, or solutions that satisfy both A and B. In addition, the technical solutions between the various embodiments can be combined with each other, but it must be based on the ability of ordinary technicians in this field to implement. When the combination of technical solutions is contradictory or cannot be implemented, it should be deemed that such combination of technical solutions does not exist and is not within the scope of protection required by the present utility model.
[0025] like Figure 1 As shown, the utility model proposes a wafer probe test structure 100, which includes a probe card 4 and a mounting plate 1. The probe card 4 is used to be electrically connected to the wafer; the mounting plate 1 is connected to the probe card 4, and the mounting plate 1 is used to transmit test information. The mounting plate 1 is provided with an FPGA module 2, and the mounting plate 1, the probe card 4 and the FPGA module 2 are electrically connected.
[0026] In this embodiment, the wafer probe test structure 100 includes at least a probe card 4 and a mounting plate 1. The probe card 4 is connected to the mounting plate 1. The probe card 4 is used to electrically connect the wafer to be tested. The probe card 4 can transmit signals between the wafer to be tested and the mounting plate 1. The mounting plate 1 is electrically connected to the control chip of the wafer probe test for transmitting test signals. At the same time, an FPGA module 2 is arranged on the mounting plate 1. The tester can change the parameters of the test program in real time according to the test requirements of the wafer through the FPGA module 2. In this way, the wafer probe test structure 100 has a controllable test program, and the test parameters of the wafer probe test structure 100 are easy to adjust.
[0027] In actual implementation, the FPGA module 2 is a high-speed FPGA field programmable gate array element, so that the wafer probe structure 100 has a controller element that can provide high-speed testing.
[0028] In one embodiment of the present invention, Figure 1 As shown, the mounting board 1 is provided with a mounting surface 11, the FPGA module 2 is arranged on the mounting surface 11, the probe card 4 is connected to the mounting board 1 at an angle and is located on the same side of the mounting board 1 as the FPGA module 2, and the side of the mounting board 1 facing away from the mounting surface 11 is used for connecting the driving component.
[0029] In this embodiment, the FPGA module 2 is arranged on the mounting surface 11, and the probe card 4 is also arranged on the side of the mounting plate 1 having the mounting surface 11. The side of the mounting plate 1 facing away from the mounting surface 11 is used to connect the driving member, that is, the mounting surface 11 of the mounting plate 1 is arranged to face outward, thereby providing a setting space for the FPGA module 2 and the probe card 4, and facilitating the observation of the working status of the probe card 4 or the replacement of the probe card 4. In actual implementation, the probe card 4 is vertically connected to the mounting plate 1, and when the mounting plate 1 moves toward the wafer to be tested, the probe card 4 is facing the wafer to be tested.
[0030] In one embodiment of the present invention, Figure 1 As shown, at least a portion of the mounting board 1 is a PCB board.
[0031] In this embodiment, at least part of the mounting board 1 is a PCB board, and the FPGA module 2 can be integrated into the PCB board. Compared with the connection through the flat cable, the anti-interference ability of the present application is stronger. In actual implementation, the mounting board 1 also has other structures for realizing physical connection, such as connection holes, snap-fit structures or positioning structures, etc., which are not specifically limited here.
[0032] In one embodiment of the present invention, Figure 1 As shown, the wafer probe structure 100 further includes a connector 3 , one end of the connector 3 is connected to the mounting board 1 , and the other end of the connector 3 is connected to the probe card 4 . The mounting board 1 , the connector 3 and the probe card 4 are electrically connected.
[0033] In this embodiment, the wafer probe structure 100 realizes the physical and electrical connection between the mounting board 1 and the probe card 4 through the connector 3, so that the mounting board 1 and the probe card 4 do not need to be connected by a cable, so as to reduce the attenuation of the signal transmission between the mounting board 1 and the probe card 4 and improve the strength of the signal transmitted between the mounting board 1 and the probe card 4, so that the wafer probe structure 100 can perform high-frequency testing on the wafer.
[0034] In actual implementation, Figure 1 and Figure 2 As shown, the connector 3 includes a test board 31, a loading board 32 and a probe seat 33. The test board 31 is connected to the mounting board 1, the loading board 32 is connected to the test board 31, the probe seat 33 is connected to the loading board 32, the probe card 4 is installed on the probe seat 33, the probe card 4 is detachably connected to the probe seat 33, and the probe card 4 and the probe seat 33 can be electrically connected through spring pins.
[0035] It is understandable that in order to make the probe card test uniform in horizontal force, the related art often connects the probe card 4 through a cable, and avoids the middle position of the probe card 4, and accesses from the periphery of the probe card 4, resulting in a lengthy line and limited test frequency and speed. However, the present application connects the mounting plate 1 and the probe card 4 through the test board 31, the loading plate 32 and the probe seat 33, and directly accesses the probe card 4 from the middle position of the probe seat 33 through the connector 3, so that the entire connection line is the shortest, so that the wafer probe structure 100 can be tested at high speed.
[0036] In one embodiment of the present invention, the connector 3 is a high frequency bandwidth connector; and / or the probe card 4 is a high frequency bandwidth probe card.
[0037] In this embodiment, connector 3 is a board-to-board connector with a high frequency bandwidth, and probe card 4 is a small-volume probe card that can support a high frequency bandwidth. In this way, the high-speed signal of FPGA module 2 can be transmitted to the wafer to be tested as realistically as possible, so that the wafer probe test equipment can realize high-speed flash memory wafer probe test and effectively screen out high-quality wafers.
[0038] The utility model also proposes a wafer probe device, which includes a machine platform, a driving mechanism and a wafer probe structure 100. The specific structure of the wafer probe structure 100 refers to the above embodiment. Since the wafer probe device adopts all the technical solutions of all the above embodiments, it has at least all the beneficial effects brought by the technical solutions of the above embodiments, which will not be described one by one here.
[0039] In this embodiment, the wafer probe device is composed of a machine platform, a driving mechanism and a wafer probe structure 100. The driving mechanism is connected to the machine platform, and the mounting plate 1 of the wafer probe structure 100 is connected to the output end of the driving mechanism; the driving mechanism drives the wafer probe structure 100 to approach the wafer to be tested so that the probe board is electrically connected to the wafer to be tested, and the wafer probe structure 100 tests the wafer to be tested. When the test is completed, the driving mechanism drives the wafer probe structure 100 away from the wafer so that the wafer can be replaced.
[0040] In actual implementation, the wafer probe test equipment also has a control host, which is electrically connected to the drive mechanism and the wafer probe test structure 100. The tester can adjust the operation of the drive mechanism and the wafer probe test structure 100 and adjust the test parameters of the wafer through the control host. The control host can receive and display the test results of the wafer.
[0041] In one embodiment of the utility model, the driving mechanism includes a sensor and a stepper motor. The machine is provided with a test position for placing a wafer to be tested. The stepper motor is connected to the machine. The wafer probe structure 100 is connected to the output end of the stepper motor. The sensor corresponding to the test position is provided on the wafer probe structure 100.
[0042] In this embodiment, the driving mechanism is composed of a sensor and a stepper motor. The sensor is used to sense the distance between the probe board and the wafer to be tested, that is, the current position of the probe board. The sensor transmits the position signal of the probe board to the control chip, and the control chip controls the running state and running direction of the stepper motor through the position signal.
[0043] In actual implementation, the sensor may be a laser sensor, a contact position sensor, a photoelectric sensor, a non-contact sensor, or a combination of the above sensors.
[0044] In an embodiment of the present invention, the wafer probe test device further comprises a fixing seat, which is detachably disposed at a test position of the machine platform and is used to fix the wafer to be tested.
[0045] In this embodiment, the fixing seat can fix the wafer to be tested by vacuum adsorption, and the fixing seat can be detachably connected to the machine platform by means of snap-fit or locking mechanism, so that the fixing seat can be disassembled and assembled separately. In actual implementation, the fixing seat can also fix the wafer to be tested by a snap-fit structure, which is not specifically limited here.
[0046] The above description is only a preferred embodiment of the utility model, and does not limit the patent scope of the utility model. All equivalent structural changes made by using the contents of the utility model specification and drawings under the concept of the utility model, or directly / indirectly used in other related technical fields are included in the patent protection scope of the utility model.
Claims
1. A wafer probe structure, characterized in that: The wafer probe structure comprises: a probe card for electrically connecting to the wafer; and A mounting plate is connected to the probe card, the mounting plate is used to transmit test information, the mounting plate is provided with an FPGA module, and the mounting plate, the probe card and the FPGA module are electrically connected.
2. The wafer probe structure according to claim 1, characterized in that: The mounting board is provided with a mounting surface, the FPGA module is arranged on the mounting surface, the probe card is connected to the mounting board at an angle and is located on the same side of the mounting board as the FPGA module, and the side of the mounting board facing away from the mounting surface is used for connecting a driving component.
3. The wafer probe structure according to claim 1, characterized in that: At least a portion of the mounting board is a PCB board.
4. The wafer probe structure according to any one of claims 1 to 3, characterized in that: The wafer probe structure further includes a connector, one end of which is connected to the mounting board, and the other end of which is connected to the probe card. The mounting board, the connector and the probe card are electrically connected.
5. The wafer probe structure according to claim 4, characterized in that: The connector comprises a test board, a loading board and a probe seat, the test board is connected to the mounting board, the loading board is connected to the test board, the probe seat is connected to the loading board, and the probe card is installed on the probe seat.
6. The wafer probe structure according to claim 4, characterized in that: The connector is a high frequency bandwidth connector; and / or the probe card is a high frequency bandwidth probe card.
7. A wafer probe device, characterized in that: The wafer probe device comprises a platform, a driving mechanism and a wafer probe structure according to any one of claims 1 to 6, wherein the driving mechanism is connected to the platform, and the mounting plate of the wafer probe structure is connected to an output end of the driving mechanism.
8. The wafer probe device according to claim 7, characterized in that: The driving mechanism includes a sensor and a stepper motor. The machine is provided with a test position, and the test position is used to place the wafer to be tested. The stepper motor is connected to the machine, and the wafer probe structure is connected to the output end of the stepper motor. The sensor is arranged on the wafer probe structure corresponding to the test position.
9. The wafer probe device according to claim 8, characterized in that: The wafer probe device further comprises a fixing seat, which is detachably arranged at the testing position of the machine platform and is used to fix the wafer to be tested.