Packaging structure
By designing the recessed and curved dielectric layers of metal liners in the chip packaging structure and setting electrical connections thereon, the problems of warping and bridging of the packaging structure in the prior art are solved, and a higher product yield is achieved and lower production costs.
Patent Information
- Application Number
- CN202420095358.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-01-15
- Publication Date
- 2024-12-10
- Estimated Expiration
- 2034-01-15
AI Technical Summary
The prior art flip chip square flat pinless packaging structure has warping problems during the production process, resulting in inaccurate connections and empty soldering, and the need to print solder paste on the motherboard may cause bridging, reducing product yield, and The process is complex and costly.
The packaging structure is adopted including a chip, a plurality of metal gaskets and a dielectric layer, wherein the lower surface of the metal gasket is recessed toward the inner side of the dielectric layer, the dielectric layer is curved, and a first electrical connection member is provided on the metal gasket. Additional plating and microshading etching processes are avoided, warping problems are solved by adjusting the height of the first electrical connection and no solder paste is required when the motherboard is connected.
It effectively avoids air welding and bridging problems, reduces production costs and process complexity, and improves the yield rate of the product.
Smart Images
Figure CN222146216U_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of chip manufacturing, and in particular, to a packaging structure. Background Art
[0002] The packaging structure of the prior art flip chip quad flat no-leads package (Flip Chip QFN, Flip Chip Quad Flat No-leads Package) is usually connected to a motherboard through a metal pad. Figure 1 FIG. 2 shows a side view schematic diagram of a packaging structure of the prior art. Figure 1 As shown, the packaging structure of the prior art includes a chip 91, a dielectric layer 92 and a metal pad 93, wherein the dielectric layer 92 covers the chip 91, the metal pad 93 protrudes from the bottom of the dielectric layer 92, the metal pad 93 is connected to the bump 96 of the chip 91 through a first electroplating layer 95, and the metal pad 93 is connected to the motherboard through a second electroplating layer 94.
[0003] Figure 2 Shown as Figure 1 The schematic diagram of the manufacturing process of a packaging structure according to the prior art of the present application is shown in FIG. Figure 2 As shown, the manufacturing process of the package structure includes multiple steps: step 9001: providing a metal plate, forming a first electroplating layer 902 and a second electroplating layer 903 on both sides of the metal plate by electroplating, and then using a lithography etching process to make the metal plate into a patterned metal layer 901; step 9002: arranging a chip 904, so that the bump 906 of the chip 904 is connected to the metal layer 901 through the first electroplating layer 902, and arranging a dielectric layer 905 above the metal layer 901, so that the dielectric layer 905 covers the chip 904 and the bump 906; step 9003: etching the metal layer 901 to form a metal pad 907. It can be seen that the metal pad needs to go through multiple steps when it is manufactured, and the process is time-consuming and the manufacturing cost is high.
[0004] Another problem with the existing packaging structure is that during the manufacturing process, the edge of the packaging structure may warp upward or downward relative to the center of the packaging structure, which may cause some metal pads on the packaging structure to be unable to accurately align with the preset connection position on the motherboard or be too far away from the connection position, thereby causing empty soldering when the motherboard is connected to the packaging structure, thereby reducing the yield of the product; in addition, when the existing packaging structure is connected to the motherboard, solder paste is printed on the motherboard to connect the metal pads of the packaging structure to the motherboard, but printing solder paste on the motherboard may cause bridging of the circuits on the motherboard, further reducing the yield of the product.
[0005] In summary, the art needs to provide a packaging structure that can overcome the defects of the prior art. Utility Model Content
[0006] The present application provides a packaging structure, which can solve the problems of the prior art. The purpose of the present application is achieved through the following technical solutions.
[0007] One embodiment of the present application provides a packaging structure, which includes: a chip, the chip includes an active surface; a plurality of metal pads, the plurality of metal pads are separated and arranged on the active surface; a dielectric layer, the dielectric layer covers the chip and covers the plurality of metal pads, the lower surface of the metal pad is exposed from the lower surface of the dielectric layer, the lower surface of the metal pad is recessed toward the inner side of the dielectric layer relative to the lower surface of the dielectric layer, and the dielectric layer is curved around the lower surface of the metal pad; a plurality of first electrical connectors, the first electrical connectors are arranged on the lower surface of the metal pad.
[0008] In some optional embodiments, according to the packaging structure provided by one of the above embodiments of the present application, the packaging structure further includes a plurality of second electrical connectors, and the metal pad is electrically connected to the chip through the second electrical connectors.
[0009] In some optional embodiments, according to the packaging structure provided by one of the above embodiments of the present application, the size of each first electrical connector is determined according to the position of each first electrical connector and the shape of the dielectric layer.
[0010] In some optional embodiments, according to a packaging structure provided according to one of the above embodiments of the present application, the edge of the dielectric layer is bent upward relative to the center of the dielectric layer, and the size of the first electrical connector near the edge of the dielectric layer is larger than the size of the first electrical connector near the center of the dielectric layer.
[0011] In some optional embodiments, according to a packaging structure provided according to one of the above embodiments of the present application, the edge of the dielectric layer is bent downward relative to the center of the dielectric layer, and the size of the first electrical connector near the edge of the dielectric layer is smaller than the size of the first electrical connector near the center of the dielectric layer.
[0012] In some optional embodiments, according to the packaging structure provided by one of the above embodiments of the present application, the first electrical connection member is a solder ball.
[0013] In some optional embodiments, according to the packaging structure provided by one of the embodiments of the present application, the side surface of the metal pad has a contact surface in contact with the dielectric layer, and the contact surface is a curved surface.
[0014] In some optional embodiments, according to the packaging structure provided by one of the above embodiments of the present application, the contact surface is a convex surface.
[0015] In some optional embodiments, according to the packaging structure provided by one of the above embodiments of the present application, the contact surface is a concave surface.
[0016] In some optional embodiments, according to the packaging structure provided by one of the above embodiments of the present application, the metal pad has a lower surface in contact with the first electrical connector, and the lower surface is a concave surface.
[0017] In some optional embodiments, according to the packaging structure provided by one of the above embodiments of the present application, the second electrical connection member is a solder ball.
[0018] The advantages of the packaging structure according to the implementation mode of the present application are: it is possible to avoid empty soldering when the packaging structure warps by adjusting the height of the first electrical connector; when connecting to the motherboard, there is no need to print additional connection materials such as solder paste on the motherboard to avoid bridging problems on the motherboard; there is no need to use electroplating and lithography etching processes, which reduces the complexity of the manufacturing process while improving the product yield and reducing production costs. BRIEF DESCRIPTION OF THE DRAWINGS
[0019] Other features, objectives and advantages of the present application will become more apparent through the detailed description of non-limiting embodiments of the present application with reference to the following drawings.
[0020] Figure 1 A schematic side view of a packaging structure of the prior art is shown;
[0021] Figure 2 Shown as Figure 1 The schematic diagram of the manufacturing process of a packaging structure according to a prior art of the present application is shown;
[0022] Figure 3 A schematic side view of a packaging structure according to an embodiment of the present application is shown;
[0023] Figure 4 A schematic diagram showing a first electrical connector of a packaging structure according to an embodiment of the present application is shown;
[0024] Figure 5 A schematic diagram showing a first electrical connector of a packaging structure according to another embodiment of the present application is shown;
[0025] Figure 6 A schematic diagram showing a packaging structure in which an edge of a dielectric layer is bent upward relative to a center according to an embodiment of the present application;
[0026] Figure 7 A schematic diagram showing a packaging structure in which an edge of a dielectric layer is bent downward relative to a center according to an embodiment of the present application;
[0027] Figure 8 Shown as Figure 3 The diagram shown is a schematic diagram of a production process including multiple packaging structures according to an embodiment of the present application.
[0028] Reference numerals and component names: 1-chip, 2-metal pad, 3-dielectric layer, 4-first electrical connector, 5-second electrical connector, 6-bump, 11-active surface, 31-contact surface, 32-lower surface, 91-chip, 92-dielectric layer, 93-metal pad, second electroplating layer, 94-second electroplating layer, 95-first electroplating layer, 96-bump, 101-metal layer, 102-metal pad, 103-chip, 104-bump, 105-second electrical connector, 106-dielectric layer, 107-first electrical connector, 108-first component, 901-metal layer, 902-first electroplating layer, 903-second electroplating layer, 904-chip, 905-dielectric layer, 906-bump, 907-metal pad. DETAILED DESCRIPTION
[0029] The specific implementation methods of the present application are described below in conjunction with the accompanying drawings and examples. Through the contents recorded in this specification, those skilled in the art can clearly and completely understand the technical solutions, technical problems solved, and technical effects produced by the present application. It is understood that the specific embodiments described herein are only used to explain the present application, rather than to limit the present application. In addition, for ease of description, only the parts related to the present application are shown in the accompanying drawings.
[0030] It should be readily understood that the meanings of “on,” “over,” and “over” in this application should be interpreted in the broadest manner, so that “on” not only means “directly on something,” but also means “on something” including the presence of intermediate components or layers therebetween.
[0031] Additionally, for ease of description, spatially relative terms such as "below," "beneath," "lower," "above," "upper," etc. may be used herein to describe the relationship of one element or component to another element or component illustrated in the drawings. The spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the drawings. The device may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein may likewise be interpreted accordingly.
[0032] It should be noted that the structures, proportions, sizes, etc. illustrated in the drawings of the specification are only used to match the contents recorded in the specification for the understanding and reading of those skilled in the art, and are not used to limit the limiting conditions for the implementation of the present application, so they have no substantial technical significance. Any modification of the structure, change in the proportional relationship, or adjustment of the size, without affecting the effects and purposes that can be achieved by the present application, should still fall within the scope of the technical content disclosed in the present application. At the same time, the terms such as "on", "first", "second" and "one" quoted in this specification are only for the convenience of narration, and are not used to limit the scope of the implementation of the present application. The change or adjustment of their relative relationship should also be regarded as the scope of the implementation of the present application without substantially changing the technical content.
[0033] The term "layer" as used herein refers to a material portion including an area with a certain thickness. The layer can extend over the entire lower or upper structure, or can have a degree less than the range of the lower or upper structure. In addition, the layer can be a region of a homogeneous or inhomogeneous continuous structure, and its thickness is less than the thickness of the continuous structure. For example, the layer can be located between the top surface and the bottom surface of the continuous structure or between any pair of horizontal planes therebetween. The layer can extend horizontally, vertically and / or along a tapered surface. A substrate can be a layer, one or more layers can be included therein, and / or one or more layers can be present thereon, above and / or below. A layer can include multiple layers. For example, a semiconductor layer can include one or more doped or undoped semiconductor layers, and can have the same or different materials.
[0034] The term "substrate" used herein refers to a material on which a subsequent material layer is added. The substrate itself can be patterned. The material added to the top of the substrate can be patterned or can remain unpatterned. In addition, the substrate can include a variety of semiconductor materials, such as silicon, silicon carbide, gallium nitride, germanium, gallium arsenide, indium phosphide, etc. Alternatively, the substrate can be made of a non-conductive material, such as glass, plastic, sapphire wafer, polyamide fiber (Polyamide, PA), polyimide (Polyimide, PI), epoxy resin (Epoxy), poly-p-phenylene benzobisoxazole (Poly-p-phenylene benzobisoxazole, PBO) fiber, FR-4 epoxy glass cloth laminate, PP (PrePreg, prepreg material or semi-cured resin, semi-cured sheet) or ABF (Ajinomoto Build-up Film) etc. Further alternatively, the substrate can have a semiconductor device or circuit formed therein.
[0035] It should also be noted that the longitudinal section corresponding to the embodiment of the present application may be a section corresponding to the front view direction, the transverse section may be a section corresponding to the right view direction, and the horizontal section may be a section corresponding to the top view direction.
[0036] In addition, the embodiments and features in the embodiments of the present application may be combined with each other without conflict. The present application will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.
[0037] Figure 3 FIG. 2 shows a schematic side view of a packaging structure according to an embodiment of the present application. Figure 3 As shown, the packaging structure includes: a chip 1, the chip 1 includes an active surface 11; a plurality of metal pads 2, the plurality of metal pads 2 are separated and arranged on the active surface 11; a dielectric layer 3, the dielectric layer 3 covers the chip 1 and covers the plurality of metal pads 2, the lower surface 32 of the metal pad 2 is exposed from the lower surface 32 of the dielectric layer 3, the lower surface 32 of the metal pad 2 is recessed toward the inner side of the dielectric layer 3 relative to the lower surface 32 of the dielectric layer 3, and the dielectric layer 3 is curved around the lower surface 32 of the metal pad 2; a plurality of first electrical connectors 4, the first electrical connectors 4 are arranged on the lower surface 32 of the metal pad 2.
[0038] In some optional embodiments, according to the packaging structure provided by one of the above embodiments of the present application, the packaging structure further includes a plurality of second electrical connectors 5 , and the metal pad 2 is electrically connected to the chip 1 through the second electrical connectors 5 .
[0039] In some optional embodiments, according to the packaging structure provided by one of the above embodiments of the present application, a bump 6 is provided on the active surface 11 of the chip 1, and the bump 6 on the chip 1 is connected to the metal pad 2 through the second electrical connector 5.
[0040] In some optional embodiments, according to the packaging structure provided by one of the above embodiments of the present application, the size of each first electrical connector 4 is determined according to the position of each first electrical connector 4 and the shape of the dielectric layer 3 .
[0041] In some optional embodiments, according to the packaging structure provided by one of the above embodiments of the present application, the first electrical connector 4 includes but is not limited to a solder ball, and the solder ball is formed by printing solder paste or planting a ball.
[0042] In some optional embodiments, according to the packaging structure provided by one of the embodiments of the present application, the side surface of the metal pad 2 has a contact surface 31 in contact with the dielectric layer 3, and the contact surface 31 is a curved surface.
[0043] In some optional embodiments, according to the packaging structure provided by one of the above embodiments of the present application, the second electrical connector 5 includes but is not limited to a solder ball, and the solder ball is formed by printing solder paste or planting a ball.
[0044] Figure 4 FIG. 4 is a schematic diagram showing a first electrical connector 4 of a packaging structure according to an embodiment of the present application. Figure 4 As shown, the side surface of the metal pad 2 has a contact surface 31 in contact with the dielectric layer 3, and the contact surface 31 is a concave surface.
[0045] Figure 5 FIG. 4 is a schematic diagram showing a first electrical connector 4 of a packaging structure according to another embodiment of the present application. Figure 5 As shown, the side surface of the metal pad 2 has a contact surface 31 in contact with the dielectric layer 3, and the contact surface 31 is a convex surface.
[0046] like Figure 4-5 As shown, the metal pad 2 has a lower surface 32 in contact with the first electrical connector 4 , and the lower surface 32 is a concave surface, and the lower surface 32 is recessed toward the inner side of the dielectric layer 3 .
[0047] Figure 6 FIG. 2 shows a schematic diagram of a packaging structure in which the edge of the dielectric layer 3 is bent upward relative to the center according to an embodiment of the present application. Figure 6 As shown, the edge of the dielectric layer 3 is bent upward relative to the center of the dielectric layer 3 , and the size of the first electrical connector 4 close to the edge of the dielectric layer 3 is larger than the size of the first electrical connector 4 close to the center of the dielectric layer 3 .
[0048] Figure 7 FIG. 4 is a schematic diagram showing a packaging structure in which the edge of the dielectric layer 3 is bent downward relative to the center according to an embodiment of the present application. Figure 7 As shown, the edge of the dielectric layer 3 is bent downward relative to the center of the dielectric layer 3 , and the size of the first electrical connector 4 close to the edge of the dielectric layer 3 is smaller than the size of the first electrical connector 4 close to the center of the dielectric layer 3 .
[0049] Figure 8 Shown as Figure 3 The schematic diagram of the production process of the packaging structure shown in FIG. Figure 8 As shown, the production process of the package structure includes multiple steps:
[0050] Step 1001: providing a metal plate, etching the metal plate to form a metal layer 101 and a metal pad 102 on the metal layer 101;
[0051] Step 1002: arrange the chip 103 so that the bump 104 of the chip 103 is connected to the metal pad 102 through the second electrical connector 105;
[0052] Step 1003: Dispose a dielectric layer 106 on the metal layer 101 so that the dielectric layer 106 covers the chip 103, the bump 104 and the metal pad 102;
[0053] Step 1004: etching the metal layer 101 to expose the metal liner 102 from the dielectric layer 106 and form a first component 108, wherein the surface of the metal liner 102 is recessed toward the inner side of the dielectric layer 106 relative to the dielectric layer 106; and
[0054] Step 1005 : Flip the first component 108 , and set a first electrical connector 107 on the surface of the metal pad 102 exposed from the dielectric layer 106 .
[0055] The advantages of the packaging structure according to the implementation mode of the present application are: it is possible to avoid empty soldering when the packaging structure warps by adjusting the height of the first electrical connector; when connecting to the motherboard, there is no need to print additional connection materials such as solder paste on the motherboard to avoid bridging problems on the motherboard; there is no need to use electroplating and lithography etching processes, which reduces the complexity of the manufacturing process while improving the product yield and reducing production costs.
[0056] Although the present application has been described and illustrated with reference to the specific embodiments of the present application, these descriptions and illustrations are not intended to limit the present application. It will be clearly understood by those skilled in the art that various changes may be made, and equivalent elements may be substituted within the embodiments without departing from the scope of protection of the present application as defined by the claims. Due to variables in the manufacturing process, etc., there may be differences between the technical reproduction in the present application and the actual device. There may be other embodiments of the present application that are not specifically described. The description and illustrations should be regarded as illustrative, not restrictive, and modifications may be made according to the purpose and spirit of the present application, all of which are within the scope of protection of the claims. Although the methods disclosed herein have been described with reference to specific operations performed in a specific order, it should be understood that these operations may be recombined, subdivided or arranged to form equivalent methods without departing from the teachings of the present application. Therefore, unless specifically indicated herein, the order and grouping of operations do not limit the present application.
Claims
1. A packaging structure, characterized in that: include: A chip, wherein the chip includes an active surface; A plurality of metal pads, wherein the plurality of metal pads are separately disposed on the active surface; a dielectric layer, the dielectric layer covering the chip and surrounding the plurality of metal pads, the lower surface of the metal pad being exposed from the lower surface of the dielectric layer, the lower surface of the metal pad being recessed toward the inner side of the dielectric layer relative to the lower surface of the dielectric layer, and the dielectric layer being curved around the lower surface of the metal pad; A plurality of first electrical connectors are disposed on a lower surface of the metal pad.
2. The packaging structure according to claim 1, characterized in that: The packaging structure further includes a plurality of second electrical connectors, and the metal pad is electrically connected to the chip through the second electrical connectors.
3. The packaging structure according to claim 2, characterized in that: The size of each of the first electrical connectors is determined according to the position of each of the first electrical connectors and the shape of the dielectric layer.
4. The packaging structure according to claim 3, characterized in that: The edge of the dielectric layer is bent upward relative to the center of the dielectric layer, and the size of the first electrical connector near the edge of the dielectric layer is larger than the size of the first electrical connector near the center of the dielectric layer.
5. The packaging structure according to claim 3, characterized in that: The edge of the dielectric layer is bent downward relative to the center of the dielectric layer, and the size of the first electrical connector near the edge of the dielectric layer is smaller than the size of the first electrical connector near the center of the dielectric layer.
6. The packaging structure according to claim 1, characterized in that: The first electrical connection member is a solder ball.
7. The packaging structure according to claim 1, characterized in that: The side surface of the metal pad has a contact surface in contact with the dielectric layer, and the contact surface is a curved surface.
8. The packaging structure according to claim 7, characterized in that: The contact surface is a convex surface.
9. The packaging structure according to claim 7, characterized in that: The contact surface is a concave surface.
10. The packaging structure according to claim 1, characterized in that: The metal pad has a lower surface in contact with the first electrical connector, and the lower surface is a concave surface.