Multilayer ceramic capacitor

Abstract

The utility model provides a laminated ceramic capacitor with higher reliability. A multilayer ceramic capacitor (1) is provided with a multilayer body (2) including dielectric layers (14) and internal electrodes (15). The internal electrode (15) has a first internal electrode (15A) led out to a first end surface (CA) of the laminated body and a second internal electrode (15B) led out to a second end surface (CB). The dielectric layer (14) includes a first dielectric layer (17) and a second dielectric layer (18). The first dielectric layer (17) is disposed between the first internal electrode and the second internal electrode, and the second dielectric layer (18) is disposed so as to overlap the first dielectric layer in the stacking direction (T) in a region where the internal electrode is not disposed between the first dielectric layers facing each other across the internal electrode. A gap (19) is provided between the internal electrode and the second dielectric layer adjacent to the internal electrode in the longitudinal direction (L).

Description

Technical Field

[0001] The utility model relates to a stacked ceramic capacitor. Background Art

[0002] When manufacturing laminated electronic components such as laminated ceramic capacitors, multiple ceramic green sheets with printed internal electrodes are stacked together. If the internal electrodes are printed on the ceramic green sheets, a step is generated between the portion with the internal electrodes printed and the portion without the internal electrodes printed. Therefore, if multiple ceramic green sheets with printed internal electrodes are stacked and pressed to manufacture a mother laminate, the thickness of the portion with the internal electrodes printed and the portion without the internal electrodes printed in the mother laminate is different. In this way, the laminated electronic components manufactured from the laminated small pieces obtained by cutting the mother laminate are deformed.

[0003] In order to prevent such deformation of the laminated electronic component, a step-absorbing paste is printed on a portion where the internal electrode is not printed, thereby alleviating the step (see Patent Document 1).

[0004] Prior Art Literature

[0005] Patent Literature

[0006] Patent Document 1: Japanese Patent Application Laid-Open No. 2005-079284

[0007] However, when printing the dielectric for step elimination, if the dielectric covers the internal electrode, the smoothness of the internal electrode may be impaired when the laminate is pressed. In this case, undesirable conditions such as structural defects and poor insulation may occur, and the reliability of the laminated ceramic capacitor may be impaired. Utility Model Content

[0008] Problems to be solved by utility models

[0009] The present invention has been made in view of the above-mentioned problems, and an object of the present invention is to provide a multilayer ceramic capacitor with higher reliability.

[0010] Technical solutions to solve problems

[0011] In order to solve the above-mentioned problems, the laminated ceramic capacitor of the present invention comprises a laminated body including dielectric layers and internal electrodes laminated in a lamination direction, and an external electrode connected to the internal electrode, wherein the laminated body has a first main surface and a second main surface opposite to each other in the lamination direction, a first side surface and a second side surface opposite to each other in a width direction orthogonal to the lamination direction, and a first end surface and a second end surface opposite to each other in a length direction orthogonal to the lamination direction and the width direction, and the internal electrode comprises a dielectric layer and an internal electrode connected to the internal electrode. a first internal electrode at the first end surface and a second internal electrode led out to the second end surface, the dielectric layer includes a first dielectric layer and a second dielectric layer, the first dielectric layer is arranged between the first internal electrode and the second internal electrode, the second dielectric layer is arranged to overlap with the first dielectric layer in the stacking direction in a region between the first dielectric layers opposing each other with the internal electrode interposed therebetween and where the internal electrode is not arranged, and a gap is provided between the internal electrode and the second dielectric layer adjacent to the internal electrode in the longitudinal direction.

[0012] Utility Model Effect

[0013] According to the present invention, a laminated ceramic capacitor with higher reliability can be provided. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Figure 1 It is a schematic perspective view of the multilayer ceramic capacitor 1 .

[0015] Figure 2 is a multilayer ceramic capacitor 1 in Figure 1 A cross-sectional view taken along the II-II direction.

[0016] Figure 3 is a multilayer ceramic capacitor 1 in Figure 2 A partial enlarged view of part P in FIG.

[0017] Figure 4 is a multilayer ceramic capacitor 1 in Figure 1 A cross-sectional view taken along the III-III direction.

[0018] Figure 5 1 is a cross-sectional view of the multilayer ceramic capacitor 1 along the first internal electrode 15A.

[0019] Figure 6 It is an exploded perspective view schematically showing an example of a mother block.

[0020] Description of Reference Numerals

[0021] 1: Multilayer ceramic capacitor;

[0022] 2: laminate;

[0023] 3: External electrode;

[0024] 11: inner layer;

[0025] 14: dielectric layer;

[0026] 15: internal electrode;

[0027] 15a: Opposing portion;

[0028] 15b: lead-out portion;

[0029] 15A: 1st internal electrode;

[0030] 15B: 2nd internal electrode;

[0031] 17: first dielectric layer;

[0032] 18: second dielectric layer;

[0033] 19: gap;

[0034] AA: 1st main side;

[0035] AB: 2nd main side;

[0036] BA: lateral side 1;

[0037] BB: 2nd side;

[0038] CA: 1st end face;

[0039] CB: 2nd end face. DETAILED DESCRIPTION

[0040] Hereinafter, a multilayer ceramic capacitor 1 according to an embodiment of the present invention will be described. Figure 1 It is a schematic perspective view of the multilayer ceramic capacitor 1 . Figure 2 is a multilayer ceramic capacitor 1 in Figure 1 A cross-sectional view taken along the II-II direction. Figure 3 is a multilayer ceramic capacitor 1 in Figure 2 A partial enlarged view of part P in FIG. Figure 4 is a multilayer ceramic capacitor 1 in Figure 1 A cross-sectional view taken along the III-III direction. Figure 5 1 is a cross-sectional view of the multilayer ceramic capacitor 1 along the first internal electrode 15A.

[0041] (Multilayer Ceramic Capacitor 1)

[0042] like Figure 1 as well as Figure 2As shown, the multilayer ceramic capacitor 1 is substantially rectangular parallelepiped and includes a laminate 2 and a pair of external electrodes 3 provided at both ends of the laminate 2. The laminate 2 includes an inner layer portion 11 having a laminated dielectric layer 14 and internal electrodes 15. The laminate 2 is substantially rectangular parallelepiped and has six outer surfaces.

[0043] In this specification, the direction in which the dielectric layers 14 and the internal electrodes 15 are stacked in the multilayer ceramic capacitor 1 is referred to as a stacking direction T. The direction perpendicular to the stacking direction T and in which the external electrodes 3 are arranged is referred to as a length direction L. The direction perpendicular to both the length direction L and the stacking direction T is referred to as a width direction W.

[0044] In the following description, among the six outer surfaces of the stacked body 2, a pair of outer surfaces provided on both sides of the stacking direction T are referred to as principal surfaces A, a pair of outer surfaces extending in the stacking direction T and provided on both sides of the width direction W are referred to as side surfaces B, and a pair of outer surfaces extending in the stacking direction T and provided on both sides of the length direction L are referred to as end surfaces C. One of the principal surfaces A is referred to as principal surface AA, and the other is referred to as principal surface AB. One of the side surfaces B is referred to as side surface BA, and the other is referred to as side surface BB. One of the end surfaces C is referred to as end surface CA, and the other is referred to as end surface CB.

[0045] (Laminate 2)

[0046] The laminate 2 includes a laminate small piece 10 and a pair of side outer layer portions 20 .

[0047] (Laminate Small Piece 10)

[0048] The small laminate piece 10 includes an inner layer portion 11 and a pair of outer layer portions 12 .

[0049] (Inner layer portion 11)

[0050] like Figure 2 as well as Figure 3 As shown, the inner layer portion 11 includes a plurality of dielectric layers 14 stacked in a stacking direction T and internal electrodes 15 .

[0051] (Dielectric layer 14)

[0052] The dielectric layer 14 is made of a dielectric material. The dielectric material can be, for example, a dielectric ceramic containing BaTiO3, CaTiO3, SrTiO3, or CaZrO3. In addition, the dielectric material can also be a dielectric material in which a secondary component such as a Mn compound, a Fe compound, a Cr compound, a Co compound, or a Ni compound is added to these main components.

[0053] (Internal electrode 15)

[0054] Internal electrode 15 is formed by sintering a conductive paste containing metal powder such as Ni, a binder, additives such as a plasticizer or a dispersant, and an organic solvent.

[0055] The internal electrode 15 includes a first internal electrode 15A led out to the first end surface CA and a second internal electrode 15B led out to the second end surface CB. The first internal electrodes 15A and the second internal electrodes 15B are alternately arranged in the stacking direction T.

[0056] The first inner electrode 15A includes a first opposing portion 15Aa opposing the adjacent second inner electrode 15B and a first lead portion 15Ab extending from the first opposing portion 15Aa toward the first end surface CA. The first lead portion 15Ab is exposed at the first end surface CA of the laminate 2. The first inner electrode 15A is separated from the second end surface CB and the two side surfaces B, respectively.

[0057] The second internal electrode 15B has a second opposing portion 15Ba opposed to the adjacent first internal electrode 15A and a second lead portion 15Bb extending from the second opposing portion 15Ba toward the second end face CB. The second lead portion 15Bb is exposed at the second end face CB of the laminate 2. The second internal electrode 15B is separated from the first end face CA and the two side faces B. In addition, the first opposing portion 15Aa and the second opposing portion 15Ba are sometimes collectively referred to as "opposing portion 15a". The first lead portion 15Ab and the second lead portion 15Bb are sometimes collectively referred to as "lead portion 15b".

[0058] (Outer layer 12)

[0059] The outer layer portions 12 are arranged so as to sandwich the inner layer portion 11 in the stacking direction T. Each outer layer portion 12 is made of the same dielectric material as the dielectric layer 14 .

[0060] (Side outer layer portion 20)

[0061] The side outer layer portions 20 are arranged to sandwich both side surfaces of the laminated body small piece 10 in the width direction W of the laminated body small piece 10. In detail, each side outer layer portion 20 covers the inner layer portion 11 and the outer layer portion 12 of both side surfaces of the laminated body small piece 10. Each side outer layer portion 20 is made of the same dielectric material as the dielectric layer 14.

[0062] (External electrode 3)

[0063] Each external electrode 3 is disposed on the end surface C. Each external electrode 3 covers not only the end surface C but also a portion of the main surface A and the side surface B on the end surface C side. Among the external electrodes 3, the external electrode 3 on the first end surface CA side is connected to the first internal electrode 15A, and the external electrode 3 on the second end surface CB side is connected to the second internal electrode 15B. Although not shown in the figure, each external electrode 3 includes, for example, a base electrode layer, a Ni plating layer disposed on the base electrode layer, and a Sn plating layer disposed on the Ni plating layer.

[0064] Here, the dielectric layer 14 includes a first dielectric layer 17 and a second dielectric layer 18. The first dielectric layer 17 is arranged between the first internal electrode 15A and the second internal electrode 15B. The second dielectric layer 18 is arranged to overlap with the first dielectric layer 17 in the stacking direction T in a region where the internal electrode 15 is not arranged between the first dielectric layers 17 that are opposed to each other with the internal electrode 15 interposed therebetween. In other words, on one first dielectric layer 17, any one of the first internal electrode 15A and the second internal electrode 15B and the second dielectric layer 18 are arranged side by side in the longitudinal direction L.

[0065] like Figure 2 , Figure 3 as well as Figure 4 As shown, a gap 19 is provided between the internal electrode 15 and the second dielectric layer 18 adjacent to the internal electrode 15 in the longitudinal direction L. This can prevent the dielectric ceramic from being partially disposed on the internal electrode 15, thereby preventing the smoothness of the internal electrode 15 from being impaired. Therefore, the reliability of the multilayer ceramic capacitor 1 can be improved.

[0066] The dimension of the void 19 in the longitudinal direction L is 0.1% or more and 50% or less of the dimension of the lead portion 15b of the internal electrode 15 that faces the internal electrode 15 that forms the interface of the void 19 in the longitudinal direction L, for example, 0.1 μm or more and 5 μm or less. The dimension of the void 19 in the longitudinal direction L is 0.1% or more of the dimension of the lead portion 15b of the internal electrode 15 that faces the internal electrode 15 that forms the interface of the void 19, thereby making it possible to more appropriately suppress the dielectric ceramic from being partially disposed on the internal electrode 15. The dimension of the void 19 in the longitudinal direction L is 50% or less of the dimension of the lead portion 15b of the internal electrode 15 that faces the internal electrode 15 that forms the interface of the void 19, thereby making it possible to suppress the decrease in the adhesion between the adjacent first dielectric layers 17.

[0067] (Method for measuring the dimension of the gap 19 in the length direction L)

[0068] When measuring the dimension in the length direction L of the void 19, the laminate is polished to expose a predetermined cross section. Then, the exposed cross section is observed using a micrometer or an optical microscope to measure the dimension in the length direction L of the void 19. The predetermined cross section is a cross section parallel to the length direction L and the stacking direction T and passing through the center of each internal electrode 15 in the width direction W. In addition, the dimension in the length direction L of the lead portion 15b is measured in the same manner.

[0069] (Method for Manufacturing Multilayer Ceramic Capacitor 1)

[0070] Next, a method for manufacturing the multilayer ceramic capacitor 1 will be described. Figure 6 It is an exploded perspective view schematically showing an example of the mother laminated body 104 .

[0071] First, a ceramic green sheet for the first dielectric layer 17, a conductive paste for the internal electrode 15, and a dielectric paste 118 for the second dielectric layer 18 are prepared. These ceramic green sheets and the dielectric paste 118 contain a binder and a solvent. For the dielectric paste 118 for the second dielectric layer 18, a dielectric paste in which the amount of the binder and the solvent is changed to that of the ceramic green sheet can be used. The conductive paste is a paste in which an organic binder and an organic solvent are added to metal powder.

[0072] Next, a plurality of conductive pastes for the internal electrodes 15 are printed in a given pattern on the ceramic green sheets, for example, by screen printing or gravure printing. Thus, a plurality of ceramic green sheets (referred to as "first ceramic green sheets 101") having a pattern of the first internal electrodes 15A formed thereon and a plurality of ceramic green sheets (referred to as "second ceramic green sheets 102") having a pattern of the second internal electrodes 15B formed thereon are obtained.

[0073] Next, the dielectric paste 118 for the second dielectric layer 18 is printed, for example, by screen printing, on the regions of the first ceramic green sheet 101 and the second ceramic green sheet 102 where the patterns of the internal electrodes 15 are not formed. A predetermined interval is provided between the patterns of the internal electrodes 15 and the dielectric paste 118 for the second dielectric layer 18. Thus, a gap 19 is formed between the internal electrode 15 and the second dielectric layer 18. The predetermined interval is adjusted so that the dimension of the gap 19 in the longitudinal direction L in the finished product of the multilayer ceramic capacitor 1 becomes a desired value.

[0074] Alternatively, the dielectric paste 118 for the second dielectric layer 18 may be disposed first, and then the pattern of the plurality of internal electrodes 15 may be formed using a conductive paste.

[0075] Next, a predetermined number of ceramic green sheets (referred to as "third ceramic green sheets 103") on which the pattern of the internal electrode 15 is not printed are stacked to form a portion that will become the outer layer portion 12. The first ceramic green sheets 101 and the second ceramic green sheets 102 are stacked alternately thereon to form a portion that will become the inner layer portion 11. A predetermined number of third ceramic green sheets 103 are stacked on the portion that will become the inner layer portion 11 to form a portion that will become the outer layer portion 12. Thus, a mother laminate 104 can be obtained.

[0076] Next, the mother laminated body 104 is pressed. As a method of pressing the mother laminated body 104, for example, a method such as rigid body pressing or isostatic pressing can be adopted.

[0077] Next, the pressed mother laminate 104 is cut into small pieces. As a method of cutting the mother laminate 104, for example, a method such as press cutting, dicing, or laser cutting can be adopted.

[0078] Next, the mother laminate 104 is cut along the width direction W at a position where the conductive paste is not arranged. Thus, the conductive paste is not exposed in the cut surface of the mother laminate 104 produced by the cutting. The mother laminate 104 is cut in the stacking direction T along the length direction L. The conductive paste is exposed in the cut surface of the mother laminate 104 produced by the cutting, and in detail, the cut surface and the end of each conductive paste on the cut surface side become roughly flush. Thus, the position of the end of each internal electrode 15 in the length direction L can be easily aligned. Through the above, the laminated body small piece 10 can be obtained.

[0079] Next, a ceramic green sheet for the side outer layer is adhered to the laminated body small piece 10. The ceramic green sheet for the side outer layer is adhered to each cut surface where the conductive paste is exposed. Thus, the side outer layer 20 is formed on the laminated body small piece 10. In the above, the laminated body 2 can be obtained. In addition, it is preferable to perform roller grinding or the like on the laminated body 2. Thus, the corners and ridges of the laminated body 2 are rounded.

[0080] Next, the laminate 2 is degreased in a nitrogen atmosphere. Next, the laminate 2 is fired in a mixed atmosphere of nitrogen, hydrogen, and water vapor. The temperature when firing the laminate 2 is preferably, for example, 900° C. or higher and 1300° C. or lower.

[0081] Next, each external electrode 3 is formed on the laminate 2. For example, a base electrode layer, a Sn plating layer, and a Ni plating layer are sequentially formed on the end surface C of the laminate 2. The base electrode layer is formed, for example, by applying and sintering a conductive paste containing a conductive metal and glass. The conductive metal of the base electrode layer is, for example, Cu, Ni, Ag, Pd, Ag-Pd alloy, Au, etc. The Ni plating layer and the Sn plating layer are formed, for example, by an electrolytic plating method or an electroless plating method.

[0082] In the above manner, the multilayer ceramic capacitor 1 can be obtained.

[0083] (Effects of Embodiments)

[0084] According to this embodiment, the following effects can be obtained.

[0085] A gap 19 is provided between the internal electrode 15 and the second dielectric layer 18 adjacent to the internal electrode 15 in the longitudinal direction L. This can prevent the dielectric ceramic from being partially disposed on the internal electrode 15, thereby preventing the smoothness of the internal electrode 15 from being impaired. Therefore, the reliability of the multilayer ceramic capacitor 1 can be improved.

[0086] The dimension of the gap 19 in the longitudinal direction L is 0.1% or more of the dimension of the lead portion 15b of the internal electrode 15 facing the internal electrode 15 forming the interface of the gap 19. This can more appropriately prevent the dielectric ceramic from being partially disposed on the internal electrode 15.

[0087] Furthermore, the dimension of the gap 19 in the longitudinal direction L is 50% or less of the dimension of the lead portion 15b of the internal electrode 15 in the longitudinal direction L that is opposed to the internal electrode 15 forming the interface of the gap 19. This can suppress a decrease in the adhesion between the adjacent first dielectric layers 17, and thus can more appropriately improve the reliability of the multilayer ceramic capacitor 1.

[0088] As mentioned above, although embodiment of this invention was described, this invention is not limited to the said embodiment, Various changes and deformation|transformation are possible.

[0089] For example, it is not necessary for all the internal electrodes 15 to have the gap 19 between them and the second dielectric layer 18 adjacent to them in the length direction L, and some of the internal electrodes 15 may be in contact with the second dielectric layer 18. However, it is preferred that 50% or more of the internal electrodes 15 among all the internal electrodes 15 have the gap 19 between them and the second dielectric layer 18 adjacent to them in the length direction L. Thus, the desired effect can be appropriately obtained.

Claims

1. A multilayer ceramic capacitor comprising: a laminate including dielectric layers and internal electrodes laminated in a lamination direction; and an external electrode connected to the internal electrode, The laminated ceramic capacitor is characterized in that The stacked body has a first main surface and a second main surface opposite to each other in the stacking direction, a first side surface and a second side surface opposite to each other in a width direction perpendicular to the stacking direction, and a first end surface and a second end surface opposite to each other in a length direction perpendicular to the stacking direction and the width direction. The internal electrode includes a first internal electrode led out to the first end surface and a second internal electrode led out to the second end surface. The dielectric layer includes a first dielectric layer and a second dielectric layer, The first dielectric layer is disposed between the first internal electrode and the second internal electrode. The second dielectric layer is arranged so as to overlap with the first dielectric layer in the stacking direction in a region where the internal electrode is not arranged between the first dielectric layers opposed to each other with the internal electrode interposed therebetween. A gap is provided between the internal electrode and the second dielectric layer adjacent to the internal electrode in the longitudinal direction.

2. The multilayer ceramic capacitor according to claim 1, It is characterized in that At least 50% of the internal electrodes among all the internal electrodes have the gap between them and the second dielectric layer adjacent to the internal electrode in the longitudinal direction.

3. The multilayer ceramic capacitor according to claim 1 or 2, It is characterized in that The internal electrode includes a facing portion where the internal electrodes adjacent to each other in the stacking direction face each other, and a lead portion extending from the facing portion toward the external electrode. A dimension of the void in the longitudinal direction is not less than 0.1% and not more than 50% of a dimension of the lead portion of the internal electrode in the longitudinal direction that faces the internal electrode forming an interface with the void.

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