Copper-clad ceramic substrate and power device

Abstract

The utility model provides a copper-clad ceramic substrate and a power device. The copper-clad ceramic substrate comprises a ceramic layer, a patterned upper copper layer formed on the upper surface of the ceramic layer, and a lower copper layer formed on the lower surface of the ceramic layer. The upper copper layer is provided with chip installation areas used for installing a plurality of chips. A cross-shaped load reducing groove is formed in the lower copper layer, and the lower surface of the lower copper layer is divided into a plurality of subareas by the load reducing groove; the lower surface of the lower copper layer is provided with thermal diffusion areas corresponding to the chips respectively. Each of the plurality of subareas comprises a heat diffusion area and a non-heat diffusion area, wherein the heat diffusion area is arranged in the middle of the subarea and corresponds to each chip, and the non-heat diffusion area is except the heat diffusion area. According to the utility model, the problem that the existing copper-clad ceramic substrate is easy to warp, deform and even break, so that the reliability and the stability of the copper-clad ceramic substrate are poor can be solved.

Description

Technical Field

[0001] The utility model belongs to the field of power devices, and more specifically, relates to a copper-clad ceramic substrate and a power device. Background Art

[0002] Copper-clad ceramic substrate is an electronic basic material formed by copper cladding on both sides of the ceramic layer. It has the advantages of good insulation, high thermal conductivity and high stability. It is widely used in power devices. Copper-clad ceramic substrate can be etched with circuit grooves in the copper layer on one side of the copper-clad ceramic substrate according to the electrical performance design requirements of the power device, and the copper layer is divided into multiple areas through the circuit grooves to facilitate the installation of the chip.

[0003] In the packaging process of power devices, a reflow soldering process is required to heat the etched copper-clad ceramic substrate at high temperature and cool it down. Since the thermal expansion coefficients of the copper layer and the ceramic layer of the copper-clad ceramic substrate are quite different, the materials will restrict each other during the temperature change process, resulting in different stresses in the copper layer and the ceramic layer of the copper-clad ceramic substrate during thermal expansion and cooling, which can easily cause the copper-clad ceramic substrate to warp or even break, increasing the possibility of thermal and electrical failure of the power device. Therefore, the reliability and stability of the existing copper-clad ceramic substrate are poor, which is not conducive to the use of power devices. Utility Model Content

[0004] The utility model aims to solve the problem that the existing copper-clad ceramic substrate is prone to warping, deformation or even fracture, resulting in poor reliability and stability.

[0005] In order to achieve the above-mentioned purpose, the utility model provides a copper-clad ceramic substrate and a power device.

[0006] According to a first aspect of the utility model, there is provided a copper-clad ceramic substrate, comprising a ceramic layer, a patterned upper copper layer formed on the upper surface of the ceramic layer, and a lower copper layer formed on the lower surface of the ceramic layer;

[0007] The upper copper layer has chip mounting areas for mounting a plurality of chips respectively;

[0008] A cross-shaped load-relief groove is formed on the lower copper layer, and the load-relief groove divides the lower surface of the lower copper layer into a plurality of partitions;

[0009] The lower copper layer has a heat diffusion area on its lower surface corresponding to each chip of the plurality of chips;

[0010] Each of the plurality of partitions includes the heat diffusion region corresponding to each chip and a non-heat diffusion region except the heat diffusion region, which is arranged in the middle thereof.

[0011] Optionally, the load-relief groove is arranged in the middle of the lower copper layer, and the length of the load-relief groove is smaller than the length of the center line of the lower copper layer.

[0012] Optionally, the depth of the load relief groove is less than the thickness of the lower copper layer.

[0013] Optionally, each of the partitions is symmetrically distributed along the load relief groove.

[0014] Optionally, the ceramic layer is a flat plate structure made of aluminum nitride, silicon nitride, aluminum oxide or beryllium oxide.

[0015] Optionally, the patterning of the upper copper layer is circuit grooves symmetrically distributed along a center line of a long axis of the upper copper layer.

[0016] According to a second aspect of the present invention, a power device is further provided, comprising the copper-clad ceramic substrate according to any one of the first aspects of the present invention, the power device further comprising:

[0017] Several chips;

[0018] The heat sink is arranged on the lower surface of the lower copper layer.

[0019] The beneficial effects of the utility model are:

[0020] The copper-clad ceramic substrate proposed by the utility model has a cross-shaped load-relief groove formed on the lower copper layer, so as to release part of the stress in the lower copper layer by using the load-relief groove, and can balance the stress of the upper copper layer and the lower copper layer on the ceramic layer to a certain extent, thereby reducing the possibility of warping, deformation or even fracture of the copper-clad ceramic substrate due to thermal expansion or cooling contraction. At the same time, the lower surface of the lower copper layer is divided into a plurality of partitions by using the load-relief groove, and the heat diffusion areas of a plurality of chips are correspondingly distributed in the middle of each partition, so as to ensure the normal heat dissipation of a plurality of chips. Compared with the existing copper-clad ceramic substrate, the copper-clad ceramic substrate of the utility model has high stability, can reduce the possibility of thermal failure and electrical failure of power devices, and is conducive to the use of power devices.

[0021] According to the above content, it can be known that the utility model can effectively solve the problem that the existing copper-clad ceramic substrate is prone to warping, deformation or even fracture, resulting in poor thermal conductivity and stability.

[0022] Other features and advantages of the present invention will be described in detail in the subsequent specific implementation section. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] The present invention may be better understood by referring to the following description in conjunction with the accompanying drawings, in which the same or similar reference numerals are used throughout the drawings to represent the same or similar components.

[0024] Figure 1 A schematic structural diagram of a lower copper layer of a copper-clad ceramic substrate according to an embodiment of the utility model is shown;

[0025] Figure 2 A schematic structural diagram of an upper copper layer of a copper-clad ceramic substrate according to an embodiment of the utility model is shown;

[0026] Figure 3 A schematic structural diagram of a power device according to an embodiment of the utility model is shown.

[0027] Reference numerals:

[0028] 1- Ceramic layer;

[0029] 2-Upper copper layer;

[0030] 21-line slot;

[0031] 3-lower copper layer;

[0032] 4- Chip;

[0033] 5-Chip mounting area;

[0034] 6- load relief groove;

[0035] 7-Partition;

[0036] 8-heat diffusion zone;

[0037] 9- Radiator. DETAILED DESCRIPTION

[0038] In order to enable technicians in the relevant technical field to more fully understand the technical solution of the utility model, the exemplary implementation of the utility model will be described in more comprehensive and detailed in conjunction with the accompanying drawings below. Obviously, the one or more implementations of the utility model described below are only one or more of the specific ways to implement the technical solution of the utility model, and are not exhaustive. It should be understood that other ways belonging to a general utility model concept can be used to implement the technical solution of the utility model, and should not be limited by the exemplary description of the implementation. Based on one or more implementations of the utility model, all other implementations obtained by ordinary technicians in this field without making creative work should fall within the scope of protection of the utility model.

[0039] Example: Figure 1 A schematic structural diagram of a lower copper layer of a copper-clad ceramic substrate according to an embodiment of the utility model is shown; Figure 2 The schematic structural diagram of the upper copper layer of the copper-clad ceramic substrate according to the embodiment of the utility model is shown.

[0040] Reference Figure 1-2 , an embodiment of the utility model provides a copper-clad ceramic substrate, comprising a ceramic layer 1, a patterned upper copper layer 2 formed on the upper surface of the ceramic layer 1, and a lower copper layer 3 formed on the lower surface of the ceramic layer 1;

[0041] The upper copper layer 2 has chip mounting areas 5 for mounting a plurality of chips 4 respectively;

[0042] A cross-shaped load-relief groove 6 is formed on the lower copper layer 3, and the load-relief groove 6 divides the lower surface of the lower copper layer 3 into a plurality of partitions 7;

[0043] The lower surface of the lower copper layer 3 has a heat diffusion region 8 corresponding to each chip 4 of the plurality of chips 4;

[0044] Each of the plurality of partitions 7 includes a heat diffusion region 8 corresponding to each chip 4 and a non-heat diffusion region other than the heat diffusion region.

[0045] In one embodiment, the ceramic layer 1 is a flat plate structure made of aluminum nitride, silicon nitride, aluminum oxide or beryllium oxide. Of course, it should be appreciated that the ceramic layer can also be made of other materials, and the present invention is not limited thereto. Any material that can achieve the same technical effect as the present invention is within the protection scope of the present invention.

[0046] In one embodiment, the upper copper layer 2 is patterned as circuit grooves 21 symmetrically distributed along the center line of the long axis of the upper copper layer 2 .

[0047] In one embodiment, the load-relief groove 6 is disposed in the middle of the lower copper layer 3 , and the length of the load-relief groove 6 is smaller than the length of the center line of the lower copper layer 3 .

[0048] In one embodiment, the depth of the load relief groove 6 is less than the thickness of the lower copper layer 3 .

[0049] Specifically, the load-relief groove can release the stress of the lower copper layer caused by heating or cooling, and at the same time, ensure that the lower copper layer has sufficient mechanical strength to play a supporting role, thereby ensuring the reliability of the copper-clad ceramic substrate.

[0050] In a specific embodiment, each partition 7 is symmetrically distributed along the load relief groove 6 .

[0051] Specifically, if i represents the layers below the chip in the copper-clad ceramic substrate, the equivalent heat transfer surface A starting from the i+1th layer is i The length and width are a i and b i , terminate the equivalent heat transfer surface A i+1 The length and width are a i+1 and b i+1, corresponding to the effective diffusion angle of each layer is α i , corresponding to the thickness of each layer is δ i , the length and width of the chip are a0 and b0 respectively, the specific formula is as follows:

[0052] a i+1 =a i +2δ i ·tanα i ;

[0053] b i+1 =b i +2δ i ·tanα i ;

[0054] A i+1 =a i+1 b i+1 =(a i +2δ i ·tanα i )(b i +2δ i ·tanα i ).

[0055] The above formula can be used to calculate the area of ​​the heat diffusion zone of the chip on the lower copper layer, so as to reasonably design the size of the load relief groove so that when the load relief groove balances the stress of the upper and lower copper layers to a certain extent, it can also ensure normal heat dissipation of the chip.

[0056] Correspondingly, based on a copper-clad ceramic substrate provided by the utility model, the utility model also provides a power device.

[0057] Figure 3 A schematic structural diagram of a power device according to an embodiment of the utility model is shown.

[0058] Reference Figure 3 , the power device of the utility model also includes:

[0059] Several chips 4;

[0060] The heat sink 9 is arranged on the lower surface of the lower copper layer 3 .

[0061] In one embodiment, the lower surface of the heat sink 9 is provided with heat dissipation pin fins for dissipating heat generated by the plurality of chips 4 .

[0062] Specifically, the heat sink dissipates the heat generated by the operation of several chips through heat dissipation pin fins to ensure the normal use of power devices.

[0063] The copper-clad ceramic substrate and power device proposed by the utility model form a cross-shaped load-relief groove on the lower copper layer, and the load-relief groove is arranged in the middle of the lower copper layer, and the length of the load-relief groove is less than the length of the center line of the lower copper layer, so as to release part of the stress in the lower copper layer by using the load-relief groove, and can balance the stress of the upper copper layer and the lower copper layer on the ceramic layer to a certain extent, thereby reducing the possibility of warping, deformation or even fracture of the copper-clad ceramic substrate due to thermal expansion or cooling contraction. At the same time, the lower surface of the lower copper layer is divided into a plurality of partitions by using the load-relief groove, and the heat diffusion areas of a plurality of chips are correspondingly distributed in the middle of each partition, so as to ensure the normal heat dissipation of the plurality of chips. Therefore, compared with the existing copper-clad ceramic substrate, the copper-clad ceramic substrate of the utility model has high stability, can reduce the possibility of thermal failure and electrical failure of the power device, and is conducive to the use of the power device.

[0064] Although one or more embodiments of the utility model are described above, it should be known to those skilled in the art that the utility model can be implemented in any other form without departing from its subject matter and scope. Therefore, the embodiments described above are illustrative rather than restrictive, and many modifications and substitutions are obvious to those skilled in the art without departing from the spirit and scope of the utility model as defined in the appended claims.

Claims

1. A copper-clad ceramic substrate, characterized in that: It includes a ceramic layer, a patterned upper copper layer formed on the upper surface of the ceramic layer, and a lower copper layer formed on the lower surface of the ceramic layer; The upper copper layer has chip mounting areas for mounting a plurality of chips respectively; A cross-shaped load-relief groove is formed on the lower copper layer, and the load-relief groove divides the lower surface of the lower copper layer into a plurality of partitions; The lower copper layer has a heat diffusion area on its lower surface corresponding to each chip of the plurality of chips; Each of the plurality of partitions includes the heat diffusion region corresponding to each chip and a non-heat diffusion region other than the heat diffusion region, which is arranged in the middle thereof.

2. The copper-clad ceramic substrate according to claim 1, characterized in that: The load-relief groove is arranged in the middle of the lower copper layer, and the length of the load-relief groove is smaller than the length of the center line of the lower copper layer.

3. The copper-clad ceramic substrate according to claim 2, characterized in that: The depth of the load relief groove is less than the thickness of the lower copper layer.

4. The copper-clad ceramic substrate according to claim 3, characterized in that: Each of the partitions is symmetrically distributed along the load relief groove.

5. The copper-clad ceramic substrate according to claim 4, characterized in that: The ceramic layer is a flat plate structure made of aluminum nitride, silicon nitride, aluminum oxide or beryllium oxide.

6. The copper-clad ceramic substrate according to claim 1, characterized in that: The patterning of the upper copper layer is circuit grooves symmetrically distributed along the center line of the long axis of the upper copper layer.

7. A power device, characterized in that: The copper-clad ceramic substrate according to any one of claims 1 to 6, wherein the power device further comprises: Several chips; The heat sink is arranged on the lower surface of the lower copper layer.

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