Integrated circuit chip packaging structure
By using a limiting mechanism of guide columns and circular frames in the chip package structure, the problem of chip displacement caused by equipment vibration is solved, the stability and yield of the chip are improved, and the heat dissipation ability is enhanced through the glue filling process.
Patent Information
- Application Number
- CN202420584114.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-03-25
- Publication Date
- 2024-12-17
- Estimated Expiration
- 2034-03-25
AI Technical Summary
During chip packaging, equipment vibration causes chip internal displacement of the substrate, resulting in processing failure and reducing the yield rate of chip production.
An integrated circuit chip packaging structure is designed, using a connecting mechanism between a guide column and a circular frame. The upper cover drives the circular frame downward movement, and the guide column enters the circular frame, achieving limit on the wafer and ensuring chip stability. .
It effectively prevents the chip from moving in the next process, improves the yield rate of the chip, and enhances the stability and heat dissipation ability of the chip through the glue filling process.
Smart Images
Figure CN222190705U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the technical field of chip packaging, in particular to an integrated circuit chip packaging structure. Background Art
[0002] An integrated circuit chip is a circuit with specific functions that integrates a large number of microelectronic components through semiconductor technology. These components and connecting wires are integrated on a small silicon chip, which is then welded and packaged in a packaging shell to form a microstructure with the required circuit function. It means packaging the integrated circuit chip in an external shell to protect the chip and provide connection with the external circuit. The chip can be protected from the influence of the external environment through packaging.
[0003] Existing chips are composed of a substrate, a wafer and a top cover. The wafer is installed inside the substrate and the top cover is installed on the top of the substrate. After assembly, the chip enters the glue filling process through a carrier. The glue filling process is one of the important processes in the chip packaging process. However, during transportation, some chips may be displaced due to equipment vibration, which may cause the wafer inside the substrate to shift. In this case, the chip processing may fail, reducing the yield rate of chip production.
[0004] Therefore, it is necessary to provide a new integrated circuit chip packaging structure to solve the above technical problems. Utility Model Content
[0005] In order to solve the above technical problems, the utility model provides an integrated circuit chip packaging structure.
[0006] The integrated circuit chip packaging structure provided by the utility model comprises a substrate, a wafer and two connecting mechanisms, wherein the bottom of the wafer is fixedly connected to the top of the substrate, the two connecting mechanisms are respectively arranged at both ends of the wafer, and the bottoms of the two connecting mechanisms are respectively fixedly connected to the top of the substrate;
[0007] The connecting mechanism includes a guide column, which is arranged on one side of the chip. The bottom of the guide column is fixedly connected to the top of the substrate. An upper cover is movably provided on the top of the substrate. A circular frame is fixedly provided on one side of the bottom of the upper cover. The top of the guide column extends into the inside of the circular frame and is movably connected to the circular frame. The bottom of the circular frame is movably connected to one side of the top of the chip.
[0008] Preferably, a square groove is formed at the top of the substrate, and the bottom of the wafer is fixedly connected to the inner surface of the square groove.
[0009] Preferably, a plurality of connection blocks are fixedly provided on the top of the wafer, and the bottoms of the plurality of connection blocks are fixedly connected to the top of the wafer.
[0010] Preferably, one side of the plurality of connection blocks is respectively provided with a conductive member, one side of the plurality of conductive members is respectively fixedly connected to one side of the plurality of connection blocks, the plurality of conductive members extend out of the interior of the substrate away from one side of the plurality of connection blocks, and the outer surfaces of the plurality of conductive members are respectively fixedly connected to the inner surface of the substrate.
[0011] Preferably, the conductive member comprises a pin, one side of the pin is fixedly connected to one side of one of the connection blocks, the pin extends out of the substrate away from one side of the connection blocks, and the outer surface of the pin is movably connected to the inner surface of the substrate.
[0012] Preferably, a circular groove for glue pouring is provided at the top of the upper cover.
[0013] Compared with the related art, the integrated circuit chip packaging structure provided by the utility model has the following beneficial effects:
[0014] After the packaging equipment installs the chip into the substrate, the packaging equipment sucks up the upper cover, moves the upper cover to the top of the substrate and performs a falling operation. The upper cover drives the circular frame to move downward, drives the guide column to enter the circular frame, and makes the circular frame contact with the chip at the same time, completing the limitation of the chip. The structure realizes the limitation of the chip inside the substrate, improves the stability of the chip inside the substrate, prevents the internal chip from moving when the chip enters the next process, avoids the situation that causes chip processing failure, and improves the chip yield to a certain extent. BRIEF DESCRIPTION OF THE DRAWINGS
[0015] Figure 1 This is a schematic diagram of the overall structure of the integrated circuit chip packaging structure provided by the utility model;
[0016] Figure 2 for Figure 1 The schematic cross-sectional structure diagram shown;
[0017] Figure 3 for Figure 2 The structural diagram of the connecting mechanism shown Figure 1 ;
[0018] Figure 4 for Figure 3 The structural diagram of the connecting mechanism shown Figure 2 ;
[0019] Figure 5 for Figure 4 The local structure schematic diagram shown;
[0020] Figure 6 for Figure 1 The structural schematic diagram of the upper cover is shown.
[0021] Numbers in the figure: 1, substrate; 2, chip; 3, guide column; 4, upper cover; 5, circular frame; 6, square groove; 7, connecting block; 8, pin; 9, circular groove. DETAILED DESCRIPTION
[0022] The utility model is further described below in conjunction with the accompanying drawings and implementation modes.
[0023] Please refer to Figure 1-Figure 6 ,in, Figure 1 This is a schematic diagram of the overall structure of the integrated circuit chip packaging structure provided by the utility model; Figure 2 for Figure 1 The schematic cross-sectional structure diagram shown; Figure 3 for Figure 2 The structural diagram of the connecting mechanism shown Figure 1 ; Figure 4 for Figure 3 The structural diagram of the connecting mechanism shown Figure 2 ; Figure 5 for Figure 4 The local structure schematic diagram shown; Figure 6 for Figure 1 The structural schematic diagram of the upper cover is shown.
[0024] In the specific implementation process, Figure 1-Figure 6As shown, an integrated circuit chip packaging structure includes a substrate 1, a wafer 2 and two connecting mechanisms. The bottom of the wafer 2 is fixedly connected to the top of the substrate 1. The two connecting mechanisms are respectively arranged at the two ends of the wafer 2. The bottoms of the two connecting mechanisms are respectively fixedly connected to the top of the substrate 1. The connecting mechanism includes a guide column 3. The guide column 3 is arranged on one side of the wafer 2. The bottom of the guide column 3 is fixedly connected to the top of the substrate 1. An upper cover 4 is movably provided on the top of the substrate 1. A circular frame 5 is fixedly provided on one side of the bottom of the upper cover 4. The top of the guide column 3 extends to the inside of the circular frame 5 and is movably connected to the circular frame 5. The bottom of the circular frame 5 is movably connected to one side of the top of the wafer 2. A square groove 6 is opened on the top of the substrate 1. The bottom of the wafer 2 is fixedly connected to the inner surface of the square groove 6. A plurality of connecting blocks 7 are respectively fixedly provided on the top of the wafer 2. The bottoms of the plurality of connecting blocks 7 are respectively fixedly connected to the top of the wafer 2. One side of the plurality of connecting blocks 7 is respectively provided with conductive parts. One side is fixedly connected to one side of multiple connection blocks 7, multiple conductive members extend out of the substrate 1 away from one side of the multiple connection blocks 7, and the outer surfaces of the multiple conductive members are fixedly connected to the inner surface of the substrate 1. The conductive member includes a pin 8, one side of the pin 8 is fixedly connected to one side of one of the connection blocks 7, the pin 8 extends out of the substrate 1 away from one side of the connection blocks 7, and the outer surface of the pin 8 is movably connected to the inner surface of the substrate 1. A circular groove 9 for glue pouring is provided on the top of the upper cover 4. The pin 8 is circuit-connected to the chip 2 through the connection block 7. The glue pouring process is an important step in chip packaging, which is mainly used to protect the chip and provide a stable working environment. The main purpose of the glue pouring process is to prevent the chip from being damaged by the external environment, such as moisture, dust, chemicals and mechanical stress. At the same time, the glue pouring can also provide a heat dissipation path to ensure that the heat generated by the chip during operation can be dissipated in time.
[0025] The working principle provided by the utility model is as follows: when the packaging equipment installs the chip 2 into the substrate 1, the packaging equipment sucks up the upper cover 4, moves the upper cover 4 to the top of the substrate 1 and performs a falling operation, drives the circular frame 5 to move downward through the upper cover 4, drives the guide column 3 to enter the circular frame 5, and at the same time makes the circular frame 5 contact with the chip 2 to complete the positioning of the chip 2, and then moves to the next process through the carrier, and the glue filling equipment performs the glue filling process through the circular groove 9 of the upper cover 4 to complete the fixation of the chip 2 inside the substrate 1, further improve the stability of the chip 2, and at the same time improve the heat dissipation capacity of the chip 2.
[0026] The circuits and controls involved in the present invention are all prior art and will not be described in detail here.
[0027] The above description is only an embodiment of the present invention, and does not limit the patent scope of the present invention. Any equivalent structure or equivalent process transformation made by using the contents of the specification and drawings of the present invention, or directly or indirectly applied in other related technical fields, are also included in the patent protection scope of the present invention.
Claims
1. An integrated circuit chip packaging structure, characterized in that: It comprises a substrate (1), a chip (2) and two connecting mechanisms, wherein the bottom of the chip (2) is fixedly connected to the top of the substrate (1), the two connecting mechanisms are respectively arranged at two ends of the chip (2), and the bottoms of the two connecting mechanisms are respectively fixedly connected to the top of the substrate (1); The connection mechanism comprises a guide column (3), the guide column (3) is arranged on one side of the wafer (2), the bottom of the guide column (3) is fixedly connected to the top of the substrate (1), the top of the substrate (1) is movably provided with an upper cover (4), one side of the bottom of the upper cover (4) is fixedly provided with a circular frame (5), the top of the guide column (3) extends into the inside of the circular frame (5) and is movably connected to the circular frame (5), and the bottom of the circular frame (5) is movably connected to one side of the top of the wafer (2).
2. The integrated circuit chip packaging structure according to claim 1, characterized in that: A square groove (6) is provided at the top of the substrate (1), and the bottom of the wafer (2) is fixedly connected to the inner surface of the square groove (6).
3. The integrated circuit chip packaging structure according to claim 2, characterized in that: A plurality of connection blocks (7) are fixedly provided on the top of the wafer (2), and the bottoms of the plurality of connection blocks (7) are fixedly connected to the top of the wafer (2).
4. The integrated circuit chip packaging structure according to claim 3, characterized in that: One side of the plurality of connection blocks (7) is respectively provided with a conductive member, one side of the plurality of conductive members is respectively fixedly connected to one side of the plurality of connection blocks (7), the plurality of conductive members extend out of the interior of the substrate (1) away from one side of the plurality of connection blocks (7), and the outer surfaces of the plurality of conductive members are respectively fixedly connected to the inner surface of the substrate (1).
5. The integrated circuit chip packaging structure according to claim 4, characterized in that: The conductive member comprises a pin (8), one side of the pin (8) is fixedly connected to one side of one of the connection blocks (7), the pin (8) extends out of the interior of the substrate (1) away from one side of the connection blocks (7), and the outer surface of the pin (8) is movably connected to the inner surface of the substrate (1).
6. The integrated circuit chip packaging structure according to claim 5, characterized in that: The top of the upper cover (4) is provided with a circular groove (9) for glue pouring.