Connection structure for testing power semiconductor device and device for testing power semiconductor device
By integrating multiple sockets in the power semiconductor device test device and controlling the test lines using mechanical switches, the problem of electromagnetic interference is solved, and a more accurate and stable high-temperature static parameter testing is achieved.
Patent Information
- Application Number
- CN202420593559.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-03-26
- Publication Date
- 2024-12-31
- Estimated Expiration
- 2034-03-26
AI Technical Summary
Existing power semiconductor device testing devices are susceptible to electromagnetic interference signals during high-temperature static parameter testing, resulting in inaccuracy and instability of measurement data.
A connection structure for testing of power semiconductor devices was designed. By integrating multiple sockets on the plug-in board, each socket leads to multiple key test lines, and a mechanical switch is used to control the on and off of each test line to ensure the power circuit and signal circuit. separation reduces the impact of electrical interference.
Improves the accuracy and consistency of measurement results, reduces interference, simplifies operational steps, improves the integration and flexibility of the test system, and is suitable for batch or continuous testing.
Smart Images
Figure CN222280692U_ABST
Abstract
Description
Technical Field
[0001] The embodiments of the present application relate to the field of semiconductor testing technology, and in particular to a connection structure for testing a power semiconductor device and a testing device thereof. Background Art
[0002] Power semiconductor devices are a special type of semiconductor components that are mainly used to process and control current and voltage from low voltage to high voltage, and play an important role in the conversion, switching and regulation of electric energy. These devices have high voltage resistance and large current handling capacity, and are widely used in automotive electronic systems, power conversion equipment, power conversion links in solar power generation systems, and other occasions that require high power management and energy conversion. In order to ensure that power semiconductor devices can maintain stable and efficient performance under various working conditions, high-temperature static parameter testing of semiconductor devices is usually required after manufacturing.
[0003] In the prior art, the high-temperature static parameters of semiconductor components are usually tested by placing the power semiconductor device in a temperature chamber and then connecting it to a test socket outside the temperature chamber with a wire. However, this test method is often affected by electromagnetic interference signals, which greatly reduces the accuracy and consistency of data measurement.
[0004] Therefore, how to design a power semiconductor device testing device that can ensure the accuracy of data measurement has become a technical problem that urgently needs to be solved when testing power semiconductor devices. Utility Model Content
[0005] The purpose of the embodiments of the present application is to provide a connection structure for testing a power semiconductor device and a testing device thereof, which solves the problem that test data of a traditional testing device has certain deviations and instability.
[0006] To achieve the above-mentioned purpose, the embodiments of the present application provide a connection structure for testing semiconductor devices, including a plug-in board, a control board, and a test socket. The connection structure for testing power semiconductor devices includes a plug-in board, a control board, and a test socket. The plug-in board is provided with a plurality of power device sockets, and each power device socket is provided with a plurality of lead pins corresponding to each pin of the power semiconductor device to be tested; the control board is provided with a transmission line and a connection socket, there are multiple transmission lines, and each transmission line is provided with a mechanical switch, and the transmission line connects different lead pins to interfaces on the connection socket, and the same lead pins of different power device sockets are connected to the same interface of the connection socket; the interface of the test socket is electrically connected one-to-one with the interface of the connection socket through the transmission line.
[0007] In addition, an embodiment of the present application also provides a device for testing a power semiconductor device, which includes an incubator, a tester, and any connection structure for testing a semiconductor device. The plug-in board is arranged in the incubator, and the test socket is arranged on the tester.
[0008] The connection structure for testing a power semiconductor device and the testing device thereof provided in the embodiments of the present application integrate multiple sockets on a plug-in board, each socket leads to multiple key test circuits, and a mechanical switch is used to control the on and off of each test circuit, thereby avoiding the influence of electrical interference on the experimental results and greatly reducing the interference of the control circuit on the experimental results.
[0009] In some implementations, the power device socket is provided with two lead pins corresponding to each pin of the power device semiconductor device to be tested.
[0010] In some embodiments, the mechanical switch is a dip switch, and there are multiple groups of dip switches. Multiple power device sockets are connected to the multiple groups of dip switches in a one-to-one correspondence. Each group of dip switches includes six sub-switches, and the multiple sub-switches in each group of dip switches are connected in series one-to-one to the transmission line connected to the corresponding power device socket.
[0011] In some embodiments, the transmission line is a high temperature resistant wire.
[0012] In some embodiments, a plurality of power device sockets are arranged in the same straight line direction.
[0013] In some embodiments, the temperature chamber is provided with a test hole for the transmission line to pass through.
[0014] In some embodiments, a temperature sensor is disposed in the incubator.
[0015] In some embodiments, the connection socket is disposed adjacent to the testing machine.
[0016] In some embodiments, the testing machine and the temperature chamber are located on opposite sides of the control panel. BRIEF DESCRIPTION OF THE DRAWINGS
[0017] One or more embodiments are exemplarily described by pictures in the corresponding drawings, and these exemplified descriptions do not constitute limitations on the embodiments. Elements with the same reference numerals in the drawings represent similar elements, and unless otherwise stated, the figures in the drawings do not constitute proportional limitations.
[0018] Figure 1 It is a structural schematic diagram of a connection structure for testing a power semiconductor device and a testing device thereof provided in some embodiments of the present application.
[0019] Description of reference numerals:
[0020] 11-temperature box; 111-plug-in board; 1111-power device socket; 112-test hole; 12-control board; 121-dip switch; 122-connection socket; 13 testing machine; 131-test socket; 14-high temperature resistant wire. DETAILED DESCRIPTION
[0021] To make the purpose, technical scheme and advantages of the embodiments of the present application clearer, each embodiment of the present application will be described in detail below in conjunction with the accompanying drawings. However, it will be appreciated by those skilled in the art that in each embodiment of the present application, many technical details are proposed in order to enable the reader to better understand the present application. However, even without these technical details and various changes and modifications based on the following embodiments, the technical scheme claimed in the present application can also be implemented. The division of the following embodiments is for the convenience of description, and the specific implementation of the present application should not constitute any limitation, and the various embodiments can be combined with each other and referenced to each other without contradiction.
[0022] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by technicians in the technical field to which this application belongs; the terms used herein are only for the purpose of describing specific embodiments and are not intended to limit this application; the terms "including" and "having" in the specification and claims of this application and the above-mentioned figure descriptions and any variations thereof are intended to cover non-exclusive inclusions.
[0023] In the description of the embodiments of the present application, the technical terms "first", "second", etc. are only used to distinguish different objects, and cannot be understood as indicating or implying relative importance or implicitly indicating the number, specific order or primary and secondary relationship of the indicated technical features. In the description of the embodiments of the present application, the meaning of "multiple" is more than two, unless otherwise clearly and specifically defined.
[0024] In the description of the embodiments of the present application, unless otherwise clearly specified and limited, technical terms such as "installed", "connected", "connected" and the like should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, and it can be the internal connection of two elements or the interaction relationship between two elements. For ordinary technicians in this field, the specific meanings of the above terms in the embodiments of the present application can be understood according to the specific circumstances.
[0025] The technical scheme of the power device test device in the prior art mainly includes three parts: a power device socket, a high temperature resistant wire, and a test socket. At present, when testing the high temperature static parameters of power semiconductor devices, the sample to be tested is usually installed on the power device socket and then placed in an incubator. The test socket outside the incubator is electrically connected, and then the incubator temperature is set according to the conditions. After the conditions are met, a power device sample to be measured first is determined, and the corresponding test socket is inserted into the test socket jack, and then the test is carried out. After completing the test of a single sample, the original test socket needs to be unplugged, and then the test socket corresponding to the next sample to be tested is installed on the test machine. Repeat the operation and so on to complete the test of all samples.
[0026] However, this method has significant disadvantages. No effective measures are taken between the power device socket and the test socket to isolate the power circuit and the signal circuit in the test circuit. Especially when testing high-power current and voltage, it is easy for high-power signals to interfere with low-power test signals, which may cause the measurement results to deviate from the true value.
[0027] In order to ensure the consistency and accuracy of the test results, some embodiments of the present application provide a connection structure for testing a power semiconductor device. By integrating multiple sockets on a plug-in board, each socket directly leads to multiple key test circuits, and a mechanical switch is used to control the on and off of each test circuit, thereby effectively separating the power circuit and the signal circuit in the test circuit, ensuring that the measurement process is not affected by large current and voltage, thereby reducing interference and improving the accuracy of signal detection.
[0028] In order to better understand the technical solutions and technical effects of this application, Figure 1 A specific embodiment of a connection structure for testing a power semiconductor device is described in detail.
[0029] like Figure 1 As shown, the connection structure for testing power semiconductor devices provided in some embodiments of the present application includes a plug-in board 111, a control board 12, and a test socket 131. The plug-in board 111 is provided with a plurality of power device sockets 1111 for fixing and installing the power semiconductor device to be tested, and each power device socket 1111 is provided with a plurality of lead pins corresponding to each pin of the power semiconductor device to be tested; the control board 12 is provided with a transmission line and a connection socket 122, there are multiple transmission lines, each transmission line is provided with a mechanical switch, the transmission line connects different lead pins to the interface of the connection socket 122, and the same lead pins of different power device sockets 1111 are connected to the same interface of the connection socket 7; the interface of the test socket 131 is electrically connected to the interface of the connection socket 122 one by one through the transmission line.
[0030] By integrating multiple sockets 2 on the plug-in board 111, and using mechanical switches to control the on and off of each line, multiple samples can be installed and tested simultaneously under the same temperature chamber 11; and each mechanical switch can independently control the on and off state of the corresponding test circuit, ensuring that only the required signal and power paths are turned on when testing different samples, effectively separating the power circuit and the signal circuit in the test circuit, ensuring that it is not affected by large currents and voltages during the measurement process, and ensuring the accuracy of the test results. At the same time, the same lead pins of multiple power device sockets 1111 are uniformly connected to a connection socket 122, which is convenient for centralized management and control through the control board 12, simplifies the signal transmission path, and improves the integration of the test system. At the same time, multiple transmission lines are connected to the same connection socket 122, which can reduce the need for external wiring and reduce wiring complexity, and is also conducive to improving the stability and reliability of signal transmission.
[0031] Specifically, the test socket 131 is provided with dedicated interfaces whose number and arrangement order match the connection socket 122 of the control board 12, ensuring that the line signal drawn from the socket 2 of the plug-in board 111 and processed by the control board 12 dial switch 121 and the connection socket 122 can be accurately connected to the corresponding interface position of the test socket 131 according to the preset corresponding relationship. This one-to-one design structure greatly improves the reliability and consistency of signal transmission, so that every link in the test process can be accurately controlled, thereby effectively avoiding measurement errors caused by wiring errors or signal confusion. In addition, through such an integrated design, not only the operating steps are simplified and the overall coordination of the experimental equipment is enhanced, but also it is convenient to quickly switch different power semiconductor devices to be tested during batch or continuous testing, thereby improving the flexibility and work efficiency of the entire test system.
[0032] The connection structure for semiconductor device testing provided in some embodiments of the present application reduces the sample replacement steps and ensures accurate and interference-free signal transmission by centrally installing multiple power device sockets 1111 and test sockets 131 and uniformly controlling the on and off of the transmission line through a dip switch 121, thereby improving test efficiency and accuracy.
[0033] In some embodiments of the present application, the power device socket 1111 is provided with two lead pins corresponding to each pin of the power device semiconductor device to be tested.
[0034] The power device socket 1111 leads out two transmission lines according to the pins of the power semiconductor device, and adopts the Kelvin wiring method. The Kelvin wiring method effectively eliminates the errors caused by the contact resistance and the resistance of the wire 9 when detecting the voltage, greatly reduces the interference in the measurement process, and improves the measurement accuracy. At the same time, by providing an independent test line for the pins of each semiconductor component, the key parameters of the device can be accurately measured at multiple points and in all directions, ensuring the acquisition of comprehensive and accurate static performance data.
[0035] In some embodiments of the present application, the mechanical switch is a dip switch 121, and multiple power device sockets 1111 are connected one-to-one with multiple groups of dip switches 121. Each group of dip switches 121 includes six sub-switches, and the multiple sub-switches in each group of dip switches 121 are connected in series one-to-one on the transmission line connected to the corresponding power device socket 1111.
[0036] Compared with the electrical switch, the dip switch 121 is a mechanical switch that does not generate significant electromagnetic interference during the switching process, especially when measuring small signal parameters, it can significantly reduce the impact of transient noise generated by the switch action on the test results. And by setting a plurality of dip switches 121 corresponding to the sockets 2 one by one, the multiple lines led out of the sockets 1111 are connected to the input end of the dip switch 121 in a specific order, and the operator can flexibly select and switch different pin signals of the semiconductor element to be tested by adjusting the state of the dip switch 121 as needed, so as to achieve selective measurement of different test parameters, and the connector 122 is connected in parallel to the output ends of the corresponding lines of all the dip switches 121, so that the line signals led out of each socket 2 can be integrated together, which is convenient for centralized control and batch processing, so that when performing multi-channel or batch testing, there is no need to connect the wires one by one, which not only simplifies the experimental operation process, but also improves the test efficiency; at the same time, each dip switch 121 includes six switches arranged from top to bottom, which reduces the impact of electrical noise on the test results by physical isolation, and further ensures the accuracy of the measurement data.
[0037] In some embodiments of the present application, the connection structure transmission line for testing a semiconductor device is a high temperature resistant wire 14 .
[0038] Since the test environment may involve high temperature conditions, the use of high temperature resistant wires 14 can maintain good electrical performance and physical stability in high temperature environments, prevent problems such as degradation of insulation performance due to excessive temperature or aging and failure of the wires 9, and ensure data accuracy during long-term, high temperature testing in the incubator 11; through the high temperature resistant wires 14, each socket 2, dip switch 121, connection socket 122 and test socket 131 interface are interconnected to form a complete test loop, so that the entire test device can be operated in an integrated manner, which is convenient for rapid switching and precise measurement of different samples.
[0039] In some embodiments of the present application, a plurality of power device sockets 1111 are arranged in the same straight line direction.
[0040] The design of arranging multiple power semiconductor device sockets 2 in the same straight line is mainly to improve the utilization of the space of the temperature box 11, and simplify the test operation process and improve the test efficiency through integration. Such a layout allows the plug-in board 111 to install more samples to be tested in a limited space, thereby achieving the purpose of simultaneously performing high-temperature static parameter tests on multiple samples under the same temperature condition, avoiding the temperature fluctuation of the temperature box 11 and the increase of the experimental time caused by frequent sample replacement.
[0041] Some embodiments of the present application also provide a device for testing a power semiconductor device, including an incubator 11 , a tester 13 and any connection structure for testing a semiconductor device, wherein the plug-in board 111 is disposed in the incubator 11 , and the test socket 131 is disposed on the tester 13 .
[0042] The plug-in board 111 is placed inside the incubator 11, so that the power semiconductor device samples installed thereon can be directly exposed to the set high temperature environment, ensuring that all samples to be tested are tested under the same temperature conditions, which is conducive to obtaining more accurate and consistent static parameter data. The test socket 131 is installed on the test machine 13, realizing the integration and physical connection of the components of the entire test system, so that the test signal transmitted from the inside of the incubator 11 via the high temperature resistant wire 14 can be smoothly imported into the test machine 13 for analysis and processing. Combining the test socket 131 with the test machine 13 simplifies the operating procedures of the experimenter, eliminates the need for manual direct connection of various lines, reduces the probability of errors, and is conducive to realizing an automated or semi-automated test process.
[0043] In some embodiments of the present application, the temperature box 11 is provided with a test hole 112 for the transmission line to pass through.
[0044] The design of the test hole 112 provides a physical channel for connecting the plug-in board 111 and the control board 12, so that multiple transmission lines can pass through the test hole 112 from the inside of the temperature box 11 to the external control board 12 through the high temperature resistant wire 14, ensuring the continuity and stability of signal transmission under high temperature conditions. Leading the line to the outside of the temperature box 11 through the test hole 112 avoids the influence of the complex environment inside the temperature box 11 on the measurement signal, reduces the noise interference during the test process, and improves the accuracy of the measurement data.
[0045] In some embodiments of the present application, a temperature sensor is disposed in the incubator 11 .
[0046] The temperature change in the incubator 11 is monitored in real time by a temperature sensor to ensure that the incubator 11 can accurately reach and maintain the specified high-temperature test temperature according to the preset conditions, and provide a stable thermal environment for the power semiconductor components to facilitate accurate high-temperature static parameter testing; and when a temperature sensor is configured in the incubator 11, automatic monitoring of the test process can be achieved. Once it is detected that the temperature deviates from the set value, the system will automatically adjust the heating or cooling device to ensure that the test process is carried out at a constant temperature, thereby avoiding the consistency and accuracy of the test results affected by temperature fluctuations.
[0047] In some embodiments of the present application, the connection socket 122 is disposed adjacent to the testing machine 13 .
[0048] Placing the connection socket 122 near the test machine 13 helps to shorten the distance between the signal line of the power semiconductor element to be tested led out from the inside of the temperature chamber 11 and the test machine 13, thereby reducing the transmission loss and delay of the signal in the wire and ensuring the accuracy and real-time performance of the measurement data.
[0049] In some embodiments of the present application, the testing machine 13 and the temperature box 11 are located on two opposite sides of the control board 12 .
[0050] The plug-in board 111 inside the incubator 11 is connected to the external control board 12 through a high temperature resistant wire 14, and the test machine 13 selectively connects to the circuit of the sample to be tested through the dip switch 121 on the control board 12. Such a structural design facilitates the physical distance between different functional areas to be enlarged, thereby simplifying the wiring structure and making the connection clearer and more orderly. At the same time, after the tester completes the sample installation and temperature condition setting on one side of the incubator 11, he can directly perform precise testing on the other side of the test machine 13, without frequently shuttling between the high temperature zone and the low temperature zone, which improves work efficiency and comfort.
[0051] Finally, when testing power semiconductor devices, the device uses multiple adjustable dial switches 121 to synchronously control the connection and disconnection status of all related test circuits. By changing the specific position settings of these dial switches 121, the conduction and cutoff conditions of each test channel can be controlled at one time. According to the characteristics of the semiconductor component to be tested and the parameters required for the test, the operator can easily select the corresponding test circuit by toggling the dial switch 121, so as to flexibly execute different test items. Moreover, by uniformly controlling multiple groups of test circuits, the device can simultaneously measure different pins of multiple samples under the same temperature conditions, realizing the function of batch testing.
[0052] The above is only a preferred embodiment of the present application and does not constitute any formal limitation to the present application. Although the present application has been disclosed as above with a preferred embodiment, it is not intended to limit the present application. Any technician familiar with the art can make many possible changes and modifications to the technical solution of the present application using the methods and technical contents disclosed above without departing from the scope of the technical solution of the present application, or modify it into an equivalent embodiment of equivalent changes. Therefore, any simple modification, equivalent change and modification made to the above embodiments based on the technical essence of the present application without departing from the content of the technical solution of the present application still fall within the scope of protection of the technical solution of the present application.
Claims
1. A connection structure for testing a power semiconductor device, characterized in that: include: A plug-in board is provided with a plurality of power device sockets for fixing and mounting the power semiconductor device to be tested, each of the power device sockets is provided with a plurality of lead pins corresponding to each pin of the power semiconductor device to be tested; A control board is provided with a transmission line and a connection socket, wherein there are multiple transmission lines, each of which is provided with a mechanical switch, and multiple transmission lines connect different lead pins to interfaces on the connection socket, and the same lead pins of different power device sockets are commonly connected to the same interface of the connection socket; A test socket, wherein an interface of the test socket is electrically connected one-to-one with an interface of the connection socket through the transmission line.
2. The connection structure for testing a power semiconductor device according to claim 1, characterized in that: The power device socket is provided with two lead-out pins corresponding to each pin of the power device semiconductor device to be tested.
3. The connection structure for testing a power semiconductor device according to claim 1, characterized in that: The mechanical switch is a dip switch, and there are multiple groups of dip switches. Multiple power device sockets are connected to the multiple groups of dip switches in a one-to-one correspondence. Each group of the dip switches includes six sub-switches, and the multiple sub-switches in each group of the dip switches are connected in series one-to-one to the transmission line connected to the corresponding power device socket.
4. The connection structure for testing a power semiconductor device according to claim 1, wherein: The transmission line is a high temperature resistant wire.
5. The connection structure for testing a power semiconductor device according to claim 1, characterized in that: The plurality of power device sockets are arranged in the same straight line direction.
6. A device for testing a power semiconductor device, characterized in that: include: A temperature chamber, a test machine, and a connection structure for testing a semiconductor device as claimed in any one of claims 1 to 4, wherein the plug-in board is arranged in the temperature chamber, and the test socket is arranged on the test machine.
7. The power semiconductor device testing device according to claim 6, characterized in that: The temperature box is provided with a test hole for the transmission line to pass through.
8. The power semiconductor device testing device according to claim 6, characterized in that: A temperature sensor is arranged in the temperature box.
9. The power semiconductor device testing device according to claim 6, characterized in that: The connection seat is arranged adjacent to the testing machine.
10. The power semiconductor device testing device according to claim 9, characterized in that: The testing machine and the temperature box are located on two opposite sides of the control panel.